CVS commit: src/sys/arch/arm/imx

2021-03-07 Thread Michael van Elst
Module Name:src
Committed By:   mlelstv
Date:   Mon Mar  8 06:23:32 UTC 2021

Modified Files:
src/sys/arch/arm/imx: imxuart.c

Log Message:
always re-read status register in the loop.


To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/arm/imx/imxuart.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imxuart.c
diff -u src/sys/arch/arm/imx/imxuart.c:1.26 src/sys/arch/arm/imx/imxuart.c:1.27
--- src/sys/arch/arm/imx/imxuart.c:1.26	Fri Nov 20 18:16:40 2020
+++ src/sys/arch/arm/imx/imxuart.c	Mon Mar  8 06:23:31 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: imxuart.c,v 1.26 2020/11/20 18:16:40 thorpej Exp $ */
+/* $NetBSD: imxuart.c,v 1.27 2021/03/08 06:23:31 mlelstv Exp $ */
 
 /*
  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
@@ -96,7 +96,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imxuart.c,v 1.26 2020/11/20 18:16:40 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imxuart.c,v 1.27 2021/03/08 06:23:31 mlelstv Exp $");
 
 #include "opt_imxuart.h"
 #include "opt_ddb.h"
@@ -1720,11 +1720,11 @@ imxuintr(void *arg)
 			cn_check_magic(sc->sc_tty->t_dev,
    CNC_BREAK, imxuart_cnm_state);
 			if (cn_trapped)
-continue;
+goto next;
 #if defined(KGDB) && !defined(DDB)
 			if (ISSET(sc->sc_hwflags, IMXUART_HW_KGDB)) {
 kgdb_connect(1);
-continue;
+goto next;
 			}
 #endif
 		}
@@ -1776,6 +1776,7 @@ imxuintr(void *arg)
 		}
 #endif
 
+next:
 		usr2 = bus_space_read_4(iot, ioh, IMX_USR2);
 	} while (usr2 & (IMX_USR2_RDR|IMX_USR2_BRCD));
 



CVS commit: src/sys/arch/arm/imx

2020-12-30 Thread Valeriy E. Ushakov
Module Name:src
Committed By:   uwe
Date:   Thu Dec 31 02:16:14 UTC 2020

Modified Files:
src/sys/arch/arm/imx: if_enet.c

Log Message:
enet(4): fix refactoring accident.  Spotted by mrg@.


To generate a diff of this commit:
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/arm/imx/if_enet.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/if_enet.c
diff -u src/sys/arch/arm/imx/if_enet.c:1.32 src/sys/arch/arm/imx/if_enet.c:1.33
--- src/sys/arch/arm/imx/if_enet.c:1.32	Thu May 14 08:34:19 2020
+++ src/sys/arch/arm/imx/if_enet.c	Thu Dec 31 02:16:14 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_enet.c,v 1.32 2020/05/14 08:34:19 msaitoh Exp $	*/
+/*	$NetBSD: if_enet.c,v 1.33 2020/12/31 02:16:14 uwe Exp $	*/
 
 /*
  * Copyright (c) 2014 Ryo Shimizu 
@@ -31,7 +31,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_enet.c,v 1.32 2020/05/14 08:34:19 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_enet.c,v 1.33 2020/12/31 02:16:14 uwe Exp $");
 
 #include "vlan.h"
 
@@ -1844,7 +1844,7 @@ enet_init_regs(struct enet_softc *sc, in
 	sc->sc_rxdesc_dmamap->dm_mapsize, BUS_DMASYNC_PREWRITE);
 
 	/* enable interrupts */
-	val = ENET_EIMR | ENET_EIR_TXF | ENET_EIR_RXF | ENET_EIR_EBERR;
+	val = ENET_EIR_TXF | ENET_EIR_RXF | ENET_EIR_EBERR;
 	if (sc->sc_imxtype == 7)
 		val |= ENET_EIR_TXF2 | ENET_EIR_RXF2 | ENET_EIR_TXF1 |
 		ENET_EIR_RXF1;



CVS commit: src/sys/arch/arm/imx

2020-12-26 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Sat Dec 26 22:28:35 UTC 2020

Removed Files:
src/sys/arch/arm/imx: imx7_ccmreg.h imx7_ccmvar.h imx7_gpcreg.h
imx7_iomuxreg.h imx7_ocotpreg.h imx7_srcreg.h imx7_usbreg.h
imx7var.h

Log Message:
G/C


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r0 src/sys/arch/arm/imx/imx7_ccmreg.h \
src/sys/arch/arm/imx/imx7_gpcreg.h src/sys/arch/arm/imx/imx7_srcreg.h \
src/sys/arch/arm/imx/imx7_usbreg.h
cvs rdiff -u -r1.1 -r0 src/sys/arch/arm/imx/imx7_ccmvar.h \
src/sys/arch/arm/imx/imx7_iomuxreg.h src/sys/arch/arm/imx/imx7_ocotpreg.h
cvs rdiff -u -r1.3 -r0 src/sys/arch/arm/imx/imx7var.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/imx/fdt

2020-11-24 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Wed Nov 25 05:18:39 UTC 2020

Modified Files:
src/sys/arch/arm/imx/fdt: imx_ccm_div.c

Log Message:
`best_diff' should be kept to a positive number


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/fdt/imx_ccm_div.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/fdt/imx_ccm_div.c
diff -u src/sys/arch/arm/imx/fdt/imx_ccm_div.c:1.1 src/sys/arch/arm/imx/fdt/imx_ccm_div.c:1.2
--- src/sys/arch/arm/imx/fdt/imx_ccm_div.c:1.1	Wed Jun 10 17:57:50 2020
+++ src/sys/arch/arm/imx/fdt/imx_ccm_div.c	Wed Nov 25 05:18:39 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: imx_ccm_div.c,v 1.1 2020/06/10 17:57:50 jmcneill Exp $ */
+/* $NetBSD: imx_ccm_div.c,v 1.2 2020/11/25 05:18:39 ryo Exp $ */
 
 /*-
  * Copyright (c) 2020 Jared McNeill 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx_ccm_div.c,v 1.1 2020/06/10 17:57:50 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx_ccm_div.c,v 1.2 2020/11/25 05:18:39 ryo Exp $");
 
 #include 
 #include 
@@ -97,7 +97,7 @@ imx_ccm_div_set_rate(struct imx_ccm_soft
 		} else {
 			if (abs(diff) < abs(best_diff)) {
 best_n = n;
-best_diff = diff;
+best_diff = abs(diff);
 			}
 		}
 	}



CVS commit: src/sys/arch/arm/imx

2020-11-20 Thread Jason R Thorpe
Module Name:src
Committed By:   thorpej
Date:   Fri Nov 20 18:16:40 UTC 2020

Modified Files:
src/sys/arch/arm/imx: imx51_ipuv3.c imxuart.c

Log Message:
malloc(9) -> kmem(9)


To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/imx/imx51_ipuv3.c
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/arm/imx/imxuart.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx51_ipuv3.c
diff -u src/sys/arch/arm/imx/imx51_ipuv3.c:1.8 src/sys/arch/arm/imx/imx51_ipuv3.c:1.9
--- src/sys/arch/arm/imx/imx51_ipuv3.c:1.8	Sun Nov 10 21:16:23 2019
+++ src/sys/arch/arm/imx/imx51_ipuv3.c	Fri Nov 20 18:16:40 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_ipuv3.c,v 1.8 2019/11/10 21:16:23 chs Exp $	*/
+/*	$NetBSD: imx51_ipuv3.c,v 1.9 2020/11/20 18:16:40 thorpej Exp $	*/
 
 /*
  * Copyright (c) 2011, 2012  Genetec Corporation.  All rights reserved.
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx51_ipuv3.c,v 1.8 2019/11/10 21:16:23 chs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx51_ipuv3.c,v 1.9 2020/11/20 18:16:40 thorpej Exp $");
 
 #include "opt_imx51_ipuv3.h"
 
@@ -35,7 +35,7 @@ __KERNEL_RCSID(0, "$NetBSD: imx51_ipuv3.
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 			/* for cold */
 
 #include 
@@ -932,7 +932,7 @@ imx51_ipuv3_new_screen(struct imx51_ipuv
 	width = geometry->panel_width;
 	height = geometry->panel_height;
 
-	scr = malloc(sizeof(*scr), M_DEVBUF, M_WAITOK | M_ZERO);
+	scr = kmem_zalloc(sizeof(*scr), KM_SLEEP);
 	scr->nsegs = 0;
 	scr->depth = depth;
 	scr->stride = width * depth / 8;
@@ -944,7 +944,7 @@ imx51_ipuv3_new_screen(struct imx51_ipuv
 		aprint_error_dev(sc->dev,
 		"failed to allocate %u bytes of video memory: %d\n",
 		scr->stride * height, error);
-		free(scr, M_DEVBUF);
+		kmem_free(scr, sizeof(*scr));
 		return error;
 	}
 

Index: src/sys/arch/arm/imx/imxuart.c
diff -u src/sys/arch/arm/imx/imxuart.c:1.25 src/sys/arch/arm/imx/imxuart.c:1.26
--- src/sys/arch/arm/imx/imxuart.c:1.25	Wed May 20 09:18:25 2020
+++ src/sys/arch/arm/imx/imxuart.c	Fri Nov 20 18:16:40 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: imxuart.c,v 1.25 2020/05/20 09:18:25 hkenken Exp $ */
+/* $NetBSD: imxuart.c,v 1.26 2020/11/20 18:16:40 thorpej Exp $ */
 
 /*
  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
@@ -96,7 +96,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imxuart.c,v 1.25 2020/05/20 09:18:25 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imxuart.c,v 1.26 2020/11/20 18:16:40 thorpej Exp $");
 
 #include "opt_imxuart.h"
 #include "opt_ddb.h"
@@ -148,7 +148,7 @@ __KERNEL_RCSID(0, "$NetBSD: imxuart.c,v 
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
@@ -354,8 +354,8 @@ imxuart_attach_subr(struct imxuart_softc
 	tp->t_hwiflow = imxuhwiflow;
 
 	sc->sc_tty = tp;
-	sc->sc_rbuf = malloc(sizeof (*sc->sc_rbuf) * imxuart_rbuf_size,
-	M_DEVBUF, M_WAITOK);
+	sc->sc_rbuf = kmem_alloc(sizeof (*sc->sc_rbuf) * imxuart_rbuf_size,
+	KM_SLEEP);
 	sc->sc_rbuf_size = imxuart_rbuf_size;
 	sc->sc_rbuf_in = sc->sc_rbuf_out = 0;
 	sc->sc_txfifo_len = 32;
@@ -542,7 +542,7 @@ imxuart_detach(device_t self, int flags)
 	}
 
 	/* Free the receive buffer. */
-	free(sc->sc_rbuf, M_DEVBUF);
+	kmem_free(sc->sc_rbuf, sizeof(*sc->sc_rbuf) * sc->sc_rbuf_size);
 
 	/* Detach and free the tty. */
 	tty_detach(sc->sc_tty);



CVS commit: src/sys/arch/arm/imx/fdt

2020-09-28 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Mon Sep 28 12:15:23 UTC 2020

Modified Files:
src/sys/arch/arm/imx/fdt: imx6_platform.c

Log Message:
faa_a4x_bst is no more


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/imx/fdt/imx6_platform.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/fdt/imx6_platform.c
diff -u src/sys/arch/arm/imx/fdt/imx6_platform.c:1.10 src/sys/arch/arm/imx/fdt/imx6_platform.c:1.11
--- src/sys/arch/arm/imx/fdt/imx6_platform.c:1.10	Fri Jul 10 12:25:09 2020
+++ src/sys/arch/arm/imx/fdt/imx6_platform.c	Mon Sep 28 12:15:23 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_platform.c,v 1.10 2020/07/10 12:25:09 skrll Exp $	*/
+/*	$NetBSD: imx6_platform.c,v 1.11 2020/09/28 12:15:23 jmcneill Exp $	*/
 /*-
  * Copyright (c) 2019 Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -25,7 +25,7 @@
  * SUCH DAMAGE.
  */
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_platform.c,v 1.10 2020/07/10 12:25:09 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_platform.c,v 1.11 2020/09/28 12:15:23 jmcneill Exp $");
 
 #include "arml2cc.h"
 #include "opt_console.h"
@@ -72,7 +72,6 @@ __KERNEL_RCSID(0, "$NetBSD: imx6_platfor
 #endif
 
 extern struct bus_space armv7_generic_bs_tag;
-extern struct bus_space armv7_generic_a4x_bs_tag;
 extern struct arm32_bus_dma_tag arm_generic_dma_tag;
 
 static const struct pmap_devmap *
@@ -91,7 +90,6 @@ static void
 imx_platform_init_attach_args(struct fdt_attach_args *faa)
 {
 	faa->faa_bst = _generic_bs_tag;
-	faa->faa_a4x_bst = _generic_a4x_bs_tag;
 	faa->faa_dmat = _generic_dma_tag;
 }
 



CVS commit: src/sys/arch/arm/imx

2020-06-21 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Sun Jun 21 16:33:34 UTC 2020

Modified Files:
src/sys/arch/arm/imx: files.imx51

Log Message:
Remove all paltforms


To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/imx/files.imx51

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx51
diff -u src/sys/arch/arm/imx/files.imx51:1.23 src/sys/arch/arm/imx/files.imx51:1.24
--- src/sys/arch/arm/imx/files.imx51:1.23	Sun Jun 21 08:02:43 2020
+++ src/sys/arch/arm/imx/files.imx51	Sun Jun 21 16:33:34 2020
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx51,v 1.23 2020/06/21 08:02:43 simonb Exp $
+#	$NetBSD: files.imx51,v 1.24 2020/06/21 16:33:34 skrll Exp $
 #
 # Configuration info for the Freescale i.MX5x
 #
@@ -117,7 +117,7 @@ file	arch/arm/imx/imxi2c.c		imxi2c
 file	arch/arm/imx/imx51_i2c.c	imxi2c
 
 # SPI bus controller
-# attach of this driver need to be specified in paltform configuration
+# attach of this driver need to be specified in platform configuration
 # use flags to module version
 device  imxspi : spibus
 filearch/arm/imx/imxspi.c			imxspi



CVS commit: src/sys/arch/arm/imx

2020-06-21 Thread Simon Burge
Module Name:src
Committed By:   simonb
Date:   Sun Jun 21 08:02:43 UTC 2020

Modified Files:
src/sys/arch/arm/imx: files.imx51

Log Message:
Fix tyop.


To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/arm/imx/files.imx51

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx51
diff -u src/sys/arch/arm/imx/files.imx51:1.22 src/sys/arch/arm/imx/files.imx51:1.23
--- src/sys/arch/arm/imx/files.imx51:1.22	Sat May 23 06:21:15 2020
+++ src/sys/arch/arm/imx/files.imx51	Sun Jun 21 08:02:43 2020
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx51,v 1.22 2020/05/23 06:21:15 rin Exp $
+#	$NetBSD: files.imx51,v 1.23 2020/06/21 08:02:43 simonb Exp $
 #
 # Configuration info for the Freescale i.MX5x
 #
@@ -99,7 +99,7 @@ file	arch/arm/imx/imx51_uart.c		imx51_ua
 defflag	opt_imxuart.hIMXUARTCONSOLE
 
 # USB controller
-# attach of this driver need to be specified in paltform configuration
+# attach of this driver need to be specified in platform configuration
 device imxusbc { unit, irq } : bus_dma_generic
 file   arch/arm/imx/imx51_usb.c			imxusbc
 



CVS commit: src/sys/arch/arm/imx

2020-06-19 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Fri Jun 19 16:11:15 UTC 2020

Modified Files:
src/sys/arch/arm/imx: imx6_ccm.c imx6_ccmvar.h

Log Message:
Spell GENERIC correctly.  NFCI.


To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/imx/imx6_ccm.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/imx/imx6_ccmvar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_ccm.c
diff -u src/sys/arch/arm/imx/imx6_ccm.c:1.18 src/sys/arch/arm/imx/imx6_ccm.c:1.19
--- src/sys/arch/arm/imx/imx6_ccm.c:1.18	Mon Jun  8 07:48:57 2020
+++ src/sys/arch/arm/imx/imx6_ccm.c	Fri Jun 19 16:11:14 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_ccm.c,v 1.18 2020/06/08 07:48:57 hkenken Exp $	*/
+/*	$NetBSD: imx6_ccm.c,v 1.19 2020/06/19 16:11:14 skrll Exp $	*/
 
 /*
  * Copyright (c) 2010-2012, 2014  Genetec Corporation.  All rights reserved.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.18 2020/06/08 07:48:57 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.19 2020/06/19 16:11:14 skrll Exp $");
 
 #include "opt_cputypes.h"
 
@@ -661,7 +661,7 @@ static struct imx6_clk imx6_clks[] = {
 	CLK_PFD("pll3_pfd3_454m", "pll3_usb_otg", PFD_480, 3),
 
 	CLK_PLL("pll1", "osc", SYS, PLL_ARM, DIV_SELECT, POWERDOWN, 0),
-	CLK_PLL("pll2", "osc", GENNERIC, PLL_SYS, DIV_SELECT, POWERDOWN, 0),
+	CLK_PLL("pll2", "osc", GENERIC, PLL_SYS, DIV_SELECT, POWERDOWN, 0),
 	CLK_PLL("pll3", "osc", USB, PLL_USB1, DIV_SELECT, POWER, 0),
 	CLK_PLL("pll4", "osc", AUDIO_VIDEO, PLL_AUDIO, DIV_SELECT, POWERDOWN, 0),
 	CLK_PLL("pll5", "osc", AUDIO_VIDEO, PLL_VIDEO, DIV_SELECT, POWERDOWN, 0),
@@ -1035,7 +1035,7 @@ imxccm_clk_get_rate_pll_generic(struct i
 	struct imx6_clk_pll *pll = >clk.pll;
 	uint64_t freq = rate_parent;
 
-	KASSERT((pll->type == IMX6_CLK_PLL_GENNERIC) ||
+	KASSERT((pll->type == IMX6_CLK_PLL_GENERIC) ||
 	(pll->type == IMX6_CLK_PLL_USB));
 
 	uint32_t v = bus_space_read_4(sc->sc_iot, sc->sc_ioh_analog, pll->reg);
@@ -1124,7 +1124,7 @@ imxccm_clk_get_rate_pll(struct imxccm_so
 	uint64_t rate_parent = imxccm_clk_get_rate(sc, >base);
 
 	switch(pll->type) {
-	case IMX6_CLK_PLL_GENNERIC:
+	case IMX6_CLK_PLL_GENERIC:
 		return imxccm_clk_get_rate_pll_generic(sc, iclk, rate_parent);
 	case IMX6_CLK_PLL_SYS:
 		return imxccm_clk_get_rate_pll_sys(sc, iclk, rate_parent);

Index: src/sys/arch/arm/imx/imx6_ccmvar.h
diff -u src/sys/arch/arm/imx/imx6_ccmvar.h:1.7 src/sys/arch/arm/imx/imx6_ccmvar.h:1.8
--- src/sys/arch/arm/imx/imx6_ccmvar.h:1.7	Wed Jul 24 11:58:00 2019
+++ src/sys/arch/arm/imx/imx6_ccmvar.h	Fri Jun 19 16:11:14 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_ccmvar.h,v 1.7 2019/07/24 11:58:00 hkenken Exp $	*/
+/*	$NetBSD: imx6_ccmvar.h,v 1.8 2020/06/19 16:11:14 skrll Exp $	*/
 /*
  * Copyright (c) 2012,2019  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -326,7 +326,7 @@ enum imx6_clk_reg {
 };
 
 enum imx6_clk_pll_type {
-	IMX6_CLK_PLL_GENNERIC,
+	IMX6_CLK_PLL_GENERIC,
 	IMX6_CLK_PLL_SYS,
 	IMX6_CLK_PLL_USB,
 	IMX6_CLK_PLL_AUDIO_VIDEO,



CVS commit: src/sys/arch/arm/imx/fdt

2020-06-11 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Thu Jun 11 11:05:29 UTC 2020

Modified Files:
src/sys/arch/arm/imx/fdt: imx6_iomux.c

Log Message:
Match fsl,imx7d-iomuxc


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/fdt/imx6_iomux.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/fdt/imx6_iomux.c
diff -u src/sys/arch/arm/imx/fdt/imx6_iomux.c:1.3 src/sys/arch/arm/imx/fdt/imx6_iomux.c:1.4
--- src/sys/arch/arm/imx/fdt/imx6_iomux.c:1.3	Wed Jan 15 01:09:56 2020
+++ src/sys/arch/arm/imx/fdt/imx6_iomux.c	Thu Jun 11 11:05:29 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_iomux.c,v 1.3 2020/01/15 01:09:56 jmcneill Exp $	*/
+/*	$NetBSD: imx6_iomux.c,v 1.4 2020/06/11 11:05:29 jmcneill Exp $	*/
 /*-
  * Copyright (c) 2019 Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -25,7 +25,7 @@
  * SUCH DAMAGE.
  */
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_iomux.c,v 1.3 2020/01/15 01:09:56 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_iomux.c,v 1.4 2020/06/11 11:05:29 jmcneill Exp $");
 
 #include "opt_fdt.h"
 
@@ -134,6 +134,7 @@ imxiomux_match(device_t parent, cfdata_t
 {
 	const char * const compatible[] = {
 		"fsl,imx6q-iomuxc",
+		"fsl,imx7d-iomuxc",
 		"fsl,imx8mq-iomuxc",
 		NULL
 	};



CVS commit: src/sys/arch/arm/imx/fdt

2020-06-11 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Thu Jun 11 11:01:16 UTC 2020

Modified Files:
src/sys/arch/arm/imx/fdt: imx6_usb.c imx7d_ccm.c

Log Message:
Add i.MX7 USB support


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/fdt/imx6_usb.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/fdt/imx7d_ccm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/fdt/imx6_usb.c
diff -u src/sys/arch/arm/imx/fdt/imx6_usb.c:1.3 src/sys/arch/arm/imx/fdt/imx6_usb.c:1.4
--- src/sys/arch/arm/imx/fdt/imx6_usb.c:1.3	Sun Nov 24 11:07:19 2019
+++ src/sys/arch/arm/imx/fdt/imx6_usb.c	Thu Jun 11 11:01:16 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_usb.c,v 1.3 2019/11/24 11:07:19 skrll Exp $	*/
+/*	$NetBSD: imx6_usb.c,v 1.4 2020/06/11 11:01:16 jmcneill Exp $	*/
 /*-
  * Copyright (c) 2019 Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -25,7 +25,7 @@
  * SUCH DAMAGE.
  */
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_usb.c,v 1.3 2019/11/24 11:07:19 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_usb.c,v 1.4 2020/06/11 11:01:16 jmcneill Exp $");
 
 #include "opt_fdt.h"
 
@@ -75,6 +75,7 @@ CFATTACH_DECL_NEW(imxusbc_fdt, sizeof(st
 
 static const char * const compatible[] = {
 	"fsl,imx6q-usb",
+	"fsl,imx7d-usb",
 	NULL
 };
 

Index: src/sys/arch/arm/imx/fdt/imx7d_ccm.c
diff -u src/sys/arch/arm/imx/fdt/imx7d_ccm.c:1.1 src/sys/arch/arm/imx/fdt/imx7d_ccm.c:1.2
--- src/sys/arch/arm/imx/fdt/imx7d_ccm.c:1.1	Wed Jun 10 17:57:50 2020
+++ src/sys/arch/arm/imx/fdt/imx7d_ccm.c	Thu Jun 11 11:01:16 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: imx7d_ccm.c,v 1.1 2020/06/10 17:57:50 jmcneill Exp $ */
+/* $NetBSD: imx7d_ccm.c,v 1.2 2020/06/11 11:01:16 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2020 Jared McNeill 
@@ -28,7 +28,7 @@
 
 #include 
 
-__KERNEL_RCSID(0, "$NetBSD: imx7d_ccm.c,v 1.1 2020/06/10 17:57:50 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx7d_ccm.c,v 1.2 2020/06/11 11:01:16 jmcneill Exp $");
 
 #include 
 #include 
@@ -269,6 +269,10 @@ static struct imx_ccm_clk imx7d_ccm_clks
 	IMX_GATE(USDHC1_ROOT_CLK, "usdhc1_root_clk", "usdhc1_post_div", 0x46c0, __BIT(0)),
 	IMX_GATE(USDHC2_ROOT_CLK, "usdhc2_root_clk", "usdhc2_post_div", 0x46d0, __BIT(0)),
 	IMX_GATE(USDHC3_ROOT_CLK, "usdhc3_root_clk", "usdhc3_post_div", 0x46e0, __BIT(0)),
+
+	IMX_GATE(USB_CTRL_CLK, "usb_ctrl_clk", "ahb_root_clk", 0x4680, __BIT(0)),
+	IMX_GATE(USB_PHY1_CLK, "usb_phy1_clk", "pll_usb1_main_clk", 0x46a0, __BIT(0)),
+	IMX_GATE(USB_PHY2_CLK, "usb_phy2_clk", "pll_usb_main_clk", 0x46b0, __BIT(0)),
 };
 
 static int



CVS commit: src/sys/arch/arm/imx/fdt

2020-06-10 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Wed Jun 10 19:30:23 UTC 2020

Modified Files:
src/sys/arch/arm/imx/fdt: files.imx6
Removed Files:
src/sys/arch/arm/imx/fdt: imx7_platform.c imx7_platform.h

Log Message:
Use generic platform definition for i.MX7


To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/imx/fdt/files.imx6
cvs rdiff -u -r1.1 -r0 src/sys/arch/arm/imx/fdt/imx7_platform.c \
src/sys/arch/arm/imx/fdt/imx7_platform.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/fdt/files.imx6
diff -u src/sys/arch/arm/imx/fdt/files.imx6:1.13 src/sys/arch/arm/imx/fdt/files.imx6:1.14
--- src/sys/arch/arm/imx/fdt/files.imx6:1.13	Wed Jun 10 17:57:50 2020
+++ src/sys/arch/arm/imx/fdt/files.imx6	Wed Jun 10 19:30:23 2020
@@ -1,10 +1,9 @@
-#	$NetBSD: files.imx6,v 1.13 2020/06/10 17:57:50 jmcneill Exp $
+#	$NetBSD: files.imx6,v 1.14 2020/06/10 19:30:23 jmcneill Exp $
 #
 # Configuration info for the Freescale i.MX6
 #
 
 file	arch/arm/imx/fdt/imx6_platform.c	soc_imx
-file	arch/arm/imx/fdt/imx7_platform.c	soc_imx
 
 # SOC parameters
 defflag	opt_soc.h			SOC_IMX



CVS commit: src/sys/arch/arm/imx

2020-06-08 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Mon Jun  8 07:48:58 UTC 2020

Modified Files:
src/sys/arch/arm/imx: imx6_ccm.c

Log Message:
Fix wrong divider setting.


To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/arm/imx/imx6_ccm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_ccm.c
diff -u src/sys/arch/arm/imx/imx6_ccm.c:1.17 src/sys/arch/arm/imx/imx6_ccm.c:1.18
--- src/sys/arch/arm/imx/imx6_ccm.c:1.17	Fri Jun  5 02:30:54 2020
+++ src/sys/arch/arm/imx/imx6_ccm.c	Mon Jun  8 07:48:57 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_ccm.c,v 1.17 2020/06/05 02:30:54 hkenken Exp $	*/
+/*	$NetBSD: imx6_ccm.c,v 1.18 2020/06/08 07:48:57 hkenken Exp $	*/
 
 /*
  * Copyright (c) 2010-2012, 2014  Genetec Corporation.  All rights reserved.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.17 2020/06/05 02:30:54 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.18 2020/06/08 07:48:57 hkenken Exp $");
 
 #include "opt_cputypes.h"
 
@@ -1295,7 +1295,7 @@ imxccm_clk_set_rate_div(struct imxccm_so
 	KASSERT(parent != NULL);
 
 	u_int rate_parent = imxccm_clk_get_rate(sc, >base);
-	u_int divider = rate_parent / rate;
+	u_int divider = uimax(1, rate_parent / rate);
 
 	bus_space_handle_t ioh;
 	if (div->base == IMX6_CLK_REG_CCM_ANALOG)



CVS commit: src/sys/arch/arm/imx

2020-06-04 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Fri Jun  5 02:30:54 UTC 2020

Modified Files:
src/sys/arch/arm/imx: imx6_ccm.c

Log Message:
Fix indent.


To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arm/imx/imx6_ccm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_ccm.c
diff -u src/sys/arch/arm/imx/imx6_ccm.c:1.16 src/sys/arch/arm/imx/imx6_ccm.c:1.17
--- src/sys/arch/arm/imx/imx6_ccm.c:1.16	Fri Jun  5 02:28:10 2020
+++ src/sys/arch/arm/imx/imx6_ccm.c	Fri Jun  5 02:30:54 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_ccm.c,v 1.16 2020/06/05 02:28:10 hkenken Exp $	*/
+/*	$NetBSD: imx6_ccm.c,v 1.17 2020/06/05 02:30:54 hkenken Exp $	*/
 
 /*
  * Copyright (c) 2010-2012, 2014  Genetec Corporation.  All rights reserved.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.16 2020/06/05 02:28:10 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.17 2020/06/05 02:30:54 hkenken Exp $");
 
 #include "opt_cputypes.h"
 
@@ -1286,43 +1286,43 @@ static int
 imxccm_clk_set_rate_div(struct imxccm_softc *sc,
 struct imx6_clk *iclk, u_int rate)
 {
-struct imx6_clk_div *div = >clk.div;
-struct imx6_clk *parent;
+	struct imx6_clk_div *div = >clk.div;
+	struct imx6_clk *parent;
+
+	KASSERT(iclk->type == IMX6_CLK_DIV);
 
-KASSERT(iclk->type == IMX6_CLK_DIV);
+	parent = imx6_clk_find(iclk->parent);
+	KASSERT(parent != NULL);
 
-parent = imx6_clk_find(iclk->parent);
-KASSERT(parent != NULL);
+	u_int rate_parent = imxccm_clk_get_rate(sc, >base);
+	u_int divider = rate_parent / rate;
 
-u_int rate_parent = imxccm_clk_get_rate(sc, >base);
-u_int divider = rate_parent / rate;
-
-bus_space_handle_t ioh;
-if (div->base == IMX6_CLK_REG_CCM_ANALOG)
-ioh = sc->sc_ioh_analog;
-else
-ioh = sc->sc_ioh;
-
-uint32_t v = bus_space_read_4(sc->sc_iot, ioh, div->reg);
-v &= ~div->mask;
-if (div->type == IMX6_CLK_DIV_TABLE) {
-int n = -1;
-
-KASSERT(div->tbl != NULL);
-for (int i = 0; div->tbl[i] != 0; i++)
-if (div->tbl[i] == divider)
-n = i;
-
-if (n >= 0)
-v |= __SHIFTIN(n, div->mask);
-else
-return EINVAL;
-} else {
-v |= __SHIFTIN(divider - 1, div->mask);
-}
-bus_space_write_4(sc->sc_iot, ioh, div->reg, v);
+	bus_space_handle_t ioh;
+	if (div->base == IMX6_CLK_REG_CCM_ANALOG)
+		ioh = sc->sc_ioh_analog;
+	else
+		ioh = sc->sc_ioh;
 
-return 0;
+	uint32_t v = bus_space_read_4(sc->sc_iot, ioh, div->reg);
+	v &= ~div->mask;
+	if (div->type == IMX6_CLK_DIV_TABLE) {
+		int n = -1;
+
+		KASSERT(div->tbl != NULL);
+		for (int i = 0; div->tbl[i] != 0; i++)
+			if (div->tbl[i] == divider)
+n = i;
+
+		if (n >= 0)
+			v |= __SHIFTIN(n, div->mask);
+		else
+			return EINVAL;
+	} else {
+		v |= __SHIFTIN(divider - 1, div->mask);
+	}
+	bus_space_write_4(sc->sc_iot, ioh, div->reg, v);
+
+	return 0;
 }
 
 /*



CVS commit: src/sys/arch/arm/imx

2020-06-04 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Fri Jun  5 02:28:10 UTC 2020

Modified Files:
src/sys/arch/arm/imx: imx6_ccm.c

Log Message:
Fix KASSERT


To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/imx/imx6_ccm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_ccm.c
diff -u src/sys/arch/arm/imx/imx6_ccm.c:1.15 src/sys/arch/arm/imx/imx6_ccm.c:1.16
--- src/sys/arch/arm/imx/imx6_ccm.c:1.15	Tue Nov 12 04:32:36 2019
+++ src/sys/arch/arm/imx/imx6_ccm.c	Fri Jun  5 02:28:10 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_ccm.c,v 1.15 2019/11/12 04:32:36 hkenken Exp $	*/
+/*	$NetBSD: imx6_ccm.c,v 1.16 2020/06/05 02:28:10 hkenken Exp $	*/
 
 /*
  * Copyright (c) 2010-2012, 2014  Genetec Corporation.  All rights reserved.
@@ -30,7 +30,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.15 2019/11/12 04:32:36 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_ccm.c,v 1.16 2020/06/05 02:28:10 hkenken Exp $");
 
 #include "opt_cputypes.h"
 
@@ -1297,8 +1297,6 @@ imxccm_clk_set_rate_div(struct imxccm_so
 u_int rate_parent = imxccm_clk_get_rate(sc, >base);
 u_int divider = rate_parent / rate;
 
-KASSERT(div->tbl != NULL);
-
 bus_space_handle_t ioh;
 if (div->base == IMX6_CLK_REG_CCM_ANALOG)
 ioh = sc->sc_ioh_analog;
@@ -1309,6 +1307,8 @@ imxccm_clk_set_rate_div(struct imxccm_so
 v &= ~div->mask;
 if (div->type == IMX6_CLK_DIV_TABLE) {
 int n = -1;
+
+KASSERT(div->tbl != NULL);
 for (int i = 0; div->tbl[i] != 0; i++)
 if (div->tbl[i] == divider)
 n = i;



CVS commit: src/sys/arch/arm/imx/fdt

2020-06-03 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Wed Jun  3 13:14:01 UTC 2020

Modified Files:
src/sys/arch/arm/imx/fdt: files.imx6

Log Message:
defflag SOC_IMX6DL and SOC_IMX6Q


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/imx/fdt/files.imx6

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/fdt/files.imx6
diff -u src/sys/arch/arm/imx/fdt/files.imx6:1.11 src/sys/arch/arm/imx/fdt/files.imx6:1.12
--- src/sys/arch/arm/imx/fdt/files.imx6:1.11	Sat May 23 13:39:24 2020
+++ src/sys/arch/arm/imx/fdt/files.imx6	Wed Jun  3 13:14:01 2020
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx6,v 1.11 2020/05/23 13:39:24 rin Exp $
+#	$NetBSD: files.imx6,v 1.12 2020/06/03 13:14:01 jmcneill Exp $
 #
 # Configuration info for the Freescale i.MX6
 #
@@ -7,6 +7,8 @@ file	arch/arm/imx/fdt/imx6_platform.c	so
 
 # SOC parameters
 defflag	opt_soc.h			SOC_IMX
+defflag	opt_soc.h			SOC_IMX6DL: SOC_IMX
+defflag	opt_soc.h			SOC_IMX6Q: SOC_IMX
 defflag	opt_soc.h			SOC_IMX6QDL: SOC_IMX
 
 # Clock



CVS commit: src/sys/arch/arm/imx/fdt

2020-05-24 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Sun May 24 08:47:19 UTC 2020

Modified Files:
src/sys/arch/arm/imx/fdt: imx6_platform.c

Log Message:
Misc whitespace


To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/imx/fdt/imx6_platform.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/fdt/imx6_platform.c
diff -u src/sys/arch/arm/imx/fdt/imx6_platform.c:1.8 src/sys/arch/arm/imx/fdt/imx6_platform.c:1.9
--- src/sys/arch/arm/imx/fdt/imx6_platform.c:1.8	Wed Oct 23 02:34:43 2019
+++ src/sys/arch/arm/imx/fdt/imx6_platform.c	Sun May 24 08:47:19 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_platform.c,v 1.8 2019/10/23 02:34:43 hkenken Exp $	*/
+/*	$NetBSD: imx6_platform.c,v 1.9 2020/05/24 08:47:19 skrll Exp $	*/
 /*-
  * Copyright (c) 2019 Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -25,7 +25,7 @@
  * SUCH DAMAGE.
  */
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_platform.c,v 1.8 2019/10/23 02:34:43 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_platform.c,v 1.9 2020/05/24 08:47:19 skrll Exp $");
 
 #include "arml2cc.h"
 #include "opt_console.h"
@@ -82,7 +82,7 @@ imx_platform_devmap(void)
 		DEVMAP_ENTRY(KERNEL_IO_IOREG_VBASE, IMX6_IOREG_PBASE, IMX6_IOREG_SIZE),
 		DEVMAP_ENTRY(KERNEL_IO_ARMCORE_VBASE, IMX6_ARMCORE_PBASE, IMX6_ARMCORE_SIZE),
 		DEVMAP_ENTRY_END
-};
+	};
 
 	return devmap;
 }
@@ -174,7 +174,6 @@ imx_platform_mpstart(void)
 	if (bus_space_map(bst, IMX6_AIPS1_BASE + AIPS1_SRC_BASE, AIPS1_SRC_SIZE, 0, ) != 0)
 		panic("couldn't map SRC");
 
-
 	uint32_t srcctl = bus_space_read_4(bst, bsh, SRC_SCR);
 	const paddr_t mpstart = KERN_VTOPHYS((vaddr_t)cpu_mpstart);
 
@@ -234,4 +233,3 @@ const struct arm_platform imx6_platform 
 
 ARM_PLATFORM(imx6q, "fsl,imx6q", _platform);
 ARM_PLATFORM(imx6qp, "fsl,imx6qp", _platform);
-



CVS commit: src/sys/arch/arm/imx/fdt

2020-05-23 Thread Rin Okuyama
Module Name:src
Committed By:   rin
Date:   Sat May 23 13:39:24 UTC 2020

Modified Files:
src/sys/arch/arm/imx/fdt: files.imx6

Log Message:
Oops, two more missing clk dependencies...


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/imx/fdt/files.imx6

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/fdt/files.imx6
diff -u src/sys/arch/arm/imx/fdt/files.imx6:1.10 src/sys/arch/arm/imx/fdt/files.imx6:1.11
--- src/sys/arch/arm/imx/fdt/files.imx6:1.10	Sat May 23 13:24:08 2020
+++ src/sys/arch/arm/imx/fdt/files.imx6	Sat May 23 13:39:24 2020
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx6,v 1.10 2020/05/23 13:24:08 skrll Exp $
+#	$NetBSD: files.imx6,v 1.11 2020/05/23 13:39:24 rin Exp $
 #
 # Configuration info for the Freescale i.MX6
 #
@@ -16,7 +16,7 @@ file	arch/arm/imx/imx6_ccm.c		imxccm
 file	arch/arm/imx/fdt/imx6_clk.c	imxccm
 
 # Common FDT clock framework
-define	imx_ccm
+define	imx_ccm: clk
 file	arch/arm/imx/fdt/imx_ccm.c		imx_ccm
 file	arch/arm/imx/fdt/imx_ccm_extclk.c	imx_ccm
 file	arch/arm/imx/fdt/imx_ccm_gate.c		imx_ccm
@@ -106,7 +106,7 @@ file	arch/arm/imx/fdt/imx6_spi.c		imxspi
 defparam opt_imxspi.h   	IMXSPINSLAVES
 
 # PWM
-device	imxpwm: pwm
+device	imxpwm: pwm, clk
 attach	imxpwm at fdt with imxpwm_fdt
 file	arch/arm/imx/imxpwm.c			imxpwm
 file	arch/arm/imx/fdt/imx6_pwm.c		imxpwm_fdt



CVS commit: src/sys/arch/arm/imx

2020-05-23 Thread Rin Okuyama
Module Name:src
Committed By:   rin
Date:   Sat May 23 06:21:36 UTC 2020

Modified Files:
src/sys/arch/arm/imx: files.imx6

Log Message:
imxpcie also depends on clk.


To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/imx/files.imx6

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx6
diff -u src/sys/arch/arm/imx/files.imx6:1.19 src/sys/arch/arm/imx/files.imx6:1.20
--- src/sys/arch/arm/imx/files.imx6:1.19	Sat Oct 12 06:46:13 2019
+++ src/sys/arch/arm/imx/files.imx6	Sat May 23 06:21:36 2020
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx6,v 1.19 2019/10/12 06:46:13 skrll Exp $
+#	$NetBSD: files.imx6,v 1.20 2020/05/23 06:21:36 rin Exp $
 #
 # Configuration info for the Freescale i.MX6
 #
@@ -27,13 +27,13 @@ attach	axi at mainbus
 file	arch/arm/imx/imx6_axi.c			axi
 
 # iMX6 PCIe
-device	imxpcie: pcibus
+device	imxpcie: pcibus, clk
 attach	imxpcie at axi with imx6_pcie
 file	arch/arm/imx/imxpcie.c			imxpcie
 file	arch/arm/imx/imx6_pcie.c		imx6_pcie
 
 # iMX6 Clock Control Module
-device	imxccm : clk
+device	imxccm: clk
 attach	imxccm at axi
 file	arch/arm/imx/imx6_ccm.c			imxccm needs-flag
 file	arch/arm/imx/imx6_clk.c			imxccm



CVS commit: src/sys/arch/arm/imx

2020-05-23 Thread Rin Okuyama
Module Name:src
Committed By:   rin
Date:   Sat May 23 06:21:15 UTC 2020

Modified Files:
src/sys/arch/arm/imx: files.imx51

Log Message:
imxpwm depends on clk.


To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/imx/files.imx51

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx51
diff -u src/sys/arch/arm/imx/files.imx51:1.21 src/sys/arch/arm/imx/files.imx51:1.22
--- src/sys/arch/arm/imx/files.imx51:1.21	Wed May 20 05:10:42 2020
+++ src/sys/arch/arm/imx/files.imx51	Sat May 23 06:21:15 2020
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx51,v 1.21 2020/05/20 05:10:42 hkenken Exp $
+#	$NetBSD: files.imx51,v 1.22 2020/05/23 06:21:15 rin Exp $
 #
 # Configuration info for the Freescale i.MX5x
 #
@@ -137,6 +137,6 @@ defparam opt_imxspi.hIMXSPI_DEBUG
 # file	arch/arm/imx/imx51_i2s.c		imxi2s needs-flag
 
 # PWM controller
-device	imxpwm: pwm
+device	imxpwm: pwm, clk
 file	arch/arm/imx/imxpwm.c			imxpwm
 file	arch/arm/imx/imx51_pwm.c		imxpwm



CVS commit: src/sys/arch/arm/imx/fdt

2020-01-15 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Wed Jan 15 11:36:34 UTC 2020

Modified Files:
src/sys/arch/arm/imx/fdt: imx8mq_ccm.c

Log Message:
Add i2c clocks


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/fdt/imx8mq_ccm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/fdt/imx8mq_ccm.c
diff -u src/sys/arch/arm/imx/fdt/imx8mq_ccm.c:1.1 src/sys/arch/arm/imx/fdt/imx8mq_ccm.c:1.2
--- src/sys/arch/arm/imx/fdt/imx8mq_ccm.c:1.1	Wed Jan 15 01:09:56 2020
+++ src/sys/arch/arm/imx/fdt/imx8mq_ccm.c	Wed Jan 15 11:36:34 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: imx8mq_ccm.c,v 1.1 2020/01/15 01:09:56 jmcneill Exp $ */
+/* $NetBSD: imx8mq_ccm.c,v 1.2 2020/01/15 11:36:34 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2020 Jared McNeill 
@@ -28,7 +28,7 @@
 
 #include 
 
-__KERNEL_RCSID(0, "$NetBSD: imx8mq_ccm.c,v 1.1 2020/01/15 01:09:56 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx8mq_ccm.c,v 1.2 2020/01/15 11:36:34 jmcneill Exp $");
 
 #include 
 #include 
@@ -72,6 +72,9 @@ static const char *usb_bus_p[] = {
 static const char *usb_core_phy_p[] = {
 	"osc_25m", "sys1_pll_100m", "sys1_pll_40m", "sys2_pll_100m", "sys2_pll_200m", "clk_ext2", "clk_ext3", "audio_pll2_out"
 };
+static const char *i2c_p[] = {
+	"osc_25m", "sys1_pll_160m", "sys2_pll_50m", "sys3_pll_out", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", "sys1_pll_133m"
+};
 
 CFATTACH_DECL_NEW(imx8mq_ccm, sizeof(struct imx_ccm_softc),
 	imx8mq_ccm_match, imx8mq_ccm_attach, NULL, NULL);
@@ -161,6 +164,16 @@ static struct imx_ccm_clk imx8mq_ccm_clk
 	IMX_ROOT_GATE(CLK_USB2_CTRL_ROOT, "usb2_ctrl_root_clk", "usb_bus", 0x44e0),
 	IMX_ROOT_GATE(CLK_USB1_PHY_ROOT, "usb1_phy_root_clk", "usb_phy_ref", 0x44f0),
 	IMX_ROOT_GATE(CLK_USB2_PHY_ROOT, "usb2_phy_root_clk", "usb_phy_ref", 0x4500),
+
+	IMX_COMPOSITE(CLK_I2C1, "i2c1", i2c_p, 0xad00, 0),
+	IMX_COMPOSITE(CLK_I2C2, "i2c2", i2c_p, 0xad80, 0),
+	IMX_COMPOSITE(CLK_I2C3, "i2c3", i2c_p, 0xae00, 0),
+	IMX_COMPOSITE(CLK_I2C4, "i2c4", i2c_p, 0xae80, 0),
+
+	IMX_ROOT_GATE(CLK_I2C1_ROOT, "i2c1_root_clk", "i2c1", 0x4170),
+	IMX_ROOT_GATE(CLK_I2C2_ROOT, "i2c2_root_clk", "i2c2", 0x4180),
+	IMX_ROOT_GATE(CLK_I2C3_ROOT, "i2c3_root_clk", "i2c3", 0x4190),
+	IMX_ROOT_GATE(CLK_I2C4_ROOT, "i2c4_root_clk", "i2c4", 0x41a0),
 };
 
 static int



CVS commit: src/sys/arch/arm/imx/fdt

2020-01-15 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Wed Jan 15 11:35:58 UTC 2020

Modified Files:
src/sys/arch/arm/imx/fdt: imx6_i2c.c

Log Message:
Match the more generic fsl,imx21-i2c compat string


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/fdt/imx6_i2c.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/fdt/imx6_i2c.c
diff -u src/sys/arch/arm/imx/fdt/imx6_i2c.c:1.2 src/sys/arch/arm/imx/fdt/imx6_i2c.c:1.3
--- src/sys/arch/arm/imx/fdt/imx6_i2c.c:1.2	Mon Aug  5 12:21:00 2019
+++ src/sys/arch/arm/imx/fdt/imx6_i2c.c	Wed Jan 15 11:35:58 2020
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_i2c.c,v 1.2 2019/08/05 12:21:00 hkenken Exp $	*/
+/*	$NetBSD: imx6_i2c.c,v 1.3 2020/01/15 11:35:58 jmcneill Exp $	*/
 /*-
  * Copyright (c) 2019 Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -25,7 +25,7 @@
  * SUCH DAMAGE.
  */
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_i2c.c,v 1.2 2019/08/05 12:21:00 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_i2c.c,v 1.3 2020/01/15 11:35:58 jmcneill Exp $");
 
 #include 
 
@@ -36,7 +36,7 @@ __KERNEL_RCSID(0, "$NetBSD: imx6_i2c.c,v
 int
 imxi2c_match(device_t parent, cfdata_t cf, void *aux)
 {
-	const char * const compatible[] = { "fsl,imx6q-i2c", NULL };
+	const char * const compatible[] = { "fsl,imx21-i2c", NULL };
 	struct fdt_attach_args * const faa = aux;
 
 	return of_match_compatible(faa->faa_phandle, compatible);



CVS commit: src/sys/arch/arm/imx

2020-01-11 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sun Jan 12 00:35:11 UTC 2020

Modified Files:
src/sys/arch/arm/imx: imxuart.c

Log Message:
Support imxuart_freq=0 (use existing settings)


To generate a diff of this commit:
cvs rdiff -u -r1.22 -r1.23 src/sys/arch/arm/imx/imxuart.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imxuart.c
diff -u src/sys/arch/arm/imx/imxuart.c:1.22 src/sys/arch/arm/imx/imxuart.c:1.23
--- src/sys/arch/arm/imx/imxuart.c:1.22	Sun Nov 10 21:16:23 2019
+++ src/sys/arch/arm/imx/imxuart.c	Sun Jan 12 00:35:11 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: imxuart.c,v 1.22 2019/11/10 21:16:23 chs Exp $ */
+/* $NetBSD: imxuart.c,v 1.23 2020/01/12 00:35:11 jmcneill Exp $ */
 
 /*
  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
@@ -96,7 +96,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imxuart.c,v 1.22 2019/11/10 21:16:23 chs Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imxuart.c,v 1.23 2020/01/12 00:35:11 jmcneill Exp $");
 
 #include "opt_imxuart.h"
 #include "opt_ddb.h"
@@ -2186,30 +2186,36 @@ imxuart_init(struct imxuart_regs *regsp,
 	 IMX_UART_SIZE, 0, >ur_ioh)) != 0)
 		return error;
 
-	if (imxuspeed(rate, ) < 0)
-		return EINVAL;
-
-	/* UBIR must updated before UBMR */
-	bus_space_write_4(regsp->ur_iot, regsp->ur_ioh,
-	IMX_UBIR, ratio.numerator);
-	bus_space_write_4(regsp->ur_iot, regsp->ur_ioh,
-	IMX_UBMR, ratio.modulator);
-
+	if (imxuart_freq != 0) {
+		if (imxuspeed(rate, ) < 0)
+			return EINVAL;
+
+		/* UBIR must updated before UBMR */
+		bus_space_write_4(regsp->ur_iot, regsp->ur_ioh,
+		IMX_UBIR, ratio.numerator);
+		bus_space_write_4(regsp->ur_iot, regsp->ur_ioh,
+		IMX_UBMR, ratio.modulator);
+	}
 
 	/* XXX: DTREN, DPEC */
 	bus_space_write_4(regsp->ur_iot, regsp->ur_ioh, IMX_UCR3,
 	IMX_UCR3_DSR|IMX_UCR3_RXDMUXSEL);
 
-	ufcr = (8 << IMX_UFCR_TXTL_SHIFT) | (rfdiv << IMX_UFCR_RFDIV_SHIFT) |
-		(1 << IMX_UFCR_RXTL_SHIFT);
-	/* XXX: keep DCE/DTE bit */
-	ufcr |= bus_space_read_4(regsp->ur_iot, regsp->ur_ioh, IMX_UFCR) &
-		IMX_UFCR_DCEDTE;
-
+	ufcr = bus_space_read_4(regsp->ur_iot, regsp->ur_ioh, IMX_UFCR);
+	ufcr &= ~IMX_UFCR_TXTL;
+	ufcr |= (8 << IMX_UFCR_TXTL_SHIFT);
+	ufcr &= ~IMX_UFCR_RXTL;
+	ufcr |= (1 << IMX_UFCR_RXTL_SHIFT);
+	if (imxuart_freq != 0) {
+		ufcr &= ~IMX_UFCR_RFDIV;
+		ufcr |= (rfdiv << IMX_UFCR_RFDIV_SHIFT);
+	}
 	bus_space_write_4(regsp->ur_iot, regsp->ur_ioh, IMX_UFCR, ufcr);
 
-	bus_space_write_4(regsp->ur_iot, regsp->ur_ioh, IMX_ONEMS,
-	imxuart_freq / imxuart_freqdiv / 1000);
+	if (imxuart_freq != 0) {
+		bus_space_write_4(regsp->ur_iot, regsp->ur_ioh, IMX_ONEMS,
+		imxuart_freq / imxuart_freqdiv / 1000);
+	}
 
 	bus_space_write_4(regsp->ur_iot, regsp->ur_ioh, IMX_UCR2,
 			  IMX_UCR2_IRTS|



CVS commit: src/sys/arch/arm/imx/fdt

2019-12-04 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Thu Dec  5 00:31:14 UTC 2019

Modified Files:
src/sys/arch/arm/imx/fdt: imx6_pcie.c

Log Message:
Remove unnecessary code.


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/imx/fdt/imx6_pcie.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/fdt/imx6_pcie.c
diff -u src/sys/arch/arm/imx/fdt/imx6_pcie.c:1.5 src/sys/arch/arm/imx/fdt/imx6_pcie.c:1.6
--- src/sys/arch/arm/imx/fdt/imx6_pcie.c:1.5	Wed Oct 16 11:16:30 2019
+++ src/sys/arch/arm/imx/fdt/imx6_pcie.c	Thu Dec  5 00:31:14 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_pcie.c,v 1.5 2019/10/16 11:16:30 hkenken Exp $	*/
+/*	$NetBSD: imx6_pcie.c,v 1.6 2019/12/05 00:31:14 hkenken Exp $	*/
 /*-
  * Copyright (c) 2019 Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -25,7 +25,7 @@
  * SUCH DAMAGE.
  */
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_pcie.c,v 1.5 2019/10/16 11:16:30 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_pcie.c,v 1.6 2019/12/05 00:31:14 hkenken Exp $");
 
 #include "opt_pci.h"
 #include "opt_fdt.h"
@@ -204,10 +204,6 @@ imx6_pcie_attach(device_t parent, device
 		sc->sc_clk_pcie_ext_src = NULL;
 	}
 
-
-	TAILQ_INIT(>sc_intrs);
-	mutex_init(>sc_lock, MUTEX_DEFAULT, IPL_VM);
-
 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
 		aprint_error_dev(self, "failed to decode interrupt\n");
 		return;



CVS commit: src/sys/arch/arm/imx/fdt

2019-12-03 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Tue Dec  3 10:32:53 UTC 2019

Modified Files:
src/sys/arch/arm/imx/fdt: imx6_spi.c

Log Message:
Remove FDT_INTR_MPSAFE flag.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/fdt/imx6_spi.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/fdt/imx6_spi.c
diff -u src/sys/arch/arm/imx/fdt/imx6_spi.c:1.2 src/sys/arch/arm/imx/fdt/imx6_spi.c:1.3
--- src/sys/arch/arm/imx/fdt/imx6_spi.c:1.2	Fri Sep 27 02:59:21 2019
+++ src/sys/arch/arm/imx/fdt/imx6_spi.c	Tue Dec  3 10:32:53 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_spi.c,v 1.2 2019/09/27 02:59:21 hkenken Exp $	*/
+/*	$NetBSD: imx6_spi.c,v 1.3 2019/12/03 10:32:53 hkenken Exp $	*/
 /*-
  * Copyright (c) 2019 Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -25,7 +25,7 @@
  * SUCH DAMAGE.
  */
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_spi.c,v 1.2 2019/09/27 02:59:21 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_spi.c,v 1.3 2019/12/03 10:32:53 hkenken Exp $");
 
 #include "opt_imxspi.h"
 
@@ -157,7 +157,7 @@ imxspi_attach(device_t parent, device_t 
 	}
 
 	sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_VM,
-	FDT_INTR_MPSAFE, imxspi_intr, >sc_imxspi);
+	0, imxspi_intr, >sc_imxspi);
 	if (sc->sc_ih == NULL) {
 		aprint_error_dev(self, "couldn't establish interrupt on %s\n",
 		intrstr);



CVS commit: src/sys/arch/arm/imx

2018-12-16 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Sun Dec 16 16:45:12 UTC 2018

Modified Files:
src/sys/arch/arm/imx: imx6_pcie.c

Log Message:
Fix build


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/imx/imx6_pcie.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_pcie.c
diff -u src/sys/arch/arm/imx/imx6_pcie.c:1.6 src/sys/arch/arm/imx/imx6_pcie.c:1.7
--- src/sys/arch/arm/imx/imx6_pcie.c:1.6	Wed May 23 10:42:05 2018
+++ src/sys/arch/arm/imx/imx6_pcie.c	Sun Dec 16 16:45:11 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_pcie.c,v 1.6 2018/05/23 10:42:05 hkenken Exp $	*/
+/*	$NetBSD: imx6_pcie.c,v 1.7 2018/12/16 16:45:11 skrll Exp $	*/
 
 /*
  * Copyright (c) 2016  Genetec Corporation.  All rights reserved.
@@ -31,7 +31,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_pcie.c,v 1.6 2018/05/23 10:42:05 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_pcie.c,v 1.7 2018/12/16 16:45:11 skrll Exp $");
 
 #include "opt_pci.h"
 
@@ -136,7 +136,8 @@ static const char *imx6pcie_intr_string(
 	  char *, size_t);
 const struct evcnt *imx6pcie_intr_evcnt(void *, pci_intr_handle_t);
 static void * imx6pcie_intr_establish(void *, pci_intr_handle_t,
-	 int, int (*)(void *), void *);
+	 int, int (*)(void *), void *,
+ const char *);
 static void imx6pcie_intr_disestablish(void *, void *);
 
 CFATTACH_DECL_NEW(imxpcie, sizeof(struct imx6pcie_softc),
@@ -921,7 +922,7 @@ imx6pcie_intr_evcnt(void *v, pci_intr_ha
 
 static void *
 imx6pcie_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
-int (*callback)(void *), void *arg)
+int (*callback)(void *), void *arg, const char *xname)
 {
 	struct imx6pcie_softc *sc = v;
 	struct imx6pcie_ih *pcie_ih;



CVS commit: src/sys/arch/arm/imx

2018-06-20 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Wed Jun 20 07:08:35 UTC 2018

Modified Files:
src/sys/arch/arm/imx: imxuart.c

Log Message:
Move intr_establish() before imxuart_attach_subr().


To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/imx/imxuart.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imxuart.c
diff -u src/sys/arch/arm/imx/imxuart.c:1.20 src/sys/arch/arm/imx/imxuart.c:1.21
--- src/sys/arch/arm/imx/imxuart.c:1.20	Fri Sep  8 05:29:12 2017
+++ src/sys/arch/arm/imx/imxuart.c	Wed Jun 20 07:08:35 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: imxuart.c,v 1.20 2017/09/08 05:29:12 hkenken Exp $ */
+/* $NetBSD: imxuart.c,v 1.21 2018/06/20 07:08:35 hkenken Exp $ */
 
 /*
  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
@@ -96,7 +96,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imxuart.c,v 1.20 2017/09/08 05:29:12 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imxuart.c,v 1.21 2018/06/20 07:08:35 hkenken Exp $");
 
 #include "opt_imxuart.h"
 #include "opt_ddb.h"
@@ -306,6 +306,13 @@ imxuart_attach_common(device_t parent, d
 	}
 	regsp->ur_ioh = ioh;
 
+	sc->sc_ih = intr_establish(sc->sc_intr, IPL_SERIAL, IST_LEVEL,
+	imxuintr, sc);
+	if (sc->sc_ih == NULL) {
+		aprint_error_dev(sc->sc_dev, "intr_establish failed\n");
+		return;
+	}
+
 	imxuart_attach_subr(sc);
 }
 
@@ -377,11 +384,6 @@ imxuart_attach_subr(struct imxuart_softc
 		}
 	}
 
-	sc->sc_ih = intr_establish(sc->sc_intr, IPL_SERIAL, IST_LEVEL,
-	imxuintr, sc);
-	if (sc->sc_ih == NULL)
-		aprint_error_dev(sc->sc_dev, "intr_establish failed\n");
-
 #ifdef KGDB
 	/*
 	 * Allow kgdb to "take over" this port.  If this is



CVS commit: src/sys/arch/arm/imx

2018-06-19 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Wed Jun 20 05:59:22 UTC 2018

Modified Files:
src/sys/arch/arm/imx: imx6_board.c

Log Message:
Rename a9tmr to arma9tmr.


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/imx/imx6_board.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_board.c
diff -u src/sys/arch/arm/imx/imx6_board.c:1.9 src/sys/arch/arm/imx/imx6_board.c:1.10
--- src/sys/arch/arm/imx/imx6_board.c:1.9	Thu Nov  9 05:57:23 2017
+++ src/sys/arch/arm/imx/imx6_board.c	Wed Jun 20 05:59:22 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_board.c,v 1.9 2017/11/09 05:57:23 hkenken Exp $	*/
+/*	$NetBSD: imx6_board.c,v 1.10 2018/06/20 05:59:22 hkenken Exp $	*/
 
 /*
  * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(1, "$NetBSD: imx6_board.c,v 1.9 2017/11/09 05:57:23 hkenken Exp $");
+__KERNEL_RCSID(1, "$NetBSD: imx6_board.c,v 1.10 2018/06/20 05:59:22 hkenken Exp $");
 
 #include "opt_imx.h"
 #include "arml2cc.h"
@@ -219,7 +219,8 @@ imx6_device_register(device_t self, void
 	 * We need to tell the A9 Global/Watchdog Timer
 	 * what frequency it runs at.
 	 */
-	if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) {
+	if (device_is_a(self, "arma9tmr") ||
+	device_is_a(self, "a9wdt")) {
 		prop_dictionary_set_uint32(dict, "frequency",
 		   imx6_armrootclk() / IMX6_PERIPHCLK_N);
 		return;



CVS commit: src/sys/arch/arm/imx

2018-06-19 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Wed Jun 20 05:53:19 UTC 2018

Modified Files:
src/sys/arch/arm/imx: imx6_ahcisata.c

Log Message:
Fix typo.


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/imx/imx6_ahcisata.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_ahcisata.c
diff -u src/sys/arch/arm/imx/imx6_ahcisata.c:1.7 src/sys/arch/arm/imx/imx6_ahcisata.c:1.8
--- src/sys/arch/arm/imx/imx6_ahcisata.c:1.7	Wed May 23 10:42:05 2018
+++ src/sys/arch/arm/imx/imx6_ahcisata.c	Wed Jun 20 05:53:19 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_ahcisata.c,v 1.7 2018/05/23 10:42:05 hkenken Exp $	*/
+/*	$NetBSD: imx6_ahcisata.c,v 1.8 2018/06/20 05:53:19 hkenken Exp $	*/
 
 /*
  * Copyright (c) 2014 Ryo Shimizu 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_ahcisata.c,v 1.7 2018/05/23 10:42:05 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_ahcisata.c,v 1.8 2018/06/20 05:53:19 hkenken Exp $");
 
 #include "locators.h"
 #include "opt_imx.h"
@@ -59,7 +59,7 @@ static int imx6_ahcisata_match(device_t,
 static void imx6_ahcisata_attach(device_t, device_t, void *);
 static int imx6_ahcisata_detach(device_t, int);
 
-static int ixm6_ahcisata_init(struct imx_ahci_softc *);
+static int imx6_ahcisata_init(struct imx_ahci_softc *);
 static int imx6_ahcisata_phy_ctrl(struct imx_ahci_softc *, uint32_t, int);
 static int imx6_ahcisata_phy_addr(struct imx_ahci_softc *, uint32_t);
 static int imx6_ahcisata_phy_write(struct imx_ahci_softc *, uint32_t, uint16_t);
@@ -114,7 +114,7 @@ imx6_ahcisata_attach(device_t parent, de
 		return;
 	}
 
-	if (ixm6_ahcisata_init(sc) != 0) {
+	if (imx6_ahcisata_init(sc) != 0) {
 		aprint_error_dev(self, "couldn't init ahci\n");
 		return;
 	}
@@ -257,7 +257,7 @@ imx6_ahcisata_phy_read(struct imx_ahci_s
 }
 
 static int
-ixm6_ahcisata_init(struct imx_ahci_softc *sc)
+imx6_ahcisata_init(struct imx_ahci_softc *sc)
 {
 	uint32_t v;
 	int timeout, pllstat;



CVS commit: src/sys/arch/arm/imx

2018-05-23 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Wed May 23 10:42:05 UTC 2018

Modified Files:
src/sys/arch/arm/imx: imx6_ahcisata.c imx6_ccm.c imx6_ccmreg.h
imx6_pcie.c imx6_usb.c imx6_usdhc.c

Log Message:
Modified CCM register defines.


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/imx/imx6_ahcisata.c \
src/sys/arch/arm/imx/imx6_ccmreg.h
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/imx/imx6_ccm.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/imx/imx6_pcie.c \
src/sys/arch/arm/imx/imx6_usdhc.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx6_usb.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_ahcisata.c
diff -u src/sys/arch/arm/imx/imx6_ahcisata.c:1.6 src/sys/arch/arm/imx/imx6_ahcisata.c:1.7
--- src/sys/arch/arm/imx/imx6_ahcisata.c:1.6	Thu Nov  9 05:57:23 2017
+++ src/sys/arch/arm/imx/imx6_ahcisata.c	Wed May 23 10:42:05 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_ahcisata.c,v 1.6 2017/11/09 05:57:23 hkenken Exp $	*/
+/*	$NetBSD: imx6_ahcisata.c,v 1.7 2018/05/23 10:42:05 hkenken Exp $	*/
 
 /*
  * Copyright (c) 2014 Ryo Shimizu 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_ahcisata.c,v 1.6 2017/11/09 05:57:23 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_ahcisata.c,v 1.7 2018/05/23 10:42:05 hkenken Exp $");
 
 #include "locators.h"
 #include "opt_imx.h"
@@ -264,7 +264,7 @@ ixm6_ahcisata_init(struct imx_ahci_softc
 
 	/* AHCISATA clock enable */
 	v = imx6_ccm_read(CCM_CCGR5);
-	imx6_ccm_write(CCM_CCGR5, v | CCM_CCGR5_100M_CLK_ENABLE(3));
+	imx6_ccm_write(CCM_CCGR5, v | __SHIFTIN(3, CCM_CCGR5_SATA_CLK_ENABLE));
 
 	/* PLL power up */
 	if (imx6_pll_power(CCM_ANALOG_PLL_ENET, 1,
Index: src/sys/arch/arm/imx/imx6_ccmreg.h
diff -u src/sys/arch/arm/imx/imx6_ccmreg.h:1.6 src/sys/arch/arm/imx/imx6_ccmreg.h:1.7
--- src/sys/arch/arm/imx/imx6_ccmreg.h:1.6	Thu Nov  9 05:57:23 2017
+++ src/sys/arch/arm/imx/imx6_ccmreg.h	Wed May 23 10:42:05 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_ccmreg.h,v 1.6 2017/11/09 05:57:23 hkenken Exp $	*/
+/*	$NetBSD: imx6_ccmreg.h,v 1.7 2018/05/23 10:42:05 hkenken Exp $	*/
 
 /*
  * Copyright (c) 2014 Ryo Shimizu 
@@ -163,7 +163,6 @@
 #define  CCM_CHSCCDR_IPU1_DI0_PODF		__BITS(5, 3)
 #define  CCM_CHSCCDR_IPU1_DI0_CLK_SEL		__BITS(2, 0)
 
-
 #define CCM_CSCDR20x0038
 #define  CCM_CSCDR2_ECSPI_CLK_PODF		__BITS(24, 19)
 #define  CCM_CSCDR2_IPU2_DI1_PRE_CLK_SEL	__BITS(17, 15)
@@ -189,65 +188,108 @@
 #define  CCM_CSCDR3_IPU1_HSP_CLK_SEL		__BITS(10, 9)
 
 #define CCM_CCOSR0x0060
-#define  CCM_CCOSR_CLKO2_EN	__BIT(24)
-#define  CCM_CCOSR_CLKO2_DIV	__BITS(23, 21)
-#define  CCM_CCOSR_CLKO2_SEL	__BITS(20, 16)
-#define  CCM_CCOSR_CLK_OUT_SEL	__BIT(8)
-#define  CCM_CCOSR_CLKO1_EN	__BIT(7)
-#define  CCM_CCOSR_CLKO1_DIV	__BITS(6, 4)
-#define  CCM_CCOSR_CLKO1_SEL	__BITS(3, 0)
-
-#define CCM_CCGR2		0x0070
-#define  CCM_CCGR2_IPSYNC_VDOA_IPG_CLK_ENABLE(n)		__SHIFTIN(n, __BITS(27, 26))
-#define  CCM_CCGR2_IPSYNC_IP2APB_TZASC2_IPG_CLK_ENABLE(n)   __SHIFTIN(n, __BITS(25, 24))
-#define  CCM_CCGR2_IPSYNC_IP2APB_TZASC1_IPG_CLK_ENABLE(n)   __SHIFTIN(n, __BITS(23, 22))
-#define  CCM_CCGR2_IPMUX3_CLK_ENABLE(n)__SHIFTIN(n, __BITS(21, 20))
-#define  CCM_CCGR2_IPMUX2_CLK_ENABLE(n)__SHIFTIN(n, __BITS(19, 18))
-#define  CCM_CCGR2_IPMUX1_CLK_ENABLE(n)__SHIFTIN(n, __BITS(17, 16))
-#define  CCM_CCGR2_IOMUX_IPT_CLK_IO_CLK_ENABLE(n)		__SHIFTIN(n, __BITS(15, 14))
-#define  CCM_CCGR2_IIM_CLK_ENABLE(n)__SHIFTIN(n, __BITS(13, 12))
-#define  CCM_CCGR2_I2C3_SERIAL_CLK_ENABLE(n)			__SHIFTIN(n, __BITS(11, 10))
-#define  CCM_CCGR2_I2C2_SERIAL_CLK_ENABLE(n)			__SHIFTIN(n, __BITS(9, 8))
-#define  CCM_CCGR2_I2C1_SERIAL_CLK_ENABLE(n)			__SHIFTIN(n, __BITS(7, 6))
-#define  CCM_CCGR2_HDMI_TX_ISFRCLK_ENABLE(n)			__SHIFTIN(n, __BITS(5, 4))
-#define  CCM_CCGR2_HDMI_TX_IAHBCLK_ENABLE(n)			__SHIFTIN(n, __BITS(1, 0))
-#define CCM_CCGR4	0x0078
-#define  CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_CLK_ENABLE(N)		__SHIFTIN(n, __BITS(31, 30))
-#define  CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_CLK_ENABLE(n) 	__SHIFTIN(n, __BITS(29, 28))
-#define  CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_CLK_ENABLE(n)		__SHIFTIN(n, __BITS(27, 26))
-#define  CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_CLK_ENABLE(n)		__SHIFTIN(n, __BITS(25, 24))
-#define  CCM_CCGR4_PWM4_CLK_ENABLE(n)	__SHIFTIN(n, __BITS(23, 22))
-#define  CCM_CCGR4_PWM3_CLK_ENABLE(n)	__SHIFTIN(n, __BITS(21, 20))
-#define  CCM_CCGR4_PWM2_CLK_ENABLE(n)	__SHIFTIN(n, __BITS(19, 18))
-#define  CCM_CCGR4_PWM1_CLK_ENABLE(n)	__SHIFTIN(n, __BITS(17, 16))
-#define  CCM_CCGR4_PL301_MX6QPER2_MAINCLK_ENABLE(n)			__SHIFTIN(n, __BITS(15, 14))
-#define  CCM_CCGR4_PL301_MX6QPER1_BCHCLK_ENABLE(n)			__SHIFTIN(n, __BITS(13, 12))
-#define  CCM_CCGR4_CG5_ENABLE(n)	__SHIFTIN(n, __BITS(11, 10))
-#define  

CVS commit: src/sys/arch/arm/imx

2018-05-08 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Tue May  8 06:11:45 UTC 2018

Modified Files:
src/sys/arch/arm/imx: if_enet.c

Log Message:
Don't remove M_PKTHDR manually, use m_remove_pkthdr instead.

ok ryo@


To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/imx/if_enet.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/if_enet.c
diff -u src/sys/arch/arm/imx/if_enet.c:1.12 src/sys/arch/arm/imx/if_enet.c:1.13
--- src/sys/arch/arm/imx/if_enet.c:1.12	Fri Feb 16 08:42:45 2018
+++ src/sys/arch/arm/imx/if_enet.c	Tue May  8 06:11:45 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_enet.c,v 1.12 2018/02/16 08:42:45 ryo Exp $	*/
+/*	$NetBSD: if_enet.c,v 1.13 2018/05/08 06:11:45 maxv Exp $	*/
 
 /*
  * Copyright (c) 2014 Ryo Shimizu 
@@ -31,7 +31,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_enet.c,v 1.12 2018/02/16 08:42:45 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_enet.c,v 1.13 2018/05/08 06:11:45 maxv Exp $");
 
 #include "vlan.h"
 
@@ -607,7 +607,8 @@ enet_rx_intr(void *arg)
 
 			m->m_len = len;
 			amount += len;
-			m->m_flags &= ~M_PKTHDR;
+			if (m->m_flags & M_PKTHDR)
+m_remove_pkthdr(m);
 			mprev->m_next = m;
 		}
 		mprev = m;



CVS commit: src/sys/arch/arm/imx

2018-02-16 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Fri Feb 16 08:42:45 UTC 2018

Modified Files:
src/sys/arch/arm/imx: if_enet.c

Log Message:
* avoid writing past the end of the mbuf.
* m_getptr was introduced for the IPsec Crypto code. it must not be used here.

pointed out by maxv@. thanks.


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/imx/if_enet.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/if_enet.c
diff -u src/sys/arch/arm/imx/if_enet.c:1.11 src/sys/arch/arm/imx/if_enet.c:1.12
--- src/sys/arch/arm/imx/if_enet.c:1.11	Fri Jun  9 18:14:59 2017
+++ src/sys/arch/arm/imx/if_enet.c	Fri Feb 16 08:42:45 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_enet.c,v 1.11 2017/06/09 18:14:59 ryo Exp $	*/
+/*	$NetBSD: if_enet.c,v 1.12 2018/02/16 08:42:45 ryo Exp $	*/
 
 /*
  * Copyright (c) 2014 Ryo Shimizu 
@@ -31,7 +31,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_enet.c,v 1.11 2017/06/09 18:14:59 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_enet.c,v 1.12 2018/02/16 08:42:45 ryo Exp $");
 
 #include "vlan.h"
 
@@ -1689,8 +1689,7 @@ enet_encap_txring(struct enet_softc *sc,
 	/* fill protocol cksum zero beforehand */
 	if (csumflags & (M_CSUM_UDPv4 | M_CSUM_TCPv4 |
 	M_CSUM_UDPv6 | M_CSUM_TCPv6)) {
-		struct mbuf *m1;
-		int ehlen, moff;
+		int ehlen;
 		uint16_t etype;
 
 		m_copydata(m, ETHER_ADDR_LEN * 2, sizeof(etype), );
@@ -1708,12 +1707,13 @@ enet_encap_txring(struct enet_softc *sc,
 		}
 
 		if (ehlen) {
-			m1 = m_getptr(m, ehlen +
+			const int off =
 			M_CSUM_DATA_IPv4_IPHL(m->m_pkthdr.csum_data) +
-			M_CSUM_DATA_IPv4_OFFSET(m->m_pkthdr.csum_data),
-			);
-			if (m1 != NULL)
-*(uint16_t *)(mtod(m1, char *) + moff) = 0;
+			M_CSUM_DATA_IPv4_OFFSET(m->m_pkthdr.csum_data);
+			if (m->m_pkthdr.len >= ehlen + off + sizeof(uint16_t)) {
+uint16_t zero = 0;
+m_copyback(m, ehlen + off, sizeof(zero), );
+			}
 		}
 	}
 



CVS commit: src/sys/arch/arm/imx

2017-10-25 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Thu Oct 26 05:08:30 UTC 2017

Modified Files:
src/sys/arch/arm/imx: imx6_usdhc.c imx7_usdhc.c

Log Message:
fix typo


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/imx/imx6_usdhc.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx7_usdhc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_usdhc.c
diff -u src/sys/arch/arm/imx/imx6_usdhc.c:1.4 src/sys/arch/arm/imx/imx6_usdhc.c:1.5
--- src/sys/arch/arm/imx/imx6_usdhc.c:1.4	Fri Jun  9 18:14:59 2017
+++ src/sys/arch/arm/imx/imx6_usdhc.c	Thu Oct 26 05:08:30 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_usdhc.c,v 1.4 2017/06/09 18:14:59 ryo Exp $ */
+/*	$NetBSD: imx6_usdhc.c,v 1.5 2017/10/26 05:08:30 ryo Exp $ */
 
 /*-
  * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
@@ -30,7 +30,7 @@
 
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_usdhc.c,v 1.4 2017/06/09 18:14:59 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_usdhc.c,v 1.5 2017/10/26 05:08:30 ryo Exp $");
 
 #include "imxgpio.h"
 
@@ -125,7 +125,7 @@ sdhc_attach(device_t parent, device_t se
 		return;
 	}
 
-	aprint_normal(": Ultra Secured Digial Host Controller\n");
+	aprint_normal(": Ultra Secured Digital Host Controller\n");
 	aprint_naive("\n");
 	sc->sc_sdhc.sc_host = sc->sc_hosts;
 

Index: src/sys/arch/arm/imx/imx7_usdhc.c
diff -u src/sys/arch/arm/imx/imx7_usdhc.c:1.1 src/sys/arch/arm/imx/imx7_usdhc.c:1.2
--- src/sys/arch/arm/imx/imx7_usdhc.c:1.1	Tue May 17 06:44:45 2016
+++ src/sys/arch/arm/imx/imx7_usdhc.c	Thu Oct 26 05:08:30 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx7_usdhc.c,v 1.1 2016/05/17 06:44:45 ryo Exp $	*/
+/*	$NetBSD: imx7_usdhc.c,v 1.2 2017/10/26 05:08:30 ryo Exp $	*/
 
 /*-
  * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
@@ -29,7 +29,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx7_usdhc.c,v 1.1 2016/05/17 06:44:45 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx7_usdhc.c,v 1.2 2017/10/26 05:08:30 ryo Exp $");
 
 #include "imxgpio.h"
 
@@ -163,7 +163,7 @@ sdhc_attach(device_t parent __unused, de
 		return;
 	}
 
-	aprint_normal(": Ultra Secured Digial Host Controller\n");
+	aprint_normal(": Ultra Secured Digital Host Controller\n");
 	aprint_naive("\n");
 	sc->sc_sdhc.sc_host = sc->sc_hosts;
 



CVS commit: src/sys/arch/arm/imx

2017-10-24 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Tue Oct 24 09:11:51 UTC 2017

Modified Files:
src/sys/arch/arm/imx: imx6_pcie.c

Log Message:
Added link up status check for valid pci device confirm.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx6_pcie.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_pcie.c
diff -u src/sys/arch/arm/imx/imx6_pcie.c:1.3 src/sys/arch/arm/imx/imx6_pcie.c:1.4
--- src/sys/arch/arm/imx/imx6_pcie.c:1.3	Fri Jun  9 18:14:59 2017
+++ src/sys/arch/arm/imx/imx6_pcie.c	Tue Oct 24 09:11:51 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_pcie.c,v 1.3 2017/06/09 18:14:59 ryo Exp $	*/
+/*	$NetBSD: imx6_pcie.c,v 1.4 2017/10/24 09:11:51 hkenken Exp $	*/
 
 /*
  * Copyright (c) 2016  Genetec Corporation.  All rights reserved.
@@ -31,7 +31,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_pcie.c,v 1.3 2017/06/09 18:14:59 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_pcie.c,v 1.4 2017/10/24 09:11:51 hkenken Exp $");
 
 #include "opt_pci.h"
 
@@ -142,6 +142,23 @@ static void imx6pcie_intr_disestablish(v
 CFATTACH_DECL_NEW(imxpcie, sizeof(struct imx6pcie_softc),
 imx6pcie_match, imx6pcie_attach, NULL, NULL);
 
+static int
+imx6pcie_linkup_status(struct imx6pcie_softc *sc)
+{
+	return PCIE_READ(sc, PCIE_PL_DEBUG1) & PCIE_PL_DEBUG1_XMLH_LINK_UP;
+}
+
+static int
+imx6pcie_valid_device(struct imx6pcie_softc *sc, int bus, int dev)
+{
+	if (bus != 0 && !imx6pcie_linkup_status(sc))
+		return 0;
+	if (bus <= 1 && dev > 0)
+		return 0;
+
+	return 1;
+}
+
 static void
 imx6pcie_clock_enable(struct imx6pcie_softc *sc)
 {
@@ -392,14 +409,11 @@ static int
 imx6pcie_wait_for_link(struct imx6pcie_softc *sc)
 {
 	uint32_t ltssm, valid, v;
-	uint32_t linkup;
 	int retry;
 
 #define LINKUP_RETRY	200
 	for (retry = LINKUP_RETRY; retry > 0; --retry) {
-		linkup = PCIE_READ(sc, PCIE_PL_DEBUG1);
-		if ((linkup & PCIE_PL_DEBUG1_XMLH_LINK_UP) &&
-		!(linkup & PCIE_PL_DEBUG1_XMLH_LINK_IN_TRAINING)) {
+		if (!imx6pcie_linkup_status(sc)) {
 			delay(100);
 			continue;
 		}
@@ -425,8 +439,7 @@ imx6pcie_wait_for_link(struct imx6pcie_s
 			imx6pcie_phy_write(sc, PCIE_PHY_RX_OVRD_IN_LO, v);
 		}
 
-		if (linkup)
-			return 0;
+		return 0;
 	}
 
 	aprint_error_dev(sc->sc_dev, "Link Up failed.\n");
@@ -686,11 +699,13 @@ imx6pcie_setup(struct imx6pcie_softc * c
 	v = PCIE_READ(sc, PCI_COMMAND_STATUS_REG);
 	v |= PCI_COMMAND_IO_ENABLE |
 	PCI_COMMAND_MEM_ENABLE |
-	PCI_COMMAND_MASTER_ENABLE;
+	PCI_COMMAND_MASTER_ENABLE |
+	PCI_COMMAND_SERR_ENABLE;
 	PCIE_WRITE(sc, PCI_COMMAND_STATUS_REG, v);
 
 	PCIE_WRITE(sc, PCI_CLASS_REG,
-	PCI_CLASS_CODE(PCI_CLASS_BRIDGE, PCI_SUBCLASS_BRIDGE_PCI, PCI_INTERFACE_BRIDGE_PCI_PCI));
+	PCI_CLASS_CODE(PCI_CLASS_BRIDGE,
+		PCI_SUBCLASS_BRIDGE_PCI, PCI_INTERFACE_BRIDGE_PCI_PCI));
 
 	PCIE_WRITE(sc, PCIE_PL_IATUVR, 0);
 
@@ -785,7 +800,7 @@ imx6pcie_conf_read(void *v, pcitag_t tag
 
 	if ((unsigned int)offset >= PCI_EXTCONF_SIZE)
 		return ret;
-	if (b <= 1 && d > 0)
+	if (!imx6pcie_valid_device(sc, b, d))
 		return ret;
 
 	PCIE_WRITE(sc, PCIE_PL_IATUVR, 0);
@@ -832,7 +847,7 @@ imx6pcie_conf_write(void *v, pcitag_t ta
 
 	if ((unsigned int)offset >= PCI_EXTCONF_SIZE)
 		return;
-	if (b <= 1 && d > 0)
+	if (!imx6pcie_valid_device(sc, b, d))
 		return;
 
 	PCIE_WRITE(sc, PCIE_PL_IATUVR, 0);



CVS commit: src/sys/arch/arm/imx

2017-08-18 Thread Jonathan A. Kollasch
Module Name:src
Committed By:   jakllsch
Date:   Fri Aug 18 21:45:25 UTC 2017

Modified Files:
src/sys/arch/arm/imx: files.imx51 files.imx6 files.imx7

Log Message:
Sprinkle 'bus_dma_generic needs-flag' to fix build after previous.


To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/imx/files.imx51
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/imx/files.imx6
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/files.imx7

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx51
diff -u src/sys/arch/arm/imx/files.imx51:1.15 src/sys/arch/arm/imx/files.imx51:1.16
--- src/sys/arch/arm/imx/files.imx51:1.15	Thu Aug 17 09:11:04 2017
+++ src/sys/arch/arm/imx/files.imx51	Fri Aug 18 21:45:25 2017
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx51,v 1.15 2017/08/17 09:11:04 hkenken Exp $
+#	$NetBSD: files.imx51,v 1.16 2017/08/18 21:45:25 jakllsch Exp $
 #
 # Configuration info for the Freescale i.MX5x
 #
@@ -16,7 +16,7 @@ file	arch/arm/arm32/irq_dispatch.S
 
 define	bus_dma_generic
 file	arch/arm/arm32/armv7_generic_space.c
-file	arch/arm/arm32/armv7_generic_dma.c
+file	arch/arm/arm32/armv7_generic_dma.c	bus_dma_generic needs-flag
 file	arch/arm/arm/bus_space_a4x.S
 
 # iMX51 AXI/AHB bus interface and SoC domains

Index: src/sys/arch/arm/imx/files.imx6
diff -u src/sys/arch/arm/imx/files.imx6:1.9 src/sys/arch/arm/imx/files.imx6:1.10
--- src/sys/arch/arm/imx/files.imx6:1.9	Thu Aug 17 09:11:04 2017
+++ src/sys/arch/arm/imx/files.imx6	Fri Aug 18 21:45:25 2017
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx6,v 1.9 2017/08/17 09:11:04 hkenken Exp $
+#	$NetBSD: files.imx6,v 1.10 2017/08/18 21:45:25 jakllsch Exp $
 #
 # Configuration info for the Freescale i.MX6
 #
@@ -16,7 +16,7 @@ file	arch/arm/arm32/irq_dispatch.S
 
 define	bus_dma_generic
 file	arch/arm/arm32/armv7_generic_space.c
-file	arch/arm/arm32/armv7_generic_dma.c
+file	arch/arm/arm32/armv7_generic_dma.c	bus_dma_generic needs-flag
 file	arch/arm/arm/bus_space_a4x.S
 
 file	arch/arm/imx/imx6_board.c

Index: src/sys/arch/arm/imx/files.imx7
diff -u src/sys/arch/arm/imx/files.imx7:1.3 src/sys/arch/arm/imx/files.imx7:1.4
--- src/sys/arch/arm/imx/files.imx7:1.3	Thu Aug 17 09:11:04 2017
+++ src/sys/arch/arm/imx/files.imx7	Fri Aug 18 21:45:25 2017
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx7,v 1.3 2017/08/17 09:11:04 hkenken Exp $
+#	$NetBSD: files.imx7,v 1.4 2017/08/18 21:45:25 jakllsch Exp $
 #
 # Configuration info for the Freescale i.MX7
 #
@@ -17,7 +17,7 @@ file	arch/arm/arm32/irq_dispatch.S
 
 define	bus_dma_generic
 file	arch/arm/arm32/armv7_generic_space.c
-file	arch/arm/arm32/armv7_generic_dma.c
+file	arch/arm/arm32/armv7_generic_dma.c	bus_dma_generic needs-flag
 file	arch/arm/arm/bus_space_a4x.S
 
 file	arch/arm/imx/imx7_board.c



CVS commit: src/sys/arch/arm/imx

2017-06-25 Thread Maxime Villard
Module Name:src
Committed By:   maxv
Date:   Sun Jun 25 12:11:30 UTC 2017

Modified Files:
src/sys/arch/arm/imx: imx51_ipuv3.c

Log Message:
memory leak, found by Mootja


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/imx/imx51_ipuv3.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx51_ipuv3.c
diff -u src/sys/arch/arm/imx/imx51_ipuv3.c:1.4 src/sys/arch/arm/imx/imx51_ipuv3.c:1.5
--- src/sys/arch/arm/imx/imx51_ipuv3.c:1.4	Mon Dec 21 04:26:28 2015
+++ src/sys/arch/arm/imx/imx51_ipuv3.c	Sun Jun 25 12:11:30 2017
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_ipuv3.c,v 1.4 2015/12/21 04:26:28 hkenken Exp $	*/
+/*	$NetBSD: imx51_ipuv3.c,v 1.5 2017/06/25 12:11:30 maxv Exp $	*/
 
 /*
  * Copyright (c) 2011, 2012  Genetec Corporation.  All rights reserved.
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx51_ipuv3.c,v 1.4 2015/12/21 04:26:28 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx51_ipuv3.c,v 1.5 2017/06/25 12:11:30 maxv Exp $");
 
 #include "opt_imx51_ipuv3.h"
 
@@ -949,6 +949,7 @@ imx51_ipuv3_new_screen(struct imx51_ipuv
 		aprint_error_dev(sc->dev,
 		"failed to allocate %u bytes of video memory: %d\n",
 		scr->stride * height, error);
+		free(scr, M_DEVBUF);
 		return error;
 	}
 



CVS commit: src/sys/arch/arm/imx

2016-11-24 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Fri Nov 25 05:03:36 UTC 2016

Modified Files:
src/sys/arch/arm/imx: imx6_pcie.c

Log Message:
* Fix compile error.
* typo


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx6_pcie.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_pcie.c
diff -u src/sys/arch/arm/imx/imx6_pcie.c:1.1 src/sys/arch/arm/imx/imx6_pcie.c:1.2
--- src/sys/arch/arm/imx/imx6_pcie.c:1.1	Thu Nov 24 12:06:43 2016
+++ src/sys/arch/arm/imx/imx6_pcie.c	Fri Nov 25 05:03:36 2016
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_pcie.c,v 1.1 2016/11/24 12:06:43 hkenken Exp $	*/
+/*	$NetBSD: imx6_pcie.c,v 1.2 2016/11/25 05:03:36 hkenken Exp $	*/
 
 /*
  * Copyright (c) 2016  Genetec Corporation.  All rights reserved.
@@ -31,10 +31,9 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_pcie.c,v 1.1 2016/11/24 12:06:43 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_pcie.c,v 1.2 2016/11/25 05:03:36 hkenken Exp $");
 
 #include "opt_pci.h"
-#include "opt_imx6pcie.h"
 
 #include "pci.h"
 #include "imxgpio.h"
@@ -760,7 +759,7 @@ imx6pcie_decompose_tag(void *v, pcitag_t
 /*
  * work around.
  * If there is no PCIe devices, DABT will be generated by read/write access to
- * config area, so replace original DABT handler with sinple jump-back one.
+ * config area, so replace original DABT handler with simple jump-back one.
  */
 extern u_int data_abort_handler_address;
 static bool data_abort_flag;



CVS commit: src/sys/arch/arm/imx

2016-11-24 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Thu Nov 24 08:41:20 UTC 2016

Modified Files:
src/sys/arch/arm/imx: imx6_board.c imx6_usdhc.c imx6var.h

Log Message:
Move to common function.
sdhc_set_gpio_cd() -> imx6_set_gpio()


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/imx/imx6_board.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx6_usdhc.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/imx/imx6var.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_board.c
diff -u src/sys/arch/arm/imx/imx6_board.c:1.6 src/sys/arch/arm/imx/imx6_board.c:1.7
--- src/sys/arch/arm/imx/imx6_board.c:1.6	Thu Oct 20 09:53:07 2016
+++ src/sys/arch/arm/imx/imx6_board.c	Thu Nov 24 08:41:20 2016
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_board.c,v 1.6 2016/10/20 09:53:07 skrll Exp $	*/
+/*	$NetBSD: imx6_board.c,v 1.7 2016/11/24 08:41:20 hkenken Exp $	*/
 
 /*
  * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(1, "$NetBSD: imx6_board.c,v 1.6 2016/10/20 09:53:07 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: imx6_board.c,v 1.7 2016/11/24 08:41:20 hkenken Exp $");
 
 #include "opt_imx.h"
 #include "arml2cc.h"
@@ -36,6 +36,7 @@ __KERNEL_RCSID(1, "$NetBSD: imx6_board.c
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -47,6 +48,7 @@ __KERNEL_RCSID(1, "$NetBSD: imx6_board.c
 #include 
 #include 
 #include 
+#include 
 
 bus_space_tag_t imx6_ioreg_bst = _generic_bs_tag;
 bus_space_handle_t imx6_ioreg_bsh;
@@ -230,3 +232,50 @@ imx6_cpu_hatch(struct cpu_info *ci)
 	a9tmr_init_cpu_clock(ci);
 }
 #endif
+
+void
+imx6_set_gpio(device_t self, const char *name, int32_t *gpio,
+int32_t *active, u_int dir)
+{
+	prop_dictionary_t dict;
+	const char *pin_data;
+	int grp, pin;
+
+	*gpio = -1;
+	*active = -1;
+
+	dict = device_properties(self);
+	if (!prop_dictionary_get_cstring_nocopy(dict, name, _data))
+		return;
+
+	/*
+	 * "!1,6" -> gpio = GPIO_NO(1,6),  active = GPIO_PIN_LOW
+	 * "3,31" -> gpio = GPIO_NO(3,31), active = GPIO_PIN_HIGH
+	 * "!"-> always not detected
+	 * none   -> always detected
+	 */
+	if (*pin_data == '!') {
+		*active = GPIO_PIN_LOW;
+		pin_data++;
+	} else
+		*active = GPIO_PIN_HIGH;
+
+	if (*pin_data == '\0')
+		return;
+
+	for (grp = 0; (*pin_data >= '0') && (*pin_data <= '9'); pin_data++)
+		grp = grp * 10 + *pin_data - '0';
+
+	KASSERT(*pin_data == ',');
+	pin_data++;
+
+	for (pin = 0; (*pin_data >= '0') && (*pin_data <= '9'); pin_data++)
+		pin = pin * 10 + *pin_data - '0';
+
+	KASSERT(*pin_data == '\0');
+
+	*gpio = GPIO_NO(grp, pin);
+#if NIMXGPIO > 0
+	gpio_set_direction(*gpio, dir);
+#endif
+}

Index: src/sys/arch/arm/imx/imx6_usdhc.c
diff -u src/sys/arch/arm/imx/imx6_usdhc.c:1.2 src/sys/arch/arm/imx/imx6_usdhc.c:1.3
--- src/sys/arch/arm/imx/imx6_usdhc.c:1.2	Thu Dec 31 11:53:18 2015
+++ src/sys/arch/arm/imx/imx6_usdhc.c	Thu Nov 24 08:41:20 2016
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_usdhc.c,v 1.2 2015/12/31 11:53:18 ryo Exp $ */
+/*	$NetBSD: imx6_usdhc.c,v 1.3 2016/11/24 08:41:20 hkenken Exp $ */
 
 /*-
  * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
@@ -30,7 +30,7 @@
 
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_usdhc.c,v 1.2 2015/12/31 11:53:18 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_usdhc.c,v 1.3 2016/11/24 08:41:20 hkenken Exp $");
 
 #include "imxgpio.h"
 
@@ -39,6 +39,7 @@ __KERNEL_RCSID(0, "$NetBSD: imx6_usdhc.c
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -58,7 +59,7 @@ struct sdhc_axi_softc {
 	/* we have only one slot */
 	struct sdhc_host *sc_hosts[1];
 	int32_t sc_gpio_cd;
-	int32_t sc_gpio_cd_low_active;
+	int32_t sc_gpio_cd_active;
 	void *sc_ih;
 };
 
@@ -95,60 +96,16 @@ imx6_sdhc_card_detect(struct sdhc_softc 
 #if NIMXGPIO > 0
 	if (sc->sc_gpio_cd >= 0) {
 		detect = gpio_data_read(sc->sc_gpio_cd);
+		if (sc->sc_gpio_cd_active == GPIO_PIN_LOW)
+			detect = !detect;
 	} else
 #endif
 		detect = 1;
-	if (sc->sc_gpio_cd_low_active)
-		detect = detect ? 0 : 1;
 
 	return detect;
 }
 
 static void
-sdhc_set_gpio_cd(struct sdhc_axi_softc *sc, const char *name)
-{
-	prop_dictionary_t dict;
-	const char *pin_data;
-	int grp, pin;
-
-	dict = device_properties(sc->sc_sdhc.sc_dev);
-	if (!prop_dictionary_get_cstring_nocopy(dict, name, _data))
-		return;
-
-	/*
-	 * "!1,6" -> gpio_cd = GPIO_NO(1,6),  gpio_cd_low_active = 1
-	 * "3,31" -> gpio_cd = GPIO_NO(3,31), gpio_cd_low_active = 0
-	 * "!"-> always not detected
-	 * none   -> always detected
-	 */
-	if (*pin_data == '!') {
-		sc->sc_gpio_cd_low_active = 1;
-		pin_data++;
-	} else
-		sc->sc_gpio_cd_low_active = 0;
-
-	sc->sc_gpio_cd = -1;
-	if (*pin_data == '\0')
-		return;
-
-	for (grp = 0; (*pin_data >= '0') && (*pin_data <= '9'); pin_data++)
-		grp = grp * 10 + *pin_data - '0';
-
-	KASSERT(*pin_data == ',');
-	pin_data++;
-
-	for (pin = 0; (*pin_data >= '0') && 

CVS commit: src/sys/arch/arm/imx

2016-10-20 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Thu Oct 20 16:50:11 UTC 2016

Modified Files:
src/sys/arch/arm/imx: imx7_ccm.c

Log Message:
make "machdep.imx7.frequency.arm_a7" and "machdep.imx7.frequency.arm_m4" sysctl 
node changeable.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx7_ccm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx7_ccm.c
diff -u src/sys/arch/arm/imx/imx7_ccm.c:1.1 src/sys/arch/arm/imx/imx7_ccm.c:1.2
--- src/sys/arch/arm/imx/imx7_ccm.c:1.1	Tue May 17 06:44:45 2016
+++ src/sys/arch/arm/imx/imx7_ccm.c	Thu Oct 20 16:50:11 2016
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx7_ccm.c,v 1.1 2016/05/17 06:44:45 ryo Exp $	*/
+/*	$NetBSD: imx7_ccm.c,v 1.2 2016/10/20 16:50:11 ryo Exp $	*/
 
 /*
  * Copyright (c) 2010-2012, 2014  Genetec Corporation.  All rights reserved.
@@ -31,7 +31,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx7_ccm.c,v 1.1 2016/05/17 06:44:45 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx7_ccm.c,v 1.2 2016/10/20 16:50:11 ryo Exp $");
 
 #include "opt_imx.h"
 
@@ -1059,10 +1059,12 @@ imxccm_sysctl_freq_helper(SYSCTLFN_ARGS)
 
 	if (rnode->sysctl_num == sc->sc_sysctlnode_arm_pll)
 		return imx7_set_clock(IMX7CLK_ARM_PLL, value);
-	if (rnode->sysctl_num == sc->sc_sysctlnode_arm_a7_clk)
+	else if (rnode->sysctl_num == sc->sc_sysctlnode_arm_a7_clk)
 		return imx7_set_clock(IMX7CLK_ARM_A7_CLK_ROOT, value);
+	else if (rnode->sysctl_num == sc->sc_sysctlnode_arm_m4_clk)
+		return imx7_set_clock(IMX7CLK_ARM_M4_CLK_ROOT, value);
 
-	return 0;
+	return EOPNOTSUPP;
 }
 
 
@@ -1105,7 +1107,7 @@ imx7_ccm_analog_write(uint32_t reg, uint
 }
 
 static uint64_t
-rootclk(int clk)
+rootclk(int clk, bool nodiv)
 {
 	uint32_t d, v;
 	uint64_t freq;
@@ -1126,6 +1128,9 @@ rootclk(int clk)
 	}
 #endif
 
+	if (nodiv)
+		return freq;
+
 	/* eval TARGET_ROOT[PRE_PODF] */
 	if ((imx7clkroottbl[clk].type != CLKTYPE_CORE) &&
 	(imx7clkroottbl[clk].type != CLKTYPE_DRAM) &&
@@ -1449,7 +1454,7 @@ imx7_get_clock(enum imx7_clock clk)
 	case IMX7CLK_AUDIO_MCLK_CLK_ROOT:
 	case IMX7CLK_CCM_CLKO1:
 	case IMX7CLK_CCM_CLKO2:
-		freq = rootclk(clk);
+		freq = rootclk(clk, false);
 		break;
 
 	default:
@@ -1461,10 +1466,45 @@ imx7_get_clock(enum imx7_clock clk)
 	return freq;
 }
 
+/*
+ * resolve two clock divisors d3 and d6.
+ * freq = maxfreq / d3(3bit) / d6(6bit)
+ */
+static void
+getrootclkdiv(uint32_t maxfreq, uint32_t freq, uint32_t *d3p, uint32_t *d6p)
+{
+	uint32_t c_dif, c_d3, c_d6;
+	uint32_t dif, d3, d6;
+	uint32_t lim, base, f;
+
+	c_dif = 0x;
+	c_d3 = c_d6 = 0;
+	for (d3 = 0; d3 < 8; d3++) {
+		base = 0;
+		for (lim = 64; lim != 0; lim >>= 1) {
+			d6 = (lim >> 1) + base;
+			f = maxfreq / (d3 + 1) / (d6 + 1);
+			if (freq < f) {
+base = d6 + 1;
+lim--;
+			}
+			dif = (freq > f) ? freq - f : f - freq;
+			if (c_dif > dif) {
+c_dif = dif;
+c_d3 = d3;
+c_d6 = d6;
+			}
+		}
+	}
+	*d3p = c_d3;
+	*d6p = c_d6;
+}
+
 int
 imx7_set_clock(enum imx7_clock clk, uint32_t freq)
 {
 	uint32_t v, x;
+	uint32_t d3, d6, maxfreq;
 
 	if (ccm_softc == NULL)
 		return 0;
@@ -1477,6 +1517,36 @@ imx7_set_clock(enum imx7_clock clk, uint
 		v |=  __SHIFTIN(x, CCM_ANALOG_PLL_ARM_DIV_SELECT);
 		imx7_ccm_analog_write(CCM_ANALOG_PLL_ARM, v);
 		break;
+
+	/* core type clock */
+	case IMX7CLK_ARM_A7_CLK_ROOT:
+		maxfreq = rootclk(clk, true);
+		getrootclkdiv(maxfreq, freq, , );
+		v = imx7_ccm_read(imx7clkroottbl[clk].targetroot);
+		/* core type clocks use AUTO_PODF and POST_PODF */
+		v &= ~CCM_TARGET_ROOT_AUTO_PODF;
+		v |= __SHIFTIN(d3, CCM_TARGET_ROOT_AUTO_PODF);
+		v |= CCM_TARGET_ROOT_AUTO_ENABLE;
+		v &= ~CCM_TARGET_ROOT_POST_PODF;
+		v |= __SHIFTIN(d6, CCM_TARGET_ROOT_POST_PODF);
+		imx7_ccm_write(imx7clkroottbl[clk].targetroot, v);
+		break;
+
+	/* bus type clocks */
+	case IMX7CLK_ARM_M4_CLK_ROOT:
+	case IMX7CLK_MAIN_AXI_CLK_ROOT:
+	case IMX7CLK_DISP_AXI_CLK_ROOT:
+		maxfreq = rootclk(clk, true);
+		getrootclkdiv(maxfreq, freq, , );
+		/* bus type clocks use PRE_PODF and POST_PODF */
+		v = imx7_ccm_read(imx7clkroottbl[clk].targetroot);
+		v &= ~CCM_TARGET_ROOT_PRE_PODF;
+		v |= __SHIFTIN(d3, CCM_TARGET_ROOT_PRE_PODF);
+		v &= ~CCM_TARGET_ROOT_POST_PODF;
+		v |= __SHIFTIN(d6, CCM_TARGET_ROOT_POST_PODF);
+		imx7_ccm_write(imx7clkroottbl[clk].targetroot, v);
+		break;
+
 	default:
 		aprint_error_dev(ccm_softc->sc_dev,
 		"%s: clockid %d: not supported\n", __func__, clk);



CVS commit: src/sys/arch/arm/imx

2016-10-17 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Mon Oct 17 09:21:51 UTC 2016

Modified Files:
src/sys/arch/arm/imx: imx7_ccmreg.h imx7_gpcreg.h imx7_srcreg.h
Added Files:
src/sys/arch/arm/imx: imx7_rdcreg.h

Log Message:
add more register definitions.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx7_ccmreg.h \
src/sys/arch/arm/imx/imx7_gpcreg.h src/sys/arch/arm/imx/imx7_srcreg.h
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/imx7_rdcreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx7_ccmreg.h
diff -u src/sys/arch/arm/imx/imx7_ccmreg.h:1.1 src/sys/arch/arm/imx/imx7_ccmreg.h:1.2
--- src/sys/arch/arm/imx/imx7_ccmreg.h:1.1	Tue May 17 06:44:45 2016
+++ src/sys/arch/arm/imx/imx7_ccmreg.h	Mon Oct 17 09:21:51 2016
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx7_ccmreg.h,v 1.1 2016/05/17 06:44:45 ryo Exp $	*/
+/*	$NetBSD: imx7_ccmreg.h,v 1.2 2016/10/17 09:21:51 ryo Exp $	*/
 
 /*
  * Copyright (c) 2015 Internet Initiative Japan, Inc.
@@ -974,6 +974,10 @@
 #define CCM_CCGR190_TOG			0x4bec
 
 /* CCGR mapping */
+#define CCM_CCGR_M4			CCM_CCGR1
+#define CCM_CCGR_M4_SET			(CCM_CCGR_M4 + 4)
+#define CCM_CCGR_M4_CLR			(CCM_CCGR_M4 + 8)
+#define CCM_CCGR_M4_TOG			(CCM_CCGR_M4 + 12)
 #define CCM_CCGR_SIM_MAIN		CCM_CCGR4
 #define CCM_CCGR_SIM_MAIN_SET		(CCM_CCGR_SIM_MAIN + 4)
 #define CCM_CCGR_SIM_MAIN_CLR		(CCM_CCGR_SIM_MAIN + 8)
Index: src/sys/arch/arm/imx/imx7_gpcreg.h
diff -u src/sys/arch/arm/imx/imx7_gpcreg.h:1.1 src/sys/arch/arm/imx/imx7_gpcreg.h:1.2
--- src/sys/arch/arm/imx/imx7_gpcreg.h:1.1	Tue May 17 06:44:45 2016
+++ src/sys/arch/arm/imx/imx7_gpcreg.h	Mon Oct 17 09:21:51 2016
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx7_gpcreg.h,v 1.1 2016/05/17 06:44:45 ryo Exp $	*/
+/*	$NetBSD: imx7_gpcreg.h,v 1.2 2016/10/17 09:21:51 ryo Exp $	*/
 
 /*
  * Copyright (c) 2015 Internet Initiative Japan, Inc.
@@ -59,6 +59,8 @@
 #define  GPC_PGC_ACK_SEL_A7_A7_PGC_PUP_ACK		__BIT(31)
 #define  GPC_PGC_ACK_SEL_A7_A7_PGC_PDN_ACK		__BIT(15)
 #define GPC_PGC_ACK_SEL_M40x0028
+#define  GPC_PGC_ACK_SEL_M4_M4_DUMMY_PGC_PUP_ACK	__BIT(31)
+#define  GPC_PGC_ACK_SEL_M4_M4_DUMMY_PGC_PDN_ACK	__BIT(15)
 #define GPC_MISC	0x002c
 #define GPC_IMR1_CORE0_A70x0030
 #define GPC_IMR2_CORE0_A70x0034
@@ -92,6 +94,7 @@
 #define GPC_SLT9_CFG	0x00d4
 #define GPC_PGC_CPU_MAPPING0x00ec
 #define  GPC_PGC_CPU_MAPPING_FASTMEGA_A7_DOMAIN		__BIT(0)
+#define  GPC_PGC_CPU_MAPPING_FASTMEGA_M4_DOMAIN		__BIT(8)
 #define GPC_CPU_PGC_SW_PUP_REQ0x00f0
 #define GPC_PU_PGC_SW_PUP_REQ0x00f8
 #define GPC_CPU_PGC_SW_PDN_REQ0x00fc
Index: src/sys/arch/arm/imx/imx7_srcreg.h
diff -u src/sys/arch/arm/imx/imx7_srcreg.h:1.1 src/sys/arch/arm/imx/imx7_srcreg.h:1.2
--- src/sys/arch/arm/imx/imx7_srcreg.h:1.1	Tue May 17 06:44:45 2016
+++ src/sys/arch/arm/imx/imx7_srcreg.h	Mon Oct 17 09:21:51 2016
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx7_srcreg.h,v 1.1 2016/05/17 06:44:45 ryo Exp $	*/
+/*	$NetBSD: imx7_srcreg.h,v 1.2 2016/10/17 09:21:51 ryo Exp $	*/
 
 /*
  * Copyright (c) 2015 Internet Initiative Japan, Inc.
@@ -45,6 +45,7 @@
 #define  SRC_M4RCR_ENABLE_M4			__BIT(3)
 #define  SRC_M4RCR_SW_M4P_RST			__BIT(2)
 #define  SRC_M4RCR_SW_M4C_RST			__BIT(1)
+#define  SRC_M4RCR_SW_M4C_NON_SCLR_RST		__BIT(0)
 #define SRC_ERCR0x0014
 #define SRC_HSICPHY_RCR0x001c
 #define  SRC_HSICPHY_PORT_RST			__BIT(1)

Added files:

Index: src/sys/arch/arm/imx/imx7_rdcreg.h
diff -u /dev/null src/sys/arch/arm/imx/imx7_rdcreg.h:1.1
--- /dev/null	Mon Oct 17 09:21:51 2016
+++ src/sys/arch/arm/imx/imx7_rdcreg.h	Mon Oct 17 09:21:51 2016
@@ -0,0 +1,643 @@
+/*	$NetBSD: imx7_rdcreg.h,v 1.1 2016/10/17 09:21:51 ryo Exp $	*/
+
+/*
+ * Copyright (c) 2016 Ryo Shimizu 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * 

CVS commit: src/sys/arch/arm/imx

2016-06-15 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Wed Jun 15 07:26:12 UTC 2016

Modified Files:
src/sys/arch/arm/imx: if_enet.c

Log Message:
fix the tx stall problem. ("watchdog timeout")
TX descriptor should be written out once before writing READY flag.


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/imx/if_enet.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/if_enet.c
diff -u src/sys/arch/arm/imx/if_enet.c:1.7 src/sys/arch/arm/imx/if_enet.c:1.8
--- src/sys/arch/arm/imx/if_enet.c:1.7	Fri Jun 10 13:27:11 2016
+++ src/sys/arch/arm/imx/if_enet.c	Wed Jun 15 07:26:11 2016
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_enet.c,v 1.7 2016/06/10 13:27:11 ozaki-r Exp $	*/
+/*	$NetBSD: if_enet.c,v 1.8 2016/06/15 07:26:11 ryo Exp $	*/
 
 /*
  * Copyright (c) 2014 Ryo Shimizu 
@@ -31,7 +31,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: if_enet.c,v 1.7 2016/06/10 13:27:11 ozaki-r Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_enet.c,v 1.8 2016/06/15 07:26:11 ryo Exp $");
 
 #include "vlan.h"
 
@@ -1744,9 +1744,10 @@ enet_encap_txring(struct enet_softc *sc,
 		sc->sc_txdesc_ring[idx].tx_databuf = map->dm_segs[i].ds_addr;
 		sc->sc_txdesc_ring[idx].tx_flags2 = flags2;
 		sc->sc_txdesc_ring[idx].tx_flags3 = 0;
+		TXDESC_WRITEOUT(idx);
+
 		sc->sc_txdesc_ring[idx].tx_flags1_len =
 		flags1 | TXFLAGS1_LEN(map->dm_segs[i].ds_len);
-
 		TXDESC_WRITEOUT(idx);
 
 		idx = ENET_TX_NEXTIDX(idx);



CVS commit: src/sys/arch/arm/imx

2016-02-25 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Thu Feb 25 13:27:33 UTC 2016

Modified Files:
src/sys/arch/arm/imx: imx6_ahcisata.c

Log Message:
fix always false comparison.

pointed out by joerg@


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx6_ahcisata.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_ahcisata.c
diff -u src/sys/arch/arm/imx/imx6_ahcisata.c:1.2 src/sys/arch/arm/imx/imx6_ahcisata.c:1.3
--- src/sys/arch/arm/imx/imx6_ahcisata.c:1.2	Mon Oct  6 10:27:13 2014
+++ src/sys/arch/arm/imx/imx6_ahcisata.c	Thu Feb 25 13:27:33 2016
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_ahcisata.c,v 1.2 2014/10/06 10:27:13 ryo Exp $	*/
+/*	$NetBSD: imx6_ahcisata.c,v 1.3 2016/02/25 13:27:33 ryo Exp $	*/
 
 /*
  * Copyright (c) 2014 Ryo Shimizu 
@@ -27,7 +27,7 @@
  */
 
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imx6_ahcisata.c,v 1.2 2014/10/06 10:27:13 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imx6_ahcisata.c,v 1.3 2016/02/25 13:27:33 ryo Exp $");
 
 #include "locators.h"
 #include "opt_imx.h"
@@ -259,7 +259,7 @@ static int
 ixm6_ahcisata_init(struct imx_ahci_softc *sc)
 {
 	uint32_t v;
-	int timeout;
+	int timeout, pllstat;
 
 	/* AHCISATA clock enable */
 	v = imx6_ccm_read(CCM_CCGR5);
@@ -308,13 +308,13 @@ ixm6_ahcisata_init(struct imx_ahci_softc
 
 	for (timeout = 50; timeout > 0; --timeout) {
 		delay(100);
-		v = imx6_ahcisata_phy_read(sc, SATA_PHY_LANE0_OUT_STAT);
-		if (v < 0) {
+		pllstat = imx6_ahcisata_phy_read(sc, SATA_PHY_LANE0_OUT_STAT);
+		if (pllstat < 0) {
 			aprint_error_dev(sc->sc_dev,
 			"cannot read LANE0 status\n");
 			break;
 		}
-		if (v & SATA_PHY_LANE0_OUT_STAT_RX_PLL_STATE)
+		if (pllstat & SATA_PHY_LANE0_OUT_STAT_RX_PLL_STATE)
 			break;
 	}
 	if (timeout <= 0)



CVS commit: src/sys/arch/arm/imx

2015-09-10 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Thu Sep 10 06:32:48 UTC 2015

Modified Files:
src/sys/arch/arm/imx: imxusb.c

Log Message:
Trailing whitespace.


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/imx/imxusb.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imxusb.c
diff -u src/sys/arch/arm/imx/imxusb.c:1.9 src/sys/arch/arm/imx/imxusb.c:1.10
--- src/sys/arch/arm/imx/imxusb.c:1.9	Thu Sep 10 04:00:32 2015
+++ src/sys/arch/arm/imx/imxusb.c	Thu Sep 10 06:32:47 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: imxusb.c,v 1.9 2015/09/10 04:00:32 hkenken Exp $	*/
+/*	$NetBSD: imxusb.c,v 1.10 2015/09/10 06:32:47 skrll Exp $	*/
 /*
  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi and Hiroyuki Bessho for Genetec Corporation.
@@ -25,7 +25,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1.9 2015/09/10 04:00:32 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1.10 2015/09/10 06:32:47 skrll Exp $");
 
 #include "opt_imx.h"
 
@@ -56,7 +56,7 @@ __KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1
 
 static int	imxehci_match(device_t, cfdata_t, void *);
 static void	imxehci_attach(device_t, device_t, void *);
-		 
+
 uint8_t imxusb_ulpi_read(struct imxehci_softc *sc, int addr);
 void imxusb_ulpi_write(struct imxehci_softc *sc, int addr, uint8_t data);
 static void ulpi_reset(struct imxehci_softc *sc);
@@ -72,11 +72,11 @@ static int
 imxehci_match(device_t parent, cfdata_t cf, void *aux)
 {
 	struct imxusbc_attach_args *aa = aux;
-	
+
 	if (aa->aa_unit < 0 || 3 < aa->aa_unit) {
 		return 0;
 	}
-		
+
 	return 1;
 }
 
@@ -105,7 +105,7 @@ imxehci_attach(device_t parent, device_t
 	aprint_normal(": i.MX USB Controller\n");
 
 	/* per unit registers */
-	if (bus_space_subregion(iot, aa->aa_ioh, 
+	if (bus_space_subregion(iot, aa->aa_ioh,
 		aa->aa_unit * IMXUSB_EHCI_SIZE, IMXUSB_EHCI_SIZE,
 		>sc_ioh) ||
 	bus_space_subregion(iot, aa->aa_ioh,
@@ -121,11 +121,11 @@ imxehci_attach(device_t parent, device_t
 	hcirev = bus_space_read_2(iot, sc->sc_hsc.ioh, EHCI_HCIVERSION);
 
 	aprint_normal_dev(self,
-	"id=%d revision=%d HCI revision=0x%x\n", 
+	"id=%d revision=%d HCI revision=0x%x\n",
 	(int)__SHIFTOUT(id, IMXUSB_ID_ID),
 	(int)__SHIFTOUT(id, IMXUSB_ID_REVISION),
 	hcirev);
-			  
+
 	hwhost = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWHOST);
 	hwdevice = bus_space_read_4(iot, sc->sc_ioh, IMXUSB_HWDEVICE);
 
@@ -149,7 +149,7 @@ imxehci_attach(device_t parent, device_t
 
 	sc->sc_hsc.sc_bus.dmatag = aa->aa_dmat;
 
-	sc->sc_hsc.sc_offs = bus_space_read_1(iot, sc->sc_hsc.ioh, 
+	sc->sc_hsc.sc_offs = bus_space_read_1(iot, sc->sc_hsc.ioh,
 	EHCI_CAPLENGTH);
 
 	/* Platform dependent setup */
@@ -289,7 +289,7 @@ ulpi_wait(struct imxehci_softc *sc, int 
 }
 
 #define	TIMEOUT	10
-		 
+
 uint8_t
 imxusb_ulpi_read(struct imxehci_softc *sc, int addr)
 {



CVS commit: src/sys/arch/arm/imx

2015-09-04 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Fri Sep  4 07:34:32 UTC 2015

Modified Files:
src/sys/arch/arm/imx: imxusb.c imxusbreg.h

Log Message:
Correct a register name


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/imx/imxusb.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imxusbreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imxusb.c
diff -u src/sys/arch/arm/imx/imxusb.c:1.7 src/sys/arch/arm/imx/imxusb.c:1.8
--- src/sys/arch/arm/imx/imxusb.c:1.7	Thu Sep 25 05:05:28 2014
+++ src/sys/arch/arm/imx/imxusb.c	Fri Sep  4 07:34:32 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: imxusb.c,v 1.7 2014/09/25 05:05:28 ryo Exp $	*/
+/*	$NetBSD: imxusb.c,v 1.8 2015/09/04 07:34:32 skrll Exp $	*/
 /*
  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi and Hiroyuki Bessho for Genetec Corporation.
@@ -25,7 +25,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include 
-__KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1.7 2014/09/25 05:05:28 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imxusb.c,v 1.8 2015/09/04 07:34:32 skrll Exp $");
 
 #include "opt_imx.h"
 
@@ -425,7 +425,7 @@ imxehci_host_mode(struct imxehci_softc *
 	reg |= OTGSC_DPIE;
 	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGSC, reg);
 
-	reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE);
+	reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, IMXUSB_USBMODE);
 	reg |= USBMODE_CM_HOST;
-	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_OTGMODE, reg);
+	bus_space_write_4(sc->sc_iot, sc->sc_ioh, IMXUSB_USBMODE, reg);
 }

Index: src/sys/arch/arm/imx/imxusbreg.h
diff -u src/sys/arch/arm/imx/imxusbreg.h:1.2 src/sys/arch/arm/imx/imxusbreg.h:1.3
--- src/sys/arch/arm/imx/imxusbreg.h:1.2	Fri Jul 25 07:49:56 2014
+++ src/sys/arch/arm/imx/imxusbreg.h	Fri Sep  4 07:34:32 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: imxusbreg.h,v 1.2 2014/07/25 07:49:56 hkenken Exp $	*/
+/*	$NetBSD: imxusbreg.h,v 1.3 2015/09/04 07:34:32 skrll Exp $	*/
 /*
  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -80,7 +80,7 @@
 #define	 OTGSC_OT	__BIT( 3)
 #define	 OTGSC_VC	__BIT( 1)
 #define	 OTGSC_VD	__BIT( 0)
-#define	IMXUSB_OTGMODE	0x01A8
+#define	IMXUSB_USBMODE	0x01A8
 #define	 USBMODE_CM		__BITS(1,0)
 #define	 USBMODE_CM_IDLE	__SHIFTIN(0,USBMODE_CM)
 #define	 USBMODE_CM_DEVICE	__SHIFTIN(2,USBMODE_CM)



CVS commit: src/sys/arch/arm/imx

2015-09-04 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Fri Sep  4 07:35:56 UTC 2015

Modified Files:
src/sys/arch/arm/imx: imxusbreg.h

Log Message:
Add some more USBMODE defines


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imxusbreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imxusbreg.h
diff -u src/sys/arch/arm/imx/imxusbreg.h:1.3 src/sys/arch/arm/imx/imxusbreg.h:1.4
--- src/sys/arch/arm/imx/imxusbreg.h:1.3	Fri Sep  4 07:34:32 2015
+++ src/sys/arch/arm/imx/imxusbreg.h	Fri Sep  4 07:35:56 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: imxusbreg.h,v 1.3 2015/09/04 07:34:32 skrll Exp $	*/
+/*	$NetBSD: imxusbreg.h,v 1.4 2015/09/04 07:35:56 skrll Exp $	*/
 /*
  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -81,7 +81,11 @@
 #define	 OTGSC_VC	__BIT( 1)
 #define	 OTGSC_VD	__BIT( 0)
 #define	IMXUSB_USBMODE	0x01A8
-#define	 USBMODE_CM		__BITS(1,0)
+#define	 USBMODE_VBPS	__BIT(5)	/* Vbus power selectt */
+#define	 USBMODE_SDIS	__BIT(4)	/* Stream disable mode 1=act */
+#define	 USBMODE_SLOM	__BIT(3)	/* setup lockouts on */
+#define	 USBMODE_ES	__BIT(2)	/* Endian Select ES=1 */
+#define	 USBMODE_CM	__BITS(1,0)	/* Controller mode */
 #define	 USBMODE_CM_IDLE	__SHIFTIN(0,USBMODE_CM)
 #define	 USBMODE_CM_DEVICE	__SHIFTIN(2,USBMODE_CM)
 #define	 USBMODE_CM_HOST	__SHIFTIN(3,USBMODE_CM)



CVS commit: src/sys/arch/arm/imx

2015-07-29 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Thu Jul 30 04:39:42 UTC 2015

Modified Files:
src/sys/arch/arm/imx: imxuart.c

Log Message:
fix to compile unless defined IMXUARTCONSOLE


To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/imx/imxuart.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imxuart.c
diff -u src/sys/arch/arm/imx/imxuart.c:1.18 src/sys/arch/arm/imx/imxuart.c:1.19
--- src/sys/arch/arm/imx/imxuart.c:1.18	Wed Jul 29 08:51:03 2015
+++ src/sys/arch/arm/imx/imxuart.c	Thu Jul 30 04:39:42 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: imxuart.c,v 1.18 2015/07/29 08:51:03 ryo Exp $ */
+/* $NetBSD: imxuart.c,v 1.19 2015/07/30 04:39:42 ryo Exp $ */
 
 /*
  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
@@ -96,7 +96,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imxuart.c,v 1.18 2015/07/29 08:51:03 ryo Exp $);
+__KERNEL_RCSID(0, $NetBSD: imxuart.c,v 1.19 2015/07/30 04:39:42 ryo Exp $);
 
 #include opt_imxuart.h
 #include opt_ddb.h
@@ -2278,9 +2278,10 @@ imxuart_common_putc(dev_t dev, struct im
 
 	splx(s);
 }
+#endif /* defined(IMXUARTCONSOLE) || defined(KGDB) */
 
 /*
- * Initialize UART for use as console or KGDB line.
+ * Initialize UART
  */
 int
 imxuart_init(struct imxuart_regs *regsp, int rate, tcflag_t cflag, int domap)
@@ -2336,9 +2337,6 @@ imxuart_init(struct imxuart_regs *regsp,
 }
 
 
-#endif
-
-
 #ifdef	IMXUARTCONSOLE
 /*
  * Following are all routines needed for UART to act as console



CVS commit: src/sys/arch/arm/imx

2015-07-29 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Wed Jul 29 08:51:03 UTC 2015

Modified Files:
src/sys/arch/arm/imx: imxuart.c

Log Message:
initialize uart register when it is not a console.


To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/arm/imx/imxuart.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imxuart.c
diff -u src/sys/arch/arm/imx/imxuart.c:1.17 src/sys/arch/arm/imx/imxuart.c:1.18
--- src/sys/arch/arm/imx/imxuart.c:1.17	Mon Apr 13 21:18:41 2015
+++ src/sys/arch/arm/imx/imxuart.c	Wed Jul 29 08:51:03 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: imxuart.c,v 1.17 2015/04/13 21:18:41 riastradh Exp $ */
+/* $NetBSD: imxuart.c,v 1.18 2015/07/29 08:51:03 ryo Exp $ */
 
 /*
  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
@@ -96,7 +96,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imxuart.c,v 1.17 2015/04/13 21:18:41 riastradh Exp $);
+__KERNEL_RCSID(0, $NetBSD: imxuart.c,v 1.18 2015/07/29 08:51:03 ryo Exp $);
 
 #include opt_imxuart.h
 #include opt_ddb.h
@@ -293,7 +293,7 @@ int	imxuart_common_getc(dev_t, struct im
 void	imxuart_common_putc(dev_t, struct imxuart_regs *, int);
 
 
-int	imxuart_init(struct imxuart_regs *, int, tcflag_t);
+int	imxuart_init(struct imxuart_regs *, int, tcflag_t, int);
 
 int	imxucngetc(dev_t);
 void	imxucnputc(dev_t, int);
@@ -424,6 +424,9 @@ imxuart_attach_common(device_t parent, d
 	callout_init(sc-sc_diag_callout, 0);
 	mutex_init(sc-sc_lock, MUTEX_DEFAULT, IPL_HIGH);
 
+	if (regsp-ur_iobase != imxuconsregs.ur_iobase)
+		imxuart_init(sc-sc_regs, TTYDEF_SPEED, TTYDEF_CFLAG, false);
+
 	bus_space_read_region_4(iot, ioh, IMX_UCR1, sc-sc_ucr, 4);
 	sc-sc_ucr2_d = sc-sc_ucr2;
 
@@ -2280,15 +2283,16 @@ imxuart_common_putc(dev_t dev, struct im
  * Initialize UART for use as console or KGDB line.
  */
 int
-imxuart_init(struct imxuart_regs *regsp, int rate, tcflag_t cflag)
+imxuart_init(struct imxuart_regs *regsp, int rate, tcflag_t cflag, int domap)
 {
 	struct imxuart_baudrate_ratio ratio;
 	int rfdiv = IMX_UFCR_DIVIDER_TO_RFDIV(imxuart_freqdiv);
 	uint32_t ufcr;
+	int error;
 
-	if (bus_space_map(regsp-ur_iot, regsp-ur_iobase, IMX_UART_SIZE, 0,
-		regsp-ur_ioh))
-		return ENOMEM; /* ??? */
+	if (domap  (error = bus_space_map(regsp-ur_iot, regsp-ur_iobase,
+	 IMX_UART_SIZE, 0, regsp-ur_ioh)) != 0)
+		return error;
 
 	if (imxuspeed(rate, ratio)  0)
 		return EINVAL;
@@ -2355,7 +2359,7 @@ imxuart_cons_attach(bus_space_tag_t iot,
 	regs.ur_iot = iot;
 	regs.ur_iobase = iobase;
 
-	res = imxuart_init(regs, rate, cflag);
+	res = imxuart_init(regs, rate, cflag, true);
 	if (res)
 		return (res);
 
@@ -2416,7 +2420,7 @@ imxuart_kgdb_attach(bus_space_tag_t iot,
 		imxu_kgdb_regs.ur_iot = iot;
 		imxu_kgdb_regs.ur_iobase = iobase;
 
-		res = imxuart_init(imxu_kgdb_regs, rate, cflag);
+		res = imxuart_init(imxu_kgdb_regs, rate, cflag, true);
 		if (res)
 			return (res);
 



CVS commit: src/sys/arch/arm/imx

2015-06-01 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Mon Jun  1 09:49:37 UTC 2015

Modified Files:
src/sys/arch/arm/imx: imx6_intr.h

Log Message:
add #define __HAVE_PIC_PENDING_INTRS because imxgpio use pic_mark_pending()


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx6_intr.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_intr.h
diff -u src/sys/arch/arm/imx/imx6_intr.h:1.2 src/sys/arch/arm/imx/imx6_intr.h:1.3
--- src/sys/arch/arm/imx/imx6_intr.h:1.2	Thu Sep 25 05:05:28 2014
+++ src/sys/arch/arm/imx/imx6_intr.h	Mon Jun  1 09:49:36 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_intr.h,v 1.2 2014/09/25 05:05:28 ryo Exp $	*/
+/*	$NetBSD: imx6_intr.h,v 1.3 2015/06/01 09:49:36 ryo Exp $	*/
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -33,6 +33,7 @@
 
 #define	PIC_MAXSOURCES			256
 #define	PIC_MAXMAXSOURCES		(256 + 6 * 32)
+#define	__HAVE_PIC_PENDING_INTRS	/* for imxgpio */
 
 /*
  * The BCM53xx uses a generic interrupt controller so pull that stuff.



CVS commit: src/sys/arch/arm/imx

2015-06-01 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Mon Jun  1 10:10:56 UTC 2015

Modified Files:
src/sys/arch/arm/imx: imx6_board.c

Log Message:
Limit the maximum size of memory to 3840Mbyte for 4G memory board (NITROGEN6MAX)
constrained by memory layout of i.MX6 SoC.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx6_board.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_board.c
diff -u src/sys/arch/arm/imx/imx6_board.c:1.3 src/sys/arch/arm/imx/imx6_board.c:1.4
--- src/sys/arch/arm/imx/imx6_board.c:1.3	Fri Jan  9 09:50:46 2015
+++ src/sys/arch/arm/imx/imx6_board.c	Mon Jun  1 10:10:56 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_board.c,v 1.3 2015/01/09 09:50:46 ryo Exp $	*/
+/*	$NetBSD: imx6_board.c,v 1.4 2015/06/01 10:10:56 ryo Exp $	*/
 
 /*
  * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
@@ -27,7 +27,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(1, $NetBSD: imx6_board.c,v 1.3 2015/01/09 09:50:46 ryo Exp $);
+__KERNEL_RCSID(1, $NetBSD: imx6_board.c,v 1.4 2015/06/01 10:10:56 ryo Exp $);
 
 #include opt_imx.h
 #include arml2cc.h
@@ -144,6 +144,16 @@ imx6_memprobe(void)
 	bitwidth += __SHIFTOUT(ctrl, MMDC1_MDCTL_SDE_1);
 	bitwidth += (misc  MMDC1_MDMISC_DDR_4_BANK) ? 2 : 3;
 
+	/* over 4GB ? limit 3840MB (SoC design limitation) */
+	if (bitwidth = 32) {
+		/*
+		 * XXX: bus_dma and uvm cannot treat 0x as high address
+		 *  correctly because of 0x + 1 = 0x.
+		 *  therefore use 0xefff.
+		 */
+		return (psize_t)IMX6_MEM_SIZE - PAGE_SIZE;
+	}
+
 	return (psize_t)1  bitwidth;
 }
 



CVS commit: src/sys/arch/arm/imx

2015-05-25 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Tue May 26 05:11:33 UTC 2015

Modified Files:
src/sys/arch/arm/imx: imx51_esdhc.c

Log Message:
Add SDHC_FLAG_USE_DMA flag for internal DMA mode.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx51_esdhc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx51_esdhc.c
diff -u src/sys/arch/arm/imx/imx51_esdhc.c:1.2 src/sys/arch/arm/imx/imx51_esdhc.c:1.3
--- src/sys/arch/arm/imx/imx51_esdhc.c:1.2	Sat Mar 22 09:46:33 2014
+++ src/sys/arch/arm/imx/imx51_esdhc.c	Tue May 26 05:11:33 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_esdhc.c,v 1.2 2014/03/22 09:46:33 hkenken Exp $ */
+/*	$NetBSD: imx51_esdhc.c,v 1.3 2015/05/26 05:11:33 hkenken Exp $ */
 
 /*-
  * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
@@ -30,7 +30,7 @@
 
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imx51_esdhc.c,v 1.2 2014/03/22 09:46:33 hkenken Exp $);
+__KERNEL_RCSID(0, $NetBSD: imx51_esdhc.c,v 1.3 2015/05/26 05:11:33 hkenken Exp $);
 
 #include opt_imx.h
 
@@ -117,6 +117,7 @@ sdhc_attach(device_t parent, device_t se
 		break;;
 	}
 	sc-sc_sdhc.sc_clkbase = perclk / 1000;
+	sc-sc_sdhc.sc_flags |= SDHC_FLAG_USE_DMA;
 	sc-sc_sdhc.sc_flags |= SDHC_FLAG_HAVE_DVS |
 		SDHC_FLAG_NO_PWR0 |
 		SDHC_FLAG_32BIT_ACCESS |



CVS commit: src/sys/arch/arm/imx

2015-05-06 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Thu May  7 04:37:29 UTC 2015

Modified Files:
src/sys/arch/arm/imx: imx51reg.h

Log Message:
fixed register size


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/imx/imx51reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx51reg.h
diff -u src/sys/arch/arm/imx/imx51reg.h:1.6 src/sys/arch/arm/imx/imx51reg.h:1.7
--- src/sys/arch/arm/imx/imx51reg.h:1.6	Fri Mar 27 05:31:23 2015
+++ src/sys/arch/arm/imx/imx51reg.h	Thu May  7 04:37:29 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: imx51reg.h,v 1.6 2015/03/27 05:31:23 hkenken Exp $ */
+/* $NetBSD: imx51reg.h,v 1.7 2015/05/07 04:37:29 hkenken Exp $ */
 /*-
  * Copyright (c) 2007 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -126,7 +126,7 @@
 #define	ESDHC2_BASE	(AIPSTZ1_BASE + 0x8000)
 #define	ESDHC3_BASE	(AIPSTZ1_BASE + 0x0002)
 #define	ESDHC4_BASE	(AIPSTZ1_BASE + 0x00024000)
-#define	ESDHC_SIZE	0x100
+#define	ESDHC_SIZE	0x4000
 
 #define PWM1_BASE	(AIPSTZ1_BASE + 0x03fb4000)
 #define PWM2_BASE	(AIPSTZ1_BASE + 0x03fb8000)
@@ -239,7 +239,7 @@
 #define	 USB_CLKONOFF_CTRL_H1_AHBCLK_OFF	__BIT(18)
 #define	 USB_CLKONOFF_CTRL_OTG_AHBCLK_OFF	__BIT(17)
 
-#define	USBOH3_SIZE	0x828
+#define	USBOH3_SIZE	0x4000
 
 /* GPIO module */
 
@@ -266,7 +266,7 @@
 
 #define	WDOG1_BASE	(AIPSTZ1_BASE + 0x03f98000)
 #define	WDOG2_BASE	(AIPSTZ1_BASE + 0x03f9c000)
-#define	WDOG_SIZE	0x000a
+#define	WDOG_SIZE	0x4000
 
 #define	GPT_BASE	(AIPSTZ1_BASE + 0x03fa)
 #define	GPT_SIZE	0x4000
@@ -342,7 +342,7 @@
 #define	SRC_SIZE	0x4000
 
 #define	CCM_BASE	(AIPSTZ1_BASE + 0x03fd4000)
-#define	CCM_SIZE	0x0088
+#define	CCM_SIZE	0x4000
 
 #define	GPC_BASE	(AIPSTZ1_BASE + 0x03fd8000)
 #define	GPC_SIZE	0x4000
@@ -419,6 +419,6 @@
 #define	SAHARA_SIZE	0x4000
 
 #define	DPLL_BASE(n)	((AIPSTZ2_BASE + 0x03F8 + (0x4000 * ((n)-1
-#define	DPLL_SIZE	0x100
+#define	DPLL_SIZE	0x4000
 
 #endif /* _ARM_IMX_IMX51REG_H_ */



CVS commit: src/sys/arch/arm/imx

2015-04-27 Thread Christos Zoulas
Module Name:src
Committed By:   christos
Date:   Mon Apr 27 17:34:51 UTC 2015

Modified Files:
src/sys/arch/arm/imx: if_enet.c

Log Message:
Fix memory leak (Brainy)


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/if_enet.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/if_enet.c
diff -u src/sys/arch/arm/imx/if_enet.c:1.3 src/sys/arch/arm/imx/if_enet.c:1.4
--- src/sys/arch/arm/imx/if_enet.c:1.3	Mon Apr 13 17:18:41 2015
+++ src/sys/arch/arm/imx/if_enet.c	Mon Apr 27 13:34:51 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_enet.c,v 1.3 2015/04/13 21:18:41 riastradh Exp $	*/
+/*	$NetBSD: if_enet.c,v 1.4 2015/04/27 17:34:51 christos Exp $	*/
 
 /*
  * Copyright (c) 2014 Ryo Shimizu r...@nerv.org
@@ -31,7 +31,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: if_enet.c,v 1.3 2015/04/13 21:18:41 riastradh Exp $);
+__KERNEL_RCSID(0, $NetBSD: if_enet.c,v 1.4 2015/04/27 17:34:51 christos Exp $);
 
 #include imxocotp.h
 #include imxccm.h
@@ -1413,8 +1413,10 @@ enet_alloc_rxbuf(struct enet_softc *sc, 
 	error = bus_dmamap_load(sc-sc_dmat, sc-sc_rxsoft[idx].rxs_dmamap,
 	m-m_ext.ext_buf, m-m_ext.ext_size, NULL,
 	BUS_DMA_READ | BUS_DMA_NOWAIT);
-	if (error)
+	if (error) {
+		m_freem(m);
 		return error;
+	}
 
 	bus_dmamap_sync(sc-sc_dmat, sc-sc_rxsoft[idx].rxs_dmamap, 0,
 	sc-sc_rxsoft[idx].rxs_dmamap-dm_mapsize, 



CVS commit: src/sys/arch/arm/imx

2015-03-26 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Fri Mar 27 05:31:23 UTC 2015

Modified Files:
src/sys/arch/arm/imx: files.imx51 files.imx6 imx51_i2c.c imx51reg.h
imx6_i2c.c imx6_reg.h imxi2c.c imxi2cvar.h
Removed Files:
src/sys/arch/arm/imx: imxi2creg.h

Log Message:
Rewritten to take advantage of motoi2c code.


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/imx/files.imx51
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/imx/files.imx6
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx51_i2c.c \
src/sys/arch/arm/imx/imx6_i2c.c src/sys/arch/arm/imx/imxi2c.c \
src/sys/arch/arm/imx/imxi2cvar.h
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/imx/imx51reg.h
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx6_reg.h
cvs rdiff -u -r1.2 -r0 src/sys/arch/arm/imx/imxi2creg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx51
diff -u src/sys/arch/arm/imx/files.imx51:1.11 src/sys/arch/arm/imx/files.imx51:1.12
--- src/sys/arch/arm/imx/files.imx51:1.11	Fri Jul 25 07:49:56 2014
+++ src/sys/arch/arm/imx/files.imx51	Fri Mar 27 05:31:23 2015
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx51,v 1.11 2014/07/25 07:49:56 hkenken Exp $
+#	$NetBSD: files.imx51,v 1.12 2015/03/27 05:31:23 hkenken Exp $
 #
 # Configuration info for the Freescale i.MX5x
 #
@@ -103,7 +103,7 @@ attach	sdhc at axi with sdhc_axi
 file	arch/arm/imx/imx51_esdhc.c		sdhc_axi
 
 # iic Controler
-device	imxi2c: i2cbus
+device	imxi2c: motoi2c, i2cbus, i2cexec
 attach	imxi2c at axi
 file	arch/arm/imx/imxi2c.c		imxi2c
 file	arch/arm/imx/imx51_i2c.c	imxi2c

Index: src/sys/arch/arm/imx/files.imx6
diff -u src/sys/arch/arm/imx/files.imx6:1.4 src/sys/arch/arm/imx/files.imx6:1.5
--- src/sys/arch/arm/imx/files.imx6:1.4	Tue Oct  7 09:36:09 2014
+++ src/sys/arch/arm/imx/files.imx6	Fri Mar 27 05:31:23 2015
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx6,v 1.4 2014/10/07 09:36:09 ryo Exp $
+#	$NetBSD: files.imx6,v 1.5 2015/03/27 05:31:23 hkenken Exp $
 #
 # Configuration info for the Freescale i.MX6
 #
@@ -62,7 +62,7 @@ attach	imxiomux at axi
 file	arch/arm/imx/imx6_iomux.c		imxiomux
 
 # iMX iic Controler
-device	imxi2c: i2cbus
+device	imxi2c: motoi2c, i2cbus, i2cexec
 attach	imxi2c at axi
 file	arch/arm/imx/imxi2c.c			imxi2c
 file	arch/arm/imx/imx6_i2c.c			imxi2c

Index: src/sys/arch/arm/imx/imx51_i2c.c
diff -u src/sys/arch/arm/imx/imx51_i2c.c:1.1 src/sys/arch/arm/imx/imx51_i2c.c:1.2
--- src/sys/arch/arm/imx/imx51_i2c.c:1.1	Fri Jul 25 07:07:47 2014
+++ src/sys/arch/arm/imx/imx51_i2c.c	Fri Mar 27 05:31:23 2015
@@ -1,7 +1,7 @@
-/*	$NetBSD: imx51_i2c.c,v 1.1 2014/07/25 07:07:47 hkenken Exp $	*/
+/*	$NetBSD: imx51_i2c.c,v 1.2 2015/03/27 05:31:23 hkenken Exp $	*/
 
 /*
- * Copyright (c) 2012 Genetec Corporation.  All rights reserved.
+ * Copyright (c) 2012, 2015 Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -27,24 +27,32 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imx51_i2c.c,v 1.1 2014/07/25 07:07:47 hkenken Exp $);
+__KERNEL_RCSID(0, $NetBSD: imx51_i2c.c,v 1.2 2015/03/27 05:31:23 hkenken Exp $);
+
+#include opt_imx.h
 
 #include sys/param.h
 #include sys/bus.h
 #include sys/device.h
 
-#include opt_imx.h
-
-#include arm/imx/imxi2cvar.h
 #include arm/imx/imx51reg.h
 #include arm/imx/imx51var.h
 #include arm/imx/imx51_ccmvar.h
+#include arm/imx/imxi2cvar.h
 
 int
 imxi2c_match(device_t parent, cfdata_t cf, void *aux)
 {
-	if (strcmp(cf-cf_name, imxi2c) == 0)
+	struct axi_attach_args *aa = aux;
+
+	switch (aa-aa_addr) {
+	case I2C1_BASE:
+	case I2C2_BASE:
+#ifdef IMX50
+	case I2C3_BASE:
+#endif
 		return 1;
+	}
 
 	return 0;
 }
@@ -53,15 +61,11 @@ void
 imxi2c_attach(device_t parent, device_t self, void *aux)
 {
 	struct axi_attach_args * aa = aux;
-	struct imxi2c_softc *sc = device_private(self);
-	struct i2cbus_attach_args iba;
 
-	imxi2c_attach_common(parent, self,
-	aa-aa_iot, aa-aa_addr, aa-aa_size, aa-aa_irq, 0);
+	if (aa-aa_size = 0)
+		aa-aa_size = I2C_SIZE;
 
 	imxi2c_set_freq(self, imx51_get_clock(IMX51CLK_PERCLK_ROOT), 40);
-
-	memset(iba, 0, sizeof(iba));
-	iba.iba_tag = sc-sc_i2c;
-	config_found_ia(sc-sc_dev, i2cbus, iba, iicbus_print);
+	imxi2c_attach_common(parent, self,
+	aa-aa_iot, aa-aa_addr, aa-aa_size, aa-aa_irq, 0);
 }
Index: src/sys/arch/arm/imx/imx6_i2c.c
diff -u src/sys/arch/arm/imx/imx6_i2c.c:1.1 src/sys/arch/arm/imx/imx6_i2c.c:1.2
--- src/sys/arch/arm/imx/imx6_i2c.c:1.1	Tue Oct  7 09:36:09 2014
+++ src/sys/arch/arm/imx/imx6_i2c.c	Fri Mar 27 05:31:23 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_i2c.c,v 1.1 2014/10/07 09:36:09 ryo Exp $	*/
+/*	$NetBSD: imx6_i2c.c,v 1.2 2015/03/27 05:31:23 hkenken Exp $	*/
 
 /*
  * Copyright (c) 2014 Ryo Shimizu r...@nerv.org
@@ -31,7 +31,9 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: 

CVS commit: src/sys/arch/arm/imx

2015-03-14 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Sun Mar 15 04:12:07 UTC 2015

Modified Files:
src/sys/arch/arm/imx: if_enet.c

Log Message:
- fix interrupt type ans interrupt masks
- change timing of callout_schedule because it doesn't schedule once enet_stop 
is called
- typo


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/if_enet.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/if_enet.c
diff -u src/sys/arch/arm/imx/if_enet.c:1.1 src/sys/arch/arm/imx/if_enet.c:1.2
--- src/sys/arch/arm/imx/if_enet.c:1.1	Thu Sep 25 05:05:28 2014
+++ src/sys/arch/arm/imx/if_enet.c	Sun Mar 15 04:12:07 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: if_enet.c,v 1.1 2014/09/25 05:05:28 ryo Exp $	*/
+/*	$NetBSD: if_enet.c,v 1.2 2015/03/15 04:12:07 ryo Exp $	*/
 
 /*
  * Copyright (c) 2014 Ryo Shimizu r...@nerv.org
@@ -31,7 +31,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: if_enet.c,v 1.1 2014/09/25 05:05:28 ryo Exp $);
+__KERNEL_RCSID(0, $NetBSD: if_enet.c,v 1.2 2015/03/15 04:12:07 ryo Exp $);
 
 #include imxocotp.h
 #include imxccm.h
@@ -346,11 +346,15 @@ enet_attach(device_t parent __unused, de
 
 	/* setup interrupt handlers */
 	if ((sc-sc_ih = intr_establish(aa-aa_irq, IPL_NET,
-	IST_EDGE, enet_intr, sc)) == NULL) {
+	IST_LEVEL, enet_intr, sc)) == NULL) {
 		aprint_error_dev(self, unable to establish interrupt\n);
 		goto failure;
 	}
 
+	/* callout will be scheduled from enet_init() */
+	callout_init(sc-sc_tick_ch, 0);
+	callout_setfunc(sc-sc_tick_ch, enet_tick, sc);
+
 	/* setup ifp */
 	ifp = sc-sc_ethercom.ec_if;
 	strlcpy(ifp-if_xname, device_xname(sc-sc_dev), IFNAMSIZ);
@@ -410,9 +414,6 @@ enet_attach(device_t parent __unused, de
 #endif
 
 	sc-sc_stopping = false;
-	callout_init(sc-sc_tick_ch, 0);
-	callout_setfunc(sc-sc_tick_ch, enet_tick, sc);
-	callout_schedule(sc-sc_tick_ch, hz);
 
 	return;
 
@@ -721,7 +722,7 @@ enet_rx_intr(void *arg)
 	char flags1buf[128], flags2buf[128];
 	snprintb(flags1buf, sizeof(flags1buf),
 	\20 \31MISS \26LENGTHVIOLATION
-	\25NONOCTET \23CRC \22OVERRUNa
+	\25NONOCTET \23CRC \22OVERRUN
 	\21TRUNCATED, flags1);
 	snprintb(flags2buf, sizeof(flags2buf),
 	\20 \40MAC \33PHY
@@ -987,6 +988,7 @@ enet_init(struct ifnet *ifp)
 	ENET_REG_WRITE(sc, ENET_RDAR, ENET_RDAR_ACTIVE);
 
 	sc-sc_stopping = false;
+	callout_schedule(sc-sc_tick_ch, hz);
 
  init_failure:
 	splx(s);
@@ -2004,7 +2006,6 @@ enet_init_regs(struct enet_softc *sc, in
 	ENET_REG_WRITE(sc, ENET_EIMR, 
 	ENET_EIR_TXF |
 	ENET_EIR_RXF |
-	ENET_EIR_MII |
 	ENET_EIR_EBERR |
 	0);
 
@@ -2028,7 +2029,7 @@ enet_alloc_dma(struct enet_softc *sc, si
 	int nsegs, error;
 
 	if ((error = bus_dmamem_alloc(sc-sc_dmat, size, PAGE_SIZE, 0, seglist,
-	1, nsegs, M_WAITOK)) != 0) {
+	1, nsegs, M_NOWAIT)) != 0) {
 		device_printf(sc-sc_dev,
 		unable to allocate DMA buffer, error=%d\n, error);
 		goto fail_alloc;



CVS commit: src/sys/arch/arm/imx

2015-01-10 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Jan 10 12:13:00 UTC 2015

Modified Files:
src/sys/arch/arm/imx: imx23_apbdma.c imx23_apbdmareg.h
imx23_apbdmavar.h

Log Message:
From Petri Laakso petri.laa...@asd.fi:
-   Fix typo: AHBH should be APBH
-   Add support for APBX DMA
-   New function apbdma_wait(); wait for DMA completion


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx23_apbdma.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx23_apbdmareg.h
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx23_apbdmavar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx23_apbdma.c
diff -u src/sys/arch/arm/imx/imx23_apbdma.c:1.3 src/sys/arch/arm/imx/imx23_apbdma.c:1.4
--- src/sys/arch/arm/imx/imx23_apbdma.c:1.3	Sun Mar  3 10:33:56 2013
+++ src/sys/arch/arm/imx/imx23_apbdma.c	Sat Jan 10 12:13:00 2015
@@ -1,4 +1,4 @@
-/* $Id: imx23_apbdma.c,v 1.3 2013/03/03 10:33:56 jkunz Exp $ */
+/* $Id: imx23_apbdma.c,v 1.4 2015/01/10 12:13:00 jmcneill Exp $ */
 
 /*
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -92,10 +92,10 @@ apbdma_attach(device_t parent, device_t 
 	static u_int apbdma_attached = 0;
 
 	if ((strncmp(device_xname(parent), apbh, 4) == 0) 
-	(apbdma_attached  F_AHBH_DMA))
+	(apbdma_attached  F_APBH_DMA))
 		return;
 	if ((strncmp(device_xname(parent), apbx, 4) == 0) 
-	(apbdma_attached  F_AHBX_DMA))
+	(apbdma_attached  F_APBX_DMA))
 		return;
 
 	sc-sc_dev = self;
@@ -109,25 +109,30 @@ apbdma_attach(device_t parent, device_t 
 	}
 
 	if (strncmp(device_xname(parent), apbh, 4) == 0)
-		sc-flags = F_AHBH_DMA;
+		sc-flags = F_APBH_DMA;
 
 	if (strncmp(device_xname(parent), apbx, 4) == 0)
-		sc-flags = F_AHBX_DMA;
+		sc-flags = F_APBX_DMA;
 
 	apbdma_reset(sc);
 	apbdma_init(sc);
 
-	if (sc-flags  F_AHBH_DMA)
-		apbdma_attached |= F_AHBH_DMA;
-	if (sc-flags  F_AHBX_DMA)
-		apbdma_attached |= F_AHBX_DMA;
+	if (sc-flags  F_APBH_DMA)
+		apbdma_attached |= F_APBH_DMA;
+	if (sc-flags  F_APBX_DMA)
+		apbdma_attached |= F_APBX_DMA;
 
 	sc_parent-dmac = self;
 
 	/* Initialize mutex to control concurrent access from the drivers. */
 	mutex_init(sc-sc_lock, MUTEX_DEFAULT, IPL_HIGH);
 
-	aprint_normal(\n);
+	if (sc-flags  F_APBH_DMA)
+		aprint_normal(: APBH DMA\n);
+	else if (sc-flags  F_APBX_DMA)
+		aprint_normal(: APBX DMA\n);
+	else
+		panic(dma flag missing!\n);
 
 	return;
 }
@@ -192,7 +197,7 @@ static void
 apbdma_init(struct apbdma_softc *sc)
 {
 
-	if (sc-flags  F_AHBH_DMA) {
+	if (sc-flags  F_APBH_DMA) {
 		DMA_WR(sc, HW_APBH_CTRL0_SET, HW_APBH_CTRL0_AHB_BURST8_EN);
 		DMA_WR(sc, HW_APBH_CTRL0_SET, HW_APBH_CTRL0_APB_BURST4_EN);
 	}
@@ -279,7 +284,7 @@ apbdma_chan_set_chain(struct apbdma_soft
 {
 	uint32_t reg;
 
-	if (sc-flags  F_AHBH_DMA)
+	if (sc-flags  F_APBH_DMA)
 		reg = HW_APB_CHN_NXTCMDAR(HW_APBH_CH0_NXTCMDAR, channel);
 	else
 		reg = HW_APB_CHN_NXTCMDAR(HW_APBX_CH0_NXTCMDAR, channel);
@@ -301,7 +306,7 @@ apbdma_run(struct apbdma_softc *sc, unsi
 	uint32_t reg;
 	uint8_t val;
 
-	if (sc-flags  F_AHBH_DMA) {
+	if (sc-flags  F_APBH_DMA) {
 		reg = HW_APB_CHN_SEMA(HW_APBH_CH0_SEMA, channel);
 		val = __SHIFTIN(1, HW_APBH_CH0_SEMA_INCREMENT_SEMA);
 	 } else {
@@ -324,7 +329,11 @@ apbdma_ack_intr(struct apbdma_softc *sc,
 {
 
 	mutex_enter(sc-sc_lock);
-	DMA_WR(sc, HW_APB_CTRL1_CLR, (1channel));
+	if (sc-flags  F_APBH_DMA) {
+		DMA_WR(sc, HW_APB_CTRL1_CLR, (1channel));
+	} else {
+		DMA_WR(sc, HW_APB_CTRL1_CLR, (1channel));
+	}
 	mutex_exit(sc-sc_lock);
 
 	return;
@@ -383,11 +392,34 @@ apbdma_chan_reset(struct apbdma_softc *s
 	
 	mutex_enter(sc-sc_lock);
 
-	DMA_WR(sc, HW_APB_CTRL0_SET,
-	__SHIFTIN((1channel), HW_APBH_CTRL0_RESET_CHANNEL));
-	while(DMA_RD(sc, HW_APB_CTRL0)  HW_APBH_CTRL0_RESET_CHANNEL);
+	if (sc-flags  F_APBH_DMA) {
+		DMA_WR(sc, HW_APB_CTRL0_SET,
+		__SHIFTIN((1channel), HW_APBH_CTRL0_RESET_CHANNEL));
+		while(DMA_RD(sc, HW_APB_CTRL0)  HW_APBH_CTRL0_RESET_CHANNEL);
+	} else {
+		DMA_WR(sc, HW_APBX_CHANNEL_CTRL_SET,
+			__SHIFTIN((1channel), HW_APBH_CTRL0_RESET_CHANNEL));
+		while(DMA_RD(sc, HW_APBX_CHANNEL_CTRL)  (1channel));
+	}
 
 	mutex_exit(sc-sc_lock);
 
 	return;
 }
+
+void
+apbdma_wait(struct apbdma_softc *sc, unsigned int channel)
+{
+
+	mutex_enter(sc-sc_lock);
+	
+	if (sc-flags  F_APBH_DMA) {
+		while (DMA_RD(sc, HW_APB_CHN_SEMA(HW_APBH_CH0_SEMA, channel))  HW_APBH_CH0_SEMA_PHORE)
+			;
+	 } else {
+		while (DMA_RD(sc, HW_APB_CHN_SEMA(HW_APBX_CH0_SEMA, channel))  HW_APBX_CH0_SEMA_PHORE)
+			;
+	}
+
+	mutex_exit(sc-sc_lock);
+}

Index: src/sys/arch/arm/imx/imx23_apbdmareg.h
diff -u src/sys/arch/arm/imx/imx23_apbdmareg.h:1.2 src/sys/arch/arm/imx/imx23_apbdmareg.h:1.3
--- src/sys/arch/arm/imx/imx23_apbdmareg.h:1.2	Sun Mar  3 10:33:56 2013
+++ src/sys/arch/arm/imx/imx23_apbdmareg.h	Sat Jan 10 12:13:00 2015
@@ -1,4 +1,4 @@
-/* $Id: imx23_apbdmareg.h,v 1.2 

CVS commit: src/sys/arch/arm/imx

2015-01-10 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Jan 10 12:13:56 UTC 2015

Modified Files:
src/sys/arch/arm/imx: imx23_clkctrl.c imx23_clkctrlvar.h

Log Message:
From: Petri Laakso petri.laa...@asd.fi
-   Enable 24MHz clock for the Digital Filter.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx23_clkctrl.c \
src/sys/arch/arm/imx/imx23_clkctrlvar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx23_clkctrl.c
diff -u src/sys/arch/arm/imx/imx23_clkctrl.c:1.1 src/sys/arch/arm/imx/imx23_clkctrl.c:1.2
--- src/sys/arch/arm/imx/imx23_clkctrl.c:1.1	Mon Oct  7 17:36:40 2013
+++ src/sys/arch/arm/imx/imx23_clkctrl.c	Sat Jan 10 12:13:56 2015
@@ -1,4 +1,4 @@
-/* $Id: imx23_clkctrl.c,v 1.1 2013/10/07 17:36:40 matt Exp $ */
+/* $Id: imx23_clkctrl.c,v 1.2 2015/01/10 12:13:56 jmcneill Exp $ */
 
 /*
 * Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -149,3 +149,22 @@ clkctrl_en_usb(void)
 
 	return;
 }
+
+/*
+ * Enable 24MHz clock for the Digital Filter. 
+ *
+ */
+void
+clkctrl_en_filtclk(void)
+{
+	struct clkctrl_softc *sc = _sc;
+
+	if (sc == NULL) {
+		aprint_error(clkctrl is not initalized);
+		return;
+	}
+
+	CLKCTRL_WR(sc, HW_CLKCTRL_XTAL_CLR, HW_CLKCTRL_XTAL_FILT_CLK24M_GATE);
+
+	return;
+}
Index: src/sys/arch/arm/imx/imx23_clkctrlvar.h
diff -u src/sys/arch/arm/imx/imx23_clkctrlvar.h:1.1 src/sys/arch/arm/imx/imx23_clkctrlvar.h:1.2
--- src/sys/arch/arm/imx/imx23_clkctrlvar.h:1.1	Mon Oct  7 17:36:40 2013
+++ src/sys/arch/arm/imx/imx23_clkctrlvar.h	Sat Jan 10 12:13:56 2015
@@ -1,4 +1,4 @@
-/* $Id: imx23_clkctrlvar.h,v 1.1 2013/10/07 17:36:40 matt Exp $ */
+/* $Id: imx23_clkctrlvar.h,v 1.2 2015/01/10 12:13:56 jmcneill Exp $ */
 
 /*
  * Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -33,5 +33,6 @@
 #define _ARM_IMX_IMX23_CLKCTRLVAR_H_
 
 void clkctrl_en_usb(void);
+void clkctrl_en_filtclk(void);
 
 #endif /* !_ARM_IMX_IMX23_CLKCTRLVAR_H_ */



CVS commit: src/sys/arch/arm/imx

2015-01-10 Thread Jared D. McNeill
Module Name:src
Committed By:   jmcneill
Date:   Sat Jan 10 12:16:28 UTC 2015

Modified Files:
src/sys/arch/arm/imx: imx23_rtcreg.h
Added Files:
src/sys/arch/arm/imx: imx23_digfilt.c imx23_digfiltreg.h
imx23_digfiltvar.h imx23_rtc.c imx23_rtcvar.h

Log Message:
From Petri Laakso petri.laa...@asd.fi:
-   Audio output driver for imx23
-   Supporting code for audio driver


To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/imx23_digfilt.c \
src/sys/arch/arm/imx/imx23_digfiltreg.h \
src/sys/arch/arm/imx/imx23_digfiltvar.h src/sys/arch/arm/imx/imx23_rtc.c \
src/sys/arch/arm/imx/imx23_rtcvar.h
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx23_rtcreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx23_rtcreg.h
diff -u src/sys/arch/arm/imx/imx23_rtcreg.h:1.1 src/sys/arch/arm/imx/imx23_rtcreg.h:1.2
--- src/sys/arch/arm/imx/imx23_rtcreg.h:1.1	Tue Nov 20 19:06:13 2012
+++ src/sys/arch/arm/imx/imx23_rtcreg.h	Sat Jan 10 12:16:28 2015
@@ -1,4 +1,4 @@
-/* $Id: imx23_rtcreg.h,v 1.1 2012/11/20 19:06:13 jkunz Exp $ */
+/* $Id: imx23_rtcreg.h,v 1.2 2015/01/10 12:16:28 jmcneill Exp $ */
 
 /*
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -35,6 +35,7 @@
 #include sys/cdefs.h
 
 #define HW_RTC_BASE 0x8005C000
+#define HW_RTC_BASE_SIZE 0x2000
 
 /*
  * Real-Time Clock Control Register.

Added files:

Index: src/sys/arch/arm/imx/imx23_digfilt.c
diff -u /dev/null src/sys/arch/arm/imx/imx23_digfilt.c:1.1
--- /dev/null	Sat Jan 10 12:16:28 2015
+++ src/sys/arch/arm/imx/imx23_digfilt.c	Sat Jan 10 12:16:28 2015
@@ -0,0 +1,1130 @@
+/* $Id: imx23_digfilt.c,v 1.1 2015/01/10 12:16:28 jmcneill Exp $ */
+
+/*
+ * Copyright (c) 2014 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Petri Laakso.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include sys/param.h
+#include sys/cdefs.h
+#include sys/types.h
+#include sys/device.h
+#include sys/errno.h
+#include sys/systm.h
+#include sys/bus.h
+#include sys/mutex.h
+#include sys/audioio.h
+#include dev/audio_if.h
+#include dev/auconv.h
+#include sys/mallocvar.h
+#include arm/imx/imx23_digfiltreg.h
+#include arm/imx/imx23_rtcvar.h
+#include arm/imx/imx23_clkctrlvar.h
+#include arm/imx/imx23_apbdmavar.h
+#include arm/imx/imx23_icollreg.h
+#include arm/imx/imx23var.h
+
+#include arm/pic/picvar.h
+
+/* Autoconf. */
+static int digfilt_match(device_t, cfdata_t, void *);
+static void digfilt_attach(device_t, device_t, void *);
+static int digfilt_activate(device_t, enum devact);
+
+/* Audio driver interface. */
+static int digfilt_drain(void *);
+static int digfilt_query_encoding(void *, struct audio_encoding *);
+static int digfilt_set_params(void *, int, int, audio_params_t *,
+audio_params_t *, stream_filter_list_t *,
+stream_filter_list_t *);
+static int digfilt_round_blocksize(void *, int, int, const audio_params_t *);
+static int digfilt_init_output(void *, void *, int );
+static int digfilt_start_output(void *, void *, int, void (*)(void *), void *);
+static int digfilt_halt_output(void *);
+static int digfilt_getdev(void *, struct audio_device *);
+static int digfilt_set_port(void *, mixer_ctrl_t *);
+static int digfilt_get_port(void *, mixer_ctrl_t *);
+static int digfilt_query_devinfo(void *, mixer_devinfo_t *);
+static void *digfilt_allocm(void *, int, size_t);
+static void digfilt_freem(void *, void *, size_t);
+static size_t digfilt_round_buffersize(void *, int, size_t);
+static int digfilt_get_props(void *);
+static 

CVS commit: src/sys/arch/arm/imx

2015-01-09 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Fri Jan  9 09:50:46 UTC 2015

Modified Files:
src/sys/arch/arm/imx: imx6_board.c imx6_ccm.c imx6_ccmreg.h
imx6_ccmvar.h

Log Message:
- add some clock source about IPU
- fix a9tmr frequency when changing clock of machdep.imx6.frequency.arm


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx6_board.c \
src/sys/arch/arm/imx/imx6_ccmreg.h src/sys/arch/arm/imx/imx6_ccmvar.h
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx6_ccm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_board.c
diff -u src/sys/arch/arm/imx/imx6_board.c:1.2 src/sys/arch/arm/imx/imx6_board.c:1.3
--- src/sys/arch/arm/imx/imx6_board.c:1.2	Mon Oct  6 10:27:13 2014
+++ src/sys/arch/arm/imx/imx6_board.c	Fri Jan  9 09:50:46 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_board.c,v 1.2 2014/10/06 10:27:13 ryo Exp $	*/
+/*	$NetBSD: imx6_board.c,v 1.3 2015/01/09 09:50:46 ryo Exp $	*/
 
 /*
  * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
@@ -27,7 +27,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(1, $NetBSD: imx6_board.c,v 1.2 2014/10/06 10:27:13 ryo Exp $);
+__KERNEL_RCSID(1, $NetBSD: imx6_board.c,v 1.3 2015/01/09 09:50:46 ryo Exp $);
 
 #include opt_imx.h
 #include arml2cc.h
@@ -46,19 +46,8 @@ __KERNEL_RCSID(1, $NetBSD: imx6_board.c
 #include arm/imx/imx6_reg.h
 #include arm/imx/imx6_mmdcreg.h
 #include arm/imx/imx6_ccmreg.h
-#include arm/imx/imxclockvar.h
 #include arm/imx/imxwdogreg.h
 
-/*
- * PERIPHCLK_N is an arm root clock divider for MPcore interupt controller.
- * PERIPHCLK_N is equal to, or greater than two.
- * see Cortex-A9 MPCore Technical Reference Manual -
- * Chapter 5: Clocks, Resets, and Power Management, 5.1: Clocks.
- */
-#ifndef PERIPHCLK_N
-#define PERIPHCLK_N	2
-#endif
-
 bus_space_tag_t imx6_ioreg_bst = imx_bs_tag;
 bus_space_handle_t imx6_ioreg_bsh;
 bus_space_tag_t imx6_armcore_bst = imx_bs_tag;
@@ -219,7 +208,7 @@ imx6_device_register(device_t self, void
 	 */
 	if (device_is_a(self, a9tmr) || device_is_a(self, a9wdt)) {
 		prop_dictionary_set_uint32(dict, frequency,
-		   imx6_armrootclk() / PERIPHCLK_N);
+		   imx6_armrootclk() / IMX6_PERIPHCLK_N);
 		return;
 	}
 }
Index: src/sys/arch/arm/imx/imx6_ccmreg.h
diff -u src/sys/arch/arm/imx/imx6_ccmreg.h:1.2 src/sys/arch/arm/imx/imx6_ccmreg.h:1.3
--- src/sys/arch/arm/imx/imx6_ccmreg.h:1.2	Mon Oct  6 10:27:13 2014
+++ src/sys/arch/arm/imx/imx6_ccmreg.h	Fri Jan  9 09:50:46 2015
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_ccmreg.h,v 1.2 2014/10/06 10:27:13 ryo Exp $	*/
+/*	$NetBSD: imx6_ccmreg.h,v 1.3 2015/01/09 09:50:46 ryo Exp $	*/
 
 /*
  * Copyright (c) 2014 Ryo Shimizu r...@nerv.org
@@ -31,12 +31,21 @@
 
 #include sys/cdefs.h
 
+/*
+ * PERIPHCLK_N is an arm root clock divider for MPcore interupt controller.
+ * PERIPHCLK_N is equal to, or greater than two.
+ * see Cortex-A9 MPCore Technical Reference Manual -
+ * Chapter 5: Clocks, Resets, and Power Management, 5.1: Clocks.
+ */
+#ifndef IMX6_PERIPHCLK_N
+#define IMX6_PERIPHCLK_N	2
+#endif
+
 #ifndef IMX6_OSC_FREQ
 #define IMX6_OSC_FREQ	(24 * 1000 * 1000)	/* 24MHz */
 #endif
 
 #define IMX6_CCM_SIZE0x8000
-
 		/* 0x = 0x020c4000 */
 #define CCM_CCR	0x
 #define CCM_CCDR0x0004
@@ -90,6 +99,13 @@
 #define  CCM_CSCMR1_SSI1_CLK_SEL		__BITS(11, 10)
 #define  CCM_CSCMR1_PERCLK_PODF			__BITS(5, 0)
 
+#define CCM_CSCMR20x0020
+#define  CCM_CSCMR2_ESAI_CLK_SEL		__BITS(20, 19)
+#define  CCM_CSCMR2_LDB_DI1_IPU_DIV		__BIT(11)
+#define  CCM_CSCMR2_LDB_DI0_IPU_DIV		__BIT(10)
+#define  CCM_CSCMR2_CAN_CLK_PODF		__BITS(7, 2)
+
+
 #define CCM_CSCDR10x0024
 #define  CCM_CSCDR1_VPU_AXI_PODF		__BITS(25, 27)
 #define  CCM_CSCDR1_USDHC4_PODF			__BITS(22, 24)
@@ -98,6 +114,32 @@
 #define  CCM_CSCDR1_USDHC1_PODF			__BITS(13, 11)
 #define  CCM_CSCDR1_UART_CLK_PODF		__BITS(5, 0)
 
+#define CCM_CS1CDR0x0028
+#define CCM_CS2CDR0x002c
+#define  CCM_CS2CDR_ENFC_CLK_PODF		__BITS(26, 21)
+#define  CCM_CS2CDR_ENFC_CLK_PRED		__BITS(20, 18)
+#define  CCM_CS2CDR_ENFC_CLK_SEL		__BITS(17, 16)
+#define  CCM_CS2CDR_LDB_DI1_CLK_SEL		__BITS(14, 12)
+#define  CCM_CS2CDR_LDB_DI0_CLK_SEL		__BITS(11, 9)
+#define  CCM_CS2CDR_SSI2_CLK_PRED		__BITS(8, 6)
+#define  CCM_CS2CDR_SSI2_CLK_PODF		__BITS(5, 0)
+#define CCM_CDCDR0x0030
+#define CCM_CHSCCDR0x0034
+#define  CCM_CHSCCDR_IPU1_DI1_PRE_CLK_SEL	__BITS(17, 15)
+#define  CCM_CHSCCDR_IPU1_DI1_PODF		__BITS(14, 12)
+#define  CCM_CHSCCDR_IPU1_DI1_CLK_SEL		__BITS(11, 9)
+#define  CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL	__BITS(8, 6)
+#define  CCM_CHSCCDR_IPU1_DI0_PODF		__BITS(5, 3)
+#define  CCM_CHSCCDR_IPU1_DI0_CLK_SEL		__BITS(2, 0)
+
+
+#define CCM_CSCDR20x0038
+#define CCM_CSCDR30x003c
+#define  CCM_CSCDR3_IPU2_HSP_PODF		__BITS(18, 16)
+#define  CCM_CSCDR3_IPU2_HSP_CLK_SEL		__BITS(15, 14)
+#define 

CVS commit: src/sys/arch/arm/imx

2014-11-07 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Fri Nov  7 11:54:18 UTC 2014

Modified Files:
src/sys/arch/arm/imx: imx51_ipuv3.c imx51_ipuv3reg.h

Log Message:
- Use __SHIFTIN macro
- fix CM_DISP_GEN_DI1_COUNTER_RELEASE


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx51_ipuv3.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx51_ipuv3reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx51_ipuv3.c
diff -u src/sys/arch/arm/imx/imx51_ipuv3.c:1.2 src/sys/arch/arm/imx/imx51_ipuv3.c:1.3
--- src/sys/arch/arm/imx/imx51_ipuv3.c:1.2	Tue May  6 11:22:53 2014
+++ src/sys/arch/arm/imx/imx51_ipuv3.c	Fri Nov  7 11:54:18 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_ipuv3.c,v 1.2 2014/05/06 11:22:53 hkenken Exp $	*/
+/*	$NetBSD: imx51_ipuv3.c,v 1.3 2014/11/07 11:54:18 hkenken Exp $	*/
 
 /*
  * Copyright (c) 2011, 2012  Genetec Corporation.  All rights reserved.
@@ -27,7 +27,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imx51_ipuv3.c,v 1.2 2014/05/06 11:22:53 hkenken Exp $);
+__KERNEL_RCSID(0, $NetBSD: imx51_ipuv3.c,v 1.3 2014/11/07 11:54:18 hkenken Exp $);
 
 #include sys/param.h
 #include sys/systm.h
@@ -369,8 +369,8 @@ imx51_ipuv3_di_sync_conf(struct imx51_ip
 	IPUV3_WRITE(sc, di0, IPU_DI_SW_GEN0(no), reg_gen0);
 	IPUV3_WRITE(sc, di0, IPU_DI_SW_GEN1(no), reg_gen1);
 	reg = IPUV3_READ(sc, di0, IPU_DI_STP_REP(no));
-	reg = ~DI_STP_REP_MASK(no);
-	reg |= repeat  DI_STP_REP_SHIFT(no);
+	reg = ~DI_STP_REP(no);
+	reg |= __SHIFTIN(repeat, DI_STP_REP(no));
 	IPUV3_WRITE(sc, di0, IPU_DI_STP_REP(no), reg);
 
 #ifdef IPUV3_DEBUG
@@ -413,7 +413,7 @@ imx51_ipuv3_di_init(struct imx51_ipuv3_s
 
 	IPUV3_WRITE(sc, di0, IPU_DI_BS_CLKGEN0, div);
 	IPUV3_WRITE(sc, di0, IPU_DI_BS_CLKGEN1,
-	(div / 16)  DI_BS_CLKGEN1_DOWN_SHIFT);
+	__SHIFTIN(div / 16, DI_BS_CLKGEN1_DOWN));
 #ifdef IPUV3_DEBUG
 	printf(%s: IPU_DI_BS_CLKGEN0 = 0x%08X\n, __func__,
 	IPUV3_READ(sc, di0, IPU_DI_BS_CLKGEN0));
@@ -421,9 +421,9 @@ imx51_ipuv3_di_init(struct imx51_ipuv3_s
 	IPUV3_READ(sc, di0, IPU_DI_BS_CLKGEN1));
 #endif
 	/* Display Time settings */
-	reg = ((div / 16 - 1)  DI_DW_GEN_ACCESS_SIZE_SHIFT) |
-	((div / 16 - 1)  DI_DW_GEN_COMPONNENT_SIZE_SHIFT) |
-	(3  DI_DW_GEN_PIN_SHIFT(15));
+	reg = __SHIFTIN(div / 16 - 1, DI_DW_GEN_ACCESS_SIZE) |
+	__SHIFTIN(div / 16 - 1, DI_DW_GEN_COMPONNENT_SIZE) |
+	__SHIFTIN(3, DI_DW_GEN_PIN(15));
 	IPUV3_WRITE(sc, di0, IPU_DI_DW_GEN(0), reg);
 #ifdef IPUV3_DEBUG
 	printf(%s: div = %d\n, __func__, div);
@@ -432,7 +432,7 @@ imx51_ipuv3_di_init(struct imx51_ipuv3_s
 #endif
 
 	/* Up  Down Data Wave Set */
-	reg = (div / 16 * 2)  DI_DW_SET_DOWN_SHIFT;
+	reg = __SHIFTIN(div / 16 * 2, DI_DW_SET_DOWN);
 	IPUV3_WRITE(sc, di0, IPU_DI_DW_SET(0, 3), reg);
 #ifdef IPUV3_DEBUG
 	printf(%s: IPU_DI_DW_SET(0, 3) 0x%08X = 0x%08X\n, __func__,
@@ -486,13 +486,14 @@ imx51_ipuv3_di_init(struct imx51_ipuv3_s
 	IPUV3_WRITE(sc, di0, IPU_DI_SW_GEN1(9), 0);
 
 	reg = IPUV3_READ(sc, di0, IPU_DI_STP_REP(6));
-	reg = ~DI_STP_REP_MASK(6);
+	reg = ~DI_STP_REP(6);
 	IPUV3_WRITE(sc, di0, IPU_DI_STP_REP(6), reg);
 	IPUV3_WRITE(sc, di0, IPU_DI_STP_REP(7), 0);
 	IPUV3_WRITE(sc, di0, IPU_DI_STP_REP(9), 0);
 
 	IPUV3_WRITE(sc, di0, IPU_DI_GENERAL, 0);
-	reg = ((3 - 1)  DI_SYNC_AS_GEN_VSYNC_SEL_SHIFT) | 0x2;
+	reg = __SHIFTIN(3 - 1, DI_SYNC_AS_GEN_VSYNC_SEL) |
+	__SHIFTIN(0x2, DI_SYNC_AS_GEN_SYNC_START);
 	IPUV3_WRITE(sc, di0, IPU_DI_SYNC_AS_GEN, reg);
 	IPUV3_WRITE(sc, di0, IPU_DI_POL, DI_POL_DRDY_POLARITY_15);
 
@@ -576,7 +577,7 @@ imx51_ipuv3_initialize(struct imx51_ipuv
 
 	reg = IPUV3_READ(sc, cm, IPU_CM_DISP_GEN);
 	reg |= CM_DISP_GEN_MCU_MAX_BURST_STOP |
-	CM_DISP_GEN_MCU_T(0x8);
+	__SHIFTIN(0x8, CM_DISP_GEN_MCU_T);
 	IPUV3_WRITE(sc, cm, IPU_CM_DISP_GEN, reg);
 }
 

Index: src/sys/arch/arm/imx/imx51_ipuv3reg.h
diff -u src/sys/arch/arm/imx/imx51_ipuv3reg.h:1.1 src/sys/arch/arm/imx/imx51_ipuv3reg.h:1.2
--- src/sys/arch/arm/imx/imx51_ipuv3reg.h:1.1	Tue Apr 17 10:19:57 2012
+++ src/sys/arch/arm/imx/imx51_ipuv3reg.h	Fri Nov  7 11:54:18 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_ipuv3reg.h,v 1.1 2012/04/17 10:19:57 bsh Exp $	*/
+/*	$NetBSD: imx51_ipuv3reg.h,v 1.2 2014/11/07 11:54:18 hkenken Exp $	*/
 /*
  * Copyright (c) 2011, 2012  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -95,11 +95,11 @@
 #define IPU_CM_SKIP			0x00bc
 #define IPU_CM_DISP_ALT_CONF		0x00c0
 #define IPU_CM_DISP_GEN			0x00c4
+#define  CM_DISP_GEN_DI1_COUNTER_RELEASE	__BIT(25)
 #define  CM_DISP_GEN_DI0_COUNTER_RELEASE	__BIT(24)
-#define  CM_DISP_GEN_DI1_COUNTER_RELEASE	__BIT(23)
-#define  CM_DISP_GEN_MCU_MAX_BURST_STOP		__BIT(22)
-#define  CM_DISP_GEN_MCU_T_SHIFT		18
-#define  CM_DISP_GEN_MCU_T(n)		((n)  CM_DISP_GEN_MCU_T_SHIFT)
+#define  CM_DISP_GEN_MCU_CSI_VSYNC_DEST	__BIT(23)
+#define  

CVS commit: src/sys/arch/arm/imx

2014-10-07 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Tue Oct  7 09:32:47 UTC 2014

Modified Files:
src/sys/arch/arm/imx: imx6var.h

Log Message:
forgot to commit about changes of ccm


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx6var.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6var.h
diff -u src/sys/arch/arm/imx/imx6var.h:1.1 src/sys/arch/arm/imx/imx6var.h:1.2
--- src/sys/arch/arm/imx/imx6var.h:1.1	Thu Sep 25 05:05:28 2014
+++ src/sys/arch/arm/imx/imx6var.h	Tue Oct  7 09:32:47 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6var.h,v 1.1 2014/09/25 05:05:28 ryo Exp $	*/
+/*	$NetBSD: imx6var.h,v 1.2 2014/10/07 09:32:47 ryo Exp $	*/
 
 /*
  * Copyright (c) 2014 Ryo Shimizu r...@nerv.org
@@ -27,7 +27,7 @@
  */
 
 #ifndef _ARM_IMX_IMX6VAR_H
-#define	_ARM_IMX_IMX6VAR_H
+#define _ARM_IMX_IMX6VAR_H
 
 #include sys/cdefs.h
 
@@ -46,15 +46,10 @@ extern struct arm32_bus_dma_tag imx_bus_
 extern bus_space_tag_t imx6_armcore_bst;
 extern bus_space_handle_t imx6_armcore_bsh;
 
-/* gpio utility functions in imxgpio.c */
-void gpio_set_direction(uint32_t, uint32_t);
-void gpio_data_write(uint32_t, uint32_t);
-bool gpio_data_read(uint32_t);
-
 /* iomux utility functions in imx6_iomux.c */
 struct iomux_conf {
 	u_int pin;
-#define	IOMUX_CONF_EOT	((u_int)(-1))
+#define IOMUX_CONF_EOT	((u_int)(-1))
 	u_short mux;
 	u_short pad;
 };
@@ -69,8 +64,18 @@ void iomux_mux_config(const struct iomux
 /* imx6_board.c */
 void imx6_bootstrap(vaddr_t);
 psize_t imx6_memprobe(void);
+uint32_t imx6_armrootclk(void);
 void imx6_reset(void) __dead;
 void imx6_device_register(device_t, void *);
 void imx6_cpu_hatch(struct cpu_info *);
+uint32_t imx6_chip_id(void);
+#define CHIPID_MINOR_MASK		0x00ff
+#define CHIPID_MAJOR_MASK		0x0000
+#define CHIPID_MAJOR_IMX6SL		0x0060
+#define CHIPID_MAJOR_IMX6DL		0x0061
+#define CHIPID_MAJOR_IMX6SOLO		0x0062
+#define CHIPID_MAJOR_IMX6Q		0x0063
+#define IMX6_CHIPID_MAJOR(v)		((v)  CHIPID_MAJOR_MASK)
+#define IMX6_CHIPID_MINOR(v)		((v)  CHIPID_MINOR_MASK)
 
 #endif /* _ARM_IMX_IMX6VAR_H */



CVS commit: src/sys/arch/arm/imx

2014-10-07 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Tue Oct  7 09:36:09 UTC 2014

Modified Files:
src/sys/arch/arm/imx: files.imx6 imx6_ccm.c imx6_ccmvar.h
Added Files:
src/sys/arch/arm/imx: imx6_i2c.c

Log Message:
add support imx6 I2C Controller


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/files.imx6
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx6_ccm.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx6_ccmvar.h
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/imx6_i2c.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx6
diff -u src/sys/arch/arm/imx/files.imx6:1.3 src/sys/arch/arm/imx/files.imx6:1.4
--- src/sys/arch/arm/imx/files.imx6:1.3	Mon Oct  6 10:15:40 2014
+++ src/sys/arch/arm/imx/files.imx6	Tue Oct  7 09:36:09 2014
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx6,v 1.3 2014/10/06 10:15:40 ryo Exp $
+#	$NetBSD: files.imx6,v 1.4 2014/10/07 09:36:09 ryo Exp $
 #
 # Configuration info for the Freescale i.MX6
 #
@@ -61,6 +61,12 @@ device	imxiomux
 attach	imxiomux at axi
 file	arch/arm/imx/imx6_iomux.c		imxiomux
 
+# iMX iic Controler
+device	imxi2c: i2cbus
+attach	imxi2c at axi
+file	arch/arm/imx/imxi2c.c			imxi2c
+file	arch/arm/imx/imx6_i2c.c			imxi2c
+
 # iMX UART
 device	imxuart
 attach	imxuart at axi

Index: src/sys/arch/arm/imx/imx6_ccm.c
diff -u src/sys/arch/arm/imx/imx6_ccm.c:1.2 src/sys/arch/arm/imx/imx6_ccm.c:1.3
--- src/sys/arch/arm/imx/imx6_ccm.c:1.2	Mon Oct  6 10:27:13 2014
+++ src/sys/arch/arm/imx/imx6_ccm.c	Tue Oct  7 09:36:09 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_ccm.c,v 1.2 2014/10/06 10:27:13 ryo Exp $	*/
+/*	$NetBSD: imx6_ccm.c,v 1.3 2014/10/07 09:36:09 ryo Exp $	*/
 
 /*
  * Copyright (c) 2010-2012, 2014  Genetec Corporation.  All rights reserved.
@@ -31,7 +31,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imx6_ccm.c,v 1.2 2014/10/06 10:27:13 ryo Exp $);
+__KERNEL_RCSID(0, $NetBSD: imx6_ccm.c,v 1.3 2014/10/07 09:36:09 ryo Exp $);
 
 #include opt_imx.h
 #include opt_imx6clk.h
@@ -167,13 +167,13 @@ imxccm_attach(device_t parent, device_t 
 	imx6_get_clock(IMX6CLK_AXI));
 
 	aprint_verbose_dev(self, IMX6CLK_USDHC1=%d\n,
-	imx6_get_clock(IMX6CLK_USDHC1_CLK_ROOT));
+	imx6_get_clock(IMX6CLK_USDHC1));
 	aprint_verbose_dev(self, IMX6CLK_USDHC2=%d\n,
-	imx6_get_clock(IMX6CLK_USDHC2_CLK_ROOT));
+	imx6_get_clock(IMX6CLK_USDHC2));
 	aprint_verbose_dev(self, IMX6CLK_USDHC3=%d\n,
-	imx6_get_clock(IMX6CLK_USDHC3_CLK_ROOT));
+	imx6_get_clock(IMX6CLK_USDHC3));
 	aprint_verbose_dev(self, IMX6CLK_USDHC4=%d\n,
-	imx6_get_clock(IMX6CLK_USDHC4_CLK_ROOT));
+	imx6_get_clock(IMX6CLK_USDHC4));
 }
 
 static int
@@ -630,28 +630,28 @@ imx6_get_clock(enum imx6_clock clk)
 		}
 		break;
 
-	case IMX6CLK_USDHC1_CLK_ROOT:
+	case IMX6CLK_USDHC1:
 		v = imx6_ccm_read(CCM_CSCMR1);
 		freq = imx6_get_clock((v  CCM_CSCMR1_USDHC1_CLK_SEL) ?
 		IMX6CLK_PLL2_PFD0 : IMX6CLK_PLL2_PFD2);
 		v = imx6_ccm_read(CCM_CSCDR1);
 		freq = freq / (__SHIFTOUT(v, CCM_CSCDR1_USDHC1_PODF) + 1);
 		break;
-	case IMX6CLK_USDHC2_CLK_ROOT:
+	case IMX6CLK_USDHC2:
 		v = imx6_ccm_read(CCM_CSCMR1);
 		freq = imx6_get_clock((v  CCM_CSCMR1_USDHC2_CLK_SEL) ?
 		IMX6CLK_PLL2_PFD0 : IMX6CLK_PLL2_PFD2);
 		v = imx6_ccm_read(CCM_CSCDR1);
 		freq = freq / (__SHIFTOUT(v, CCM_CSCDR1_USDHC2_PODF) + 1);
 		break;
-	case IMX6CLK_USDHC3_CLK_ROOT:
+	case IMX6CLK_USDHC3:
 		v = imx6_ccm_read(CCM_CSCMR1);
 		freq = imx6_get_clock((v  CCM_CSCMR1_USDHC3_CLK_SEL) ?
 		IMX6CLK_PLL2_PFD0 : IMX6CLK_PLL2_PFD2);
 		v = imx6_ccm_read(CCM_CSCDR1);
 		freq = freq / (__SHIFTOUT(v, CCM_CSCDR1_USDHC3_PODF) + 1);
 		break;
-	case IMX6CLK_USDHC4_CLK_ROOT:
+	case IMX6CLK_USDHC4:
 		v = imx6_ccm_read(CCM_CSCMR1);
 		freq = imx6_get_clock((v  CCM_CSCMR1_USDHC4_CLK_SEL) ?
 		IMX6CLK_PLL2_PFD0 : IMX6CLK_PLL2_PFD2);
@@ -659,6 +659,12 @@ imx6_get_clock(enum imx6_clock clk)
 		freq = freq / (__SHIFTOUT(v, CCM_CSCDR1_USDHC4_PODF) + 1);
 		break;
 
+	case IMX6CLK_PERCLK:
+		freq = imx6_get_clock(IMX6CLK_IPG);
+		v = imx6_ccm_read(CCM_CSCMR1);
+		freq = freq / (__SHIFTOUT(v, CCM_CSCMR1_PERCLK_PODF) + 1);
+		break;
+
 	default:
 		aprint_error_dev(ccm_softc-sc_dev,
 		clock %d: not supported yet\n, clk);

Index: src/sys/arch/arm/imx/imx6_ccmvar.h
diff -u src/sys/arch/arm/imx/imx6_ccmvar.h:1.1 src/sys/arch/arm/imx/imx6_ccmvar.h:1.2
--- src/sys/arch/arm/imx/imx6_ccmvar.h:1.1	Thu Sep 25 05:05:28 2014
+++ src/sys/arch/arm/imx/imx6_ccmvar.h	Tue Oct  7 09:36:09 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_ccmvar.h,v 1.1 2014/09/25 05:05:28 ryo Exp $	*/
+/*	$NetBSD: imx6_ccmvar.h,v 1.2 2014/10/07 09:36:09 ryo Exp $	*/
 /*
  * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -54,10 +54,12 @@ enum imx6_clock {
 	IMX6CLK_MMDC_CH0,
 	IMX6CLK_MMDC_CH1,
 
-	IMX6CLK_USDHC1_CLK_ROOT,
-	

CVS commit: src/sys/arch/arm/imx

2014-10-06 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Mon Oct  6 10:15:40 UTC 2014

Modified Files:
src/sys/arch/arm/imx: files.imx6 imx6_reg.h
Added Files:
src/sys/arch/arm/imx: imx6_snvs.c imx6_snvsreg.h

Log Message:
add support imx6 Secure Non-Volatile Storage (SNVS) real-time clock


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/files.imx6 \
src/sys/arch/arm/imx/imx6_reg.h
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/imx6_snvs.c \
src/sys/arch/arm/imx/imx6_snvsreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx6
diff -u src/sys/arch/arm/imx/files.imx6:1.2 src/sys/arch/arm/imx/files.imx6:1.3
--- src/sys/arch/arm/imx/files.imx6:1.2	Thu Sep 25 05:05:28 2014
+++ src/sys/arch/arm/imx/files.imx6	Mon Oct  6 10:15:40 2014
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx6,v 1.2 2014/09/25 05:05:28 ryo Exp $
+#	$NetBSD: files.imx6,v 1.3 2014/10/06 10:15:40 ryo Exp $
 #
 # Configuration info for the Freescale i.MX6
 #
@@ -88,3 +88,9 @@ file	arch/arm/imx/imx6_usdhc.c		sdhc_axi
 # iMX6 SATA Controllers (AHCI)
 attach	ahcisata at axi with imx6_ahcisata
 file	arch/arm/imx/imx6_ahcisata.c		imx6_ahcisata
+
+# iMX6 Secure Non-Volatile Storage (SNVS)
+device	imxsnvs
+attach	imxsnvs at axi
+file	arch/arm/imx/imx6_snvs.c		imxsnvs
+
Index: src/sys/arch/arm/imx/imx6_reg.h
diff -u src/sys/arch/arm/imx/imx6_reg.h:1.2 src/sys/arch/arm/imx/imx6_reg.h:1.3
--- src/sys/arch/arm/imx/imx6_reg.h:1.2	Thu Sep 25 05:05:28 2014
+++ src/sys/arch/arm/imx/imx6_reg.h	Mon Oct  6 10:15:40 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_reg.h,v 1.2 2014/09/25 05:05:28 ryo Exp $	*/
+/*	$NetBSD: imx6_reg.h,v 1.3 2014/10/06 10:15:40 ryo Exp $	*/
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -139,7 +139,8 @@
 #define	AIPS1_EPIT2_BASE	0x000d4000
 #define	AIPS1_EPIT1_BASE	0x000d
 #define	AIPS1_EPIT_SIZE		0x0020
-#define	AIPS1_SNVS_HP_BASE	0x000cc000
+#define	AIPS1_SNVS_BASE		0x000cc000
+#define	AIPS1_SNVS_SIZE		0x0c00
 #define	AIPS1_USBPHY2_BASE	0x000ca000
 #define	AIPS1_USBPHY1_BASE	0x000c9000
 #define	AIPS1_ANATOP_DIG_BASE	0x000c8000

Added files:

Index: src/sys/arch/arm/imx/imx6_snvs.c
diff -u /dev/null src/sys/arch/arm/imx/imx6_snvs.c:1.1
--- /dev/null	Mon Oct  6 10:15:40 2014
+++ src/sys/arch/arm/imx/imx6_snvs.c	Mon Oct  6 10:15:40 2014
@@ -0,0 +1,217 @@
+/*	$NetBSD: imx6_snvs.c,v 1.1 2014/10/06 10:15:40 ryo Exp $	*/
+
+/*
+ * Copyright (c) 2014 Ryo Shimizu r...@nerv.org
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * i.MX6 Secure Non-Volatile Storage
+ */
+#include sys/cdefs.h
+__KERNEL_RCSID(0, $NetBSD: imx6_snvs.c,v 1.1 2014/10/06 10:15:40 ryo Exp $);
+
+#include locators.h
+#include sys/bus.h
+#include sys/device.h
+#include sys/param.h
+#include dev/clock_subr.h
+
+#include arm/imx/imx6var.h
+#include arm/imx/imx6_reg.h
+#include arm/imx/imx6_snvsreg.h
+
+struct imxsnvs_softc {
+	device_t sc_dev;
+	bus_space_tag_t sc_iot;
+	bus_space_handle_t sc_ioh;
+	struct todr_chip_handle sc_todr;
+};
+
+#define SNVS_READ(sc, reg)	\
+	bus_space_read_4((sc)-sc_iot, (sc)-sc_ioh, reg)
+
+#define SNVS_WRITE(sc, reg, val)\
+	bus_space_write_4((sc)-sc_iot, (sc)-sc_ioh, reg, val)
+
+static int imxsnvs_match(device_t, struct cfdata *, void *);
+static void imxsnvs_attach(device_t, device_t, void *);
+static int imxsnvs_rtc_enable(struct imxsnvs_softc *);
+static int imxsnvs_rtc_disable(struct imxsnvs_softc *);
+static int imxsnvs_gettime(todr_chip_handle_t, struct timeval *);
+static int imxsnvs_settime(todr_chip_handle_t, struct timeval *);
+
+
+CFATTACH_DECL_NEW(imxsnvs, sizeof(struct 

CVS commit: src/sys/arch/arm/imx

2014-10-06 Thread Ryo Shimizu
Module Name:src
Committed By:   ryo
Date:   Mon Oct  6 10:27:13 UTC 2014

Modified Files:
src/sys/arch/arm/imx: imx6_ahcisata.c imx6_board.c imx6_ccm.c
imx6_ccmreg.h

Log Message:
* resolve arm root clock from CCM to attach a9tmr
* don't match/attach imx6_ahcisata on iMX6 Solo/SoloLite/DualLite


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx6_ahcisata.c \
src/sys/arch/arm/imx/imx6_board.c src/sys/arch/arm/imx/imx6_ccm.c \
src/sys/arch/arm/imx/imx6_ccmreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx6_ahcisata.c
diff -u src/sys/arch/arm/imx/imx6_ahcisata.c:1.1 src/sys/arch/arm/imx/imx6_ahcisata.c:1.2
--- src/sys/arch/arm/imx/imx6_ahcisata.c:1.1	Thu Sep 25 05:05:28 2014
+++ src/sys/arch/arm/imx/imx6_ahcisata.c	Mon Oct  6 10:27:13 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_ahcisata.c,v 1.1 2014/09/25 05:05:28 ryo Exp $	*/
+/*	$NetBSD: imx6_ahcisata.c,v 1.2 2014/10/06 10:27:13 ryo Exp $	*/
 
 /*
  * Copyright (c) 2014 Ryo Shimizu r...@nerv.org
@@ -27,7 +27,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imx6_ahcisata.c,v 1.1 2014/09/25 05:05:28 ryo Exp $);
+__KERNEL_RCSID(0, $NetBSD: imx6_ahcisata.c,v 1.2 2014/10/06 10:27:13 ryo Exp $);
 
 #include locators.h
 #include opt_imx.h
@@ -73,10 +73,20 @@ imx6_ahcisata_match(device_t parent, cfd
 {
 	struct axi_attach_args * const aa = aux;
 
-	if (aa-aa_addr == IMX6_SATA_BASE)
-		return 1;
+	if (aa-aa_addr != IMX6_SATA_BASE)
+		return 0;
 
-	return 0;
+	/* i.MX6 Solo/SoloLite/DualLite has no SATA interface */
+	switch (IMX6_CHIPID_MAJOR(imx6_chip_id())) {
+	case CHIPID_MAJOR_IMX6SL:
+	case CHIPID_MAJOR_IMX6DL:
+	case CHIPID_MAJOR_IMX6SOLO:
+		return 0;
+	default:
+		break;
+	}
+
+	return 1;
 }
 
 static void
Index: src/sys/arch/arm/imx/imx6_board.c
diff -u src/sys/arch/arm/imx/imx6_board.c:1.1 src/sys/arch/arm/imx/imx6_board.c:1.2
--- src/sys/arch/arm/imx/imx6_board.c:1.1	Thu Sep 25 05:05:28 2014
+++ src/sys/arch/arm/imx/imx6_board.c	Mon Oct  6 10:27:13 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_board.c,v 1.1 2014/09/25 05:05:28 ryo Exp $	*/
+/*	$NetBSD: imx6_board.c,v 1.2 2014/10/06 10:27:13 ryo Exp $	*/
 
 /*
  * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
@@ -27,7 +27,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(1, $NetBSD: imx6_board.c,v 1.1 2014/09/25 05:05:28 ryo Exp $);
+__KERNEL_RCSID(1, $NetBSD: imx6_board.c,v 1.2 2014/10/06 10:27:13 ryo Exp $);
 
 #include opt_imx.h
 #include arml2cc.h
@@ -45,8 +45,20 @@ __KERNEL_RCSID(1, $NetBSD: imx6_board.c
 #include arm/imx/imx6var.h
 #include arm/imx/imx6_reg.h
 #include arm/imx/imx6_mmdcreg.h
+#include arm/imx/imx6_ccmreg.h
+#include arm/imx/imxclockvar.h
 #include arm/imx/imxwdogreg.h
 
+/*
+ * PERIPHCLK_N is an arm root clock divider for MPcore interupt controller.
+ * PERIPHCLK_N is equal to, or greater than two.
+ * see Cortex-A9 MPCore Technical Reference Manual -
+ * Chapter 5: Clocks, Resets, and Power Management, 5.1: Clocks.
+ */
+#ifndef PERIPHCLK_N
+#define PERIPHCLK_N	2
+#endif
+
 bus_space_tag_t imx6_ioreg_bst = imx_bs_tag;
 bus_space_handle_t imx6_ioreg_bsh;
 bus_space_tag_t imx6_armcore_bst = imx_bs_tag;
@@ -77,6 +89,24 @@ imx6_bootstrap(vaddr_t iobase)
 #endif
 }
 
+/* iMX6 SoC type */
+uint32_t
+imx6_chip_id(void)
+{
+	uint32_t v;
+
+	/* read DIGPROG_SOLOLITE (IMX6SL only) */
+	v = bus_space_read_4(imx6_ioreg_bst, imx6_ioreg_bsh,
+	AIPS1_CCM_BASE + USB_ANALOG_DIGPROG_SOLOLITE);
+	if (__SHIFTOUT(v, USB_ANALOG_DIGPROG_MAJOR) == CHIPID_MAJOR_IMX6SL)
+		return v;
+
+	/* not SOLOLITE, read DIGPROG */
+	v = bus_space_read_4(imx6_ioreg_bst, imx6_ioreg_bsh,
+	AIPS1_CCM_BASE + USB_ANALOG_DIGPROG);
+	return v;
+}
+
 /*
  * probe DDR size from DDR Controller register
  */
@@ -150,6 +180,21 @@ imx6_reset(void)
 		__asm(wfi);
 }
 
+uint32_t
+imx6_armrootclk(void)
+{
+	uint32_t clk;
+	uint32_t v;
+
+	v = bus_space_read_4(imx6_ioreg_bst, imx6_ioreg_bsh,
+	AIPS1_CCM_BASE + CCM_ANALOG_PLL_ARM);
+	clk = IMX6_OSC_FREQ * (v  CCM_ANALOG_PLL_ARM_DIV_SELECT) / 2;
+	v = bus_space_read_4(imx6_ioreg_bst, imx6_ioreg_bsh,
+	AIPS1_CCM_BASE + CCM_CACRR);
+	v = __SHIFTOUT(v, CCM_CACRR_ARM_PODF);
+	return clk / (v + 1);
+}
+
 void
 imx6_device_register(device_t self, void *aux)
 {
@@ -174,7 +219,7 @@ imx6_device_register(device_t self, void
 	 */
 	if (device_is_a(self, a9tmr) || device_is_a(self, a9wdt)) {
 		prop_dictionary_set_uint32(dict, frequency,
-		   79200 / 2);	/* XXX? */
+		   imx6_armrootclk() / PERIPHCLK_N);
 		return;
 	}
 }
Index: src/sys/arch/arm/imx/imx6_ccm.c
diff -u src/sys/arch/arm/imx/imx6_ccm.c:1.1 src/sys/arch/arm/imx/imx6_ccm.c:1.2
--- src/sys/arch/arm/imx/imx6_ccm.c:1.1	Thu Sep 25 05:05:28 2014
+++ src/sys/arch/arm/imx/imx6_ccm.c	Mon Oct  6 10:27:13 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx6_ccm.c,v 1.1 2014/09/25 05:05:28 ryo Exp $	*/
+/*	$NetBSD: imx6_ccm.c,v 

CVS commit: src/sys/arch/arm/imx

2014-07-25 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Fri Jul 25 06:36:16 UTC 2014

Modified Files:
src/sys/arch/arm/imx: imxuart.c

Log Message:
Delete unused variables for new gcc.


To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/imx/imxuart.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imxuart.c
diff -u src/sys/arch/arm/imx/imxuart.c:1.11 src/sys/arch/arm/imx/imxuart.c:1.12
--- src/sys/arch/arm/imx/imxuart.c:1.11	Sun Mar 16 05:20:23 2014
+++ src/sys/arch/arm/imx/imxuart.c	Fri Jul 25 06:36:16 2014
@@ -1,4 +1,4 @@
-/* $NetBSD: imxuart.c,v 1.11 2014/03/16 05:20:23 dholland Exp $ */
+/* $NetBSD: imxuart.c,v 1.12 2014/07/25 06:36:16 hkenken Exp $ */
 
 /*
  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
@@ -96,7 +96,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imxuart.c,v 1.11 2014/03/16 05:20:23 dholland Exp $);
+__KERNEL_RCSID(0, $NetBSD: imxuart.c,v 1.12 2014/07/25 06:36:16 hkenken Exp $);
 
 #include opt_imxuart.h
 #include opt_ddb.h
@@ -2223,7 +2223,7 @@ imxuart_common_getc(dev_t dev, struct im
 	c = 0xff  bus_space_read_4(iot, ioh, IMX_URXD);
 
 	{
-		int cn_trapped = 0; /* unused */
+		int __attribute__((__unused__))cn_trapped = 0; /* unused */
 #ifdef DDB
 		extern int db_active;
 		if (!db_active)
@@ -2246,7 +2246,7 @@ imxuart_common_putc(dev_t dev, struct im
 	if (!READAHEAD_IS_FULL() 
 	((usr2 = bus_space_read_4(iot, ioh, IMX_USR2))  IMX_USR2_RDR)) {
 
-		int cn_trapped = 0;
+		int __attribute__((__unused__))cn_trapped = 0;
 		cin = bus_space_read_4(iot, ioh, IMX_URXD);
 		cn_check_magic(dev, cin  0xff, imxuart_cnm_state);
 		imxuart_readahead_in = (imxuart_readahead_in + 1) 



CVS commit: src/sys/arch/arm/imx

2014-07-25 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Fri Jul 25 07:07:47 UTC 2014

Modified Files:
src/sys/arch/arm/imx: files.imx51 imxi2creg.h
Added Files:
src/sys/arch/arm/imx: imx51_i2c.c imxi2c.c imxi2cvar.h

Log Message:
Add i2c driver for i.MX.


To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/imx/files.imx51
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/imx51_i2c.c \
src/sys/arch/arm/imx/imxi2c.c src/sys/arch/arm/imx/imxi2cvar.h
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imxi2creg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx51
diff -u src/sys/arch/arm/imx/files.imx51:1.9 src/sys/arch/arm/imx/files.imx51:1.10
--- src/sys/arch/arm/imx/files.imx51:1.9	Tue May  6 11:22:53 2014
+++ src/sys/arch/arm/imx/files.imx51	Fri Jul 25 07:07:47 2014
@@ -1,6 +1,6 @@
-#	$NetBSD: files.imx51,v 1.9 2014/05/06 11:22:53 hkenken Exp $
+#	$NetBSD: files.imx51,v 1.10 2014/07/25 07:07:47 hkenken Exp $
 #
-# Configuration info for the Freescale i.MX51
+# Configuration info for the Freescale i.MX5x
 #
 
 defparam opt_imx.hMEMSIZE
@@ -90,19 +90,15 @@ file   arch/arm/imx/imx51_usb.c			imxusb
 attach ehci at imxusbc with imxehci
 file   arch/arm/imx/imxusb.c			imxehci
 
-# attach	wdc at ahb with wdc_ahb : bus_dma_generic
-# file	arch/arm/imx/wdc_axi.c			wdc_axi
-
 # SD host controller for SD/MMC
 attach	sdhc at axi with sdhc_axi
 file	arch/arm/imx/imx51_esdhc.c		sdhc_axi
 
 # iic Controler
-# device	imxi2c: i2cbus
-# file	arch/arm/imx/imx51_i2c.c		imxi2c
-
-# attach	imxi2c at aips with imxi2c_aips
-# file	arch/arm/imx/imxi2c_aips.c		imxi2c_aips
+device	imxi2c: i2cbus
+attach	imxi2c at axi
+file	arch/arm/imx/imxi2c.c		imxi2c
+file	arch/arm/imx/imx51_i2c.c	imxi2c
 
 # SPI bus controlloer
 # attach of this driver need to be specified in paltform configuration
@@ -116,7 +112,7 @@ defparam opt_imxspi.hIMXSPI_DEBUG
 
 # Smart Direct Memory Access Controller
 # device	imxsdma: dmover_service, bus_dma_generic
-# attach	imxsdma at ahb
+# attach	imxsdma at axi
 # file	arch/arm/imx/imxsdma.c		imxsdma
 # file	arch/arm/imx/imxsdmaprog.c		imxsdma
 

Index: src/sys/arch/arm/imx/imxi2creg.h
diff -u src/sys/arch/arm/imx/imxi2creg.h:1.1 src/sys/arch/arm/imx/imxi2creg.h:1.2
--- src/sys/arch/arm/imx/imxi2creg.h:1.1	Sat Nov 13 07:11:03 2010
+++ src/sys/arch/arm/imx/imxi2creg.h	Fri Jul 25 07:07:47 2014
@@ -1,24 +1,53 @@
+/*	$NetBSD: imxi2creg.h,v 1.2 2014/07/25 07:07:47 hkenken Exp $	*/
+
+/*
+ * Copyright (c) 2009  Genetec Corporation.  All rights reserved.
+ * Written by Hashimoto Kenichi for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
 #ifndef _ARM_IMX_IMXI2CREG_H
 #define	_ARM_IMX_IMXI2CREG_H
 
-#define	I2C_IADR	0x00	/* I2C address register */
-#define	I2C_IFDR	0x04	/* I2C frequency divider register */
-#define	I2C_I2CR	0x08	/* I2C control register */
-#define	 I2CR_IEN	0x80	/* I2C enable */
-#define	 I2CR_IIEN	0x40	/* I2C interrupt enable */
-#define	 I2CR_MSTA	0x20	/* Master/slave mode */
-#define	 I2CR_MTX	0x10	/* Transmit/receive mode */
-#define	 I2CR_TXAK	0x08	/* Transmit acknowledge */
-#define	 I2CR_RSTA	0x04	/* Repeat start */
-#define	I2C_I2SR	0x0c	/* I2C status register */
-#define	 I2SR_ICF	0x80	/* Data transferring */
-#define	 I2SR_IAAS	0x40	/* I2C addressed as a slave */
-#define	 I2SR_IBB	0x20	/* I2C busy */
-#define	 I2SR_IAL	0x10	/* I2C Arbitration lost */
-#define	 I2SR_SRW	0x04	/* Slave read/write */
-#define	 I2SR_IIF	0x02	/* I2C interrupt */
-#define	 I2SR_RXAK	0x01	/* Received acknowledge */
-#define	I2C_I2DR	0x10	/* I2C data I/O register */
-#define	I2C_SIZE	0x4000
+#define	I2C_IADR	

CVS commit: src/sys/arch/arm/imx

2014-07-25 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Fri Jul 25 07:49:56 UTC 2014

Modified Files:
src/sys/arch/arm/imx: files.imx51 imx51_ccm.c imx51_ccmreg.h
imx51_ccmvar.h imx51_clock.c imx51_dpllreg.h imx51_gpio.c
imx51_iomuxreg.h imx51_tzic.c imx51_uart.c imx51_usb.c imx51reg.h
imxclock.c imxsdmareg.h imxusb.c imxusbreg.h imxusbvar.h
Added Files:
src/sys/arch/arm/imx: imx50_iomuxreg.h

Log Message:
Add support i.MX50x
* i.MX50 series is e-ink e-reader processor.


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/imx/files.imx51
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/imx50_iomuxreg.h
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/imx/imx51_ccm.c \
src/sys/arch/arm/imx/imxusb.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/imx/imx51_ccmreg.h \
src/sys/arch/arm/imx/imx51_clock.c src/sys/arch/arm/imx/imx51reg.h
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx51_ccmvar.h \
src/sys/arch/arm/imx/imx51_gpio.c src/sys/arch/arm/imx/imx51_iomuxreg.h \
src/sys/arch/arm/imx/imx51_uart.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx51_dpllreg.h \
src/sys/arch/arm/imx/imx51_usb.c src/sys/arch/arm/imx/imxsdmareg.h \
src/sys/arch/arm/imx/imxusbreg.h src/sys/arch/arm/imx/imxusbvar.h
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/imx/imx51_tzic.c \
src/sys/arch/arm/imx/imxclock.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx51
diff -u src/sys/arch/arm/imx/files.imx51:1.10 src/sys/arch/arm/imx/files.imx51:1.11
--- src/sys/arch/arm/imx/files.imx51:1.10	Fri Jul 25 07:07:47 2014
+++ src/sys/arch/arm/imx/files.imx51	Fri Jul 25 07:49:56 2014
@@ -1,10 +1,11 @@
-#	$NetBSD: files.imx51,v 1.10 2014/07/25 07:07:47 hkenken Exp $
+#	$NetBSD: files.imx51,v 1.11 2014/07/25 07:49:56 hkenken Exp $
 #
 # Configuration info for the Freescale i.MX5x
 #
 
 defparam opt_imx.hMEMSIZE
 defflag opt_imx.hIMX51
+defflag opt_imx.hIMX50
 
 define	bus_dma_generic
 
@@ -32,7 +33,8 @@ file	arch/arm/imx/imx51_clock.c
 # Clock Control Module
 device	imxccm
 attach	imxccm	at axi
-file	arch/arm/imx/imx51_ccm.c	imxccm		needs-flag
+file	arch/arm/imx/imx51_ccm.c		imxccm	needs-flag
+defflag opt_imx51clk.hIMXCCMDEBUG
 
 # frequency of external low frequency clock
 # typically 32000, 32768, or 38400.
@@ -63,6 +65,12 @@ device	imxiomux : bus_space_generic
 attach	imxiomux at axi
 file	arch/arm/imx/imx51_iomux.c		imxiomux
 
+# EPDC controller
+# device	epdc : bus_dma_generic, wsemuldisplaydev, rasops16, rasops8, rasops4, rasops_rotation, vcons
+# file	arch/arm/imx/imx50_epdc.c	epdc	 needs-flag
+# defflag opt_imx50_epdc.h		IMXEPDCCONSOLE
+# defparam opt_imx50_epdc.h		EPDC_DEBUG
+
 # IPU v3 controller
 device	ipu : bus_dma_generic, wsemuldisplaydev, rasops16, rasops8, rasops4, rasops_rotation, vcons
 file	arch/arm/imx/imx51_ipuv3.c	ipu	 needs-flag

Index: src/sys/arch/arm/imx/imx51_ccm.c
diff -u src/sys/arch/arm/imx/imx51_ccm.c:1.5 src/sys/arch/arm/imx/imx51_ccm.c:1.6
--- src/sys/arch/arm/imx/imx51_ccm.c:1.5	Sat Mar 22 09:46:33 2014
+++ src/sys/arch/arm/imx/imx51_ccm.c	Fri Jul 25 07:49:56 2014
@@ -1,6 +1,7 @@
-/*	$NetBSD: imx51_ccm.c,v 1.5 2014/03/22 09:46:33 hkenken Exp $	*/
+/*	$NetBSD: imx51_ccm.c,v 1.6 2014/07/25 07:49:56 hkenken Exp $	*/
+
 /*
- * Copyright (c) 2010, 2011, 2012  Genetec Corporation.  All rights reserved.
+ * Copyright (c) 2010-2012, 2014  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -26,11 +27,16 @@
  */
 
 /*
- * Clock Controller Module (CCM)
+ * Clock Controller Module (CCM) for i.MX5
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imx51_ccm.c,v 1.5 2014/03/22 09:46:33 hkenken Exp $);
+__KERNEL_RCSID(0, $NetBSD: imx51_ccm.c,v 1.6 2014/07/25 07:49:56 hkenken Exp $);
+
+#include opt_imx.h
+#include opt_imx51clk.h
+
+#include locators.h
 
 #include sys/types.h
 #include sys/time.h
@@ -47,11 +53,6 @@ __KERNEL_RCSID(0, $NetBSD: imx51_ccm.c,
 #include arm/imx/imx51var.h
 #include arm/imx/imx51reg.h
 
-#include opt_imx51clk.h
-#include locators.h
-
-//#define	IMXCCMDEBUG
-
 #ifndef	IMX51_OSC_FREQ
 #define	IMX51_OSC_FREQ	(24 * 1000 * 1000)	/* 24MHz */
 #endif
@@ -70,6 +71,9 @@ struct imxccm_softc {
 struct imxccm_softc *ccm_softc;
 
 static uint64_t imx51_get_pll_freq(u_int);
+#if IMX50
+static uint64_t imx51_get_pfd_freq(u_int);
+#endif
 
 static int imxccm_match(device_t, cfdata_t, void *);
 static void imxccm_attach(device_t, device_t, void *);
@@ -122,16 +126,21 @@ imxccm_attach(device_t parent, device_t 
 	imx51_get_pll_freq(2);
 	imx51_get_pll_freq(3);
 
-
 	aprint_verbose_dev(self, CPU clock=%d, UART clock=%d\n,
 	imx51_get_clock(IMX51CLK_ARM_ROOT),
 	imx51_get_clock(IMX51CLK_UART_CLK_ROOT));
-	aprint_verbose_dev(self, 
+	aprint_verbose_dev(self, 

CVS commit: src/sys/arch/arm/imx

2014-05-01 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Fri May  2 03:05:41 UTC 2014

Modified Files:
src/sys/arch/arm/imx: imxwdog.c

Log Message:
struct device * - device_t


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imxwdog.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imxwdog.c
diff -u src/sys/arch/arm/imx/imxwdog.c:1.1 src/sys/arch/arm/imx/imxwdog.c:1.2
--- src/sys/arch/arm/imx/imxwdog.c:1.1	Sat Mar 22 04:55:00 2014
+++ src/sys/arch/arm/imx/imxwdog.c	Fri May  2 03:05:41 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imxwdog.c,v 1.1 2014/03/22 04:55:00 hkenken Exp $	*/
+/*	$NetBSD: imxwdog.c,v 1.2 2014/05/02 03:05:41 hkenken Exp $	*/
 
 /*
  * Copyright (c) 2010  Genetec Corporation.  All rights reserved.
@@ -27,7 +27,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imxwdog.c,v 1.1 2014/03/22 04:55:00 hkenken Exp $);
+__KERNEL_RCSID(0, $NetBSD: imxwdog.c,v 1.2 2014/05/02 03:05:41 hkenken Exp $);
 
 #include opt_imx.h
 
@@ -131,7 +131,7 @@ wdog_setmode(struct sysmon_wdog *smw)
 }
 
 void
-wdog_attach_common(struct device *parent, struct device *self,
+wdog_attach_common(device_t parent, device_t self,
 bus_space_tag_t iot, paddr_t addr, size_t size, int irq)
 {
 	struct wdog_softc *sc = device_private(self);



CVS commit: src/sys/arch/arm/imx

2014-03-22 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Sat Mar 22 09:28:08 UTC 2014

Modified Files:
src/sys/arch/arm/imx: files.imx51 imx51_ccm.c imx51_ccmreg.h
Added Files:
src/sys/arch/arm/imx: imx51_spi.c imxcspireg.h imxecspireg.h imxspi.c
imxspireg.h imxspivar.h

Log Message:
Add SPI driver.
i.MX51 have two eCSPI, and one CSPI.


To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/imx/files.imx51
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx51_ccm.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx51_ccmreg.h
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/imx51_spi.c \
src/sys/arch/arm/imx/imxcspireg.h src/sys/arch/arm/imx/imxecspireg.h \
src/sys/arch/arm/imx/imxspi.c src/sys/arch/arm/imx/imxspireg.h \
src/sys/arch/arm/imx/imxspivar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx51
diff -u src/sys/arch/arm/imx/files.imx51:1.7 src/sys/arch/arm/imx/files.imx51:1.8
--- src/sys/arch/arm/imx/files.imx51:1.7	Sat Mar 22 05:19:18 2014
+++ src/sys/arch/arm/imx/files.imx51	Sat Mar 22 09:28:08 2014
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx51,v 1.7 2014/03/22 05:19:18 hkenken Exp $
+#	$NetBSD: files.imx51,v 1.8 2014/03/22 09:28:08 hkenken Exp $
 #
 # Configuration info for the Freescale i.MX51
 #
@@ -104,9 +104,15 @@ file	arch/arm/imx/imx51_esdhc.c		sdhc_ax
 # attach	imxi2c at aips with imxi2c_aips
 # file	arch/arm/imx/imxi2c_aips.c		imxi2c_aips
 
-# spi bus controlloer
-# device	imxspi: spibus
-# file	arch/arm/imx/imx51_spi.c		imxspi
+# SPI bus controlloer
+# attach of this driver need to be specified in paltform configuration
+# use flags to module version
+device  imxspi : spibus
+filearch/arm/imx/imxspi.c			imxspi
+defparam opt_imxspi.h   	IMXSPINSLAVES
+defparam opt_imxspi.hIMXSPI_DEBUG
+# attach	imxspi at axi with imx51_spi
+# file	arch/arm/imx/imx51_spi.c		imx51_spi
 
 # Smart Direct Memory Access Controller
 # device	imxsdma: dmover_service, bus_dma_generic

Index: src/sys/arch/arm/imx/imx51_ccm.c
diff -u src/sys/arch/arm/imx/imx51_ccm.c:1.3 src/sys/arch/arm/imx/imx51_ccm.c:1.4
--- src/sys/arch/arm/imx/imx51_ccm.c:1.3	Wed Sep 19 07:28:38 2012
+++ src/sys/arch/arm/imx/imx51_ccm.c	Sat Mar 22 09:28:08 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_ccm.c,v 1.3 2012/09/19 07:28:38 bsh Exp $	*/
+/*	$NetBSD: imx51_ccm.c,v 1.4 2014/03/22 09:28:08 hkenken Exp $	*/
 /*
  * Copyright (c) 2010, 2011, 2012  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -30,7 +30,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imx51_ccm.c,v 1.3 2012/09/19 07:28:38 bsh Exp $);
+__KERNEL_RCSID(0, $NetBSD: imx51_ccm.c,v 1.4 2014/03/22 09:28:08 hkenken Exp $);
 
 #include sys/types.h
 #include sys/time.h
@@ -146,6 +146,7 @@ imx51_get_clock(enum imx51_clock clk)
 	uint32_t cacrr;	/* ARM clock root register */
 	uint32_t ccsr;
 	uint32_t cscdr1;
+	uint32_t cscdr2;
 	uint32_t cscmr1;
 	uint32_t cbcdr;
 	uint32_t cbcmr;
@@ -293,6 +294,26 @@ imx51_get_clock(enum imx51_clock clk)
 break;
 			}
 		return freq;
+	case IMX51CLK_CSPI_CLK_ROOT:
+		cscmr1 = bus_space_read_4(iot, ioh, CCMC_CSCMR1);
+		cscdr2 = bus_space_read_4(iot, ioh, CCMC_CSCDR2);
+
+		sel = __SHIFTOUT(cscmr1, CSCMR1_CSPI_CLK_SEL);
+		switch (sel) {
+		case 0:
+		case 1:
+		case 2:
+			freq = imx51_get_clock(IMX51CLK_PLL1SW + sel);
+			break;
+		case 3:
+			freq = imx51_get_clock(IMX51CLK_LP_APM);
+			break;
+		}
+
+		freq = freq / (1 + __SHIFTOUT(cscdr2, CSCDR2_ECSPI_CLK_PRED)) /
+		(1 + __SHIFTOUT(cscdr2, CSCDR2_ECSPI_CLK_PODF));
+
+		return freq;
 	default:
 		aprint_error_dev(ccm_softc-sc_dev,
 		clock %d: not supported yet\n, clk);

Index: src/sys/arch/arm/imx/imx51_ccmreg.h
diff -u src/sys/arch/arm/imx/imx51_ccmreg.h:1.2 src/sys/arch/arm/imx/imx51_ccmreg.h:1.3
--- src/sys/arch/arm/imx/imx51_ccmreg.h:1.2	Sat Sep  1 00:07:32 2012
+++ src/sys/arch/arm/imx/imx51_ccmreg.h	Sat Mar 22 09:28:08 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_ccmreg.h,v 1.2 2012/09/01 00:07:32 matt Exp $	*/
+/*	$NetBSD: imx51_ccmreg.h,v 1.3 2014/03/22 09:28:08 hkenken Exp $	*/
 /*
  * Copyright (c) 2011, 2012  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -85,6 +85,7 @@
 #define	CCMC_CSCMR1	0x001c
 #define	 CSCMR1_UART_CLK_SEL_SHIFT	24
 #define	 CSCMR1_UART_CLK_SEL_MASK	__BITS(25, CSCMR1_UART_CLK_SEL_SHIFT)
+#define	 CSCMR1_CSPI_CLK_SEL		__BITS(5, 4)
 #define	CCMC_CSCMR2	0x0020
 #define	CCMC_CSCDR1	0x0024
 #define	 CSCDR1_UART_CLK_PRED_SHIFT	3
@@ -96,6 +97,8 @@
 #define	CCMC_CDCDR	0x0030
 #define	CCMC_CHSCCDR	0x0034		// i.MX6
 #define	CCMC_CSCDR2	0x0038
+#define	 CSCDR2_ECSPI_CLK_PRED		__BITS(27, 25)
+#define	 CSCDR2_ECSPI_CLK_PODF		__BITS(24, 19)
 #define	CCMC_CSCDR3	0x003c
 #define	CCMC_CSCDR4	0x0040
 #define	CCMC_CWDR	0x0044

Added files:

Index: 

CVS commit: src/sys/arch/arm/imx

2014-03-22 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Sat Mar 22 09:46:33 UTC 2014

Modified Files:
src/sys/arch/arm/imx: imx51_ccm.c imx51_ccmreg.h imx51_ccmvar.h
imx51_esdhc.c

Log Message:
Fix SDHC clocks.


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/imx/imx51_ccm.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx51_ccmreg.h
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx51_ccmvar.h \
src/sys/arch/arm/imx/imx51_esdhc.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx51_ccm.c
diff -u src/sys/arch/arm/imx/imx51_ccm.c:1.4 src/sys/arch/arm/imx/imx51_ccm.c:1.5
--- src/sys/arch/arm/imx/imx51_ccm.c:1.4	Sat Mar 22 09:28:08 2014
+++ src/sys/arch/arm/imx/imx51_ccm.c	Sat Mar 22 09:46:33 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_ccm.c,v 1.4 2014/03/22 09:28:08 hkenken Exp $	*/
+/*	$NetBSD: imx51_ccm.c,v 1.5 2014/03/22 09:46:33 hkenken Exp $	*/
 /*
  * Copyright (c) 2010, 2011, 2012  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -30,7 +30,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imx51_ccm.c,v 1.4 2014/03/22 09:28:08 hkenken Exp $);
+__KERNEL_RCSID(0, $NetBSD: imx51_ccm.c,v 1.5 2014/03/22 09:46:33 hkenken Exp $);
 
 #include sys/types.h
 #include sys/time.h
@@ -294,6 +294,52 @@ imx51_get_clock(enum imx51_clock clk)
 break;
 			}
 		return freq;
+	case IMX51CLK_ESDHC2_CLK_ROOT:
+	case IMX51CLK_ESDHC4_CLK_ROOT:
+		cscmr1 = bus_space_read_4(iot, ioh, CCMC_CSCMR1);
+
+		sel = 0;
+		if (clk == IMX51CLK_ESDHC2_CLK_ROOT)
+			sel = __SHIFTOUT(cscmr1, CSCMR1_ESDHC2_CLK_SEL);
+		else if (clk == IMX51CLK_ESDHC4_CLK_ROOT)
+			sel = __SHIFTOUT(cscmr1, CSCMR1_ESDHC4_CLK_SEL);
+
+		if (sel == 0)
+			freq = imx51_get_clock(IMX51CLK_ESDHC1_CLK_ROOT);
+		else
+			freq = imx51_get_clock(IMX51CLK_ESDHC3_CLK_ROOT);
+
+		return freq;
+	case IMX51CLK_ESDHC1_CLK_ROOT:
+	case IMX51CLK_ESDHC3_CLK_ROOT:
+
+		cscdr1 = bus_space_read_4(iot, ioh, CCMC_CSCDR1);
+		cscmr1 = bus_space_read_4(iot, ioh, CCMC_CSCMR1);
+
+		sel = 0;
+		if (clk == IMX51CLK_ESDHC1_CLK_ROOT)
+			sel = __SHIFTOUT(cscmr1, CSCMR1_ESDHC1_CLK_SEL);
+		else if (clk == IMX51CLK_ESDHC3_CLK_ROOT)
+			sel = __SHIFTOUT(cscmr1, CSCMR1_ESDHC3_CLK_SEL);
+
+		switch (sel) {
+		case 0:
+		case 1:
+		case 2:
+			freq = imx51_get_clock(IMX51CLK_PLL1SW + sel);
+			break;
+		case 3:
+			freq = imx51_get_clock(IMX51CLK_LP_APM);
+			break;
+		}
+
+		if (clk == IMX51CLK_ESDHC1_CLK_ROOT)
+			freq = freq / (1 + __SHIFTOUT(cscdr1, CSCDR1_ESDHC1_CLK_PRED)) /
+			(1 + __SHIFTOUT(cscdr1, CSCDR1_ESDHC1_CLK_PODF));
+		else if (clk == IMX51CLK_ESDHC3_CLK_ROOT)
+			freq = freq / (1 + __SHIFTOUT(cscdr1, CSCDR1_ESDHC3_CLK_PRED)) /
+			(1 + __SHIFTOUT(cscdr1, CSCDR1_ESDHC3_CLK_PODF));
+		return freq;
 	case IMX51CLK_CSPI_CLK_ROOT:
 		cscmr1 = bus_space_read_4(iot, ioh, CCMC_CSCMR1);
 		cscdr2 = bus_space_read_4(iot, ioh, CCMC_CSCDR2);

Index: src/sys/arch/arm/imx/imx51_ccmreg.h
diff -u src/sys/arch/arm/imx/imx51_ccmreg.h:1.3 src/sys/arch/arm/imx/imx51_ccmreg.h:1.4
--- src/sys/arch/arm/imx/imx51_ccmreg.h:1.3	Sat Mar 22 09:28:08 2014
+++ src/sys/arch/arm/imx/imx51_ccmreg.h	Sat Mar 22 09:46:33 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_ccmreg.h,v 1.3 2014/03/22 09:28:08 hkenken Exp $	*/
+/*	$NetBSD: imx51_ccmreg.h,v 1.4 2014/03/22 09:46:33 hkenken Exp $	*/
 /*
  * Copyright (c) 2011, 2012  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -85,9 +85,17 @@
 #define	CCMC_CSCMR1	0x001c
 #define	 CSCMR1_UART_CLK_SEL_SHIFT	24
 #define	 CSCMR1_UART_CLK_SEL_MASK	__BITS(25, CSCMR1_UART_CLK_SEL_SHIFT)
+#define	 CSCMR1_ESDHC1_CLK_SEL		__BITS(22, 21)
+#define	 CSCMR1_ESDHC2_CLK_SEL		__BIT(20)
+#define	 CSCMR1_ESDHC4_CLK_SEL		__BIT(19)
+#define	 CSCMR1_ESDHC3_CLK_SEL		__BITS(18, 16)
 #define	 CSCMR1_CSPI_CLK_SEL		__BITS(5, 4)
 #define	CCMC_CSCMR2	0x0020
 #define	CCMC_CSCDR1	0x0024
+#define	 CSCDR1_ESDHC3_CLK_PRED		__BITS(24, 22)
+#define	 CSCDR1_ESDHC3_CLK_PODF		__BITS(21, 19)
+#define	 CSCDR1_ESDHC1_CLK_PRED		__BITS(18, 16)
+#define	 CSCDR1_ESDHC1_CLK_PODF		__BITS(13, 11)
 #define	 CSCDR1_UART_CLK_PRED_SHIFT	3
 #define	 CSCDR1_UART_CLK_PRED_MASK	__BITS(5, CSCDR1_UART_CLK_PRED_SHIFT)
 #define	 CSCDR1_UART_CLK_PODF_SHIFT	0

Index: src/sys/arch/arm/imx/imx51_ccmvar.h
diff -u src/sys/arch/arm/imx/imx51_ccmvar.h:1.1 src/sys/arch/arm/imx/imx51_ccmvar.h:1.2
--- src/sys/arch/arm/imx/imx51_ccmvar.h:1.1	Tue Apr 17 09:33:31 2012
+++ src/sys/arch/arm/imx/imx51_ccmvar.h	Sat Mar 22 09:46:33 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_ccmvar.h,v 1.1 2012/04/17 09:33:31 bsh Exp $	*/
+/*	$NetBSD: imx51_ccmvar.h,v 1.2 2014/03/22 09:46:33 hkenken Exp $	*/
 /*
  * Copyright (c) 2012  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -56,6 +56,7 @@ enum imx51_clock {
 	

CVS commit: src/sys/arch/arm/imx

2014-03-21 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Sat Mar 22 04:55:00 UTC 2014

Modified Files:
src/sys/arch/arm/imx: files.imx51 imxwdogreg.h
Added Files:
src/sys/arch/arm/imx: imx51_wdog.c imxwdog.c imxwdogvar.h

Log Message:
add Watchdog Timer support for i.MX51.


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/imx/files.imx51
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/imx51_wdog.c \
src/sys/arch/arm/imx/imxwdog.c src/sys/arch/arm/imx/imxwdogvar.h
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imxwdogreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx51
diff -u src/sys/arch/arm/imx/files.imx51:1.5 src/sys/arch/arm/imx/files.imx51:1.6
--- src/sys/arch/arm/imx/files.imx51:1.5	Thu Apr 19 09:53:53 2012
+++ src/sys/arch/arm/imx/files.imx51	Sat Mar 22 04:55:00 2014
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx51,v 1.5 2012/04/19 09:53:53 bsh Exp $
+#	$NetBSD: files.imx51,v 1.6 2014/03/22 04:55:00 hkenken Exp $
 #
 # Configuration info for the Freescale i.MX51
 #
@@ -45,6 +45,12 @@ defparam opt_imx51clk.h	IMX51_OSC_FREQ
 defparam opt_imx51clk.h IMX51_AHBCLK_FREQ
 defparam opt_imx51clk.h IMX51_IPGCLK_FREQ
 
+# Watchdog
+device imxwdog: sysmon_wdog
+attach imxwdog at axi
+file   arch/arm/imx/imx51_wdog.c	imxwdog
+file   arch/arm/imx/imxwdog.c		imxwdog
+
 # iMX GPIO
 device	imxgpio: gpiobus
 attach	imxgpio at axi

Index: src/sys/arch/arm/imx/imxwdogreg.h
diff -u src/sys/arch/arm/imx/imxwdogreg.h:1.1 src/sys/arch/arm/imx/imxwdogreg.h:1.2
--- src/sys/arch/arm/imx/imxwdogreg.h:1.1	Sat Nov 13 07:11:03 2010
+++ src/sys/arch/arm/imx/imxwdogreg.h	Sat Mar 22 04:55:00 2014
@@ -42,20 +42,8 @@
  *  2/2010
  */
 
-#ifndef IMXWDOGREG_H
-#define	IMXWDOGREG_H
-
-#ifdef	_LOCORE
-#ifndef	__BIT
-#define	__BIT(n)	(1(n))
-#endif
-#ifndef	__BITS
-#define	__BITS(hi,lo)	(((1((hi)+1))-1)  ~((1((lo))-1))
-#endif
-#else
-#include sys/cdefs.h
-#endif
-
+#ifndef _ARM_IMX_IMXWDOGREG_H
+#define _ARM_IMX_IMXWDOGREG_H
 
 #define	IMX_WDOG_WCR	0x	/* Watchdog Control Register */
 #define	 WCR_WDZST	__BIT(0)	/* watchdog low power */
@@ -65,9 +53,7 @@
 #define	 WCR_SRS	__BIT(4)	/* software reset signal */
 #define	 WCR_WDA	__BIT(5)	/* ipp_wdog* assertion */
 #define	 WCR_WDW	__BIT(7)	/* disable for wait */
-#define	 WCR_WT_SHIFT	8
-#define	 WCR_WT_LEN	8
-#define	 WCR_WT_MASK	__BIT(WCR_WT_SHIFT+WCR_WT_LEN-1, WCR_WT_SHIFT)
+#define	 WCR_WT		__BITS(15, 8)
 	/* watchdog timeout
 	   0=0.5sec 0xff=128sec */
 
@@ -86,17 +72,14 @@
 #define	 WRSR_PWR	__BIT(4)
 #define	 WRSR_JRST	__BIT(5)
 
-
 /* only for i.MX51 */
 #define	IMX_WDOG_WICR	0x0006	/* Watchdog Interrupt Control Register */
-#define	 WICR_WICT_LEN	8
-#define	 WICR_WICT_MASK	__BITS(WICT_LEN-1,0)  /* interrupt count timeout */
+#define	 WICR_WICT	__BITS(7,0)	/* interrupt count timeout */
 #define	 WICR_WTIS	__BIT(14)	/* interrupt status [w1c] */
 #define	 WICR_WIE	__BIT(15)	/* interrupt enable */
 
-
 /* only for i.MX51 */
 #define	IMX_WDOG_WMCR	0x0008
 #define	 WMCR_PDE	__BIT(0)	/* power down enable */
 
-#endif
+#endif /* _ARM_IMX_IMXWDOGREG_H */

Added files:

Index: src/sys/arch/arm/imx/imx51_wdog.c
diff -u /dev/null src/sys/arch/arm/imx/imx51_wdog.c:1.1
--- /dev/null	Sat Mar 22 04:55:00 2014
+++ src/sys/arch/arm/imx/imx51_wdog.c	Sat Mar 22 04:55:00 2014
@@ -0,0 +1,62 @@
+/*	$NetBSD: imx51_wdog.c,v 1.1 2014/03/22 04:55:00 hkenken Exp $	*/
+
+/*
+ * Copyright (c) 2010  Genetec Corporation.  All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include sys/cdefs.h
+__KERNEL_RCSID(0, $NetBSD: imx51_wdog.c,v 1.1 

CVS commit: src/sys/arch/arm/imx

2014-03-21 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Sat Mar 22 05:19:18 UTC 2014

Modified Files:
src/sys/arch/arm/imx: files.imx51 imxgpio.c

Log Message:
* GPIO interrupts of i.MX5 are divided into two groups.
  add IMX_GPIO_INTR_SPLIT option
* Support GPIO both edge trigger interrupt.


To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/imx/files.imx51
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imxgpio.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx51
diff -u src/sys/arch/arm/imx/files.imx51:1.6 src/sys/arch/arm/imx/files.imx51:1.7
--- src/sys/arch/arm/imx/files.imx51:1.6	Sat Mar 22 04:55:00 2014
+++ src/sys/arch/arm/imx/files.imx51	Sat Mar 22 05:19:18 2014
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx51,v 1.6 2014/03/22 04:55:00 hkenken Exp $
+#	$NetBSD: files.imx51,v 1.7 2014/03/22 05:19:18 hkenken Exp $
 #
 # Configuration info for the Freescale i.MX51
 #
@@ -56,6 +56,7 @@ device	imxgpio: gpiobus
 attach	imxgpio at axi
 file	arch/arm/imx/imxgpio.c		imxgpio		needs-flag
 file	arch/arm/imx/imx51_gpio.c	imxgpio
+defflag opt_imxgpio.h			IMX_GPIO_INTR_SPLIT
 
 # iMX IOMUX
 device	imxiomux : bus_space_generic

Index: src/sys/arch/arm/imx/imxgpio.c
diff -u src/sys/arch/arm/imx/imxgpio.c:1.3 src/sys/arch/arm/imx/imxgpio.c:1.4
--- src/sys/arch/arm/imx/imxgpio.c:1.3	Sat Oct 27 17:17:39 2012
+++ src/sys/arch/arm/imx/imxgpio.c	Sat Mar 22 05:19:18 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imxgpio.c,v 1.3 2012/10/27 17:17:39 chs Exp $ */
+/*	$NetBSD: imxgpio.c,v 1.4 2014/03/22 05:19:18 hkenken Exp $ */
 
 /*-
  * Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -29,12 +29,13 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imxgpio.c,v 1.3 2012/10/27 17:17:39 chs Exp $);
+__KERNEL_RCSID(0, $NetBSD: imxgpio.c,v 1.4 2014/03/22 05:19:18 hkenken Exp $);
 
 #define	_INTR_PRIVATE
 
 #include locators.h
 #include gpio.h
+#include opt_imxgpio.h
 
 #include sys/param.h
 #include sys/evcnt.h
@@ -82,7 +83,12 @@ const struct pic_ops gpio_pic_ops = {
 struct gpio_softc {
 	device_t gpio_dev;
 	struct pic_softc gpio_pic;
+#if defined(IMX_GPIO_INTR_SPLIT)
+	struct intrsource *gpio_is_0_15;
+	struct intrsource *gpio_is_16_31;
+#else
 	struct intrsource *gpio_is;
+#endif
 	bus_space_tag_t gpio_memt;
 	bus_space_handle_t gpio_memh;
 	uint32_t gpio_enable_mask;
@@ -174,6 +180,25 @@ gpio_pic_find_pending_irqs(struct pic_so
 		KASSERT(pending != 0);
 		irq = 31 - __builtin_clz(pending);
 		pending = ~__BIT(irq);
+
+		const struct intrsource *is = pic-pic_sources[irq];
+		if (is-is_type == IST_EDGE_BOTH) {
+			/*
+			 * for both edge
+			 */
+			uint32_t icr_reg = GPIO_ICR1 + ((is-is_irq  0x10)  2);
+			v = GPIO_READ(gpio, icr_reg);
+			uint32_t icr_shift = (is-is_irq  0x0f)  1;
+			uint32_t mask = (3  icr_shift);
+			int gtype = __SHIFTOUT(v, mask);
+			if (gtype == GPIO_ICR_EDGE_RISING)
+gtype = GPIO_ICR_EDGE_FALLING;
+			else if (gtype == GPIO_ICR_EDGE_FALLING)
+gtype = GPIO_ICR_EDGE_RISING;
+			v = ~mask;
+			v |= __SHIFTIN(gtype, mask);
+			GPIO_WRITE(gpio, icr_reg, v);
+		}
 		pic_mark_pending(gpio-gpio_pic, irq);
 	} while (pending != 0);
 
@@ -184,7 +209,8 @@ gpio_pic_find_pending_irqs(struct pic_so
 	((GPIO_ICR_LEVEL_LOW  (2*IST_LEVEL_LOW)) | \
 	 (GPIO_ICR_LEVEL_HIGH  (2*IST_LEVEL_HIGH)) | \
 	 (GPIO_ICR_EDGE_RISING  (2*IST_EDGE_RISING)) | \
-	 (GPIO_ICR_EDGE_FALLING  (2*IST_EDGE_FALLING)))
+	 (GPIO_ICR_EDGE_FALLING  (2*IST_EDGE_FALLING)) | \
+	 (GPIO_ICR_EDGE_RISING  (2*IST_EDGE_BOTH)))
 
 void
 gpio_pic_establish_irq(struct pic_softc *pic, struct intrsource *is)
@@ -341,9 +367,18 @@ imxgpio_attach_common(device_t self, bus
 		aprint_normal(: interrupts %d..%d,
 		irqbase, irqbase + GPIO_NPINS - 1);
 
+#if defined(IMX_GPIO_INTR_SPLIT)
+		gpio-gpio_is_0_15 = intr_establish(intr,
+		IPL_NET, IST_LEVEL, pic_handle_intr, gpio-gpio_pic);
+		KASSERT( gpio-gpio_is_0_15 != NULL );
+		gpio-gpio_is_16_31 = intr_establish(intr + 1,
+		IPL_NET, IST_LEVEL, pic_handle_intr, gpio-gpio_pic);
+		KASSERT( gpio-gpio_is_16_31 != NULL );
+#else
 		gpio-gpio_is = intr_establish(intr,
 		IPL_NET, IST_LEVEL, pic_handle_intr, gpio-gpio_pic);
 		KASSERT( gpio-gpio_is != NULL );
+#endif
 	}
 	aprint_normal(\n);
 		  



CVS commit: src/sys/arch/arm/imx

2014-03-10 Thread Nick Hudson
Module Name:src
Committed By:   skrll
Date:   Mon Mar 10 09:35:18 UTC 2014

Modified Files:
src/sys/arch/arm/imx: imx51_tzic.c

Log Message:
Assume reads from hardware do something even if the result isn't required.

Hi htodd@!


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/imx/imx51_tzic.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx51_tzic.c
diff -u src/sys/arch/arm/imx/imx51_tzic.c:1.5 src/sys/arch/arm/imx/imx51_tzic.c:1.6
--- src/sys/arch/arm/imx/imx51_tzic.c:1.5	Mon Mar 10 04:25:51 2014
+++ src/sys/arch/arm/imx/imx51_tzic.c	Mon Mar 10 09:35:18 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_tzic.c,v 1.5 2014/03/10 04:25:51 htodd Exp $	*/
+/*	$NetBSD: imx51_tzic.c,v 1.6 2014/03/10 09:35:18 skrll Exp $	*/
 
 /*-
  * Copyright (c) 2010 SHIMIZU Ryo r...@nerv.org
@@ -26,7 +26,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imx51_tzic.c,v 1.5 2014/03/10 04:25:51 htodd Exp $);
+__KERNEL_RCSID(0, $NetBSD: imx51_tzic.c,v 1.6 2014/03/10 09:35:18 skrll Exp $);
 
 #define	_INTR_PRIVATE	/* for arm/pic/picvar.h */
 
@@ -262,10 +262,14 @@ tzic_intr_init(struct tzic_softc * const
 
 	disable_interrupts(I32_bit|F32_bit);
 
+	(void) INTC_READ(tzic, TZIC_INTCNTL);
 	INTC_WRITE(tzic, TZIC_INTCNTL, INTCNTL_NSEN_MASK|INTCNTL_NSEN|INTCNTL_EN);
+	(void) INTC_READ(tzic, TZIC_INTCNTL);
 	INTC_WRITE(tzic, TZIC_PRIOMASK, SW_TO_HW_IPL(IPL_NONE));
+	(void) INTC_READ(tzic, TZIC_PRIOMASK);
 
 	INTC_WRITE(tzic, TZIC_SYNCCTRL, 0x00);
+	(void) INTC_READ(tzic, TZIC_SYNCCTRL);
 
 	/* route all interrupts to IRQ.  secure interrupts are for FIQ */
 	for (i = 0; i  4; i++)



CVS commit: src/sys/arch/arm/imx

2014-02-26 Thread Kenichi Hashimoto
Module Name:src
Committed By:   hkenken
Date:   Thu Feb 27 03:09:58 UTC 2014

Modified Files:
src/sys/arch/arm/imx: imx51_tzicreg.h

Log Message:
fix typo.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx51_tzicreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx51_tzicreg.h
diff -u src/sys/arch/arm/imx/imx51_tzicreg.h:1.1 src/sys/arch/arm/imx/imx51_tzicreg.h:1.2
--- src/sys/arch/arm/imx/imx51_tzicreg.h:1.1	Sat Nov 13 07:11:03 2010
+++ src/sys/arch/arm/imx/imx51_tzicreg.h	Thu Feb 27 03:09:57 2014
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_tzicreg.h,v 1.1 2010/11/13 07:11:03 bsh Exp $	*/
+/*	$NetBSD: imx51_tzicreg.h,v 1.2 2014/02/27 03:09:57 hkenken Exp $	*/
 /*
  * Copyright (c) 2010  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -25,7 +25,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #ifndef _ARM_IMX_IMX51_TZICREG_H_
-#define	_ARM_IMX_IMX51_TZICRREG_H_
+#define	_ARM_IMX_IMX51_TZICREG_H_
 
 #include sys/cdefs.h
 
@@ -50,4 +50,4 @@
 #define	TZIC_SWINT		0x0f00
 
 #define	TZIC_INTNUM		128
-#endif /* _ARM_IMX_IMX51_TZICRREG_H_ */
+#endif /* _ARM_IMX_IMX51_TZICREG_H_ */



CVS commit: src/sys/arch/arm/imx

2014-02-25 Thread Martin Husemann
Module Name:src
Committed By:   martin
Date:   Tue Feb 25 08:39:39 UTC 2014

Modified Files:
src/sys/arch/arm/imx: imx23_icoll.c

Log Message:
Add missing include of arm/cpufunc.h.
Pointed out by Tero Koskinen.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx23_icoll.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx23_icoll.c
diff -u src/sys/arch/arm/imx/imx23_icoll.c:1.2 src/sys/arch/arm/imx/imx23_icoll.c:1.3
--- src/sys/arch/arm/imx/imx23_icoll.c:1.2	Sun Dec 16 19:40:00 2012
+++ src/sys/arch/arm/imx/imx23_icoll.c	Tue Feb 25 08:39:39 2014
@@ -1,4 +1,4 @@
-/* $Id: imx23_icoll.c,v 1.2 2012/12/16 19:40:00 jkunz Exp $ */
+/* $Id: imx23_icoll.c,v 1.3 2014/02/25 08:39:39 martin Exp $ */
 
 /*
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -36,6 +36,8 @@
 #include sys/errno.h
 #include sys/systm.h
 
+#include arm/cpufunc.h
+
 #define _INTR_PRIVATE
 #include arm/pic/picvar.h
 



CVS commit: src/sys/arch/arm/imx

2012-12-16 Thread Jochen Kunz
Module Name:src
Committed By:   jkunz
Date:   Sun Dec 16 19:40:01 UTC 2012

Modified Files:
src/sys/arch/arm/imx: imx23_apbdma.c imx23_icoll.c imx23_icollreg.h
imx23_timrot.c

Log Message:
Contribution from Petri Laakso: Fix some spelling.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx23_apbdma.c \
src/sys/arch/arm/imx/imx23_icoll.c src/sys/arch/arm/imx/imx23_icollreg.h \
src/sys/arch/arm/imx/imx23_timrot.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx23_apbdma.c
diff -u src/sys/arch/arm/imx/imx23_apbdma.c:1.1 src/sys/arch/arm/imx/imx23_apbdma.c:1.2
--- src/sys/arch/arm/imx/imx23_apbdma.c:1.1	Tue Nov 20 19:06:12 2012
+++ src/sys/arch/arm/imx/imx23_apbdma.c	Sun Dec 16 19:40:00 2012
@@ -1,4 +1,4 @@
-/* $Id: imx23_apbdma.c,v 1.1 2012/11/20 19:06:12 jkunz Exp $ */
+/* $Id: imx23_apbdma.c,v 1.2 2012/12/16 19:40:00 jkunz Exp $ */
 
 /*
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -184,7 +184,7 @@ apbdma_activate(device_t self, enum deva
 /*
  * Reset the APB{H,X}DMA block.
  *
- * Inspired by i.MX233 RM 39.3.10 Correct Way to Soft Reset a Block
+ * Inspired by i.MX23 RM 39.3.10 Correct Way to Soft Reset a Block
  */
 static void
 apbdma_reset(struct apbdma_softc *sc)
Index: src/sys/arch/arm/imx/imx23_icoll.c
diff -u src/sys/arch/arm/imx/imx23_icoll.c:1.1 src/sys/arch/arm/imx/imx23_icoll.c:1.2
--- src/sys/arch/arm/imx/imx23_icoll.c:1.1	Tue Nov 20 19:06:13 2012
+++ src/sys/arch/arm/imx/imx23_icoll.c	Sun Dec 16 19:40:00 2012
@@ -1,4 +1,4 @@
-/* $Id: imx23_icoll.c,v 1.1 2012/11/20 19:06:13 jkunz Exp $ */
+/* $Id: imx23_icoll.c,v 1.2 2012/12/16 19:40:00 jkunz Exp $ */
 
 /*
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -317,7 +317,7 @@ icoll_activate(device_t self, enum devac
 /*
  * Reset the ICOLL block.
  *
- * Inspired by i.MX233 RM 39.3.10 Correct Way to Soft Reset a Block
+ * Inspired by i.MX23 RM 39.3.10 Correct Way to Soft Reset a Block
  */
 static void
 icoll_reset(struct icoll_softc *sc)
Index: src/sys/arch/arm/imx/imx23_icollreg.h
diff -u src/sys/arch/arm/imx/imx23_icollreg.h:1.1 src/sys/arch/arm/imx/imx23_icollreg.h:1.2
--- src/sys/arch/arm/imx/imx23_icollreg.h:1.1	Tue Nov 20 19:06:13 2012
+++ src/sys/arch/arm/imx/imx23_icollreg.h	Sun Dec 16 19:40:00 2012
@@ -1,4 +1,4 @@
-/* $Id: imx23_icollreg.h,v 1.1 2012/11/20 19:06:13 jkunz Exp $ */
+/* $Id: imx23_icollreg.h,v 1.2 2012/12/16 19:40:00 jkunz Exp $ */
 
 /*
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -38,7 +38,7 @@
 #define HW_ICOLL_SIZE 0x2000
 
 /*
- * IRQ numbers known to i.MX233.
+ * IRQ numbers known to i.MX23.
  */
 #define IRQ_DEBUG_UART		0 /* Non DMA on the debug UART */
 #define IRQ_COMMS_RX		1 /* JTAG debug communications port */
@@ -125,7 +125,7 @@
 
 		/* IRQ's 66-127 are reserved. */
 
-#define IRQ_MAX			127 /* Number or IRQ registers on i.MX233. */
+#define IRQ_MAX			127 /* Number or IRQ registers on i.MX23. */
 
 
 /*
Index: src/sys/arch/arm/imx/imx23_timrot.c
diff -u src/sys/arch/arm/imx/imx23_timrot.c:1.1 src/sys/arch/arm/imx/imx23_timrot.c:1.2
--- src/sys/arch/arm/imx/imx23_timrot.c:1.1	Tue Nov 20 19:06:14 2012
+++ src/sys/arch/arm/imx/imx23_timrot.c	Sun Dec 16 19:40:00 2012
@@ -1,4 +1,4 @@
-/* $Id: imx23_timrot.c,v 1.1 2012/11/20 19:06:14 jkunz Exp $ */
+/* $Id: imx23_timrot.c,v 1.2 2012/12/16 19:40:00 jkunz Exp $ */
 
 /*
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -290,7 +290,7 @@ stattimer_irq(void *frame)
 /*
  * Reset the TIMROT block.
  *
- * Inspired by i.MX233 RM 39.3.10 Correct Way to Soft Reset a Block
+ * Inspired by i.MX23 RM 39.3.10 Correct Way to Soft Reset a Block
  */
 static void
 timrot_reset(void)



CVS commit: src/sys/arch/arm/imx

2012-11-22 Thread Matt Thomas
Module Name:src
Committed By:   matt
Date:   Fri Nov 23 02:17:15 UTC 2012

Modified Files:
src/sys/arch/arm/imx: imxusb.c

Log Message:
Enable ETTF.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imxusb.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imxusb.c
diff -u src/sys/arch/arm/imx/imxusb.c:1.3 src/sys/arch/arm/imx/imxusb.c:1.4
--- src/sys/arch/arm/imx/imxusb.c:1.3	Mon Nov 12 18:00:37 2012
+++ src/sys/arch/arm/imx/imxusb.c	Fri Nov 23 02:17:15 2012
@@ -1,4 +1,4 @@
-/*	$NetBSD: imxusb.c,v 1.3 2012/11/12 18:00:37 skrll Exp $	*/
+/*	$NetBSD: imxusb.c,v 1.4 2012/11/23 02:17:15 matt Exp $	*/
 /*
  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi and Hiroyuki Bessho for Genetec Corporation.
@@ -25,7 +25,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imxusb.c,v 1.3 2012/11/12 18:00:37 skrll Exp $);
+__KERNEL_RCSID(0, $NetBSD: imxusb.c,v 1.4 2012/11/23 02:17:15 matt Exp $);
 
 #include sys/param.h
 #include sys/systm.h
@@ -93,6 +93,7 @@ imxehci_attach(device_t parent, device_t
 	sc-sc_unit = aa-aa_unit;
 	sc-sc_usbc = usbc;
 	hsc-sc_bus.hci_private = sc;
+	hsc-sc_flags |= EHCIF_ETTF;
 
 	aprint_normal(\n);
 



CVS commit: src/sys/arch/arm/imx

2012-09-19 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Wed Sep 19 07:28:39 UTC 2012

Modified Files:
src/sys/arch/arm/imx: imx51_ccm.c

Log Message:
make Netwalker kernel compile again.
from Kenichi Hashimoto.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx51_ccm.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx51_ccm.c
diff -u src/sys/arch/arm/imx/imx51_ccm.c:1.2 src/sys/arch/arm/imx/imx51_ccm.c:1.3
--- src/sys/arch/arm/imx/imx51_ccm.c:1.2	Sat Sep  1 00:07:32 2012
+++ src/sys/arch/arm/imx/imx51_ccm.c	Wed Sep 19 07:28:38 2012
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_ccm.c,v 1.2 2012/09/01 00:07:32 matt Exp $	*/
+/*	$NetBSD: imx51_ccm.c,v 1.3 2012/09/19 07:28:38 bsh Exp $	*/
 /*
  * Copyright (c) 2010, 2011, 2012  Genetec Corporation.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec Corporation.
@@ -30,7 +30,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imx51_ccm.c,v 1.2 2012/09/01 00:07:32 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: imx51_ccm.c,v 1.3 2012/09/19 07:28:38 bsh Exp $);
 
 #include sys/types.h
 #include sys/time.h
@@ -141,7 +141,7 @@ imx51_get_clock(enum imx51_clock clk)
 	bus_space_tag_t iot = ccm_softc-sc_iot;
 	bus_space_handle_t ioh = ccm_softc-sc_ioh;
 
-	u_int freq;
+	u_int freq = 0;
 	u_int sel;
 	uint32_t cacrr;	/* ARM clock root register */
 	uint32_t ccsr;
@@ -164,17 +164,17 @@ imx51_get_clock(enum imx51_clock clk)
 		/* FALLTHROUGH */
 	case IMX51CLK_PLL1STEP:
 		ccsr = bus_space_read_4(iot, ioh, CCMC_CCSR);
-		switch (__SHIFTOUT(ccsr, CCSR_STEP_SEL)) {
+		switch (__SHIFTOUT(ccsr, CCSR_STEP_SEL_MASK)) {
 		case 0:
 			return imx51_get_clock(IMX51CLK_LP_APM);
 		case 1:
 			return 0; /* XXX PLL bypass clock */
 		case 2:
 			return ccm_softc-sc_pll[2-1].pll_freq /
-			(1 + __SHIFTOUT(ccsr, CCSR_PLL2_DIV_PODF));
+			(1 + __SHIFTOUT(ccsr, CCSR_PLL2_DIV_PODF_MASK));
 		case 3:
 			return ccm_softc-sc_pll[3-1].pll_freq /
-			(1 + __SHIFTOUT(ccsr  CCSR_PLL3_DIV_PODF))
+			(1 + __SHIFTOUT(ccsr, CCSR_PLL3_DIV_PODF_MASK));
 		}
 		/*NOTREACHED*/
 	case IMX51CLK_PLL2SW:
@@ -204,9 +204,8 @@ imx51_get_clock(enum imx51_clock clk)
 		if ((cbcdr  CBCDR_PERIPH_CLK_SEL) == 0)
 			freq = imx51_get_clock(IMX51CLK_PLL2SW);
 		else {
-			freq = 0;
 			cbcmr = bus_space_read_4(iot, ioh,  CCMC_CBCMR);
-			switch (__SHIFTOUT(cbcmr, CBCMR_PERIPH_APM_SEL)) {
+			switch (__SHIFTOUT(cbcmr, CBCMR_PERIPH_APM_SEL_MASK)) {
 			case 0:
 freq = imx51_get_clock(IMX51CLK_PLL1SW);
 break;
@@ -225,16 +224,15 @@ imx51_get_clock(enum imx51_clock clk)
 	case IMX51CLK_MAIN_BUS_CLK:
 		freq = imx51_get_clock(IMX51CLK_MAIN_BUS_CLK_SRC);
 		cdcr = bus_space_read_4(iot, ioh, CCMC_CDCR);
-		return freq / __SHIFTOUT(cdcr, CDCR_PERIPH_CLK_DVFS_PODF);
+		return freq / __SHIFTOUT(cdcr, CDCR_PERIPH_CLK_DVFS_PODF_MASK);
 	case IMX51CLK_AHB_CLK_ROOT:
 		freq = imx51_get_clock(IMX51CLK_MAIN_BUS_CLK);
 		cbcdr = bus_space_read_4(iot, ioh, CCMC_CBCDR);
-		return freq / (1 + __SHIFTOUT(cbcdr, CBCDR_AHB_PODF));
+		return freq / (1 + __SHIFTOUT(cbcdr, CBCDR_AHB_PODF_MASK));
 	case IMX51CLK_IPG_CLK_ROOT:
 		freq = imx51_get_clock(IMX51CLK_AHB_CLK_ROOT);
 		cbcdr = bus_space_read_4(iot, ioh, CCMC_CBCDR);
-		return freq / (1 + __SHIFTOUT(cbcdr, CBCDR_IPG_PODF));
-
+		return freq / (1 + __SHIFTOUT(cbcdr, CBCDR_IPG_PODF_MASK));
 	case IMX51CLK_PERCLK_ROOT:
 		cbcmr = bus_space_read_4(iot, ioh, CCMC_CBCMR);
 		if (cbcmr  CBCMR_PERCLK_IPG_SEL)
@@ -243,15 +241,16 @@ imx51_get_clock(enum imx51_clock clk)
 			freq = imx51_get_clock(IMX51CLK_LP_APM);
 		else
 			freq = imx51_get_clock(IMX51CLK_MAIN_BUS_CLK_SRC);
+
 		cbcdr = bus_space_read_4(iot, ioh, CCMC_CBCDR);
 
 #ifdef IMXCCMDEBUG
 		printf(cbcmr=%x cbcdr=%x\n, cbcmr, cbcdr);
 #endif
 
-		freq /= 1 + __SHIFTOUT(cbcdr  CBCDR_PERCLK_PRED1);
-		freq /= 1 + __SHIFTOUT(cbcdr  CBCDR_PERCLK_PRED2);
-		freq /= 1 + __SHIFTOUT(cbcdr  CBCDR_PERCLK_PODF);
+		freq /= 1 + __SHIFTOUT(cbcdr, CBCDR_PERCLK_PRED1_MASK);
+		freq /= 1 + __SHIFTOUT(cbcdr, CBCDR_PERCLK_PRED2_MASK);
+		freq /= 1 + __SHIFTOUT(cbcdr, CBCDR_PERCLK_PODF_MASK);
 		return freq;
 	case IMX51CLK_UART_CLK_ROOT:
 		cscdr1 = bus_space_read_4(iot, ioh, CCMC_CSCDR1);
@@ -261,9 +260,8 @@ imx51_get_clock(enum imx51_clock clk)
 		printf(cscdr1=%x cscmr1=%x\n, cscdr1, cscmr1);
 #endif
 
-		sel = __SHIFTOUT(cscmr1  CSCMR1_UART_CLK_SEL);
+		sel = __SHIFTOUT(cscmr1, CSCMR1_UART_CLK_SEL_MASK);
 
-		freq = 0; /* shut up GCC */
 		switch (sel) {
 		case 0:
 		case 1:
@@ -275,12 +273,11 @@ imx51_get_clock(enum imx51_clock clk)
 			break;
 		}
 
-		return freq / (1 + __SHIFTOUT(cscdr1. CSCDR1_UART_CLK_PRED));
-			/ (1 + __SHIFTOUT(cscdr1, CSCDR1_UART_CLK_PODF));
+		return freq / (1 + __SHIFTOUT(cscdr1, CSCDR1_UART_CLK_PRED_MASK)) /
+		(1 + __SHIFTOUT(cscdr1, CSCDR1_UART_CLK_PODF_MASK));
 	case IMX51CLK_IPU_HSP_CLK_ROOT:
-		freq = 0;
 		cbcmr = 

CVS commit: src/sys/arch/arm/imx

2012-05-20 Thread Matt Thomas
Module Name:src
Committed By:   matt
Date:   Sun May 20 14:08:18 UTC 2012

Modified Files:
src/sys/arch/arm/imx: imxclock.c

Log Message:
Fix call of imxclock.  Patch from PR/45359.


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/imx/imxclock.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imxclock.c
diff -u src/sys/arch/arm/imx/imxclock.c:1.5 src/sys/arch/arm/imx/imxclock.c:1.6
--- src/sys/arch/arm/imx/imxclock.c:1.5	Tue Apr 17 09:33:31 2012
+++ src/sys/arch/arm/imx/imxclock.c	Sun May 20 14:08:18 2012
@@ -1,4 +1,4 @@
-/*	$NetBSD: imxclock.c,v 1.5 2012/04/17 09:33:31 bsh Exp $ */
+/*	$NetBSD: imxclock.c,v 1.6 2012/05/20 14:08:18 matt Exp $ */
 /*
  * Copyright (c) 2009, 2010  Genetec corp.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec corp.
@@ -104,7 +104,7 @@ cpu_initclocks(void)
 	EPIT_EPITCR, reg);
 
 	epit1_sc-sc_ih = intr_establish(epit1_sc-sc_intr, IPL_CLOCK,
-	IST_LEVEL, imxclock_intr, epit1_sc);
+	IST_LEVEL, imxclock_intr, NULL);
 }
 
 #if 0
@@ -122,7 +122,7 @@ setstatclockrate(int schz)
 static int
 imxclock_intr(void *arg)
 {
-	struct imxclock_softc *sc = arg;
+	struct imxclock_softc *sc = epit1_sc;
 
 	bus_space_write_4(sc-sc_iot, sc-sc_ioh, EPIT_EPITSR, 1);
 	atomic_add_32(imxclock_base, sc-sc_reload_value);



CVS commit: src/sys/arch/arm/imx

2012-04-17 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Tue Apr 17 09:12:08 UTC 2012

Modified Files:
src/sys/arch/arm/imx: imxepitreg.h

Log Message:
add bit definitions for i.MX51 EPIT


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imxepitreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imxepitreg.h
diff -u src/sys/arch/arm/imx/imxepitreg.h:1.1 src/sys/arch/arm/imx/imxepitreg.h:1.2
--- src/sys/arch/arm/imx/imxepitreg.h:1.1	Sat Nov 13 06:51:37 2010
+++ src/sys/arch/arm/imx/imxepitreg.h	Tue Apr 17 09:12:08 2012
@@ -1,6 +1,6 @@
-/*	$NetBSD: imxepitreg.h,v 1.1 2010/11/13 06:51:37 bsh Exp $ */
+/*	$NetBSD: imxepitreg.h,v 1.2 2012/04/17 09:12:08 bsh Exp $ */
 /*
- * Copyright (c) 2009, 2010  Genetec corp.  All rights reserved.
+ * Copyright (c) 2009, 2010, 2012  Genetec corp.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec corp.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -37,11 +37,15 @@
 #define	 EPITCR_IOVW	__BIT(17)
 #define	 EPITCR_DBGEN	__BIT(18)
 #define	 EPITCR_WAITEN	__BIT(19)
-#define	 EPITCR_DOZEN	__BIT(20)
+#define	 EPITCR_DOZEN	__BIT(20)	/* not in iMX51 */
 #define	 EPITCR_STOPEN	__BIT(21)
 #define	 EPITCR_OM	__BITS(22,23)
-#define	 EPITCR_CLKSRC_MASK	__BITS(24,25)
-#define	 EPITCR_CLKSRC_HIGH	(0x2  24)
+#define	 EPITCR_CLKSRC_SHIFT	24
+#define	 EPITCR_CLKSRC_MASK	__BITS(25, EPITCR_CLKSRC_SHIFT)
+#define	 EPITCR_CLKSRC_IPG	(1  EPITCR_CLKSRC_SHIFT)
+#define	 EPITCR_CLKSRC_IPGHIGH	(2  EPITCR_CLKSRC_SHIFT)
+#define	 EPITCR_CLKSRC_IPG32K	(3  EPITCR_CLKSRC_SHIFT)
+#define	 EPITCR_CLKSRC_HIGH	(2  EPITCR_CLKSRC_SHIFT)
 
 #define	EPIT_EPITSR	0x0004
 #define	EPIT_EPITLR	0x0008



CVS commit: src/sys/arch/arm/imx

2012-04-17 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Wed Apr 18 05:54:08 UTC 2012

Modified Files:
src/sys/arch/arm/imx: imx31_clock.c

Log Message:
adapt to imxclock.c rev 1.5.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx31_clock.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx31_clock.c
diff -u src/sys/arch/arm/imx/imx31_clock.c:1.3 src/sys/arch/arm/imx/imx31_clock.c:1.4
--- src/sys/arch/arm/imx/imx31_clock.c:1.3	Fri Jul  1 20:27:50 2011
+++ src/sys/arch/arm/imx/imx31_clock.c	Wed Apr 18 05:54:07 2012
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx31_clock.c,v 1.3 2011/07/01 20:27:50 dyoung Exp $ */
+/*	$NetBSD: imx31_clock.c,v 1.4 2012/04/18 05:54:07 bsh Exp $ */
 /*
  * Copyright (c) 2009,2010  Genetec corp.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec corp.
@@ -106,6 +106,8 @@ imxclock_attach(device_t parent, device_
 		aipsa-aipsa_size, 0, sc-sc_ioh)) {
 		panic(%s: Cannot map registers, device_xname(self));
 	}
+
+	sc-sc_clksrc = EPITCR_CLKSRC_HIGH;
 }
 
 int



CVS commit: src/sys/arch/arm/imx

2012-04-15 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Sun Apr 15 09:51:31 UTC 2012

Modified Files:
src/sys/arch/arm/imx: imx51_iomux.c

Log Message:
delete unused reference.
delete trailing whitespace, and NKF.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx51_iomux.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx51_iomux.c
diff -u src/sys/arch/arm/imx/imx51_iomux.c:1.2 src/sys/arch/arm/imx/imx51_iomux.c:1.3
--- src/sys/arch/arm/imx/imx51_iomux.c:1.2	Fri Jul  1 20:27:50 2011
+++ src/sys/arch/arm/imx/imx51_iomux.c	Sun Apr 15 09:51:31 2012
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_iomux.c,v 1.2 2011/07/01 20:27:50 dyoung Exp $	*/
+/*	$NetBSD: imx51_iomux.c,v 1.3 2012/04/15 09:51:31 bsh Exp $	*/
 
 /*
  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
@@ -26,7 +26,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imx51_iomux.c,v 1.2 2011/07/01 20:27:50 dyoung Exp $);
+__KERNEL_RCSID(0, $NetBSD: imx51_iomux.c,v 1.3 2012/04/15 09:51:31 bsh Exp $);
 
 #define	_INTR_PRIVATE
 
@@ -56,8 +56,6 @@ struct iomux_softc {
 	bus_space_handle_t iomux_memh;
 };
 
-extern struct cfdriver imxiomux_cd;
-
 #define	IOMUX_READ(iomux, reg) \
 	bus_space_read_4((iomux)-iomux_memt, (iomux)-iomux_memh, (reg))
 #define	IOMUX_WRITE(iomux, reg, val) \
@@ -68,10 +66,8 @@ static void iomux_attach(device_t, devic
 
 static struct iomux_softc *iomuxsc = NULL;
 
-CFATTACH_DECL(imxiomux,
-	  sizeof(struct iomux_softc),
-	  iomux_match, iomux_attach,
-	  NULL, NULL);
+CFATTACH_DECL_NEW(imxiomux, sizeof(struct iomux_softc),
+iomux_match, iomux_attach, NULL, NULL);
 
 int
 iomux_match(device_t parent, cfdata_t cfdata, void *aux)
@@ -160,7 +156,7 @@ iomux_mux_config(const struct iomux_conf
 
 	for (i = 0; conflist[i].pin != IOMUX_CONF_EOT; i++) {
 		iomux_set_pad_sub(iomuxsc, conflist[i].pin, conflist[i].pad);
-		iomux_set_function_sub(iomuxsc, conflist[i].pin, 
+		iomux_set_function_sub(iomuxsc, conflist[i].pin,
 		conflist[i].mux);
 	}
 }
@@ -172,7 +168,7 @@ iomux_input_config(const struct iomux_in
 	int i;
 
 	for (i = 0; conflist[i].inout != -1; i++) {
-		iomux_set_inout(iomuxsc, conflist[i].inout, 
+		iomux_set_inout(iomuxsc, conflist[i].inout,
 		conflist[i].inout_mode);
 	}
 }



CVS commit: src/sys/arch/arm/imx

2012-04-15 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Sun Apr 15 10:09:58 UTC 2012

Modified Files:
src/sys/arch/arm/imx: imx51reg.h

Log Message:
add HVE bit definition in iomux PAD_CTL register.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx51reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx51reg.h
diff -u src/sys/arch/arm/imx/imx51reg.h:1.2 src/sys/arch/arm/imx/imx51reg.h:1.3
--- src/sys/arch/arm/imx/imx51reg.h:1.2	Tue Nov 30 13:05:27 2010
+++ src/sys/arch/arm/imx/imx51reg.h	Sun Apr 15 10:09:58 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: imx51reg.h,v 1.2 2010/11/30 13:05:27 bsh Exp $ */
+/* $NetBSD: imx51reg.h,v 1.3 2012/04/15 10:09:58 bsh Exp $ */
 /*-
  * Copyright (c) 2007 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -185,6 +185,7 @@
 #define	IOMUXC_SIZE	0x4000
 
 #define	IOMUXC_MUX_CTL		0x001c		/* multiprex control */
+#define	 IOMUX_CONFIG_SION	__BIT(4)
 #define	 IOMUX_CONFIG_ALT0	(0)
 #define	 IOMUX_CONFIG_ALT1	(1)
 #define	 IOMUX_CONFIG_ALT2	(2)
@@ -193,8 +194,8 @@
 #define	 IOMUX_CONFIG_ALT5	(5)
 #define	 IOMUX_CONFIG_ALT6	(6)
 #define	 IOMUX_CONFIG_ALT7	(7)
-#define	 IOMUX_CONFIG_SION	__BIT(4)
 #define	IOMUXC_PAD_CTL		0x03f0		/* pad control */
+#define	 PAD_CTL_HVE		__BIT(13)
 #define	 PAD_CTL_DDR_INPUT	__BIT(9)
 #define	 PAD_CTL_HYS		__BIT(8)
 #define	 PAD_CTL_PKE		__BIT(7)



CVS commit: src/sys/arch/arm/imx

2012-04-15 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Sun Apr 15 16:34:11 UTC 2012

Modified Files:
src/sys/arch/arm/imx: imx51reg.h

Log Message:
add base addresses for i.MX51 IPU registers.
from Kinichi Hashimoto.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx51reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx51reg.h
diff -u src/sys/arch/arm/imx/imx51reg.h:1.3 src/sys/arch/arm/imx/imx51reg.h:1.4
--- src/sys/arch/arm/imx/imx51reg.h:1.3	Sun Apr 15 10:09:58 2012
+++ src/sys/arch/arm/imx/imx51reg.h	Sun Apr 15 16:34:11 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: imx51reg.h,v 1.3 2012/04/15 10:09:58 bsh Exp $ */
+/* $NetBSD: imx51reg.h,v 1.4 2012/04/15 16:34:11 bsh Exp $ */
 /*-
  * Copyright (c) 2007 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -43,9 +43,44 @@
 #define	GPU_BASE	0x3000
 #define	GPU_SIZE	0x1000
 
-/* LCD controller */
-#define	IPUEX_BASE	0x4000
-#define	IPUEX_SIZE	0x2000
+/* Image Prossasing Unit */
+#define	IPU_BASE	0x4000
+#define	IPU_CM_BASE	(IPU_BASE + 0x1e00)
+#define	IPU_CM_SIZE	0x8000
+#define	IPU_IDMAC_BASE	(IPU_BASE + 0x1e008000)
+#define	IPU_IDMAC_SIZE	0x8000
+#define	IPU_DP_BASE	(IPU_BASE + 0x1e018000)
+#define	IPU_DP_SIZE	0x8000
+#define	IPU_IC_BASE	(IPU_BASE + 0x1e02)
+#define	IPU_IC_SIZE	0x8000
+#define	IPU_IRT_BASE	(IPU_BASE + 0x1e028000)
+#define	IPU_IRT_SIZE	0x8000
+#define	IPU_CSI0_BASE	(IPU_BASE + 0x1e03)
+#define	IPU_CSI0_SIZE	0x8000
+#define	IPU_CSI1_BASE	(IPU_BASE + 0x1e038000)
+#define	IPU_CSI1_SIZE	0x8000
+#define	IPU_DI0_BASE	(IPU_BASE + 0x1e04)
+#define	IPU_DI0_SIZE	0x8000
+#define	IPU_DI1_BASE	(IPU_BASE + 0x1e048000)
+#define	IPU_DI1_SIZE	0x8000
+#define	IPU_SMFC_BASE	(IPU_BASE + 0x1e05)
+#define	IPU_SMFC_SIZE	0x8000
+#define	IPU_DC_BASE	(IPU_BASE + 0x1e058000)
+#define	IPU_DC_SIZE	0x8000
+#define	IPU_DMFC_BASE	(IPU_BASE + 0x1e06)
+#define	IPU_DMFC_SIZE	0x8000
+#define	IPU_VDI_BASE	(IPU_BASE + 0x1e068000)
+#define	IPU_VDI_SIZE	0x8000
+#define	IPU_CPMEM_BASE	(IPU_BASE + 0x1f00)
+#define	IPU_CPMEM_SIZE	0x2
+#define	IPU_LUT_BASE	(IPU_BASE + 0x1f02)
+#define	IPU_LUT_SIZE	0x2
+#define	IPU_SRM_BASE	(IPU_BASE + 0x1f04)
+#define	IPU_SRM_SIZE	0x2
+#define	IPU_TPM_BASE	(IPU_BASE + 0x1f06)
+#define	IPU_TPM_SIZE	0x2
+#define	IPU_DCTMPL_BASE	(IPU_BASE + 0x1f08)
+#define	IPU_DCTMPL_SIZE	0x2
 
 #define	DEBUGROM_BASE	0x6000
 #define	DEBUGROM_SIZE	0x1000



CVS commit: src/sys/arch/arm/imx

2010-11-30 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Tue Nov 30 13:05:27 UTC 2010

Modified Files:
src/sys/arch/arm/imx: files.imx51 imx51_axi.c imx51reg.h imx51var.h
imxgpioreg.h imxkppreg.h
Added Files:
src/sys/arch/arm/imx: imx51_gpio.c imx51_iomux.c imx51_usb.c imxgpio.c
imxgpiovar.h imxusb.c imxusbreg.h imxusbvar.h

Log Message:
Support GPIO, IOMUX, and USB on i.MX51.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/files.imx51 \
src/sys/arch/arm/imx/imx51_axi.c src/sys/arch/arm/imx/imx51reg.h \
src/sys/arch/arm/imx/imx51var.h src/sys/arch/arm/imx/imxgpioreg.h \
src/sys/arch/arm/imx/imxkppreg.h
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/imx51_gpio.c \
src/sys/arch/arm/imx/imx51_iomux.c src/sys/arch/arm/imx/imx51_usb.c \
src/sys/arch/arm/imx/imxgpio.c src/sys/arch/arm/imx/imxgpiovar.h \
src/sys/arch/arm/imx/imxusb.c src/sys/arch/arm/imx/imxusbreg.h \
src/sys/arch/arm/imx/imxusbvar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx51
diff -u src/sys/arch/arm/imx/files.imx51:1.1 src/sys/arch/arm/imx/files.imx51:1.2
--- src/sys/arch/arm/imx/files.imx51:1.1	Sat Nov 13 07:11:02 2010
+++ src/sys/arch/arm/imx/files.imx51	Tue Nov 30 13:05:27 2010
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx51,v 1.1 2010/11/13 07:11:02 bsh Exp $
+#	$NetBSD: files.imx51,v 1.2 2010/11/30 13:05:27 bsh Exp $
 #
 # Configuration info for the Freescale i.MX51
 #
@@ -46,14 +46,15 @@
 defparam opt_imx51clk.h IMX51_IPGCLK_FREQ
 
 # iMX GPIO
-# device	imxgpio: gpiobus
-# attach	imxgpio at ahb
-# file	arch/arm/imx/imx31_gpio.c		imxgpio		needs-flag
+device	imxgpio: gpiobus
+attach	imxgpio at axi
+file	arch/arm/imx/imxgpio.c		imxgpio		needs-flag
+file	arch/arm/imx/imx51_gpio.c	imxgpio
 
 # iMX IOMUX
 device	imxiomux : bus_space_generic
 attach	imxiomux at axi
-file	arch/arm/imx/imx31_iomux.c		imxiomux
+file	arch/arm/imx/imx51_iomux.c		imxiomux
 
 # LCD controller
 # device	lcd : bus_dma_generic, wsemuldisplaydev, rasops16, rasops8, rasops4, rasops_rotation
@@ -73,8 +74,13 @@
 file	arch/arm/imx/imx51_uart.c		imxuart
 defflag	opt_imxuart.hIMXUARTCONSOLE
 
-# attach	ohci at ahb with ohci_ahb : bus_dma_generic
-# file	arch/arm/imx/ochi_axi.c			ohci_axi
+# USB controller
+# attach of this driver need to be specified in paltform configuration
+device imxusbc { unit, irq } : bus_dma_generic
+file   arch/arm/imx/imx51_usb.c			imxusbc
+
+attach ehci at imxusbc with imxehci
+file   arch/arm/imx/imxusb.c			imxehci
 
 # attach	wdc at ahb with wdc_ahb : bus_dma_generic
 # file	arch/arm/imx/wdc_axi.c			wdc_axi
Index: src/sys/arch/arm/imx/imx51_axi.c
diff -u src/sys/arch/arm/imx/imx51_axi.c:1.1 src/sys/arch/arm/imx/imx51_axi.c:1.2
--- src/sys/arch/arm/imx/imx51_axi.c:1.1	Sat Nov 13 07:11:02 2010
+++ src/sys/arch/arm/imx/imx51_axi.c	Tue Nov 30 13:05:27 2010
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx51_axi.c,v 1.1 2010/11/13 07:11:02 bsh Exp $	*/
+/*	$NetBSD: imx51_axi.c,v 1.2 2010/11/30 13:05:27 bsh Exp $	*/
 
 /*-
  * Copyright (c) 2010 SHIMIZU Ryo r...@nerv.org
@@ -27,7 +27,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imx51_axi.c,v 1.1 2010/11/13 07:11:02 bsh Exp $);
+__KERNEL_RCSID(0, $NetBSD: imx51_axi.c,v 1.2 2010/11/30 13:05:27 bsh Exp $);
 
 #include sys/param.h
 #include sys/bus.h
@@ -101,9 +101,11 @@
 	aa = aux;
 
 	if ((strcmp(cf-cf_name, tzic) != 0) 
-	(strcmp(cf-cf_name, imxuart) != 0))
+	(strcmp(cf-cf_name, imxuart) != 0) 
+	(strcmp(cf-cf_name, imxgpio) != 0))
 		return 0;
 
+	aa-aa_name = cf-cf_name;
 	aa-aa_addr = cf-cf_loc[AXICF_ADDR];
 	aa-aa_size = cf-cf_loc[AXICF_SIZE];
 	aa-aa_irq = cf-cf_loc[AXICF_IRQ];
Index: src/sys/arch/arm/imx/imx51reg.h
diff -u src/sys/arch/arm/imx/imx51reg.h:1.1 src/sys/arch/arm/imx/imx51reg.h:1.2
--- src/sys/arch/arm/imx/imx51reg.h:1.1	Sat Nov 13 07:11:03 2010
+++ src/sys/arch/arm/imx/imx51reg.h	Tue Nov 30 13:05:27 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: imx51reg.h,v 1.1 2010/11/13 07:11:03 bsh Exp $ */
+/* $NetBSD: imx51reg.h,v 1.2 2010/11/30 13:05:27 bsh Exp $ */
 /*-
  * Copyright (c) 2007 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -89,12 +89,72 @@
 
 #define	USBOH3_BASE	0x73f8
 #define	USBOH3_PL301_BASE	0x73fc4000
-#define	USB_OTG_BASE	0x43F88000
-#define	USB_EHCI1_BASE	0x43F88200
-#define	USB_EHCI2_BASE	0x43F88400
-#define	USB_EHCI_SIZE	0x0200
-#define	USB_CONTROL	0x43F88600
+#define	USBOH3_EHCI_SIZE	0x200
+#define	USBOH3_OTG	0x000
+#define	USBOH3_EHCI(n)	(USBOH3_EHCI_SIZE*(n))	/* n=1,2,3 */
+
+/* USB_CTRL register */
+#define	USBOH3_USBCTRL   	0x800
+#define	 USBCTRL_OWIR	__BIT(31)	/* OTG Wakeup interrupt request */
+#define	 USBCTRL_OSIC_SHIFT	29
+#define	 USBCTRL_OSIC	__BITS(29,30)	/* OTG Serial interface configuration */
+#define	 USBCTRL_OUIE	__BIT(28)	/* OTG Wake-up interrupt enable */
+#define	 USBCTRL_OBPAL	__BITS(25,26)	/* OTG Bypass value */

CVS commit: src/sys/arch/arm/imx

2010-11-27 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Sat Nov 27 13:37:27 UTC 2010

Modified Files:
src/sys/arch/arm/imx: imx31_uart.c imx51_uart.c imxuart.c imxuartvar.h

Log Message:
use device_t correctly for imxuart.


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx31_uart.c \
src/sys/arch/arm/imx/imx51_uart.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/imx/imxuart.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imxuartvar.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx31_uart.c
diff -u src/sys/arch/arm/imx/imx31_uart.c:1.1 src/sys/arch/arm/imx/imx31_uart.c:1.2
--- src/sys/arch/arm/imx/imx31_uart.c:1.1	Sat Nov 13 06:12:17 2010
+++ src/sys/arch/arm/imx/imx31_uart.c	Sat Nov 27 13:37:27 2010
@@ -36,7 +36,7 @@
 
 
 int
-imxuart_match(struct device *parent, struct cfdata *cf, void *aux)
+imxuart_match(device_t parent, struct cfdata *cf, void *aux)
 {
 	struct aips_attach_args * const aipsa = aux;
 
@@ -53,7 +53,7 @@
 }
 
 void
-imxuart_attach(struct device *parent, struct device *self, void *aux)
+imxuart_attach(device_t parent, device_t self, void *aux)
 {
 	struct aips_attach_args * aa = aux;
 
Index: src/sys/arch/arm/imx/imx51_uart.c
diff -u src/sys/arch/arm/imx/imx51_uart.c:1.1 src/sys/arch/arm/imx/imx51_uart.c:1.2
--- src/sys/arch/arm/imx/imx51_uart.c:1.1	Sat Nov 13 06:12:17 2010
+++ src/sys/arch/arm/imx/imx51_uart.c	Sat Nov 27 13:37:27 2010
@@ -36,7 +36,7 @@
 
 
 int
-imxuart_match(struct device *parent, struct cfdata *cf, void *aux)
+imxuart_match(device_t parent, struct cfdata *cf, void *aux)
 {
 	struct axi_attach_args * const aa = aux;
 
@@ -51,7 +51,7 @@
 }
 
 void
-imxuart_attach(struct device *parent, struct device *self, void *aux)
+imxuart_attach(device_t parent, device_t self, void *aux)
 {
 	struct axi_attach_args * aa = aux;
 

Index: src/sys/arch/arm/imx/imxuart.c
diff -u src/sys/arch/arm/imx/imxuart.c:1.5 src/sys/arch/arm/imx/imxuart.c:1.6
--- src/sys/arch/arm/imx/imxuart.c:1.5	Sat Nov 13 06:12:17 2010
+++ src/sys/arch/arm/imx/imxuart.c	Sat Nov 27 13:37:27 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: imxuart.c,v 1.5 2010/11/13 06:12:17 bsh Exp $ */
+/* $NetBSD: imxuart.c,v 1.6 2010/11/27 13:37:27 bsh Exp $ */
 
 /*
  * Copyright (c) 2009, 2010  Genetec Corporation.  All rights reserved.
@@ -96,7 +96,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imxuart.c,v 1.5 2010/11/13 06:12:17 bsh Exp $);
+__KERNEL_RCSID(0, $NetBSD: imxuart.c,v 1.6 2010/11/27 13:37:27 bsh Exp $);
 
 #include opt_imxuart.h
 #include opt_ddb.h
@@ -388,7 +388,7 @@
 
 
 void
-imxuart_attach_common(struct device *parent, struct device *self,
+imxuart_attach_common(device_t parent, device_t self,
 bus_space_tag_t iot, paddr_t iobase, size_t size, int intr, int flags)
 {
 	imxuart_softc_t *sc = device_private(self);

Index: src/sys/arch/arm/imx/imxuartvar.h
diff -u src/sys/arch/arm/imx/imxuartvar.h:1.3 src/sys/arch/arm/imx/imxuartvar.h:1.4
--- src/sys/arch/arm/imx/imxuartvar.h:1.3	Sat Nov 13 06:12:17 2010
+++ src/sys/arch/arm/imx/imxuartvar.h	Sat Nov 27 13:37:27 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: imxuartvar.h,v 1.3 2010/11/13 06:12:17 bsh Exp $ */
+/* $NetBSD: imxuartvar.h,v 1.4 2010/11/27 13:37:27 bsh Exp $ */
 /*
  * driver include for Freescale i.MX31 and i.MX31L UARTs
  */
@@ -36,7 +36,7 @@
 #include  sys/termios.h	/* for tcflag_t */
 
 
-void imxuart_attach_common(struct device *parent, struct device *self,
+void imxuart_attach_common(device_t parent, device_t self,
 bus_space_tag_t, paddr_t, size_t, int, int);
 
 int imxuart_kgdb_attach(bus_space_tag_t, paddr_t, u_int, tcflag_t);



CVS commit: src/sys/arch/arm/imx

2010-11-15 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Mon Nov 15 18:18:39 UTC 2010

Modified Files:
src/sys/arch/arm/imx: imx31_gpio.c

Log Message:
GPIO register definitions are now in imxgpioreg.h to share them with
imx51


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/imx/imx31_gpio.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx31_gpio.c
diff -u src/sys/arch/arm/imx/imx31_gpio.c:1.4 src/sys/arch/arm/imx/imx31_gpio.c:1.5
--- src/sys/arch/arm/imx/imx31_gpio.c:1.4	Wed Nov 19 06:28:14 2008
+++ src/sys/arch/arm/imx/imx31_gpio.c	Mon Nov 15 18:18:39 2010
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx31_gpio.c,v 1.4 2008/11/19 06:28:14 matt Exp $	*/
+/*	$NetBSD: imx31_gpio.c,v 1.5 2010/11/15 18:18:39 bsh Exp $	*/
 /*-
  * Copyright (c) 2007 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -28,7 +28,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: imx31_gpio.c,v 1.4 2008/11/19 06:28:14 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: imx31_gpio.c,v 1.5 2010/11/15 18:18:39 bsh Exp $);
 
 #define _INTR_PRIVATE
 
@@ -51,6 +51,7 @@
 
 #include arm/imx/imx31reg.h
 #include arm/imx/imx31var.h
+#include arm/imx/imxgpioreg.h
 #include arm/pic/picvar.h
 
 #if NGPIO  0



CVS commit: src/sys/arch/arm/imx

2010-11-15 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Mon Nov 15 18:19:20 UTC 2010

Modified Files:
src/sys/arch/arm/imx: files.imx31 imx31_clock.c imx31reg.h

Log Message:
EPIT support as system clock for i.MX31


To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/imx/files.imx31
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx31_clock.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/imx/imx31reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx31
diff -u src/sys/arch/arm/imx/files.imx31:1.5 src/sys/arch/arm/imx/files.imx31:1.6
--- src/sys/arch/arm/imx/files.imx31:1.5	Sat Nov 13 06:28:20 2010
+++ src/sys/arch/arm/imx/files.imx31	Mon Nov 15 18:19:19 2010
@@ -1,4 +1,4 @@
-#	$NetBSD: files.imx31,v 1.5 2010/11/13 06:28:20 bsh Exp $
+#	$NetBSD: files.imx31,v 1.6 2010/11/15 18:19:19 bsh Exp $
 #
 # Configuration info for the Freescale i.MX31
 #
@@ -51,6 +51,14 @@
 
 # iMX clock
 file	arch/arm/imx/imxclock.c
+file	arch/arm/imx/imx31_clock.c
+
+# Clock Control Module
+device	imxccm
+attach	imxccm	at aips
+file	arch/arm/imx/imx31_ccm.c	imxccm		needs-flag
+
+defparam opt_imx31clk.h IMX31_IPGCLK_FREQ
 
 # iMX UART
 device	imxuart

Index: src/sys/arch/arm/imx/imx31_clock.c
diff -u src/sys/arch/arm/imx/imx31_clock.c:1.1 src/sys/arch/arm/imx/imx31_clock.c:1.2
--- src/sys/arch/arm/imx/imx31_clock.c:1.1	Sat Nov 13 06:51:37 2010
+++ src/sys/arch/arm/imx/imx31_clock.c	Mon Nov 15 18:19:19 2010
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx31_clock.c,v 1.1 2010/11/13 06:51:37 bsh Exp $ */
+/*	$NetBSD: imx31_clock.c,v 1.2 2010/11/15 18:19:19 bsh Exp $ */
 /*
  * Copyright (c) 2009,2010  Genetec corp.  All rights reserved.
  * Written by Hashimoto Kenichi for Genetec corp.
@@ -45,8 +45,14 @@
 
 #include arm/imx/imx31reg.h
 #include arm/imx/imx31var.h
+#if 0 /* notyet */
 #include arm/imx/imx31_ccmvar.h
+#endif
 #include arm/imx/imxclockvar.h
+#include arm/imx/imxepitreg.h
+
+#include imxccm.h	/* if CCM driver is configured into the kernel */
+#include opt_imx31clk.h
 
 static int imxclock_match(device_t, struct cfdata *, void *);
 static void imxclock_attach(device_t, device_t, void *);
@@ -105,10 +111,18 @@
 int
 imxclock_get_timerfreq(struct imxclock_softc *sc)
 {
+#if NIMXCCM  0
 	struct imx31_clocks clk;
 	imx31_get_clocks(clk);
 
 	return clk.ipg_clk;
+#else
+#ifndef	IMX31_IPGCLK_FREQ
+#error	IMX31_IPGCLK_FREQ need to be defined.
+#endif
+	return IMX31_IPGCLK_FREQ;
+
+#endif
 }
 
 

Index: src/sys/arch/arm/imx/imx31reg.h
diff -u src/sys/arch/arm/imx/imx31reg.h:1.4 src/sys/arch/arm/imx/imx31reg.h:1.5
--- src/sys/arch/arm/imx/imx31reg.h:1.4	Sat Nov 13 06:44:11 2010
+++ src/sys/arch/arm/imx/imx31reg.h	Mon Nov 15 18:19:19 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: imx31reg.h,v 1.4 2010/11/13 06:44:11 bsh Exp $ */
+/* $NetBSD: imx31reg.h,v 1.5 2010/11/15 18:19:19 bsh Exp $ */
 /*-
  * Copyright (c) 2007 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -58,6 +58,18 @@
 #define	GPIO3_BASE	0x53fa4000
 /* register definitions in imxgpiore.h */
 
+#define	GPIO_NPINS		32
+#define	GPIO_NGROUPS		3
+
+#define	GPIO_NO_SCLK0		GPIO_NO(3, 2)
+
+
+/* EPIT */
+
+#define	EPIT1_BASE	0x53f94000
+#define	EPIT2_BASE	0x53f98000
+
+
 #define	INTC_BASE		0x6800
 #define	INTC_SIZE		0x0400
 #define	IMX31_INTCNTL		0x	/* Interrupt Control (RW) */



CVS commit: src/sys/arch/arm/imx

2010-11-12 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Sat Nov 13 04:49:39 UTC 2010

Added Files:
src/sys/arch/arm/imx: files.imx31
Removed Files:
src/sys/arch/arm/imx: files.imx

Log Message:
rename files.imx as files.imx31


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r0 src/sys/arch/arm/imx/files.imx
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/files.imx31

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Added files:

Index: src/sys/arch/arm/imx/files.imx31
diff -u /dev/null src/sys/arch/arm/imx/files.imx31:1.1
--- /dev/null	Sat Nov 13 04:49:39 2010
+++ src/sys/arch/arm/imx/files.imx31	Sat Nov 13 04:49:38 2010
@@ -0,0 +1,64 @@
+#	$NetBSD: files.imx31,v 1.1 2010/11/13 04:49:38 bsh Exp $
+#
+# Configuration info for the Freescale i.MX31
+#
+
+define	bus_dma_generic
+
+file	arch/arm/imx/imx31_space.c
+file	arch/arm/imx/imx31_dma.c		bus_dma_generic
+
+# iMX L2 Cache Controller
+device	l2cc
+attach	l2cc at mainbus
+file	arch/arm/imx/imx31_l2cc.c		l2cc
+
+# iMX AHB
+device	ahb  { [addr=-1], [size=0], [intr=-1], [irqbase=-1]} : bus_space_generic
+attach	ahb at mainbus
+file	arch/arm/imx/imx31_ahb.c		ahb
+
+# iMX AdVanced Interrupt Controller
+include arch/arm/pic/files.pic
+device	avic: pic
+attach	avic at ahb
+file	arch/arm/imx/imx31_icu.c		avic		needs-flag
+file	arch/arm/arm32/irq_dispatch.S
+
+# iMX IP bus
+device	aips { [addr=-1], [size=0], [intr=-1]} : bus_space_generic
+attach	aips at ahb
+file	arch/arm/imx/imx31_aips.c		aips
+
+# iMX EMI (external memory interface)
+device	emi { [offset=-1], [size=0], [intr=-1] } : bus_space_generic
+attach	emi at ahb
+file	arch/arm/imx/imx31_emi.c		emi
+
+# iMX GPIO
+device	imxgpio: gpiobus
+attach	imxgpio at ahb
+file	arch/arm/imx/imx31_gpio.c		imxgpio		needs-flag
+
+# iMX M3IF - Multi Master Memory Interface
+# iMX ESDCTL/MDDRC - Enhanced SDRAM/LPDDR memory controller
+# iMX PCMCIA - PCMCIA memory controller
+# iMX NANDFC - NAND Flash memory controller
+# iMX WEIM - Wireless External Interface Module
+
+# iMX clock
+file	arch/arm/imx/imxclock.c
+
+# iMX UART
+device	imxuart
+attach	imxuart at aips
+file	arch/arm/imx/imxuart.c			imxuart
+
+attach	ehci at ahb with ehci_ahb : bus_dma_generic
+file	arch/arm/imx/echi_ahb.c			ehci_ahb
+
+attach	ohci at ahb with ohci_ahb : bus_dma_generic
+file	arch/arm/imx/ochi_ahb.c			ohci_ahb
+
+attach	wdc at ahb with wdc_ahb : bus_dma_generic
+file	arch/arm/imx/wdc_ahb.c			wdc_ahb



CVS commit: src/sys/arch/arm/imx

2010-11-12 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Sat Nov 13 04:51:01 UTC 2010

Modified Files:
src/sys/arch/arm/imx: files.imx31
Added Files:
src/sys/arch/arm/imx: imx_space.c

Log Message:
rename imx31_space.c as imx_space.c


To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/files.imx31
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/imx_space.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx31
diff -u src/sys/arch/arm/imx/files.imx31:1.1 src/sys/arch/arm/imx/files.imx31:1.2
--- src/sys/arch/arm/imx/files.imx31:1.1	Sat Nov 13 04:49:38 2010
+++ src/sys/arch/arm/imx/files.imx31	Sat Nov 13 04:51:01 2010
@@ -1,12 +1,12 @@
-#	$NetBSD: files.imx31,v 1.1 2010/11/13 04:49:38 bsh Exp $
+#	$NetBSD: files.imx31,v 1.2 2010/11/13 04:51:01 bsh Exp $
 #
 # Configuration info for the Freescale i.MX31
 #
 
 define	bus_dma_generic
 
-file	arch/arm/imx/imx31_space.c
-file	arch/arm/imx/imx31_dma.c		bus_dma_generic
+file	arch/arm/imx/imx_space.c
+file	arch/arm/imx/imx_dma.c		bus_dma_generic
 
 # iMX L2 Cache Controller
 device	l2cc

Added files:

Index: src/sys/arch/arm/imx/imx_space.c
diff -u /dev/null src/sys/arch/arm/imx/imx_space.c:1.1
--- /dev/null	Sat Nov 13 04:51:01 2010
+++ src/sys/arch/arm/imx/imx_space.c	Sat Nov 13 04:51:01 2010
@@ -0,0 +1,271 @@
+/* $Id: imx_space.c,v 1.1 2010/11/13 04:51:01 bsh Exp $ */
+
+/* derived from: */
+/*	$NetBSD: imx_space.c,v 1.1 2010/11/13 04:51:01 bsh Exp $ */
+
+/*
+ * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *must display the following acknowledgement:
+ *	This product includes software developed for the NetBSD Project by
+ *	Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ *or promote products derived from this software without specific prior
+ *written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+/*
+ * Copyright (c) 1997 Mark Brinicombe.
+ * Copyright (c) 1997 Causality Limited.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Ichiro FUKUHARA.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *must display the following acknowledgement:
+ *	This product includes software developed by Mark Brinicombe.
+ * 4. The name of the company nor the name of the author may be used to
+ *endorse or promote products derived from this software without specific
+ *prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF 

CVS commit: src/sys/arch/arm/imx

2010-11-12 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Sat Nov 13 04:52:06 UTC 2010

Removed Files:
src/sys/arch/arm/imx: imx31_space.c

Log Message:
rename imx31_space.c as imx_space.c


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r0 src/sys/arch/arm/imx/imx31_space.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.



CVS commit: src/sys/arch/arm/imx

2010-11-12 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Sat Nov 13 04:58:46 UTC 2010

Modified Files:
src/sys/arch/arm/imx: files.imx31

Log Message:
rename imx31_space.c as imx_space.c


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/files.imx31

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx31
diff -u src/sys/arch/arm/imx/files.imx31:1.2 src/sys/arch/arm/imx/files.imx31:1.3
--- src/sys/arch/arm/imx/files.imx31:1.2	Sat Nov 13 04:51:01 2010
+++ src/sys/arch/arm/imx/files.imx31	Sat Nov 13 04:58:46 2010
@@ -1,12 +1,12 @@
-#	$NetBSD: files.imx31,v 1.2 2010/11/13 04:51:01 bsh Exp $
+#	$NetBSD: files.imx31,v 1.3 2010/11/13 04:58:46 bsh Exp $
 #
 # Configuration info for the Freescale i.MX31
 #
 
 define	bus_dma_generic
 
-file	arch/arm/imx/imx_space.c
-file	arch/arm/imx/imx_dma.c		bus_dma_generic
+file	arch/arm/imx/imx31_space.c
+file	arch/arm/imx/imx31_dma.c		bus_dma_generic
 
 # iMX L2 Cache Controller
 device	l2cc



CVS commit: src/sys/arch/arm/imx

2010-11-12 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Sat Nov 13 05:00:31 UTC 2010

Modified Files:
src/sys/arch/arm/imx: imx31_ahb.c imx31var.h imx_space.c imxuart.c

Log Message:
rename imx31_bs_tag as imx_bs_tag to share it with imx51.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx31_ahb.c \
src/sys/arch/arm/imx/imxuart.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imx31var.h
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/imx/imx_space.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx31_ahb.c
diff -u src/sys/arch/arm/imx/imx31_ahb.c:1.3 src/sys/arch/arm/imx/imx31_ahb.c:1.4
--- src/sys/arch/arm/imx/imx31_ahb.c:1.3	Fri May  2 22:00:29 2008
+++ src/sys/arch/arm/imx/imx31_ahb.c	Sat Nov 13 05:00:31 2010
@@ -1,4 +1,4 @@
-/*	$NetBSD: imx31_ahb.c,v 1.3 2008/05/02 22:00:29 martin Exp $	*/
+/*	$NetBSD: imx31_ahb.c,v 1.4 2010/11/13 05:00:31 bsh Exp $	*/
 
 /*
  * Copyright (c) 2002, 2005  Genetec Corporation.  All rights reserved.
@@ -99,7 +99,7 @@
  */
 
 #include sys/cdefs.h
-__KERNEL_RCSID(0, $Id: imx31_ahb.c,v 1.3 2008/05/02 22:00:29 martin Exp $);
+__KERNEL_RCSID(0, $Id: imx31_ahb.c,v 1.4 2010/11/13 05:00:31 bsh Exp $);
 
 #include locators.h
 #include avic.h
@@ -152,13 +152,12 @@
 ahb_attach(device_t parent, device_t self, void *aux)
 {
 	struct ahb_softc *sc = (struct ahb_softc *)self;
-	extern struct bus_space imx31_bs_tag;
 	struct ahb_attach_args ahba;
 
 	ahb_sc = sc;
-	sc-sc_memt = imx31_bs_tag;
+	sc-sc_memt = imx_bs_tag;
 #if NBUS_DMA_GENERIC  0
-	sc-sc_dmat = imx31_bus_dma_tag;
+	sc-sc_dmat = imx_bus_dma_tag;
 #else
 	sc-sc_dmat = 0;
 #endif
Index: src/sys/arch/arm/imx/imxuart.c
diff -u src/sys/arch/arm/imx/imxuart.c:1.3 src/sys/arch/arm/imx/imxuart.c:1.4
--- src/sys/arch/arm/imx/imxuart.c:1.3	Mon Jun 30 00:46:41 2008
+++ src/sys/arch/arm/imx/imxuart.c	Sat Nov 13 05:00:31 2010
@@ -1,4 +1,4 @@
-/* $Id: imxuart.c,v 1.3 2008/06/30 00:46:41 perry Exp $ */
+/* $Id: imxuart.c,v 1.4 2010/11/13 05:00:31 bsh Exp $ */
 #include sys/types.h
 #include sys/systm.h
 #include sys/device.h
@@ -26,7 +26,7 @@
 
 #define __TRACE	imxuart_puts(imxuart_softc, __func__ )
 
-extern struct bus_space imx31_bs_tag;
+extern struct bus_space imx_bs_tag;
 
 imxuart_softc_t imxuart_softc = { { 0, }, };
 

Index: src/sys/arch/arm/imx/imx31var.h
diff -u src/sys/arch/arm/imx/imx31var.h:1.2 src/sys/arch/arm/imx/imx31var.h:1.3
--- src/sys/arch/arm/imx/imx31var.h:1.2	Sun Apr 27 18:58:44 2008
+++ src/sys/arch/arm/imx/imx31var.h	Sat Nov 13 05:00:31 2010
@@ -1,9 +1,9 @@
-/*	$NetBSD: imx31var.h,v 1.2 2008/04/27 18:58:44 matt Exp $	*/
+/*	$NetBSD: imx31var.h,v 1.3 2010/11/13 05:00:31 bsh Exp $	*/
 
 #ifndef _ARM_IMX_IMX31VAR_H
 #define _ARM_IMX_IMX31VAR_H
 
-extern struct bus_space imx31_bs_tag;
+extern struct bus_space imx_bs_tag;
 
 struct aips_attach_args {
 	const char	*aipsa_name;

Index: src/sys/arch/arm/imx/imx_space.c
diff -u src/sys/arch/arm/imx/imx_space.c:1.1 src/sys/arch/arm/imx/imx_space.c:1.2
--- src/sys/arch/arm/imx/imx_space.c:1.1	Sat Nov 13 04:51:01 2010
+++ src/sys/arch/arm/imx/imx_space.c	Sat Nov 13 05:00:31 2010
@@ -1,7 +1,7 @@
-/* $Id: imx_space.c,v 1.1 2010/11/13 04:51:01 bsh Exp $ */
+/* $Id: imx_space.c,v 1.2 2010/11/13 05:00:31 bsh Exp $ */
 
 /* derived from: */
-/*	$NetBSD: imx_space.c,v 1.1 2010/11/13 04:51:01 bsh Exp $ */
+/*	$NetBSD: imx_space.c,v 1.2 2010/11/13 05:00:31 bsh Exp $ */
 
 /*
  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
@@ -82,32 +82,32 @@
 #include uvm/uvm_extern.h
 #include machine/bus.h
 
-bs_protos(imx31);
+bs_protos(imx);
 bs_protos(generic);
 bs_protos(generic_armv4);
 bs_protos(bs_notimpl);
 
-struct bus_space imx31_bs_tag = {
+struct bus_space imx_bs_tag = {
 	/* cookie */
 	(void *) 0,
 
 	/* mapping/unmapping */
-	imx31_bs_map,
-	imx31_bs_unmap,
-	imx31_bs_subregion,
+	imx_bs_map,
+	imx_bs_unmap,
+	imx_bs_subregion,
 
 	/* allocation/deallocation */
-	imx31_bs_alloc,	/* not implemented */
-	imx31_bs_free,		/* not implemented */
+	imx_bs_alloc,	/* not implemented */
+	imx_bs_free,		/* not implemented */
 
 	/* get kernel virtual address */
-	imx31_bs_vaddr,
+	imx_bs_vaddr,
 
 	/* mmap */
 	bs_notimpl_bs_mmap,
 
 	/* barrier */
-	imx31_bs_barrier,
+	imx_bs_barrier,
 
 	/* read (single) */
 	generic_bs_r_1,
@@ -165,7 +165,7 @@
 };
 
 int
-imx31_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
+imx_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
 	  int flag, bus_space_handle_t *bshp)
 {
 	u_long startpa, endpa, pa;
@@ -208,7 +208,7 @@
 }
 
 void
-imx31_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
+imx_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
 {
 	vaddr_t	va;
 	vsize_t	sz;
@@ -228,7 +228,7 @@
 
 
 int
-imx31_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
+imx_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
 bus_size_t size, bus_space_handle_t *nbshp)

CVS commit: src/sys/arch/arm/imx

2010-11-12 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Sat Nov 13 06:09:34 UTC 2010

Modified Files:
src/sys/arch/arm/imx: files.imx31

Log Message:
back out previous. That was an mistake.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/files.imx31

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx31
diff -u src/sys/arch/arm/imx/files.imx31:1.3 src/sys/arch/arm/imx/files.imx31:1.4
--- src/sys/arch/arm/imx/files.imx31:1.3	Sat Nov 13 04:58:46 2010
+++ src/sys/arch/arm/imx/files.imx31	Sat Nov 13 06:09:34 2010
@@ -1,12 +1,12 @@
-#	$NetBSD: files.imx31,v 1.3 2010/11/13 04:58:46 bsh Exp $
+#	$NetBSD: files.imx31,v 1.4 2010/11/13 06:09:34 bsh Exp $
 #
 # Configuration info for the Freescale i.MX31
 #
 
 define	bus_dma_generic
 
-file	arch/arm/imx/imx31_space.c
-file	arch/arm/imx/imx31_dma.c		bus_dma_generic
+file	arch/arm/imx/imx_space.c
+file	arch/arm/imx/imx_dma.c		bus_dma_generic
 
 # iMX L2 Cache Controller
 device	l2cc



CVS commit: src/sys/arch/arm/imx

2010-11-12 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Sat Nov 13 06:28:21 UTC 2010

Modified Files:
src/sys/arch/arm/imx: files.imx31

Log Message:
UART driver for i.MX31 and 51.


To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/imx/files.imx31

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/files.imx31
diff -u src/sys/arch/arm/imx/files.imx31:1.4 src/sys/arch/arm/imx/files.imx31:1.5
--- src/sys/arch/arm/imx/files.imx31:1.4	Sat Nov 13 06:09:34 2010
+++ src/sys/arch/arm/imx/files.imx31	Sat Nov 13 06:28:20 2010
@@ -1,8 +1,11 @@
-#	$NetBSD: files.imx31,v 1.4 2010/11/13 06:09:34 bsh Exp $
+#	$NetBSD: files.imx31,v 1.5 2010/11/13 06:28:20 bsh Exp $
 #
 # Configuration info for the Freescale i.MX31
 #
 
+defparam opt_imx.hMEMSIZE
+defflag opt_imx.hIMX51
+
 define	bus_dma_generic
 
 file	arch/arm/imx/imx_space.c
@@ -52,7 +55,9 @@
 # iMX UART
 device	imxuart
 attach	imxuart at aips
-file	arch/arm/imx/imxuart.c			imxuart
+file	arch/arm/imx/imxuart.c			imxuart	needs-flag
+file	arch/arm/imx/imx31_uart.c		imxuart
+defflag	opt_imxuart.hIMXUARTCONSOLE
 
 attach	ehci at ahb with ehci_ahb : bus_dma_generic
 file	arch/arm/imx/echi_ahb.c			ehci_ahb



CVS commit: src/sys/arch/arm/imx

2010-11-12 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Sat Nov 13 06:44:11 UTC 2010

Modified Files:
src/sys/arch/arm/imx: imx31reg.h
Added Files:
src/sys/arch/arm/imx: imxgpioreg.h

Log Message:
extract GPIO register definitions from imx31reg.h to share them with
i.MX51


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/imx/imx31reg.h
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/imxgpioreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imx31reg.h
diff -u src/sys/arch/arm/imx/imx31reg.h:1.3 src/sys/arch/arm/imx/imx31reg.h:1.4
--- src/sys/arch/arm/imx/imx31reg.h:1.3	Mon Apr 28 20:23:14 2008
+++ src/sys/arch/arm/imx/imx31reg.h	Sat Nov 13 06:44:11 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: imx31reg.h,v 1.3 2008/04/28 20:23:14 martin Exp $ */
+/* $NetBSD: imx31reg.h,v 1.4 2010/11/13 06:44:11 bsh Exp $ */
 /*-
  * Copyright (c) 2007 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -56,21 +56,7 @@
 #define	GPIO1_BASE	0x53fcc000
 #define	GPIO2_BASE	0x53fd
 #define	GPIO3_BASE	0x53fa4000
-
-#define	GPIO_SIZE	0x0100	/* Size of GPIO registers */
-
-#define	GPIO_DR		0x	/* GPIO Data (RW) */
-#define	GPIO_DIR	0x0004	/* GPIO Direction (RW), 1=Output */
-#define	GPIO_PSR	0x0008	/* GPIO Pad Status (R) */
-#define	GPIO_ICR1	0x000c	/* GPIO Interrupt Configuration 1 (RW) */
-#define	GPIO_ICR2	0x0010	/* GPIO Interrupt Configuration 2 (RW) */
-#define	GPIO_IMR	0x0014	/* GPIO Interrupt Mask (RW) */
-#define	GPIO_ISR	0x0018	/* GPIO Interrupt Status (RW, W1C) */
-
-#define	GPIO_ICR_LEVEL_LOW	0
-#define	GPIO_ICR_LEVEL_HIGH	1
-#define	GPIO_ICR_EDGE_RISING	2
-#define	GPIO_ICR_EDGE_FALLING	3
+/* register definitions in imxgpiore.h */
 
 #define	INTC_BASE		0x6800
 #define	INTC_SIZE		0x0400

Added files:

Index: src/sys/arch/arm/imx/imxgpioreg.h
diff -u /dev/null src/sys/arch/arm/imx/imxgpioreg.h:1.1
--- /dev/null	Sat Nov 13 06:44:11 2010
+++ src/sys/arch/arm/imx/imxgpioreg.h	Sat Nov 13 06:44:11 2010
@@ -0,0 +1,55 @@
+/*-
+ * Copyright (c) 2007 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Matt Thomas.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef _ARM_IMX_IMXGPIOREG_H
+#define	_ARM_IMX_IMXGPIOREG_H
+
+#define	GPIO_SIZE	0x0020	/* Size of GPIO registers */
+
+#define	GPIO_DR		0x	/* GPIO Data (RW) */
+#define	GPIO_DIR	0x0004	/* GPIO Direction (RW), 1=Output */
+#define	GPIO_PSR	0x0008	/* GPIO Pad Status (R) */
+#define	GPIO_ICR1	0x000c	/* GPIO Interrupt Configuration 1 (RW) */
+#define	GPIO_ICR2	0x0010	/* GPIO Interrupt Configuration 2 (RW) */
+#define	GPIO_IMR	0x0014	/* GPIO Interrupt Mask (RW) */
+#define	GPIO_ISR	0x0018	/* GPIO Interrupt Status (RW, W1C) */
+#define	GPIO_EDGE_SEL	0x001c	/* GPIO Edge Select Register  (i.MX51 only) */
+
+#define	GPIO_ICR_LEVEL_LOW	0
+#define	GPIO_ICR_LEVEL_HIGH	1
+#define	GPIO_ICR_EDGE_RISING	2
+#define	GPIO_ICR_EDGE_FALLING	3
+
+#define	GPIO_MODULE(pin)	((pin) / GPIO_NPINS)
+
+/*
+ * GPIO number
+ */
+#define	GPIO_NO(group, pin)	(((group) - 1) * GPIO_NPINS + (pin))
+
+#endif	/* _ARM_IMX_IMXGPIOREG_H */



CVS commit: src/sys/arch/arm/imx

2010-11-12 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Sat Nov 13 06:51:38 UTC 2010

Modified Files:
src/sys/arch/arm/imx: imxclock.c
Added Files:
src/sys/arch/arm/imx: imx31_clock.c imx51_clock.c imxclockvar.h
imxepitreg.h

Log Message:
driver to use EPIT as system clock for i.MX31 and i.MX51,
by Hashimoto Kenichi.


To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/imx/imx31_clock.c \
src/sys/arch/arm/imx/imx51_clock.c src/sys/arch/arm/imx/imxclockvar.h \
src/sys/arch/arm/imx/imxepitreg.h
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imxclock.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imxclock.c
diff -u src/sys/arch/arm/imx/imxclock.c:1.2 src/sys/arch/arm/imx/imxclock.c:1.3
--- src/sys/arch/arm/imx/imxclock.c:1.2	Sun Apr 27 18:58:44 2008
+++ src/sys/arch/arm/imx/imxclock.c	Sat Nov 13 06:51:37 2010
@@ -1,9 +1,105 @@
-#include sys/types.h
+/*	$NetBSD: imxclock.c,v 1.3 2010/11/13 06:51:37 bsh Exp $ */
+/*
+ * Copyright (c) 2009, 2010  Genetec corp.  All rights reserved.
+ * Written by Hashimoto Kenichi for Genetec corp.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY GENETEC CORP. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORP.
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * common part for i.MX31 and i.MX51
+ */
+
+#include sys/param.h
+#include sys/systm.h
+#include sys/kernel.h
+#include sys/evcnt.h
+#include sys/atomic.h
 #include sys/time.h
+#include sys/timetc.h
+
+#include sys/types.h
+#include sys/device.h
+
+#include machine/intr.h
+#include machine/bus.h
+
+#include arm/cpu.h
+#include arm/armreg.h
+#include arm/cpufunc.h
+
+#include arm/imx/imxclockvar.h
+#include arm/imx/imxepitreg.h
+
+static u_int imx_epit_get_timecount(struct timecounter *);
+static int imxclock_intr(void *);
+
+static struct timecounter imx_epit_timecounter = {
+	imx_epit_get_timecount,	/* get_timecount */
+	0,			/* no poll_pps */
+	0x,		/* counter_mask */
+	0,			/* frequency */
+	epit,			/* name */
+	100,			/* quality */
+	NULL,			/* prev */
+	NULL,			/* next */
+};
+
+static volatile uint32_t imxclock_base;
 
 void
 cpu_initclocks(void)
 {
+	uint32_t reg;
+	int freq;
+
+	if (!epit1_sc) {
+		panic(%s: driver has not been initialized!, __FUNCTION__);
+	}
+
+	freq = imxclock_get_timerfreq(epit1_sc);
+	imx_epit_timecounter.tc_frequency = freq;
+	tc_init(imx_epit_timecounter);
+
+	epit1_sc-sc_reload_value = freq / hz - 1;
+
+	/* stop all timers */
+	bus_space_write_4(epit1_sc-sc_iot, epit1_sc-sc_ioh, EPIT_EPITCR, 0);
+	bus_space_write_4(epit2_sc-sc_iot, epit2_sc-sc_ioh, EPIT_EPITCR, 0);
+
+	aprint_normal(clock: hz=%d stathz = %d\n, hz, stathz);
+
+	bus_space_write_4(epit1_sc-sc_iot, epit1_sc-sc_ioh, EPIT_EPITLR, 
+			  epit1_sc-sc_reload_value);
+	bus_space_write_4(epit1_sc-sc_iot, epit1_sc-sc_ioh, EPIT_EPITCMPR, 0);
+
+	reg = EPITCR_ENMOD | EPITCR_IOVW | EPITCR_RLD;
+	bus_space_write_4(epit1_sc-sc_iot, epit1_sc-sc_ioh, EPIT_EPITCR, reg);
+	reg |= EPITCR_EN | EPITCR_OCIEN | EPITCR_CLKSRC_HIGH |
+		EPITCR_WAITEN | EPITCR_DOZEN | EPITCR_STOPEN;
+	bus_space_write_4(epit1_sc-sc_iot, epit1_sc-sc_ioh, EPIT_EPITCR, reg);
+
+	epit1_sc-sc_ih = intr_establish(epit1_sc-sc_intr, IPL_CLOCK,
+	IST_LEVEL, imxclock_intr, epit1_sc);
 }
 
 #if 0
@@ -17,3 +113,31 @@
 setstatclockrate(int schz)
 {
 }
+
+static int
+imxclock_intr(void *arg)
+{
+	struct imxclock_softc *sc = arg;
+
+	bus_space_write_4(sc-sc_iot, sc-sc_ioh, EPIT_EPITSR, 1);
+	atomic_add_32(imxclock_base, sc-sc_reload_value);
+
+	hardclock((struct clockframe *)arg);
+
+	return 1;
+}
+
+u_int
+imx_epit_get_timecount(struct timecounter *tc)
+{
+	uint32_t counter;
+	uint32_t base;
+	u_int oldirqstate;
+
+	oldirqstate = disable_interrupts(I32_bit);
+	counter = 

CVS commit: src/sys/arch/arm/imx

2009-09-17 Thread Hiroyuki Bessho
Module Name:src
Committed By:   bsh
Date:   Thu Sep 17 16:13:32 UTC 2009

Modified Files:
src/sys/arch/arm/imx: imxuartreg.h

Log Message:
fix a typo of register bit name.


To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/imx/imxuartreg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/imx/imxuartreg.h
diff -u src/sys/arch/arm/imx/imxuartreg.h:1.2 src/sys/arch/arm/imx/imxuartreg.h:1.3
--- src/sys/arch/arm/imx/imxuartreg.h:1.2	Sun Apr 27 18:58:44 2008
+++ src/sys/arch/arm/imx/imxuartreg.h	Thu Sep 17 16:13:32 2009
@@ -1,4 +1,4 @@
-/* $Id: imxuartreg.h,v 1.2 2008/04/27 18:58:44 matt Exp $ */
+/* $Id: imxuartreg.h,v 1.3 2009/09/17 16:13:32 bsh Exp $ */
 /*
  * register definitions for Freescale i.MX31 and i.MX31L UARTs
  *
@@ -108,7 +108,7 @@
 #define IMX_UCR2_RTSEN		BIT(4)		/* rw */
 #define IMX_UCR2_WS		BIT(5)		/* rw */
 #define IMX_UCR2_STPB		BIT(6)		/* rw */
-#define IMX_UCR2_PRDE		BIT(7)		/* rw */
+#define IMX_UCR2_PROE		BIT(7)		/* rw */
 #define IMX_UCR2_PREN		BIT(8)		/* rw */
 #define IMX_UCR2_RTEC		BITS(10,9)	/* rw */
 #define IMX_UCR2_ESCEN		BIT(11)		/* rw */