Module Name:src
Committed By: rin
Date: Sat Nov 21 08:09:21 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon.c
Log Message:
Fix build with clang for earmv7hf; loadroundkey() is used only for __aarch64__.
To generate a diff of this commit:
cvs rdiff -u
Module Name:src
Committed By: riastradh
Date: Thu Sep 10 11:31:04 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
aes neon: Gather mc_forward/backward so we can load 256 bits at once.
To generate a diff of this commit:
cvs rdiff -u
Module Name:src
Committed By: riastradh
Date: Thu Sep 10 11:30:28 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
aes neon: Hoist dsbd/dsbe address calculation out of loop.
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10
Module Name:src
Committed By: riastradh
Date: Thu Sep 10 11:30:08 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
aes neon: Tweak register usage.
- Call r12 by its usual name, ip.
- No need for r7 or r11=fp at the moment.
To generate a
Module Name:src
Committed By: riastradh
Date: Thu Sep 10 11:29:43 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
aes neon: Write vtbl with {qN} rather than {d(2N)-d(2N+1)}.
Cosmetic; no functional change.
To generate a diff of this
Module Name:src
Committed By: riastradh
Date: Thu Sep 10 11:29:02 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
aes neon: Issue 256-bit loads rather than pairs of 128-bit loads.
Not sure why I didn't realize you could do this before!
Module Name:src
Committed By: riastradh
Date: Tue Sep 8 23:58:09 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
aesarmv8: Reallocate registers to shave off unnecessary MOV.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15
Module Name:src
Committed By: riastradh
Date: Tue Sep 8 23:57:43 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
aesarmv8: Issue two 4-register ld/st, not four 2-register ld/st.
To generate a diff of this commit:
cvs rdiff -u -r1.13
Module Name:src
Committed By: riastradh
Date: Tue Sep 8 23:57:13 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
aesarmv8: Adapt aes_armv8_64.S to big-endian.
Patch mainly from (and tested by) jakllsch@ with minor tweaks by me.
To
Module Name:src
Committed By: riastradh
Date: Sun Aug 16 18:02:03 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S files.aesneon
Log Message:
Fix AES NEON code for big-endian softfp ARM.
...which is how the kernel runs. Switch to using __SOFTFP__ for
Module Name:src
Committed By: riastradh
Date: Sun Aug 9 02:00:57 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_subr.c
Log Message:
Nix outdated comment.
I implemented this parallelism a couple weeks ago.
To generate a diff of this commit:
cvs rdiff -u
Module Name:src
Committed By: riastradh
Date: Tue Jul 28 20:11:09 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon.c aes_neon_impl.h aes_neon_subr.c
arm_neon.h
Log Message:
Draft 2x vectorized neon vpaes for aarch64.
Gives a modest speed boost
Module Name:src
Committed By: riastradh
Date: Tue Jul 28 14:01:35 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/x86: aes_via.c
Log Message:
Initialize authctr in both branches.
I guess I didn't test the unaligned case, weird.
To generate a diff of this commit:
cvs
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:54:12 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
Issue aese/aesmc and aesd/aesimc in pairs.
Advised by the aarch64 optimization guide; increases cgd throughput
by about
Module Name:src
Committed By: riastradh
Date: Mon Jul 27 20:52:11 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
PIC for aes_neon_32.S.
Without this, tests/sys/crypto/aes/t_aes fails to start on armv7
because of R_ARM_ABS32 relocations
Module Name:src
Committed By: riastradh
Date: Sat Jul 25 22:45:10 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/x86: immintrin.h
Log Message:
Add some Intel intrinsics for ChaCha.
_mm_load1_ps
_mm_loadu_si128
_mm_movelh_ps
_mm_slli_epi32
_mm_storeu_si128
Module Name:src
Committed By: riastradh
Date: Sat Jul 25 22:44:32 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/x86: immintrin.h
Log Message:
Fix target attribute on _mm_movehl_ps, fix clang _mm_unpacklo_epi64.
- _mm_movehl_ps is available in SSE2, no need for SSSE3.
Module Name:src
Committed By: riastradh
Date: Sat Jul 25 22:42:31 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: arm_neon.h
Log Message:
Fix missing clang big-endian case.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5
Module Name:src
Committed By: riastradh
Date: Sat Jul 25 22:43:01 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: arm_neon.h
Log Message:
Add 32-bit load, store, and shift intrinsics.
vld1q_u32
vst1q_u32
vshlq_n_u32
vshrq_n_u32
To generate a diff of this commit:
Module Name:src
Committed By: riastradh
Date: Sat Jul 25 22:36:06 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon.h aes_neon_impl.c aes_neon_subr.c
arm_neon.h
Log Message:
Implement AES-CCM with NEON.
To generate a diff of this commit:
cvs
Module Name:src
Committed By: riastradh
Date: Sat Jul 25 22:32:09 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
Invert some loops to save a branch instruction on every iteration.
To generate a diff of this commit:
cvs rdiff -u -r1.6
Module Name:src
Committed By: riastradh
Date: Sat Jul 25 22:31:32 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/x86: aes_via.c
Log Message:
Implement AES-CCM with VIA ACE.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5
Module Name:src
Committed By: riastradh
Date: Sat Jul 25 22:31:04 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/x86: aes_ssse3.h aes_ssse3_impl.c
aes_ssse3_subr.c immintrin.h
Log Message:
Implement AES-CCM with SSSE3.
To generate a diff of this commit:
Module Name:src
Committed By: riastradh
Date: Sat Jul 25 22:29:56 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/x86: aes_sse2.h aes_sse2_impl.c aes_sse2_subr.c
Log Message:
Implement AES-CCM with SSE2.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4
Module Name:src
Committed By: riastradh
Date: Sat Jul 25 22:29:06 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/x86: aes_ni.c aes_ni.h aes_ni_64.S
Log Message:
Implement AES-CCM with x86 AES-NI.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4
Module Name:src
Committed By: riastradh
Date: Sat Jul 25 22:11:05 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/x86: aes_ni_64.S
Log Message:
Invert some loops to save a jmp instruction on each iteration.
No semantic change intended.
To generate a diff of this
Module Name:src
Committed By: ryo
Date: Thu Jul 23 11:33:01 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: arm_neon.h
Log Message:
fix build with llvm/clang.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/crypto/aes/arch/arm/arm_neon.h
Module Name:src
Committed By: riastradh
Date: Wed Jul 22 06:15:21 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
Fix register name in comment.
Some time ago I reallocated the registers to avoid inadvertently
clobbering the callee-saves
Module Name:src
Committed By: ryo
Date: Sun Jul 19 07:32:43 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
fix build with clang/llvm.
clang aarch64 assembler doesn't accept optional number of lanes of vector
register.
(but ARMARM says
Module Name:src
Committed By: riastradh
Date: Tue Jun 30 23:06:02 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
Reallocate registers to avoid abusing callee-saves registers, v8-v15.
Forgot to consult the AAPCS before committing this
Module Name:src
Committed By: riastradh
Date: Tue Jun 30 21:53:39 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
Log Message:
Use `.arch_extension aes' for aese/aesmc/aesd/aesimc.
Unlike `.arch_extension crypto', this works with clang; both work
Module Name:src
Committed By: riastradh
Date: Tue Jun 30 21:41:04 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_armv8_64.S
src/sys/crypto/aes/arch/x86: aes_ni_64.S
Log Message:
Use .p2align rather than .align.
Apparently on arm, .align is actually an
Module Name:src
Committed By: riastradh
Date: Tue Jun 30 21:24:00 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: arm_neon.h
Log Message:
Tweak clang neon intrinsics so they build.
(this file is still a kludge)
To generate a diff of this commit:
cvs rdiff -u
Module Name:src
Committed By: riastradh
Date: Tue Jun 30 17:03:14 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: files.aesneon
Log Message:
Limit aes_neon to cpu_cortex | aarch64.
We won't use it on any other systems, and it doesn't build without
NEON anyway.
Module Name:src
Committed By: riastradh
Date: Mon Jun 29 23:57:56 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/arm: aes_neon.c files.aesneon
Added Files:
src/sys/crypto/aes/arch/arm: aes_neon_32.S
Log Message:
Provide hand-written AES NEON assembly for arm32.
Module Name:src
Committed By: riastradh
Date: Mon Jun 29 23:50:05 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/x86: aes_sse2.h aes_sse2_impl.c aes_sse2_impl.h
files.aessse2
Added Files:
src/sys/crypto/aes/arch/x86: aes_sse2_subr.c
Log Message:
Module Name:src
Committed By: riastradh
Date: Mon Jun 29 23:41:35 UTC 2020
Modified Files:
src/sys/crypto/aes/arch/x86: aes_via.c
Log Message:
VIA AES: Batch AES-XTS computation into eight blocks at a time.
Experimental -- performance improvement is not clearly worth the
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