are in good hands with Linus and Mark. Rob Herring has a
really good grasp on the DT core code, and in the last week there have
been several volunteers to create and maintain a DT bindings tree. You
can expect to see an email about that hit the list shortly.
Signed-off-by: Grant Likely grant.lik
)
struct spi_master *master = hw-bitbang.master;
spi_bitbang_stop(hw-bitbang);
- platform_set_drvdata(dev, NULL);
spi_master_put(master);
return 0;
}
--
1.7.2.5
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd
deletions(-)
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
--
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Get down to code-level detail
On Mon, 15 Apr 2013 20:42:57 -0700, Doug Anderson diand...@chromium.org wrote:
From: Thomas Abraham thomas.abra...@linaro.org
With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated Samsung specific
gpio bindings is removed.
for the RPI hardware?
It may also be of interest to document (some of) the answers for the above
in spi.h for further reference.
Thanks,
Martin
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd
On Sat, Mar 9, 2013 at 1:10 AM, Rhyland Klein rkl...@nvidia.com wrote:
On 3/2/2013 6:02 PM, Grant Likely wrote:
On Fri, 15 Feb 2013 15:03:50 -0700, Stephen Warren swar...@wwwdotorg.org
wrote:
From: Stephen Warren swar...@nvidia.com
The platform data header is no longer used. Delete
On Wed, 13 Feb 2013 12:03:46 -0800, Girish K S girishks2...@gmail.com wrote:
Currently the drivers supports only the GPIO based i/o pins.
But there are Exynos SoC's that use the same controller with
dedicated i/o pins.
This patch provides provision to support gpio/dedicated pins.
The
On Fri, 15 Feb 2013 16:52:20 +0100, Andreas Larsson andr...@gaisler.com wrote:
Changes since v3:
- Patches 1-7: Added Acked-by: Anton Vorontsov an...@enomsg.org
- Patch 1: Small style tweak lining up function arguments properly
- Patch 7: Changed a style issue with two variables declared on
On Wed, 20 Feb 2013 08:51:48 +0100, Nicolas Ferre nicolas.fe...@atmel.com
wrote:
On 02/19/2013 10:44 PM, Joachim Eastwood :
atmel_spi_transfer() would check speed_hz and fail if
the speed was changed in the transfer. After commit
spi: make sure all transfer has proper speed set
this
On Wed, 27 Feb 2013 11:32:39 +, Manjunathappa, Prakash
prakash...@ti.com wrote:
On Wed, Feb 27, 2013 at 14:09:57, Nori, Sekhar wrote:
On 2/25/2013 4:14 PM, Manjunathappa, Prakash wrote:
Patch enables support for m25p80 SPI flash support on
da850-EVM.
Testing information:
On Fri, 22 Feb 2013 17:09:18 +0900, Boojin Kim boojin@samsung.com wrote:
This patch adds dma maxburst size initialization.
The maxburst should be set by MODE_CFGn.DMA_TYPE,
because the pl330 dma driver supports burst mode.
Signed-off-by: Hyeonkook Kim hk619@samsung.com
Applied,
for an incorrectly formed cs-gpios property */
+ if (nb == 0 || nb == -ENOENT)
return 0;
+ else if (nb 0)
+ return nb;
cs = devm_kzalloc(master-dev,
sizeof(int) * master-num_chipselect,
--
1.7.0.4
--
Grant Likely, B.Sc
: send the line unsubscribe linux-kernel in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
--
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Secret Lab Technologies, Ltd
On Wed, 13 Feb 2013 14:20:25 +0100, Andreas Larsson andr...@gaisler.com wrote:
The return value from of_get_named_gpio is -ENOENT when the given index
matches a hole in the cs-gpios property phandle list. However, the
default value of cs_gpio in struct spi_device and entries of cs_gpios in
with the changes, the non-DT
case handling in probe function also gets removed.
Signed-off-by: Shawn Guo shawn@linaro.org
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Acked-by: Grant Likely grant.lik...@secretlab.ca
On Tue, 26 Feb 2013 14:47:54 +0800, Wenyou Yang wenyou.y...@atmel.com wrote:
if the spi property cs-gpios is set as below:
cs-gpios = 0, pioC 11 0, 0, 0;
the master-num_chipselect will wrongly be set to 0,
and the spi fail to probe.
Signed-off-by: Wenyou Yang wenyou.y...@atmel.com
-by: Grant Likely grant.lik...@secretlab.ca
This series probably needs to be merged together through the arm-soc
tree.
g.
---
drivers/spi/spi-s3c64xx.c | 18 ++
1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
On Fri, 15 Feb 2013 15:03:50 -0700, Stephen Warren swar...@wwwdotorg.org
wrote:
From: Stephen Warren swar...@nvidia.com
The platform data header is no longer used. Delete it.
Signed-off-by: Stephen Warren swar...@nvidia.com
I like the diffstat for this series. Applied!
Thanks,
g.
On Fri, 22 Feb 2013 19:59:11 +0530, Manish Badarkhe badarkhe.man...@gmail.com
wrote:
On Fri, Feb 22, 2013 at 6:07 PM, Laxman Dewangan ldewan...@nvidia.com wrote:
Add SPI driver for NVIDIA's Tegra114 SPI controller. This controller
is different than the older SoCs SPI controller in internal
be
implemented in several different ways. I would still be more specific
here. You can be specific to your specific hardware now, and a more
generic value can be added later.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd
On Wed, 27 Feb 2013 14:58:39 +0100, Peter Korsgaard peter.korsga...@barco.com
wrote:
From: Dries Van Puymbroeck dries.vanpuymbro...@barco.com
This patch contains a driver for a gpio controlled multiplexer on an
SPI bus. This can be useful if a board requires more SPI devices,
and thus more
code
spi/ath79: use gpio_request_one
spi/ath79: avoid multiple initialization of the SPI controller
spi/ath79: add shutdown handler
Grant Likely (4):
spi/of: Use DT aliases for assigning bus number
Merge branch 'broonie/spi-next' of
git://git.kernel.org/.../broonie
On Sun, Feb 17, 2013 at 11:15 AM, Joachim Eastwood manab...@gmail.com wrote:
Hi,
spi-atmel is now broken for all spi transfers in linux-next. This is
caused by commit spi: make sure all transfer has proper speed set.
The reason is the following code in atmel_spi_transfer(...)
849 /*
On Tue, 12 Feb 2013 10:46:27 +0100, Andreas Larsson andr...@gaisler.com wrote:
On 2013-02-11 01:23, Grant Likely wrote:
On Tue, 29 Jan 2013 15:53:43 +0100, Andreas Larsson andr...@gaisler.com
wrote:
Holes in the cs-gpios DT phandle list is supposed to mark that native
chipselects
On Tue, 12 Feb 2013 10:39:02 +0100, Andreas Larsson andr...@gaisler.com wrote:
On 2013-02-11 01:22, Grant Likely wrote:
On Tue, 29 Jan 2013 15:53:42 +0100, Andreas Larsson andr...@gaisler.com
wrote:
When using a gpio chip select with a OF_GPIO_ACTIVE_LOW flag, this needs
to be
known
On Tue, 29 Jan 2013 15:53:39 +0100, Andreas Larsson andr...@gaisler.com wrote:
This lets of_gpio_named_count return an errno on errors by being able to
distinguish between reaching the end of the phandle list and getting some
other
error from of_parse_phandle_with_args.
Return error from
(cs, -EINVAL, master-num_chipselect);
+ for (i = 0; i master-num_chipselect; i++)
+ cs[i] = -EINVAL;
for (i = 0; i nb; i++)
cs[i] = of_get_named_gpio(np, cs-gpios, i);
--
1.7.0.4
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd
--
1.7.0.4
--
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Secret Lab Technologies, Ltd.
--
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http
. A
+ * chipselect that should be handled natively by the controller driver is
+ * set to -EEXIST.
* @cs_gpio_flags: possible array of of_gpio_flags corresponding to cs_gpios
*
* Each SPI master controller can communicate with one or more @spi_device
--
1.7.0.4
--
Grant Likely, B.Sc, P.Eng
On Wed, 6 Feb 2013 10:31:04 +0100, Lars Poeschel poesc...@lemonage.de wrote:
On Tuesday 05 February 2013 at 15:29:09, Grant Likely wrote:
On Thu, 31 Jan 2013 21:51:36 +0100, Linus Walleij
linus.wall...@linaro.org wrote:
On Thu, Jan 31, 2013 at 4:58 PM, Lars Poeschel la...@wh2.tu-dresden.de
On Wed, 6 Feb 2013 18:01:57 +0100, Lars Poeschel la...@wh2.tu-dresden.de
wrote:
From: Lars Poeschel poesc...@lemonage.de
Explicitly allow -1 as a legal value for the
mcp23s08_platform_data-base. This is the special value lets the
kernel choose a valid global gpio base number.
On Wed, 6 Feb 2013 18:01:58 +0100, Lars Poeschel la...@wh2.tu-dresden.de
wrote:
From: Lars Poeschel poesc...@lemonage.de
This converts the mcp23s08 driver to be able to be used with device
tree.
There is a special mcp,chips property, that correspond to the chips
member of the struct
On Tue, 5 Feb 2013 15:09:41 -0800, Girish K S girishks2...@gmail.com wrote:
The status of the interrupt is available in the status register,
so reading the clear pending register and writing back the same
value will not actually clear the pending interrupts. This patch
modifies the interrupt
On Wed, Feb 6, 2013 at 8:12 PM, Girish KS girishks2...@gmail.com wrote:
On Wed, Feb 6, 2013 at 2:26 AM, Grant Likely grant.lik...@secretlab.ca
wrote:
On Tue, 5 Feb 2013 15:09:41 -0800, Girish K S girishks2...@gmail.com
wrote:
The status of the interrupt is available in the status register
and read our blog at www.csr.com/blog
___
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linux-arm-ker...@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd
On Wed, 26 Dec 2012 14:48:51 +0900, Juha Lumme juha.lu...@gmail.com wrote:
On MX23 the XFER_COUNT part in ctrl0 field in DMA descriptor was improperly
OR'd during the construction of DMA descriptor chain, instead of being
freshly set.
Because of that too many bytes were being expected from SPI
On Thu, 27 Dec 2012 10:42:24 +0100, Gabor Juhos juh...@openwrt.org wrote:
The driver uses the as fast as it can approach
to drive the SCK signal. However this does not
work with certain low speed SPI chips (e.g. the
PCF2123 RTC chip).
The patch adds per-bit slowdowns in order to be
able to
);
+ if (bits == 1)
+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, out);
word = 1;
}
--
1.7.10
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd.
--
Free Next-Gen Firewall
- sp-ioc_base = ~AR71XX_SPI_IOC_CS0;
- ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp-ioc_base);
}
return 0;
--
1.7.10
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd.
--
Free Next
;
}
static void ath79_spi_cleanup_cs(struct spi_device *spi)
--
1.7.10
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd.
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On Thu, 27 Dec 2012 10:42:29 +0100, Gabor Juhos juh...@openwrt.org wrote:
The SPI controller of the AR7xxx/AR9xxx SoCs
have a special mode which allows the SoC to
directly read data from SPI flash chips. In
this mode, the content of the SPI flash chip
can be accessed via a memory mapped
On Tue, 22 Jan 2013 16:50:30 +0100, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
On 09/01/2013 09:37, Maxime Ripard wrote:
On 27/12/2012 22:54, Maxime Ripard wrote:
The bindings assumed that the gpios properties were always there, which
made the NO_TX and NO_RX mode not usable
-speed_hz)
+ xfer-speed_hz = spi-max_speed_hz;
}
message-spi = spi;
--
1.7.1.1
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd.
--
Free Next-Gen Firewall Hardware Offer
Buy
-max_speed_hz ? : tspi-spi_max_frequency;
ret = pm_runtime_get_sync(tspi-dev);
if (ret 0) {
dev_err(tspi-dev, pm runtime failed, e = %d\n, ret);
--
1.7.1.1
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd
(Sascha Hauer, Pengutronix);
MODULE_LICENSE(GPL);
+MODULE_ALIAS(platform: DRIVER_NAME);
--
1.7.9.5
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd.
--
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On Thu, 10 Jan 2013 11:04:21 +0900, Jingoo Han jg1@samsung.com wrote:
Use devm_clk_get() and devm_request_irq() rather than clk_get() and
request_irq() to make cleanup paths more simple.
Signed-off-by: Jingoo Han jg1@samsung.com
Applied, thanks.
g.
,
mem_res-end, mem_res-start,
--
1.7.2.5
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd.
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On Fri, 25 Jan 2013 14:14:31 +, Arnd Bergmann a...@arndb.de wrote:
Since we no longer allow building without hotplug, the
atmel_spi_remove function is always present and we should
not use __exit_p() to refer to it.
Without this patch, building at91_dt_defconfig results in:
://github.com/torvalds/linux.git master
Acked-by: Grant Likely grant.lik...@secretlab.ca for the GPIO and SPI
bits.
--
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the pattern. Remove then now to be rid of it.
Reported-by: Arnd Bergmann a...@arndb.de
[Arnd set a patch cleaning up one, and then I found more]
Signed-off-by: Grant Likely grant.lik...@secretlab.ca
---
drivers/spi/spi-atmel.c |2 +-
drivers/spi/spi-au1550.c |4 ++--
drivers/spi
On Sun, 27 Jan 2013 03:33:59 +, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Wed, Jan 09, 2013 at 06:31:09PM +0100, Lars-Peter Clausen wrote:
The second function spi_sync_transfer() takes a SPI device and an array of
spi_transfers. It will allocate a new spi_message (on the
);
+ return id;
}
return mpc512x_psc_spi_do_probe(op-dev, (u32) regaddr64, (u32) size64,
--
1.7.5.4
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd.
--
Free Next-Gen Firewall Hardware Offer
= mpc512x_psc_spi_transfer;
master-cleanup = mpc512x_psc_spi_cleanup;
--
1.7.5.4
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd.
--
Free Next-Gen Firewall Hardware Offer
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);
+ for (i = 0; i mps-num_cs; i++)
+ if (gpio_is_valid(mps-chipselects[i]))
+ gpio_free(mps-chipselects[i]);
spi_master_put(master);
return 0;
--
1.7.5.4
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd
all explicit
error messages can be removed from the failure code paths.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: spi-devel-general@lists.sourceforge.net
Looks fine by me. Go ahead and merge with the rest of the series
= kmalloc(max((unsigned)SPI_BUFSIZ, n_tx + n_rx),
+ GFP_KERNEL | GFP_DMA);
if (!local_buf)
return -ENOMEM;
} else {
--
1.7.10.4
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd
all the necessary information from the device tree.
Like the patch that converts the dw_dma controller, this is completely
untested and is looking for someone to try it out.
Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Mark Brown broo
all the necessary information from the device tree.
Like the patch that converts the dw_dma controller, this is completely
untested and is looking for someone to try it out.
Signed-off-by: Arnd Bergmann a...@arndb.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Jiri Slaby jsl...@suse.cz
(-)
--
1.7.10.4
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd.
--
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and get the hardware for free! Learn
On Sun, 3 Feb 2013 15:15:12 +0100, Jonas Gorski j...@openwrt.org wrote:
The hardware does not support keeping CS asserted after sending one
FIFO buffer worth of data, so reject transfers requiring CS being kept
asserted, either between transers or for a certain time after it,
or exceeding the
+= t-len;
+ first = NULL;
+ n_transfers = 0;
+ total_len = 0;
+ can_use_prepend = false;
+ }
}
exit:
m-status = status;
--
1.7.10.4
--
Grant Likely, B.Sc, P.Eng.
Secret Lab
);
-}
-module_exit(orion_spi_exit);
+module_platform_driver(orion_spi_driver);
MODULE_DESCRIPTION(Orion SPI driver);
MODULE_AUTHOR(Shadi Ammouri sh...@marvell.com);
--
1.7.8.6
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd
/__devexit purge since they didn't match the pattern.
Remove then now to be rid of it.
v2: purge __init also
Reported-by: Arnd Bergmann a...@arndb.de
[Arnd set a patch cleaning up one, and then I found more]
Signed-off-by: Grant Likely grant.lik...@secretlab.ca
---
drivers/spi/spi-atmel.c |2
On Wed, 30 Jan 2013 21:33:31 +0100, John Crispin blo...@openwrt.org wrote:
Due to hardware limitations of the spi/flash frontend of the EBU we need to
set
the SPI_MASTER_HALF_DUPLEX flag.
Signed-off-by: Thomas Langer thomas.lan...@lantiq.com
Signed-off-by: John Crispin blo...@openwrt.org
On Fri, 18 Jan 2013 10:03:28 +0100, Thomas De Schampheleire
patrickdepinguin+spide...@gmail.com wrote:
Hi,
The Freescale eSPI controller driver is broken in several ways. I already
attempted to fix this with a patch many months back. The patch works for
me, but never got feedback from the
On Wed, 2 Jan 2013 10:19:08 -0500, Murali Karicheri m-kariche...@ti.com wrote:
On 12/22/2012 05:08 AM, Grant Likely wrote:
On Fri, 21 Dec 2012 15:13:26 -0500, Murali Karicherim-kariche...@ti.com
wrote:
With RT pre-empt patch applied to Linux kernel, the irq handler will be
force
On Tue, 5 Feb 2013 15:04:41 +, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Tue, Feb 05, 2013 at 02:30:40PM +, Grant Likely wrote:
Another option is to allow longer transfers if a GPIO is used for the CS
line. A lot of SPI controllers need to do that.
That isn't
On Wed, 30 Jan 2013 13:15:24 +0100, Andreas Larsson andr...@gaisler.com wrote:
This makes the cpu mode of the driver available outside of an FSL SOC
and even powerpc environment. This is accomplished by putting things
regarding fsl specific code and to cpm specific code within ifdefs.
On Wed, 30 Jan 2013 21:33:30 +0100, John Crispin blo...@openwrt.org wrote:
Rather than calling m-complete() directly we choose the sane way and call
spi_finalize_current_message instead.
Signed-off-by: Thomas Langer thomas.lan...@lantiq.com
Signed-off-by: John Crispin blo...@openwrt.org
On Thu, 10 Jan 2013 13:04:37 +0100 (CET), Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:
On Thu, 10 Jan 2013, Linus Walleij wrote:
On Wed, Jan 9, 2013 at 3:44 PM, Guennadi Liakhovetski
g.liakhovet...@gmx.de wrote:
[ 79.968000] mmc0: new SD card on SPI
[ 79.976000] mmcblk0:
On Sun, 30 Dec 2012 18:14:55 +0900, Juha Lumme juha.lu...@gmail.com wrote:
Hi,
I am having issues communicating with a micro controller connected to
SPI bus, using spidev.
I would like to send messages to my MSP430 from user land, but so far no
luck.
At least I know that my SPI bus
On Tue, 5 Feb 2013 16:00:04 +0100, Jonas Gorski j...@openwrt.org wrote:
On Tue, 05 Feb 2013 14:35:30 +
Grant Likely grant.lik...@secretlab.ca wrote:
On Sun, 3 Feb 2013 15:15:13 +0100, Jonas Gorski j...@openwrt.org wrote:
This SPI controller does not support keeping CS asserted after
...@opensource.wolfsonmicro.com
Acked-by: Grant Likely grant.lik...@secretlab.ca
---
MAINTAINERS |1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index ae9f8b8..6332eff 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7391,6 +7391,7 @@ F:drivers/clk/spear/
SPI SUBSYSTEM
M
.
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd.
--
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needs
to go through the Tegra tree due to dependencies.
Acked-by: Grant Likely grant.lik...@secretlab.ca
No problem merging it via the Tegra tree.
g.
--
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On Mon, 24 Dec 2012 11:16:52 -0500, Jun Chen jun.d.c...@intel.com wrote:
On Fri, 2012-12-21 at 19:06 +, Grant Likely wrote:
The problem is that I don't understand why this change is necessary.
spi_devices should always be children of an spi_master, not siblings.
What is the problem
On Thu, 3 Jan 2013 19:04:55 +0300, Dan Carpenter dan.carpen...@oracle.com
wrote:
On Sat, Dec 22, 2012 at 09:56:20AM +, Grant Likely wrote:
On Wed, 19 Dec 2012 19:39:14 +0300, Dan Carpenter
dan.carpen...@oracle.com wrote:
On Wed, Dec 19, 2012 at 03:11:54PM +, Grant Likely wrote
On Fri, 21 Dec 2012 14:48:38 +, Grant Likely grant.lik...@secretlab.ca
wrote:
On Fri, Dec 21, 2012 at 2:43 PM, Anatolij Gustschin ag...@denx.de wrote:
Use unique PSCx register base offset to obtain the
SPI PSC number used for SPI bus id.
Signed-off-by: Anatolij Gustschin ag
On Fri, 21 Dec 2012 12:39:52 -0500, Jun Chen jun.d.c...@intel.com wrote:
On Wed, 2012-12-19 at 16:21 +, Grant Likely wrote:
On Wed, 19 Dec 2012 09:04:16 +, Mark Brown
broo...@opensource.wolfsonmicro.com wrote:
On Wed, Dec 19, 2012 at 04:44:03AM -0500, Jun Chen wrote
On Thu, 20 Dec 2012 11:33:47 +0530, Laxman Dewangan ldewan...@nvidia.com
wrote:
On Wednesday 19 December 2012 09:54 PM, Grant Likely wrote:
On Tue, 18 Dec 2012 14:25:43 +0530, Laxman Dewanganldewan...@nvidia.com
wrote:
The spi core make sure that each transfer structure have the proper
On Thu, 20 Dec 2012 16:30:36 +0100, Federico Vaga federico.v...@gmail.com
wrote:
On Wednesday 19 December 2012 15:09:25 Grant Likely wrote:
Not a good idea. sysfs is not a good place for operational
interfaces. Please use the spi character devices for direct
manipulation of the SPI
On Wed, 19 Dec 2012 19:39:14 +0300, Dan Carpenter dan.carpen...@oracle.com
wrote:
On Wed, Dec 19, 2012 at 03:11:54PM +, Grant Likely wrote:
On Tue, 11 Dec 2012 16:36:27 -0800 (PST), Kuninori Morimoto
kuninori.morimoto...@renesas.com wrote:
Hi
According to its
),
- dspi);
+ ret = request_threaded_irq(dspi-irq, davinci_spi_irq, dummy_thread_fn,
+ 0, dev_name(pdev-dev), dspi);
if (ret)
goto unmap_io;
--
1.7.9.5
--
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd
;
}
return mpc512x_psc_spi_do_probe(op-dev, (u32) regaddr64, (u32)
size64,
--
1.7.7.6
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
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On Sat, 15 Dec 2012 00:27:58 +, Grant Likely grant.lik...@secretlab.ca
wrote:
On Tue, 11 Dec 2012 16:20:39 -0500, Murali Karicheri m-kariche...@ti.com
wrote:
This adds OF support to DaVinci SPI controller to configure platform
data through device bindings. Also replaces clk_enable
On Sat, 24 Nov 2012 18:20:08 +0100, Federico Vaga federico.v...@gmail.com
wrote:
This patch introduce the use of the sysfs attribute for the spidev
configuration. This avoid the user to have a specific program which does
ioctl() on spidev. The user can easily does cat (to read) and echo (to
On Tue, 11 Dec 2012 16:36:27 -0800 (PST), Kuninori Morimoto
kuninori.morimoto...@renesas.com wrote:
Hi
According to its documentation, clk_get() returns a valid IS_ERR()
condition
containing errno, so we should call IS_ERR() rather than a NULL check.
Signed-off-by: Cyril Roelandt
. If that is not
the case then it is a bug to be fixed.
g.
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Secret Lab Technologies, Ltd.
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On Mon, 17 Dec 2012 12:25:26 +0100, Bastian Hecht hec...@gmail.com wrote:
Hi Nobuhiro,
2012/12/17 Nobuhiro Iwamatsu iwama...@nigauri.org:
Hi, Bastian.
On Wed, Dec 12, 2012 at 8:54 PM, Bastian Hecht hec...@gmail.com wrote:
From: Bastian Hecht hec...@gmail.com
This adds the
On Wed, 12 Dec 2012 12:54:47 +0100, Bastian Hecht hec...@gmail.com wrote:
From: Bastian Hecht hec...@gmail.com
The MSIOF hardware block is used in the SH Mobile series as well, so we
add it here.
Signed-off-by: Bastian Hecht hechtb+rene...@gmail.com
---
Also already applied.
g.
On Wed, 12 Dec 2012 12:54:46 +0100, Bastian Hecht hec...@gmail.com wrote:
From: Bastian Hecht hec...@gmail.com
clk_get() no longer needs a character string for associating the right
clock as this is done via the device struct now.
Signed-off-by: Bastian Hecht hechtb+rene...@gmail.com
This
documentation and code changes applied together.
g.
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Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd.
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On Sat, 10 Nov 2012 18:07:42 +0100, Thierry Reding
thierry.red...@avionic-design.de wrote:
On Fri, Nov 09, 2012 at 10:28:38AM -0700, Stephen Warren wrote:
On 11/09/2012 10:10 AM, Mark Brown wrote:
On Fri, Nov 09, 2012 at 10:04:56AM -0700, Stephen Warren wrote:
However just FYI, it
On Tue, 18 Dec 2012 14:25:43 +0530, Laxman Dewangan ldewan...@nvidia.com
wrote:
The spi core make sure that each transfer structure have the proper
setting for bits_per_word before calling low level transfer APIs.
Hence it is no more require to check again in low level driver for
this field
|2 +-
drivers/spi/spi.c |5 +++-
7 files changed, 53 insertions(+), 11 deletions(-)
create mode 100644 Documentation/devicetree/bindings/spi/spi_atmel.txt
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Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd
[Forgot to cc: lkml]
On Thu, Dec 20, 2012 at 12:46 AM, Grant Likely
grant.lik...@secretlab.ca wrote:
Hi Linus,
And finally, here are the bug fixes I've queued up for SPI. Very
little in the way of excitement other than a device driver feature
that should have been in my first pull req, but I
On Mon, 17 Dec 2012 11:13:51 +0100, Jean-Christophe PLAGNIOL-VILLARD
plagn...@jcrosoft.com wrote:
On 01:03 Sat 15 Dec , Grant Likely wrote:
On Wed, 12 Dec 2012 16:13:08 +0100, Jean-Christophe PLAGNIOL-VILLARD
plagn...@jcrosoft.com wrote:
On 14:37 Fri 23 Nov , Nicolas Ferre wrote
On Thu, 13 Dec 2012 17:09:34 +0800, chao bi chao...@intel.com wrote:
On Tue, 2012-12-11 at 16:46 +, Grant Likely wrote:
On Tue, 11 Dec 2012 16:58:31 +0800, chao bi chao...@intel.com wrote:
On Thu, 2012-12-06 at 12:38 +, Grant Likely wrote:
On Wed, 21 Nov 2012 10:16:43 +0800, chao
().
Signed-off-by: Murali Karicheri m-kariche...@ti.com
Reviewed-by : Grant Likely grant.lik...@secretlab.ca
Applied, thanks.
I did remove the OF_ALIAS_N property though. I know the COMPATIBLE one
uses it, but it is actually kind of redundant since it can also be
determined by counting the number
);
+
+ complete(mcspi_dma-dma_tx_completion);
}
static void omap2_mcspi_tx_dma(struct spi_device *spi,
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Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies, Ltd.
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