On Fri, Dec 17, 2010 at 03:33:58PM +0100, Wolfram Sang wrote:
> Signed-off-by: Wolfram Sang
Applied to merge branch for 2.6.37, thanks.
g.
> ---
> drivers/spi/mpc52xx_spi.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/spi/mpc52xx_spi.c b/drivers/spi/m
On Tue, Dec 21, 2010 at 09:27:02AM +0800, Mingkai Hu wrote:
> Or else we cann't operate on the right address when the trans length
> is greater than 65535.
>
> Signed-off-by: Mingkai Hu
Applied to merge branch for 2.6.27, thanks.
g.
> ---
> drivers/spi/spi_fsl_espi.c | 16 +---
>
On Tue, Dec 21, 2010 at 09:26:07AM +0800, Mingkai Hu wrote:
> The user must read N bytes of SPIRF (1 <= N <= 4) that do not exceed the
> amount of data in the receive FIFO, so read the SPIRF byte by byte when
> the data in receive FIFO is less than 4 bytes.
>
> On Simics, when read N bytes that ex
On Wed, Dec 22, 2010 at 02:28:23PM +0100, Rafael J. Wysocki wrote:
> On Wednesday, December 22, 2010, Mark Brown wrote:
> > Allow SPI drivers to use runtime PM and other dev_pm_ops features by
> > implementing dev_pm_ops for the bus. The existing bus specific suspend
> > and resume functions will b
.
>
> Acked-by: Linus Walleij
> Acked-by: Grant Likely
> Signed-off-by: Feng Tang
> [Typo fix and renames to match intel_mid_dma renaming]
> Signed-off-by: Vinod Koul
> Signed-off-by: Alan Cox
Applied for -next, thanks.
g.
> ---
> drivers/spi/Kconfig|4
On Fri, Dec 24, 2010 at 01:59:10PM +0800, Feng Tang wrote:
> Acked-by: Grant Likely
> Signed-off-by: Feng Tang
Applied for -next, thanks.
g.
> ---
> drivers/spi/dw_spi.c |8
> 1 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/spi/d
On Fri, Dec 24, 2010 at 01:59:09PM +0800, Feng Tang wrote:
> The SPI polling loop timeout only works with HZ=100 as the loop was
> actually too short.
>
> Also add appropriate cpu_relax() in the busy wait loops...
>
> Acked-by: Grant Likely
> Signed-off-by: Arjan van de
On Wed, Dec 22, 2010 at 11:13:59PM +0100, Linus Walleij wrote:
> This variable is a bool but defined an int and defined completely
> backwards. This makes the code more readable.
>
> Signed-off-by: Linus Walleij
Merged for -next, thanks.
g.
> ---
> drivers/spi/amba-pl022.c | 24 ++--
On Wed, Dec 22, 2010 at 11:13:48PM +0100, Linus Walleij wrote:
> Signed-off-by: Linus Walleij
Merged for -next, thanks.
g.
> ---
> drivers/spi/amba-pl022.c |8
> 1 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/spi/amba-pl022.c b/drivers/spi/amba-pl022.c
On Wed, Dec 22, 2010 at 11:13:37PM +0100, Linus Walleij wrote:
> The sglen return by the dma_map_sg() should be passed to the DMA
> engine, not the one passed in. If we one day have a DMA mapper
> that can coalesce entries, this will bug due to a too large
> number of entries being passed in.
>
>
On Wed, Dec 22, 2010 at 11:13:07PM +0100, Linus Walleij wrote:
> The struct device for the DMA engine is the apropriate one to use
> when mapping/unmapping buffers. This is because the memory which
> is addressable by DMA is determined by the DMA engine rather than
> the device.
>
> Reported-by: R
On Mon, Dec 20, 2010 at 10:13 AM, Sebastian Andrzej Siewior
wrote:
> This was fixed by David Lamparter in v2.6.36-rc5 3486008
> ("spi: free children in spi_unregister_master, not siblings") and broken
> again in v2.6.37-rc1~2^2~4 during the merge of 2b9603a0 ("spi: enable
> spi_board_info to be re
On Fri, Dec 24, 2010 at 11:40:50AM +0900, Tomoya MORINAGA wrote:
> It seems spi_topcliff_pch of linux-2.6.37-rc6 degraded by previous patch.
> In fact, data transfer fails on evaluation board testing.
> I found like the following register miss-setting line.
> Using this patch, I have confirmed data
On Thu, Dec 23, 2010 at 09:27:20PM -0500, Ben Gamari wrote:
> On Thu, 23 Dec 2010 17:37:12 -0700, Grant Likely
> wrote:
> > On Thu, Dec 23, 2010 at 4:09 PM, Ben Gamari wrote:
> > > The reason I left this up to the board is it's easy to foresee cases
> > > w
On Thu, Nov 25, 2010 at 09:05:00AM +0100, Uwe Kleine-König wrote:
> On Thu, Nov 25, 2010 at 12:03:43PM +0800, Jason Wang wrote:
> > It is reasonable, looks fine to me. :-)
> >
> > Jason.
> I'll interpret this as an Ack.
So will I. :-)
applied for -next
g.
-
On Thu, Dec 23, 2010 at 4:09 PM, Ben Gamari wrote:
> On Thu, 23 Dec 2010 14:38:57 -0700, Grant Likely
> wrote:
>> On Tue, Dec 21, 2010 at 10:56 AM, Ben Gamari wrote:
>> > This mechanism is in large part stolen from the s3c64xx-spi module. To
>> > use this functio
el Moorestown platform
>
> It has been tested with a Option GTM501L 3G modem, to use DMA mode,
> DMA controller 2 of Moorestown has to be enabled
>
> Signed-off-by: Feng Tang
> [Typo fix and renames to match intel_mid_dma renaming]
> Signed-off-by:
On Wed, Nov 24, 2010 at 04:49:47PM -0800, Kevin Hilman wrote:
> Gregory CLEMENT writes:
>
> > As request by Grant Likely, there is no more cover letter. Full changelog
> > is following.
> > I am still reluctant to add this changelog in the patch description, as it
>
struct omap2_mcspi_csinfo *csinfo = spi->controller_data;
> + (*csinfo->set_level)(csinfo->line, cs_active);
> + } else {
> + u32 l = mcspi_cached_chconf0(spi);
> + MOD_REG_BIT(l, OMAP2
On Thu, Dec 23, 2010 at 12:12:10PM +0100, Richard Genoud wrote:
> The check on cpu_is_mx25 and cpu_is_mx35 was made twice.
> This is obviously wrong.
> Anyway, this patch won't change the previous behaviour which is
> SPI_IMX_VER_0_7 for mx25 and mx35.
>
> Signed-off-by: Richard Genoud
applied,
On Thu, Dec 23, 2010 at 03:29:34PM +0100, Uwe Kleine-König wrote:
> On Thu, Dec 23, 2010 at 12:12:10PM +0100, Richard Genoud wrote:
> > The check on cpu_is_mx25 and cpu_is_mx35 was made twice.
> > This is obviously wrong.
> obviously wrong but no wrong behaviour. Your patch only makes the code
> c
On Thu, Dec 23, 2010 at 12:12:09PM +0100, Richard Genoud wrote:
> On imx25 soc, MX25_INT_CSPI3 is 0
> (cf arch/arm/plat-mxc/include/mach/mx25.h).
> So, the test (spi_imx->irq <= 0) returned an error
> for this platform.
> This patch corrects this behaviour.
>
> Signed-off-by: Richard Genoud
> ---
On Sat, Dec 11, 2010 at 8:34 AM, Michael Williamson
wrote:
> On 11/18/2010 08:14 AM, Nori, Sekhar wrote:
>> Hi Grant,
>>
>> On Thu, Nov 18, 2010 at 17:01:24, Nori, Sekhar wrote:
>>> On Thu, Nov 18, 2010 at 12:23:24, Nori, Sekhar wrote:
Here is the pull request:
The following ch
On Thu, Nov 25, 2010 at 3:08 PM, J.I. Cameron wrote:
> Hi,
>
> I've just been looking through some recent drivers from Analog Devices that
> are in staging-next (and hence linux-next
> http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git;a=blob;f=drivers/staging/iio/gyro/adis16060_core.c;
On Thu, Nov 25, 2010 at 4:54 PM, Russell King - ARM Linux
wrote:
> On Wed, Nov 24, 2010 at 04:39:05PM +0100, Sebastian Andrzej Siewior wrote:
>> Mark Brown wrote:
>>> On Wed, Nov 24, 2010 at 03:09:25PM +0100, Sebastian Andrzej Siewior wrote:
>>>
I've been pointed out to this commit but I don'
t's just an initcall. However, I don't
know what the impact area is for subsystems that depend on cpufreq.
Are there drivers that depend on cpufreq before initialized?
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
-
On Sun, Nov 21, 2010 at 1:02 PM, Ryan Mallon wrote:
> On 11/20/2010 04:55 AM, Cyril Chemparathy wrote:
>> TI's SSP controller pins can be directly read and written to behave like a
>> GPIO. This patch adds a GPIO driver that exposes such functionality.
>>
>> Signed-off-by: Cyril Chemparathy
>> -
On Tue, Nov 16, 2010 at 07:17:18PM -0500, Cyril Chemparathy wrote:
> On 11/16/2010 02:47 AM, Grant Likely wrote:
> > On Tue, Nov 16, 2010 at 12:22 AM, Grant Likely
> > wrote:
> >> On Mon, Nov 15, 2010 at 02:12:06PM -0500, Cyril Chemparathy wrote:
> >>> This pat
On Wed, Nov 17, 2010 at 04:13:32PM +0530, Sekhar Nori wrote:
> This patch series represents a break-up into reviewable portions
> of the work originally done by Brian and posted here:
>
> https://patchwork.kernel.org/patch/114924/
>
> While this series does not exactly add up to what Brian's patc
On Tue, Nov 16, 2010 at 3:23 PM, Russell King - ARM Linux
wrote:
> On Tue, Nov 16, 2010 at 01:35:40PM -0700, Grant Likely wrote:
>> I'll let Russel make the decision here; but I must admit I'm puzzled.
> ^
> Grr.
Sorry; typo. I *do* know how to spell you
On Tue, Nov 16, 2010 at 11:34:09AM +, Mark Brown wrote:
> On Tue, Nov 16, 2010 at 12:47:04AM -0700, Grant Likely wrote:
> > On Tue, Nov 16, 2010 at 12:22 AM, Grant Likely
>
> > > Instead, it is now incumbent on the board support code to ensure that
> > > any
On Tue, Nov 16, 2010 at 9:15 AM, Cyril Chemparathy wrote:
> On 11/16/2010 02:10 AM, Grant Likely wrote:
>> On Mon, Nov 15, 2010 at 02:12:03PM -0500, Cyril Chemparathy wrote:
>>> TI's sequencer serial port (TI-SSP) is a jack-of-all-trades type of serial
>>> por
On Sat, Nov 13, 2010 at 12:44:42AM +0100, Gregory CLEMENT wrote:
> When SPI wake up from OFF mode, CS is in the wrong state: force it
> to the inactive state.
>
> During the system life, I monitored the CS behavior using a oscilloscope.
> I also activated debug in omap2_mcspi, so I saw when driver
On Tue, Nov 16, 2010 at 12:22 AM, Grant Likely
wrote:
> On Mon, Nov 15, 2010 at 02:12:06PM -0500, Cyril Chemparathy wrote:
>> This patch adds an SPI master implementation that operates on top of an
>> underlying TI-SSP port.
>>
>> Signed-off-by: Cyril Chemparathy
&g
On Mon, Nov 15, 2010 at 02:12:06PM -0500, Cyril Chemparathy wrote:
> This patch adds an SPI master implementation that operates on top of an
> underlying TI-SSP port.
>
> Signed-off-by: Cyril Chemparathy
[...]
> +static int __init ti_ssp_spi_init(void)
> +{
> + return platform_driver_register
On Mon, Nov 15, 2010 at 02:12:03PM -0500, Cyril Chemparathy wrote:
> TI's sequencer serial port (TI-SSP) is a jack-of-all-trades type of serial
> port
> device. It has a built-in programmable execution engine that can be
> programmed
> to operate as almost any serial bus (I2C, SPI, EasyScale, an
On Mon, Nov 15, 2010 at 2:09 AM, Gabor Juhos wrote:
> 2010.11.15. 5:04 keltezéssel, Grant Likely írta:
>> On Sun, Nov 14, 2010 at 10:03:56PM +0100, Gabor Juhos wrote:
>>>>> +static inline u32 ath79_spi_rr(struct ath79_spi *sp, unsigned reg)
>>>>> +{
>
On Sun, Nov 14, 2010 at 10:03:56PM +0100, Gabor Juhos wrote:
> >> +static inline u32 ath79_spi_rr(struct ath79_spi *sp, unsigned reg)
> >> +{
> >> + return __raw_readl(sp->base + reg);
> >> +}
> >> +
> >> +static inline void ath79_spi_wr(struct ath79_spi *sp, unsigned reg, u32
> >> val)
> >> +{
>
On Sun, Nov 14, 2010 at 07:04:47PM -0800, Joe Perches wrote:
> Signed-off-by: Joe Perches
applied, thanks.
g.
> ---
> drivers/spi/amba-pl022.c |2 +-
> drivers/spi/spi_nuc900.c |2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/spi/amba-pl022.c b/driver
On Fri, Nov 12, 2010 at 10:51:17PM +0100, Gabor Juhos wrote:
> The Atheros AR71XX/AR724X/AR913X SoCs have a built-in SPI controller. This
> patch implements a driver for that.
>
> Signed-off-by: Gabor Juhos
> Cc: David Brownell
> Cc: spi-devel-general@lists.sourceforge.net
Hi Gabor,
Overall lo
On Fri, Nov 12, 2010 at 4:44 PM, Gregory CLEMENT
wrote:
> We notice that when system wake up from OFF mode, then CS is in inactive
> state until the first SPI transfer.
> For our design it lead to some conflict on this I/O.
> Inactive state for CS when there is no transfer should be the correct
>
On Wed, Nov 10, 2010 at 9:41 AM, Gregory CLEMENT
wrote:
> On 11/10/2010 04:57 PM, Grant Likely wrote:
>>
>> On Wed, Nov 10, 2010 at 11:32:59AM +0100, Gregory CLEMENT wrote:
>>>
>>> When SPI wake up from OFF mode, CS is in the wrong state: force it
>>>
On Wed, Nov 10, 2010 at 02:18:38PM +0100, Michal Simek wrote:
> Grant Likely wrote:
> >On Mon, Nov 8, 2010 at 9:34 AM, John Linn wrote:
> >>>-Original Message-
> >>>From: Michal Simek [mailto:mon...@monstr.eu]
> >>>Sent: Monday, November 08, 20
On Wed, Nov 10, 2010 at 11:32:54AM +0100, Gregory CLEMENT wrote:
> Some spi masters need to do some actions when system is going to suspend
> or when it will be resumed.
> Spi driver offer possibility to handle suspend and resume only for device.
> Spi master will do its suspend actions after the d
On Wed, Nov 10, 2010 at 11:32:59AM +0100, Gregory CLEMENT wrote:
> When SPI wake up from OFF mode, CS is in the wrong state: force it
> to the inactive state.
>
> During the system life, I monitored the CS behavior using a
> oscilloscope. I also activated debug in omap2_mcspi, so I saw when
> driv
On Tue, Nov 09, 2010 at 10:16:22PM -0800, David Brownell wrote:
>
> > I thought the point of this device was that a single [SSP] device
> > hosted a
> > pair of multi-function serial interfaces, with each
> > implementing a
> > separate function.
>
> function chosen based on what the board needs.
On Tue, Nov 02, 2010 at 07:15:16PM -0700, David Brownell wrote:
>
>
> --- On Tue, 10/26/10, Cyril Chemparathy wrote:
>
> > From: Cyril Chemparathy
> > Subject: [PATCH v4 08/12] gpio: add ti-ssp gpio driver
>
> On the assumptions you've tested this *AND* will
> resubmit with the previously-req
On Tue, Nov 9, 2010 at 12:30 AM, Michal Simek wrote:
> Hi, [cc: David Brownell]
>
> Grant Likely wrote:
>> On Mon, Nov 8, 2010 at 9:34 AM, John Linn wrote:
>>>> -Original Message-
>>>> From: Michal Simek [mailto:mon...@monstr.eu]
>>>&
d.rojf...@mocean-labs.com; John Linn; linux-
>> ker...@vger.kernel.org
>> Subject: Re: [RFC PATCH 0/3] spi/xilinx: Merge OF and non-OF drivers
>>
>> Hi Grant,
>>
>> Grant Likely wrote:
>> > Since of_platform_bus_type has been merged with the platform_bu
On Mon, Nov 1, 2010 at 9:38 AM, Charles Martel wrote:
> Does anyone know how to access the linux_2.6.36 SPI Drivers from Userspace?
> If so, could you explain?
>
> Also, it appears that SPI-DEV (not SPIDEV) has been removed. Is there a
> replacement in the works?
> I could sure use one that let
On Fri, Oct 22, 2010 at 02:53:35AM -0400, Mike Frysinger wrote:
> From: Cliff Cai
>
> The Blackfin SPORT peripheral is a pretty flexible device. With enough
> coaching, we can make it generate SPI compatible waveforms. This is
> desirable as the SPORT can run at much higher clock frequencies th
On Thu, Oct 21, 2010 at 09:05:25PM +0200, Linus Walleij wrote:
> This fixes an erroneous use of LSB first in the U300 machine, the
> PL022 used in U300 is a standard ARM core that doesn't support this
> bit so it should never have been set.
>
> Cc: Kevin Wells OA
> Signed-off-by: Linus Walleij
A
On Fri, Oct 22, 2010 at 3:33 AM, Mike Frysinger wrote:
> On Fri, Oct 22, 2010 at 03:25, Grant Likely wrote:
>> On Fri, Oct 22, 2010 at 02:41:12AM -0400, Mike Frysinger wrote:
>>> On Fri, Oct 22, 2010 at 02:30, Grant Likely wrote:
>>> > On Fri, Oct 22, 2010 at 02
On Tue, Oct 26, 2010 at 06:50:33PM +0200, ilkka.koski...@nokia.com wrote:
> Hi Grant and thanks for comments,
[...]
> >> +static int vibra_spi_playback(struct input_dev *input, int effect_id,
> >int value)
> >> +{
> >> +struct vibra_data *vibra = input_get_drvdata(input);
> >> +struct effec
On Mon, Oct 25, 2010 at 04:31:02PM +0300, Ilkka Koskinen wrote:
> This driver provides access to drive a vibrator connected
> to SPI data line via Input layer's Force Feedback interface.
>
> Client application provides samples (data streams) to be
> played as CUSTOM_DATA. The samples are stored in
On Thu, Oct 21, 2010 at 09:06:44PM +0200, Linus Walleij wrote:
> Those things in the SPI core just strike me as particularly odd:
> dev_dbg() used in an obvious error branch, and then two hardcoded
> strings passed in as parameters.
>
> Signed-off-by: Linus Walleij
Merged, thanks.
I ready David
On Fri, Oct 22, 2010 at 01:01:12AM -0500, Kumar Gala wrote:
>
> On Oct 17, 2010, at 2:44 AM, Artem Bityutskiy wrote:
>
> > On Sat, 2010-10-16 at 19:05 -0600, Grant Likely wrote:
> >> On Sat, Oct 16, 2010 at 1:17 PM, Artem Bityutskiy
> >> wrote:
> >>&g
On Fri, Oct 22, 2010 at 03:24:11AM -0400, Mike Frysinger wrote:
> On Fri, Oct 22, 2010 at 03:16, Grant Likely wrote:
> > On Fri, Oct 22, 2010 at 02:53:35AM -0400, Mike Frysinger wrote:
> >> From: Cliff Cai
> >>
> >> The Blackfin SPORT peripheral is a
On Fri, Oct 22, 2010 at 02:01:48AM -0400, Mike Frysinger wrote:
> From: Michael Hennerich
>
> The error interrupt on the BF537 SIC cannot be enabled on a
> per-peripheral basis. Once the error interrupt is enabled
> for one peripheral, it is automatically enabled for all.
>
> So in the Blackfin
On Fri, Oct 22, 2010 at 02:01:47AM -0400, Mike Frysinger wrote:
> From: Michael Hennerich
>
> The gpiolib code does not allow people to do gpio_request() on a GPIO
> once it has already been requested. So make sure we only request the
> pin on the first setup of a SPI device. Otherwise, if you
On Fri, Oct 22, 2010 at 02:41:12AM -0400, Mike Frysinger wrote:
> On Fri, Oct 22, 2010 at 02:30, Grant Likely wrote:
> > On Fri, Oct 22, 2010 at 02:01:47AM -0400, Mike Frysinger wrote:
> >> From: Michael Hennerich
> >>
> >> The gpiolib code does not allow p
On Fri, Oct 22, 2010 at 02:53:35AM -0400, Mike Frysinger wrote:
> From: Cliff Cai
>
> The Blackfin SPORT peripheral is a pretty flexible device. With enough
> coaching, we can make it generate SPI compatible waveforms. This is
> desirable as the SPORT can run at much higher clock frequencies th
On Fri, Oct 22, 2010 at 02:01:47AM -0400, Mike Frysinger wrote:
> From: Michael Hennerich
>
> The gpiolib code does not allow people to do gpio_request() on a GPIO
> once it has already been requested. So make sure we only request the
> pin on the first setup of a SPI device. Otherwise, if you
handler
spi/bfin_spi: warn when CS is driven by hardware (CPHA=0)
Bob Liu (1):
spi/bfin_spi: check per-transfer bits_per_word
Daniel Mack (1):
spi/bfin_spi: fix resources leakage
Felipe Balbi (1):
spi: omap2_mcspi: make use of dev_vdbg()
Grant Likely (5):
spi/topcliff
On Wed, Oct 20, 2010 at 09:23:57AM -0700, Tony Lindgren wrote:
> * Ilkka Koskinen [101019 06:55]:
> > In case of TX only with DMA, the driver assumes that the data
> > has been transferred once DMA callback in invoked. However,
> > SPI's shift register may still contain data. Thus, the driver
> >
On Tue, Oct 19, 2010 at 06:03:27PM +0800, Jason Wang wrote:
> In the TX_ONLY transfer, the SPI controller also receives data
> simultaneously and saves them in the rx register. After the TX_ONLY
> transfer, the rx register will hold the random data received during
> the last tx transaction.
>
> If
_ti_ssp.c
Minor comments below, but otherwise:
Acked-by: Grant Likely
This patch should be merged with the rest of the series. I don't
think there is any point in me picking it up into the SPI tree.
>
> diff --git a/arch/arm/mach-davinci/include/mach/ti_ssp.h
> b/arch/arm/mach-davi
On Mon, Oct 18, 2010 at 03:25:18PM -0400, Cyril Chemparathy wrote:
> This patch adds a GPIO driver based on TI's SSP device. This driver does not
> support GPIO-IRQs.
>
> Signed-off-by: Cyril Chemparathy
Acked-by: Grant Likely
> ---
> arch/arm/mach-davinci/inclu
(I2C, SPI, EasyScale, and others).
>
> This patch adds a driver for this controller device. The driver does not
> expose a user-land interface. Protocol drivers built on top of this layer are
> expected to remain in-kernel.
>
> Signed-off-by: Cyril Chemparathy
I like this versio
On Mon, Oct 18, 2010 at 1:04 AM, Grant Likely wrote:
> On Mon, Oct 18, 2010 at 12:49 AM, Mike Frysinger wrote:
>> ive rewriitten the logs, addressed your feedback on all the other
>> patches, and pushed up the new for-spi branch if you want to double
>> check & pull. i
On Mon, Oct 18, 2010 at 7:56 AM, Cyril Chemparathy wrote:
> Hi Grant,
>
> Thanks for the feedback, I will send out an updated v2 with the proposed
> changes.
>
> [...]
>>> +EXPORT_SYMBOL(ti_ssp_open);
>>
>> I'm not thrilled with the ti_ssp_open()/ti_ssp_close() usage model.
>> It appears that the
On Mon, Oct 18, 2010 at 12:49 AM, Mike Frysinger wrote:
> On Mon, Oct 18, 2010 at 02:34, Mike Frysinger wrote:
>> On Mon, Oct 18, 2010 at 02:28, Grant Likely wrote:
>>> On Sun, Oct 17, 2010 at 06:59:13PM -0400, Mike Frysinger wrote:
>>>> Quite a bit here, but these
On Mon, Oct 18, 2010 at 12:37 AM, Mike Frysinger wrote:
> On Mon, Oct 18, 2010 at 02:34, Mike Frysinger wrote:
>> On Mon, Oct 18, 2010 at 02:28, Grant Likely wrote:
>>> I *might* pick these up for .36, but it is very late for picking up
>>> stuff that hasn't
On Mon, Oct 18, 2010 at 02:28:23AM -0400, Mike Frysinger wrote:
> On Mon, Oct 18, 2010 at 02:20, Grant Likely wrote:
> > On Mon, Oct 18, 2010 at 02:10:17AM -0400, Mike Frysinger wrote:
> >> On Mon, Oct 18, 2010 at 02:02, Grant Likely wrote:
> >> > On Sun, Oct 17,
On Sun, Oct 17, 2010 at 06:59:13PM -0400, Mike Frysinger wrote:
> Quite a bit here, but these patches have been around for a while. The
> reason they haven't been pushed up before was that some of the first
> changes introduced known bugs themselves and needed some manual fixing.
>
> Also, while
On Mon, Oct 18, 2010 at 02:14:28AM -0400, Mike Frysinger wrote:
> On Mon, Oct 18, 2010 at 02:12, Grant Likely wrote:
> > On Sun, Oct 17, 2010 at 06:59:41PM -0400, Mike Frysinger wrote:
> >> From: Michael Hennerich
> >>
> >> Some systems using this bus somet
On Mon, Oct 18, 2010 at 02:10:17AM -0400, Mike Frysinger wrote:
> On Mon, Oct 18, 2010 at 02:02, Grant Likely wrote:
> > On Sun, Oct 17, 2010 at 06:59:24PM -0400, Mike Frysinger wrote:
> >> -struct driver_data {
> >> +struct master_data {
> >
> > Or better ye
On Sun, Oct 17, 2010 at 06:59:41PM -0400, Mike Frysinger wrote:
> From: Michael Hennerich
>
> Some systems using this bus sometimes have very basic devices on them
> such as regulators. So we need to be loaded even earlier in case the
> devices are used before userspace is loaded. Therefore reg
On Sun, Oct 17, 2010 at 06:59:27PM -0400, Mike Frysinger wrote:
> Expand the BIT_CTL defines to use the naming convention of the hardware,
> and expand the masks to cover all documented bits.
>
> Signed-off-by: Mike Frysinger
> ---
> arch/blackfin/include/asm/bfin5xx_spi.h | 11 +++
>
On Sun, Oct 17, 2010 at 06:59:24PM -0400, Mike Frysinger wrote:
> The current structure names are a bit confusing as to what they represent,
> so use better names.
>
> Reported-by: David Brownell
> Signed-off-by: Mike Frysinger
> ---
> drivers/spi/spi_bfin5xx.c | 100 ++
On Sat, Oct 16, 2010 at 1:17 PM, Artem Bityutskiy wrote:
> On Tue, 2010-10-12 at 18:18 +0800, Mingkai Hu wrote:
>> Signed-off-by: Mingkai Hu
>> Acked-by: Grant Likely
>> ---
>> v4:
>> - Updated to latest kernel base(Linux 2.6.36-rc7).
>> - Made changes a
On Thu, Oct 14, 2010 at 02:38:47PM -0400, Cyril Chemparathy wrote:
> This patch adds an SPI master implementation that operates on top of an
> underlying TI-SSP port.
>
> Signed-off-by: Cyril Chemparathy
The driver looks good, but as mentioned in my previous comment, I'd
like to see the usage mo
On Thu, Oct 14, 2010 at 02:38:44PM -0400, Cyril Chemparathy wrote:
> TI's sequencer serial port (TI-SSP) is a jack-of-all-trades type of serial
> port
> device. It has a built-in programmable execution engine that can be
> programmed
> to operate as almost any serial bus (I2C, SPI, EasyScale, an
On Sat, Oct 16, 2010 at 01:39:49AM +0200, Matthias Brugger wrote:
> This patches a typo in the debug message.
> Hopefully this time not line-wrapped.
>
> Signed-off-by: Matthias Brugger
Applied, thanks.
> ---
> drivers/spi/atmel_spi.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
Since of_platform_bus_type has been merged with the platform_bus_type,
a single platform driver can now support both use cases. This patch
series merges the two halves of the xilinx_spi device driver.
Compile tested only. I haven't booted this yet.
---
Grant Likely (3):
spi/x
This patch merges the platform driver support into the main body of
xilinx_spi.c in preparation for merging the OF and non-OF support
code.
Signed-off-by: Grant Likely
---
drivers/spi/Kconfig|7 ---
drivers/spi/Makefile |1
drivers/spi/xilinx_spi.c | 79
Now that the of_platform_bus_type has been merged with the platform
bus type, a single platform driver can handle both OF and non-OF use
cases. This patch merges the OF support into the platform driver.
Signed-off-by: Grant Likely
---
drivers/spi/Kconfig |7 --
drivers/spi/Makefile
sions.
Signed-off-by: Grant Likely
---
drivers/spi/xilinx_spi.c | 14 --
drivers/spi/xilinx_spi.h |2 +-
drivers/spi/xilinx_spi_of.c| 17 -
drivers/spi/xilinx_spi_pltfm.c |4 +++-
4 files changed, 12 insertions(+), 25 deletions(-)
diff --
On Thu, Oct 14, 2010 at 08:55:47AM -0500, Kumar Gala wrote:
> We get the following when building on ppc64 due to lack of include of
> :
Applied.
g.
>
> In file included from drivers/spi/spi_fsl_espi.c:25:0:
> drivers/spi/spi_fsl_lib.h: In function 'mpc8xxx_spi_write_reg':
> drivers/spi/spi_fsl_
On Thu, Oct 14, 2010 at 08:55:47AM -0500, Kumar Gala wrote:
> We get the following when building on ppc64 due to lack of include of
> :
Is this an immediate problem (merge for .36), or is it a linux-next thing?
g.
>
> In file included from drivers/spi/spi_fsl_espi.c:25:0:
> drivers/spi/spi_fsl_
On Wed, Oct 13, 2010 at 05:51:02PM +0200, Matthias Brugger wrote:
> - bits_per_word option in spi_transfer are allowed if it does not change
> the csr register.
>
> This is necessary for the driver in
> drivers/staging/iio/adis16260_core.c, as it uses this option.
>
> Signed-off-by: Matthias Brug
On Wed, Oct 13, 2010 at 06:16:38PM -0700, Erik Gilling wrote:
> avoids derefencing an uninitialized pointer
>
> Change-Id: Icf528441ae481e9f6f5ddc0be32c7c217fa49701
> Signed-off-by: Erik Gilling
Acked-by: Grant Likely
> ---
> drivers/spi/spi_tegra.c |8
>
On Tue, Oct 12, 2010 at 06:18:34PM +0800, Mingkai Hu wrote:
> Signed-off-by: Mingkai Hu
> Acked-by: Grant Likely
dwmw2: what are your thoughts on this one?
g.
> ---
> v4:
> - Updated to latest kernel base(Linux 2.6.36-rc7).
> - Made changes according to Grant's comm
On Tue, Oct 12, 2010 at 06:18:33PM +0800, Mingkai Hu wrote:
> Also modifiy the document of cell-index in SPI controller. Add the
> SPI flash(s25fl128p01) support on p4080ds and mpc8536ds board.
>
> Signed-off-by: Mingkai Hu
Applied, thanks.
g.
> ---
> v4:
> - Updated to latest kernel base(Lin
On Tue, Oct 12, 2010 at 06:18:32PM +0800, Mingkai Hu wrote:
> Add eSPI controller support based on the library code spi_fsl_lib.c.
>
> The eSPI controller is newer controller 85xx/Pxxx devices supported.
> There're some differences comparing to the SPI controller:
>
> 1. Has different register ma
On Tue, Oct 12, 2010 at 06:18:31PM +0800, Mingkai Hu wrote:
> Refactor the common code in file spi_fsl_spi.c to spi_fsl_lib.c used
> by SPI/eSPI controller driver as a library, and leave the QE/CPM SPI
> controller code in the SPI controller driver spi_fsl_spi.c.
>
> Because the register map of th
On Tue, Oct 12, 2010 at 10:22 AM, Sergii Kovalchuk
wrote:
> On Tuesday 12 October 2010 03:51:10 Jassi Brar wrote:
>> On Tue, Oct 12, 2010 at 1:22 AM, Sergii Kovalchuk
>>
>> wrote:
>> > On Thursday 07 October 2010 19:36:18 Grant Likely wrote:
>> >> On Wed
On Fri, Oct 01, 2010 at 01:33:13PM +0200, Linus Walleij wrote:
> This removes some dubious allocation of a local chipinfo struct
> in favor of a constant preset, tagging that one const revealed
> further problems with platform data being modified so fixed up
> these too.
>
> Reported-by: Virupax S
On Fri, Oct 01, 2010 at 11:47:32AM +0200, Linus Walleij wrote:
> What is the dev pointer doing inside the platform data anyway.
> We have another pointer to the actual device at hand, use that.
>
> Signed-off-by: Linus Walleij
Applied, thanks.
g.
> ---
> Note: this is based off Kevin Wells pat
On Thu, Sep 16, 2010 at 06:18:50AM -0700, wells...@gmail.com wrote:
> From: Kevin Wells
>
> This patch adds spi->mode support for the AMBA pl022 driver and
> allows spidev to correctly alter SPI modes. Unused fields used in
> the pl022 header file for the pl022_config_chip have been removed.
>
>
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