Re: [PATCH 06/10] ARM: Samsung: Modify s3c64xx_spi{0|1|2}_set_platdata function
Am Mittwoch, 9. Mai 2012, 10:56:17 schrieb Mark Brown: On Wed, May 09, 2012 at 03:34:50AM +0530, Thomas Abraham wrote: + s3c64xx_spi0_set_platdata(s3c6410-spi, NULL, 0, 1); Shouldn't we just set the name in the struct platform_device rather than requiring the machine to pass it through by hand? Similar to the adc and rtc driver, all Samsung platforms reuse a common platform-device definition for the s3c64xx-spi and simply will set the correct name when the machine type is determined during boot. I.e. I will also have to change my out-of-tree machine stuff to set the s3c2443-spi name using this method. The alternative is creating a mulitude of platform devices for each possible machine type using this driver. Heiko -- Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
spi-s3c64xx: problems with SPI_MODE_3 transfers
[@jassi: I know that you do not work at this stuff any longer, but I included you in the list of recipients in the hope that you might be able to give me a pointer on where to look for the culprit of the problem :-) ] Hi, while working on the beginnings of a wireless driver connected via SPI [1], the s3c64xx-spi-driver produced strange problems while doing MODE_3 (CPOL | CPHA) transfers: [2] [write] spi cur_bpw: 8: 0x00 0x00 0x04 0x00 [read] spi cur_bpw: 8: 0x00 0x00 0x00 0x00 [read] spi cur_bpw: 8: 0x00 0x00 0x00 0x00 (chip_id = 0x, chip_rev = 0x00) mapped channel 24 to 0 mapped channel 23 to 1 [write] spi cur_bpw: 8: 0x00 0x00 0x04 0x00 [read] spi cur_bpw: 8: 0x00 0x00 0x00 0x00 [read] spi cur_bpw: 8: 0x00 0x00 0x00 0x00 CIR: 0 [write] spi cur_bpw: 8: 0x00 0x00 0x04 0x00 [read] spi cur_bpw: 8: 0x00 0x00 0x00 0x00 mt592x_spi spi0.0: I/O Error: rx-1 tx-0 res:rx-f tx-p len-4 CIR: 0 [write] spi cur_bpw: 8: 0x00 0x00 0x04 0x00 mt592x_spi spi0.0: I/O Error: rx-0 tx-1 res:rx-p tx-f len-4 CIR: 0 [write] spi cur_bpw: 8: 0x00 0x00 0x04 0x00 mt592x_spi spi0.0: I/O Error: rx-0 tx-1 res:rx-p tx-f len-4 CIR: 0 [write] spi cur_bpw: 8: 0x00 0x00 0x04 0x00 mt592x_spi spi0.0: I/O Error: rx-0 tx-1 res:rx-p tx-f len-4 CIR: 0 where the expected result would be: [write] spi cur_bpw: 8: 0x00 0x00 0x04 0x00 [read] spi cur_bpw: 8: 0x00 0x00 0x00 0x00 [read] spi cur_bpw: 8: 0x21 0x59 0x91 0x00 The pattern of either empty results or read errors also varies with each invocation, i.e. sometimes all fail or all result in wrong values and so on. In contrast when doing this with the spi-gpio driver, everything works as expected and I get the expected results. Also the device-family I'm working on contains a variant with a Marvell 8686 wlan chip [= the rest of the system is the same]. Using the spi-s3c64xx with the libertas driver (MODE_0) works as expected. As I'm not sure where I should look for errors in the driver, I would be glad to get pointers in the right direction. Thanks Heiko [1] a MediaTek MT5921 [2] the ouput is a simple printk(spi cur_bpw: %d: , sdd-cur_bpw); for(tmp = 0; tmp xfer-len; tmp++) printk( 0x%02x, ((u8 *)xfer-tx_buf)[tmp]); printk(\n); same for rxbuf -- For Developers, A Lot Can Happen In A Second. Boundary is the first to Know...and Tell You. Monitor Your Applications in Ultra-Fine Resolution. Try it FREE! http://p.sf.net/sfu/Boundary-d2dvs2 ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[PATCH 6/6] spi/s3c64xx: Allow usage for ARCH_S3C24XX
Newer SoCs from the S3C24XX line, namely S3C2416/2443/2450 contain hsspi-controllers compatible with the s3c64xx type. The previous patches enabled platform support for it, so make the driver also usable for the S3C24xx architecture. Signed-off-by: Heiko Stuebner he...@sntech.de --- As it is part of a series this probably needs an ack from Grant Likely and should be merged via the samsung tree. drivers/spi/Kconfig |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index ac92194..e411364 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -299,7 +299,7 @@ config SPI_S3C24XX_FIQ config SPI_S3C64XX tristate Samsung S3C64XX series type SPI - depends on (ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS) + depends on (ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS) select S3C64XX_DMA if ARCH_S3C64XX help SPI driver for Samsung S3C64XX and newer SoCs. -- 1.7.2.3 -- Virtualization Cloud Management Using Capacity Planning Cloud computing makes use of virtualization - but cloud computing also focuses on allowing computing to be delivered as a service. http://www.accelacomm.com/jaw/sfnl/114/51521223/ ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[PATCH v2 2/2] S3C24XX: move spi-s3c24xx platdata out of mach
spi.h now only contains the definition of the platform data structure
for the driver in spi-s3c24xx.c . Therefore it does not need to stay
in include/mach but can instead live in linux/spi/s3c24xx.h .
Signed-off-by: Heiko Stuebner he...@sntech.de
---
Sorry for messing up, but it seems I forgot to readd the moved spi header
in the original submission of the second patch, which I noticed just now.
As your cleanup-s3c24xx branch is not pushed out yet, could you please
replace it with this one, which adds the forgotten file.
arch/arm/mach-s3c2410/include/mach/spi.h | 27 ---
arch/arm/mach-s3c2440/mach-gta02.c |2 +-
drivers/spi/spi-s3c24xx.c|2 +-
include/linux/spi/s3c24xx.h | 26 ++
4 files changed, 28 insertions(+), 29 deletions(-)
delete mode 100644 arch/arm/mach-s3c2410/include/mach/spi.h
create mode 100644 include/linux/spi/s3c24xx.h
diff --git a/arch/arm/mach-s3c2410/include/mach/spi.h
b/arch/arm/mach-s3c2410/include/mach/spi.h
deleted file mode 100644
index 2a686c0..000
--- a/arch/arm/mach-s3c2410/include/mach/spi.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/spi.h
- *
- * Copyright (c) 2006 Simtec Electronics
- * Ben Dooks b...@simtec.co.uk
- *
- * S3C2410 - SPI Controller platform_device info
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_SPI_H
-#define __ASM_ARCH_SPI_H __FILE__
-
-struct s3c2410_spi_info {
- int pin_cs;/* simple gpio cs */
- unsigned int num_cs;/* total chipselects */
- int bus_num; /* bus number to use. */
-
- unsigned int use_fiq:1; /* use fiq */
-
- void (*gpio_setup)(struct s3c2410_spi_info *spi, int enable);
- void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol);
-};
-
-#endif /* __ASM_ARCH_SPI_H */
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c
b/arch/arm/mach-s3c2440/mach-gta02.c
index 5859e60..cf270f5 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -38,6 +38,7 @@
#include linux/platform_device.h
#include linux/serial_core.h
#include linux/spi/spi.h
+#include linux/spi/s3c24xx.h
#include linux/mmc/host.h
@@ -73,7 +74,6 @@
#include mach/regs-gpioj.h
#include mach/fb.h
-#include mach/spi.h
#include plat/usb-control.h
#include mach/regs-mem.h
#include mach/hardware.h
diff --git a/drivers/spi/spi-s3c24xx.c b/drivers/spi/spi-s3c24xx.c
index fc06453..8ee7d79 100644
--- a/drivers/spi/spi-s3c24xx.c
+++ b/drivers/spi/spi-s3c24xx.c
@@ -24,10 +24,10 @@
#include linux/spi/spi.h
#include linux/spi/spi_bitbang.h
+#include linux/spi/s3c24xx.h
#include linux/module.h
#include plat/regs-spi.h
-#include mach/spi.h
#include plat/fiq.h
#include asm/fiq.h
diff --git a/include/linux/spi/s3c24xx.h b/include/linux/spi/s3c24xx.h
new file mode 100644
index 000..c23b923
--- /dev/null
+++ b/include/linux/spi/s3c24xx.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2006 Simtec Electronics
+ * Ben Dooks b...@simtec.co.uk
+ *
+ * S3C2410 - SPI Controller platform_device info
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __LINUX_SPI_S3C24XX_H
+#define __LINUX_SPI_S3C24XX_H __FILE__
+
+struct s3c2410_spi_info {
+ int pin_cs;/* simple gpio cs */
+ unsigned int num_cs;/* total chipselects */
+ int bus_num; /* bus number to use. */
+
+ unsigned int use_fiq:1; /* use fiq */
+
+ void (*gpio_setup)(struct s3c2410_spi_info *spi, int enable);
+ void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol);
+};
+
+#endif /* __LINUX_SPI_S3C24XX_H */
--
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[PATCH 1/2] S3C24XX: remove unused spi gpio setup functions
A grep through the kernel source revealed that neither the
config-options nor the defined functions are used anywhere
in the kernel.
There was also no activity in this regard through the last kernel
releases, so it seems this situation will not change in the future.
Therefore this patch removes this seemingly dead code.
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/mach-s3c2410/include/mach/spi.h | 11 ---
arch/arm/plat-s3c24xx/Kconfig| 20 -
arch/arm/plat-s3c24xx/Makefile |6
arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c | 36
arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c | 38 --
arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c| 36
6 files changed, 0 insertions(+), 147 deletions(-)
delete mode 100644 arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
delete mode 100644 arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c
delete mode 100644 arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c
diff --git a/arch/arm/mach-s3c2410/include/mach/spi.h
b/arch/arm/mach-s3c2410/include/mach/spi.h
index 4d95883..2a686c0 100644
--- a/arch/arm/mach-s3c2410/include/mach/spi.h
+++ b/arch/arm/mach-s3c2410/include/mach/spi.h
@@ -24,15 +24,4 @@ struct s3c2410_spi_info {
void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol);
};
-/* Standard setup / suspend routines for SPI GPIO pins. */
-
-extern void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi,
-int enable);
-
-extern void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi,
- int enable);
-
-extern void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi,
- int enable);
-
#endif /* __ASM_ARCH_SPI_H */
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index d8973ac..6b1d918 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -98,26 +98,6 @@ config S3C2410_DMA_DEBUG
Enable debugging output for the DMA code. This option sends info
to the kernel log, at priority KERN_DEBUG.
-# SPI default pin configuration code
-
-config S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13
- bool
- help
- SPI GPIO configuration code for BUS0 when connected to
- GPE11, GPE12 and GPE13.
-
-config S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7
- bool
- help
- SPI GPIO configuration code for BUS 1 when connected to
- GPG5, GPG6 and GPG7.
-
-config S3C24XX_SPI_BUS1_GPD8_GPD9_GPD10
- bool
- help
- SPI GPIO configuration code for BUS 1 when connected to
- GPD8, GPD9 and GPD10.
-
# common code for s3c24xx based machines, such as the SMDKs.
# cpu frequency items common between s3c2410 and s3c2440/s3c2442
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile
index 419d622..d07f67c 100644
--- a/arch/arm/plat-s3c24xx/Makefile
+++ b/arch/arm/plat-s3c24xx/Makefile
@@ -37,12 +37,6 @@ obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) +=
s3c2410-cpufreq-utils.o
obj-$(CONFIG_ARCH_S3C2410) += setup-i2c.o
obj-$(CONFIG_S3C2410_SETUP_TS) += setup-ts.o
-# SPI gpio central GPIO functions
-
-obj-$(CONFIG_S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13) += spi-bus0-gpe11_12_13.o
-obj-$(CONFIG_S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7)+= spi-bus1-gpg5_6_7.o
-obj-$(CONFIG_S3C24XX_SPI_BUS1_GPD8_GPD9_GPD10) += spi-bus1-gpd8_9_10.o
-
# machine common support
obj-$(CONFIG_MACH_SMDK)+= common-smdk.o
diff --git a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
deleted file mode 100644
index 704175b..000
--- a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/* linux/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
- *
- * Copyright (c) 2008 Simtec Electronics
- * http://armlinux.simtec.co.uk/
- * Ben Dooks b...@simtec.co.uk
- *
- * S3C24XX SPI - gpio configuration for bus 0 on gpe11,12,13
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License.
-*/
-
-#include linux/kernel.h
-#include linux/gpio.h
-
-#include mach/spi.h
-#include mach/regs-gpio.h
-
-void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi,
- int enable)
-{
- if (enable) {
- s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPE13_SPICLK0);
- s3c_gpio_cfgpin(S3C2410_GPE(12), S3C2410_GPE12_SPIMOSI0);
- s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPE11_SPIMISO0);
- s3c2410_gpio_pullup(S3C2410_GPE(11), 0);
- s3c2410_gpio_pullup(S3C2410_GPE(13), 0);
- } else {
- s3c_gpio_cfgpin(S3C2410_GPE(13),
[PATCH 0/2] S3C24XX: remove some spi left overs
This series removes unused setup-code of the s3c24xx spi driver. It has no current in kernel users and also no development activity trying to change this. I also checked the upstream git of the only board including the spi.h file (the gta02 at http://git.openmoko.org). The setup calls are also not used there. I recall a thread some time back talking about removing the spi-s3c24xx driver altogether, but as current linux-next still carries the driver I'm not sure what became of it. So this series does the next smaller thing. Heiko Stuebner (2): S3C24XX: remove unused spi gpio setup functions S3C24XX: move spi-s3c24xx platdata out of mach arch/arm/mach-s3c2410/include/mach/spi.h | 38 -- arch/arm/mach-s3c2440/mach-gta02.c |2 +- arch/arm/plat-s3c24xx/Kconfig| 20 - arch/arm/plat-s3c24xx/Makefile |6 arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c | 36 arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c | 38 -- arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c| 36 drivers/spi/spi-s3c24xx.c|2 +- 8 files changed, 2 insertions(+), 176 deletions(-) delete mode 100644 arch/arm/mach-s3c2410/include/mach/spi.h delete mode 100644 arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c delete mode 100644 arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c delete mode 100644 arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c -- 1.7.2.3 -- Ridiculously easy VDI. With Citrix VDI-in-a-Box, you don't need a complex infrastructure or vast IT resources to deliver seamless, secure access to virtual desktops. With this all-in-one solution, easily deploy virtual desktops for less than the cost of PCs and save 60% on VDI infrastructure costs. Try it free! http://p.sf.net/sfu/Citrix-VDIinabox ___ spi-devel-general mailing list spi-devel-general@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/spi-devel-general
[PATCH 2/2] S3C24XX: move spi-s3c24xx platdata out of mach
spi.h now only contains the definition of the platform data structure
for the driver in spi-s3c24xx.c . Therefore it does not need to stay
in include/mach but can instead live in linux/spi/s3c24xx.h .
Signed-off-by: Heiko Stuebner he...@sntech.de
---
arch/arm/mach-s3c2410/include/mach/spi.h | 27 ---
arch/arm/mach-s3c2440/mach-gta02.c |2 +-
drivers/spi/spi-s3c24xx.c|2 +-
3 files changed, 2 insertions(+), 29 deletions(-)
delete mode 100644 arch/arm/mach-s3c2410/include/mach/spi.h
diff --git a/arch/arm/mach-s3c2410/include/mach/spi.h
b/arch/arm/mach-s3c2410/include/mach/spi.h
deleted file mode 100644
index 2a686c0..000
--- a/arch/arm/mach-s3c2410/include/mach/spi.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/spi.h
- *
- * Copyright (c) 2006 Simtec Electronics
- * Ben Dooks b...@simtec.co.uk
- *
- * S3C2410 - SPI Controller platform_device info
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_SPI_H
-#define __ASM_ARCH_SPI_H __FILE__
-
-struct s3c2410_spi_info {
- int pin_cs;/* simple gpio cs */
- unsigned int num_cs;/* total chipselects */
- int bus_num; /* bus number to use. */
-
- unsigned int use_fiq:1; /* use fiq */
-
- void (*gpio_setup)(struct s3c2410_spi_info *spi, int enable);
- void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol);
-};
-
-#endif /* __ASM_ARCH_SPI_H */
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c
b/arch/arm/mach-s3c2440/mach-gta02.c
index e8d2eb9..236514c 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -38,6 +38,7 @@
#include linux/platform_device.h
#include linux/serial_core.h
#include linux/spi/spi.h
+#include linux/spi/s3c24xx.h
#include linux/mmc/host.h
@@ -73,7 +74,6 @@
#include mach/regs-gpioj.h
#include mach/fb.h
-#include mach/spi.h
#include plat/usb-control.h
#include mach/regs-mem.h
#include mach/hardware.h
diff --git a/drivers/spi/spi-s3c24xx.c b/drivers/spi/spi-s3c24xx.c
index fc06453..8ee7d79 100644
--- a/drivers/spi/spi-s3c24xx.c
+++ b/drivers/spi/spi-s3c24xx.c
@@ -24,10 +24,10 @@
#include linux/spi/spi.h
#include linux/spi/spi_bitbang.h
+#include linux/spi/s3c24xx.h
#include linux/module.h
#include plat/regs-spi.h
-#include mach/spi.h
#include plat/fiq.h
#include asm/fiq.h
--
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Re: [PATCH 2/2] spi/s3c64xx: Implement runtime PM support
Am Dienstag, 13. Dezember 2011, 15:49:44 schrieb Heiko Stübner:
Am Montag, 5. Dezember 2011, 17:50:13 schrieb Mark Brown:
Enable and disable the clocks to the SPI controller using runtime PM.
This serves the dual purpose of reducing power consumption a little and
letting the core know when the device is idle.
Signed-off-by: Mark Brown broo...@opensource.wolfsonmicro.com
Acked-by: Heiko Stuebner he...@sntech.de
Kgene and/or Grant: could we move this forward, as I would like to profit
from this change later on too :-)
it seems I got the wrong patch and the one from 2011-12-05 21:01 +
[PATCH 3/3] spi/s3c64xx: Implement runtime PM support
which seems to have the same content would have been the correct one to ack
and ping.
Sorry for the confusion
Heiko
Thanks
Heiko
---
drivers/spi/spi-s3c64xx.c | 39 +++
1 files changed, 39 insertions(+), 0 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index fef1c90..9031783 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -25,6 +25,7 @@
#include linux/clk.h
#include linux/dma-mapping.h
#include linux/platform_device.h
+#include linux/pm_runtime.h
#include linux/spi/spi.h
#include mach/dma.h
@@ -782,6 +783,8 @@ static void s3c64xx_spi_work(struct work_struct
*work)
while (!acquire_dma(sdd))
msleep(10);
+ pm_runtime_get_sync(sdd-pdev-dev);
+
spin_lock_irqsave(sdd-lock, flags);
while (!list_empty(sdd-queue)
@@ -810,6 +813,8 @@ static void s3c64xx_spi_work(struct work_struct
*work)
/* Free DMA channels */
sdd-ops-release(sdd-rx_dma.ch, s3c64xx_spi_dma_client);
sdd-ops-release(sdd-tx_dma.ch, s3c64xx_spi_dma_client);
+
+ pm_runtime_put(sdd-pdev-dev);
}
static int s3c64xx_spi_transfer(struct spi_device *spi,
@@ -892,6 +897,8 @@ static int s3c64xx_spi_setup(struct spi_device *spi)
goto setup_exit;
}
+ pm_runtime_get_sync(sdd-pdev-dev);
+
/* Check if we can provide the requested rate */
if (!sci-clk_from_cmu) {
u32 psr, speed;
@@ -924,6 +931,8 @@ static int s3c64xx_spi_setup(struct spi_device *spi)
err = -EINVAL;
}
+ pm_runtime_put(sdd-pdev-dev);
+
setup_exit:
/* setup() returns with device de-selected */
@@ -1159,6 +1168,8 @@ static int __init s3c64xx_spi_probe(struct
platform_device *pdev) mem_res-end, mem_res-start,
sdd-rx_dma.dmach, sdd-tx_dma.dmach);
+ pm_runtime_enable(pdev-dev);
+
return 0;
err9:
@@ -1192,6 +1203,8 @@ static int s3c64xx_spi_remove(struct
platform_device *pdev) struct resource *mem_res;
unsigned long flags;
+ pm_runtime_disable(pdev-dev);
+
spin_lock_irqsave(sdd-lock, flags);
sdd-state |= SUSPND;
spin_unlock_irqrestore(sdd-lock, flags);
@@ -1272,8 +1285,34 @@ static int s3c64xx_spi_resume(struct device *dev)
}
#endif /* CONFIG_PM */
+#ifdef CONFIG_PM_RUNTIME
+static int s3c64xx_spi_runtime_suspend(struct device *dev)
+{
+ struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
+
+ clk_disable(sdd-clk);
+ clk_disable(sdd-src_clk);
+
+ return 0;
+}
+
+static int s3c64xx_spi_runtime_resume(struct device *dev)
+{
+ struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
+
+ clk_enable(sdd-src_clk);
+ clk_enable(sdd-clk);
+
+ return 0;
+}
+#endif /* CONFIG_PM_RUNTIME */
+
static struct dev_pm_ops s3c64xx_spi_pm = {
SET_SYSTEM_SLEEP_PM_OPS(s3c64xx_spi_suspend, s3c64xx_spi_resume)
+ SET_RUNTIME_PM_OPS(s3c64xx_spi_runtime_suspend,
+ s3c64xx_spi_runtime_resume, NULL)
};
static struct platform_driver s3c64xx_spi_driver = {
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Re: [PATCH 2/2] spi/s3c64xx: Implement runtime PM support
Am Montag, 5. Dezember 2011, 17:50:13 schrieb Mark Brown:
Enable and disable the clocks to the SPI controller using runtime PM. This
serves the dual purpose of reducing power consumption a little and letting
the core know when the device is idle.
Signed-off-by: Mark Brown broo...@opensource.wolfsonmicro.com
Acked-by: Heiko Stuebner he...@sntech.de
Kgene and/or Grant: could we move this forward, as I would like to profit from
this change later on too :-)
Thanks
Heiko
---
drivers/spi/spi-s3c64xx.c | 39 +++
1 files changed, 39 insertions(+), 0 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index fef1c90..9031783 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -25,6 +25,7 @@
#include linux/clk.h
#include linux/dma-mapping.h
#include linux/platform_device.h
+#include linux/pm_runtime.h
#include linux/spi/spi.h
#include mach/dma.h
@@ -782,6 +783,8 @@ static void s3c64xx_spi_work(struct work_struct *work)
while (!acquire_dma(sdd))
msleep(10);
+ pm_runtime_get_sync(sdd-pdev-dev);
+
spin_lock_irqsave(sdd-lock, flags);
while (!list_empty(sdd-queue)
@@ -810,6 +813,8 @@ static void s3c64xx_spi_work(struct work_struct *work)
/* Free DMA channels */
sdd-ops-release(sdd-rx_dma.ch, s3c64xx_spi_dma_client);
sdd-ops-release(sdd-tx_dma.ch, s3c64xx_spi_dma_client);
+
+ pm_runtime_put(sdd-pdev-dev);
}
static int s3c64xx_spi_transfer(struct spi_device *spi,
@@ -892,6 +897,8 @@ static int s3c64xx_spi_setup(struct spi_device *spi)
goto setup_exit;
}
+ pm_runtime_get_sync(sdd-pdev-dev);
+
/* Check if we can provide the requested rate */
if (!sci-clk_from_cmu) {
u32 psr, speed;
@@ -924,6 +931,8 @@ static int s3c64xx_spi_setup(struct spi_device *spi)
err = -EINVAL;
}
+ pm_runtime_put(sdd-pdev-dev);
+
setup_exit:
/* setup() returns with device de-selected */
@@ -1159,6 +1168,8 @@ static int __init s3c64xx_spi_probe(struct
platform_device *pdev) mem_res-end, mem_res-start,
sdd-rx_dma.dmach, sdd-tx_dma.dmach);
+ pm_runtime_enable(pdev-dev);
+
return 0;
err9:
@@ -1192,6 +1203,8 @@ static int s3c64xx_spi_remove(struct platform_device
*pdev) struct resource*mem_res;
unsigned long flags;
+ pm_runtime_disable(pdev-dev);
+
spin_lock_irqsave(sdd-lock, flags);
sdd-state |= SUSPND;
spin_unlock_irqrestore(sdd-lock, flags);
@@ -1272,8 +1285,34 @@ static int s3c64xx_spi_resume(struct device *dev)
}
#endif /* CONFIG_PM */
+#ifdef CONFIG_PM_RUNTIME
+static int s3c64xx_spi_runtime_suspend(struct device *dev)
+{
+ struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
+
+ clk_disable(sdd-clk);
+ clk_disable(sdd-src_clk);
+
+ return 0;
+}
+
+static int s3c64xx_spi_runtime_resume(struct device *dev)
+{
+ struct spi_master *master = spi_master_get(dev_get_drvdata(dev));
+ struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
+
+ clk_enable(sdd-src_clk);
+ clk_enable(sdd-clk);
+
+ return 0;
+}
+#endif /* CONFIG_PM_RUNTIME */
+
static struct dev_pm_ops s3c64xx_spi_pm = {
SET_SYSTEM_SLEEP_PM_OPS(s3c64xx_spi_suspend, s3c64xx_spi_resume)
+ SET_RUNTIME_PM_OPS(s3c64xx_spi_runtime_suspend,
+s3c64xx_spi_runtime_resume, NULL)
};
static struct platform_driver s3c64xx_spi_driver = {
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Re: i80 (Intel 8080-like) command interface to LCDs - how to implement
Am Dienstag 17 Mai 2011, 13:59:40 schrieb Heiko Stübner:
I'm trying to find the best way on implementing an i80 interface
(especially the command mode) between a s3c2416 and an AUO-K1900 (epaper
controller).
On the host side it is usable at least in all Samsung SoCs following the
S3C2443 and on the device side I've found, apart from the K1900, for
example the ili9320 and STM32F10xxx displays controllers using this
interface.
It looks a bit like a cross between SPI and I2C but fits neither category -
at least for my understanding.
after some more thoughts while cycling home, would it be sane to implement it
as spi devices like:
lcd-ctrl -i80_device (spi_device) -spi-layer - i80_spi_master
i80_device would implement the message logic as described below
i80_spi_master would control the registers
the write-enable/read-enable bit settings can be determined by the direction
of the transfer, but how do I determine the value to set for RS?
The idea I had was to set bits_per_word to n+1, i.e. the register has 18 data
bits and I would use the 19th bit do transmit the required RS setting.
Does this look at least halfway plausible?
Thanks
Heiko
[rest of this mail included as I have just added spi-devel to the recipients]
pins/pins consist of:
CS ... chip-select
RS ... control or data register select
WE ... write enable
RE ... read enable
D0-Dn ... data 0-n for variing values of n
(I've seen up to 18 data bits)
commands can look like:
(* set command mode)
* set chip-select
* set RS to control (mostly low)
* set WE to high
* write command to D
* unset WE
* set RS to data
* set WE
* write data to D
* unset WE
* set WE
* write data to D
* unset WE
...
* set RE
* read data from D
* unset RE
...
* unset chip-select
(* unset command mode)
the fourth possible state (read-control) is also used by the ili9320.
looks a lot like an i2c-transfer, i.e. something like
{
{ WC, 6001 }, //for write-control
{ WD, 576 }, //for write-data
{ WD, 12 }, //for write-data
{ RD, *buf } //for read-data
}
could represent the above command-sequence.
So, is this a new bus type or does it fit somehow into spi or i2c or some
other bus-type I don't know yet? Or, does code for i80 exist somewhere I
haven't looked yet?
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