svn commit: r324118 - head/sys/arm/allwinner

2017-09-30 Thread Jared McNeill 
Author: jmcneill
Date: Sat Sep 30 10:35:44 2017
New Revision: 324118
URL: https://svnweb.freebsd.org/changeset/base/324118

Log:
  Disable/enable CSUM_UDP and CSUM_TCP along with CSUM_IP
  
  Submitted by: guy...@gmail.com
  Differential Revision:https://reviews.freebsd.org/D12536

Modified:
  head/sys/arm/allwinner/if_awg.c

Modified: head/sys/arm/allwinner/if_awg.c
==
--- head/sys/arm/allwinner/if_awg.c Sat Sep 30 10:34:07 2017
(r324117)
+++ head/sys/arm/allwinner/if_awg.c Sat Sep 30 10:35:44 2017
(r324118)
@@ -1041,10 +1041,10 @@ awg_ioctl(if_t ifp, u_long cmd, caddr_t data)
if_togglecapenable(ifp, IFCAP_RXCSUM);
if (mask & IFCAP_TXCSUM)
if_togglecapenable(ifp, IFCAP_TXCSUM);
-   if ((if_getcapenable(ifp) & (IFCAP_RXCSUM|IFCAP_TXCSUM)) != 0)
-   if_sethwassistbits(ifp, CSUM_IP, 0);
+   if ((if_getcapenable(ifp) & IFCAP_TXCSUM) != 0)
+   if_sethwassistbits(ifp, CSUM_IP | CSUM_UDP | CSUM_TCP, 
0);
else
-   if_sethwassistbits(ifp, 0, CSUM_IP);
+   if_sethwassistbits(ifp, 0, CSUM_IP | CSUM_UDP | 
CSUM_TCP);
break;
default:
error = ether_ioctl(ifp, cmd, data);
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svn commit: r324117 - head/sys/arm/allwinner

2017-09-30 Thread Jared McNeill 
Author: jmcneill
Date: Sat Sep 30 10:34:07 2017
New Revision: 324117
URL: https://svnweb.freebsd.org/changeset/base/324117

Log:
  Fix if_awg tx dma status reg offsets.
  
  Submitted by: guy...@gmail.com
  Differential Revision:https://reviews.freebsd.org/D12535

Modified:
  head/sys/arm/allwinner/if_awgreg.h

Modified: head/sys/arm/allwinner/if_awgreg.h
==
--- head/sys/arm/allwinner/if_awgreg.h  Sat Sep 30 10:16:15 2017
(r324116)
+++ head/sys/arm/allwinner/if_awgreg.h  Sat Sep 30 10:34:07 2017
(r324117)
@@ -115,9 +115,9 @@
 #defineEMAC_MII_DATA   0x4c
 #defineEMAC_ADDR_HIGH(n)   (0x50 + (n) * 8)
 #defineEMAC_ADDR_LOW(n)(0x54 + (n) * 8)
-#defineEMAC_TX_DMA_STA 0x80
-#defineEMAC_TX_DMA_CUR_DESC0x84
-#defineEMAC_TX_DMA_CUR_BUF 0x88
+#defineEMAC_TX_DMA_STA 0xb0
+#defineEMAC_TX_DMA_CUR_DESC0xb4
+#defineEMAC_TX_DMA_CUR_BUF 0xb8
 #defineEMAC_RX_DMA_STA 0xc0
 #defineEMAC_RX_DMA_CUR_DESC0xc4
 #defineEMAC_RX_DMA_CUR_BUF 0xc8
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svn commit: r313014 - head/sys/boot/fdt/dts/arm

2017-01-31 Thread Jared McNeill 
Author: jmcneill
Date: Tue Jan 31 14:36:06 2017
New Revision: 313014
URL: https://svnweb.freebsd.org/changeset/base/313014

Log:
  Add missing ephy bus gates and resets.

Modified:
  head/sys/boot/fdt/dts/arm/h3.dtsi

Modified: head/sys/boot/fdt/dts/arm/h3.dtsi
==
--- head/sys/boot/fdt/dts/arm/h3.dtsi   Tue Jan 31 12:33:59 2017
(r313013)
+++ head/sys/boot/fdt/dts/arm/h3.dtsi   Tue Jan 31 14:36:06 2017
(r313014)
@@ -69,10 +69,10 @@
reg = <0x01c3 0x104>, <0x01c00030 0x4>;
reg-names = "emac", "syscon";
interrupts = ;
-   resets = <_rst 17>;
-   reset-names = "ahb";
-   clocks = <_gates 17>;
-   clock-names = "ahb";
+   resets = <_rst 17>, <_rst 66>;
+   reset-names = "ahb", "ephy";
+   clocks = <_gates 17>, <_gates 128>;
+   clock-names = "ahb", "ephy";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
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svn commit: r310972 - head/sys/boot/fdt/dts/arm

2016-12-31 Thread Jared McNeill 
Author: jmcneill
Date: Sat Dec 31 13:10:06 2016
New Revision: 310972
URL: https://svnweb.freebsd.org/changeset/base/310972

Log:
  Fix a typo in the third address of the reg property for the usbphy node.
  
  MFC after:1 week

Modified:
  head/sys/boot/fdt/dts/arm/a83t.dtsi

Modified: head/sys/boot/fdt/dts/arm/a83t.dtsi
==
--- head/sys/boot/fdt/dts/arm/a83t.dtsi Sat Dec 31 13:07:09 2016
(r310971)
+++ head/sys/boot/fdt/dts/arm/a83t.dtsi Sat Dec 31 13:10:06 2016
(r310972)
@@ -178,7 +178,7 @@
compatible = "allwinner,sun8i-a83t-usb-phy";
reg = <0x01c19400 0x2c>,
  <0x01c1a800 0x4>,
- <0x01c1a800 0x4>;
+ <0x01c1b800 0x4>;
clocks = <_clk 8>,
 <_clk 9>,
 <_clk 10>,
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svn commit: r310854 - head/sys/boot/fdt/dts/arm

2016-12-30 Thread Jared McNeill 
Author: jmcneill
Date: Fri Dec 30 20:16:09 2016
New Revision: 310854
URL: https://svnweb.freebsd.org/changeset/base/310854

Log:
  Add missing reg property to usbphy node.
  
  MFC after:1 week

Modified:
  head/sys/boot/fdt/dts/arm/a83t.dtsi

Modified: head/sys/boot/fdt/dts/arm/a83t.dtsi
==
--- head/sys/boot/fdt/dts/arm/a83t.dtsi Fri Dec 30 20:00:41 2016
(r310853)
+++ head/sys/boot/fdt/dts/arm/a83t.dtsi Fri Dec 30 20:16:09 2016
(r310854)
@@ -176,6 +176,9 @@
 
usbphy: phy@01c19400 {
compatible = "allwinner,sun8i-a83t-usb-phy";
+   reg = <0x01c19400 0x2c>,
+ <0x01c1a800 0x4>,
+ <0x01c1a800 0x4>;
clocks = <_clk 8>,
 <_clk 9>,
 <_clk 10>,
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svn commit: r310777 - in head/sys: arm/freescale/imx dev/hdmi

2016-12-29 Thread Jared McNeill 
Author: jmcneill
Date: Thu Dec 29 14:08:24 2016
New Revision: 310777
URL: https://svnweb.freebsd.org/changeset/base/310777

Log:
  Add support for audio on I2S based DesignWare HDMI controllers.
  
  Relnotes: yes

Modified:
  head/sys/arm/freescale/imx/imx6_hdmi.c
  head/sys/dev/hdmi/dwc_hdmi.c
  head/sys/dev/hdmi/dwc_hdmi.h
  head/sys/dev/hdmi/dwc_hdmi_fdt.c
  head/sys/dev/hdmi/dwc_hdmireg.h

Modified: head/sys/arm/freescale/imx/imx6_hdmi.c
==
--- head/sys/arm/freescale/imx/imx6_hdmi.c  Thu Dec 29 14:00:10 2016
(r310776)
+++ head/sys/arm/freescale/imx/imx6_hdmi.c  Thu Dec 29 14:08:24 2016
(r310777)
@@ -44,6 +44,7 @@ __FBSDID("$FreeBSD$");
 #include 
 
 #include 
+#include 
 
 #include 
 #include 

Modified: head/sys/dev/hdmi/dwc_hdmi.c
==
--- head/sys/dev/hdmi/dwc_hdmi.cThu Dec 29 14:00:10 2016
(r310776)
+++ head/sys/dev/hdmi/dwc_hdmi.cThu Dec 29 14:08:24 2016
(r310777)
@@ -53,8 +53,23 @@ __FBSDID("$FreeBSD$");
 #include "hdmi_if.h"
 
 #defineI2C_DDC_ADDR(0x50 << 1)
+#defineI2C_DDC_SEGADDR (0x30 << 1)
 #defineEDID_LENGTH 0x80
 
+#defineEXT_TAG 0x00
+#defineCEA_TAG_ID  0x02
+#defineCEA_DTD 0x03
+#defineDTD_BASIC_AUDIO (1 << 6)
+#defineCEA_REV 0x02
+#defineCEA_DATA_OFF0x03
+#defineCEA_DATA_START  4
+#defineBLOCK_TAG(x)(((x) >> 5) & 0x7)
+#defineBLOCK_TAG_VSDB  3
+#defineBLOCK_LEN(x)((x) & 0x1f)
+#defineHDMI_VSDB_MINLEN5
+#defineHDMI_OUI"\x03\x0c\x00"
+#defineHDMI_OUI_LEN3
+
 static void
 dwc_hdmi_phy_wait_i2c_done(struct dwc_hdmi_softc *sc, int msec)
 {
@@ -122,7 +137,7 @@ dwc_hdmi_av_composer(struct dwc_hdmi_sof
HDMI_FC_INVIDCONF_IN_I_P_PROGRESSIVE);
 
/* TODO: implement HDMI part */
-   is_dvi = 1;
+   is_dvi = sc->sc_has_audio == 0;
inv_val |= (is_dvi ?
HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE :
HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE);
@@ -419,6 +434,70 @@ dwc_hdmi_enable_video_path(struct dwc_hd
 }
 
 static void
+dwc_hdmi_configure_audio(struct dwc_hdmi_softc *sc)
+{
+   unsigned int n;
+   uint8_t val;
+
+   if (sc->sc_has_audio == 0)
+   return;
+
+   /* The following values are for 48 kHz */
+   switch (sc->sc_mode.dot_clock) {
+   case 25170:
+   n = 6864;
+   break;
+   case 27020:
+   n = 6144;
+   break;
+   case 74170:
+   n = 11648;
+   break;
+   case 148350:
+   n = 5824;
+   break;
+   default:
+   n = 6144;
+   break;
+   }
+
+   WR1(sc, HDMI_AUD_N1, (n >> 0) & 0xff);
+   WR1(sc, HDMI_AUD_N2, (n >> 8) & 0xff);
+   WR1(sc, HDMI_AUD_N3, (n >> 16) & 0xff);
+
+   val = RD1(sc, HDMI_AUD_CTS3);
+   val &= ~(HDMI_AUD_CTS3_N_SHIFT_MASK | HDMI_AUD_CTS3_CTS_MANUAL);
+   WR1(sc, HDMI_AUD_CTS3, val);
+
+   val = RD1(sc, HDMI_AUD_CONF0);
+   val &= ~HDMI_AUD_CONF0_INTERFACE_MASK;
+   val |= HDMI_AUD_CONF0_INTERFACE_IIS;
+   val &= ~HDMI_AUD_CONF0_I2SINEN_MASK;
+   val |= HDMI_AUD_CONF0_I2SINEN_CH2;
+   WR1(sc, HDMI_AUD_CONF0, val);
+
+   val = RD1(sc, HDMI_AUD_CONF1);
+   val &= ~HDMI_AUD_CONF1_DATAMODE_MASK;
+   val |= HDMI_AUD_CONF1_DATAMODE_IIS;
+   val &= ~HDMI_AUD_CONF1_DATWIDTH_MASK;
+   val |= HDMI_AUD_CONF1_DATWIDTH_16BIT;
+   WR1(sc, HDMI_AUD_CONF1, val);
+
+   WR1(sc, HDMI_AUD_INPUTCLKFS, HDMI_AUD_INPUTCLKFS_64);
+
+   WR1(sc, HDMI_FC_AUDICONF0, 1 << 4); /* CC=1 */
+   WR1(sc, HDMI_FC_AUDICONF1, 0);
+   WR1(sc, HDMI_FC_AUDICONF2, 0);  /* CA=0 */
+   WR1(sc, HDMI_FC_AUDICONF3, 0);
+   WR1(sc, HDMI_FC_AUDSV, 0xee);   /* channels valid */
+
+   /* Enable audio clock */
+   val = RD1(sc, HDMI_MC_CLKDIS);
+   val &= ~HDMI_MC_CLKDIS_AUDCLK_DISABLE;
+   WR1(sc, HDMI_MC_CLKDIS, val);
+}
+
+static void
 dwc_hdmi_video_packetize(struct dwc_hdmi_softc *sc)
 {
unsigned int color_depth = 0;
@@ -552,11 +631,15 @@ static int
 dwc_hdmi_set_mode(struct dwc_hdmi_softc *sc)
 {
 
+   /* XXX */
+   sc->sc_has_audio = 1;
+
dwc_hdmi_disable_overflow_interrupts(sc);
dwc_hdmi_av_composer(sc);
dwc_hdmi_phy_init(sc);
dwc_hdmi_enable_video_path(sc);
-   /* TODO: AVI infoframes */
+   dwc_hdmi_configure_audio(sc);
+   /* TODO:  dwc_hdmi_config_avi(sc); */
dwc_hdmi_video_packetize(sc);
/* TODO:  dwc_hdmi_video_csc(sc); */
dwc_hdmi_video_sample(sc);
@@ -567,14 +650,17 @@

svn commit: r310776 - head/sys/mips/ingenic

2016-12-29 Thread Jared McNeill 
Author: jmcneill
Date: Thu Dec 29 14:00:10 2016
New Revision: 310776
URL: https://svnweb.freebsd.org/changeset/base/310776

Log:
  The JZ4780 I2S can feed either the internal audio codec or the HDMI
  transmitter, but not both at the same time. This patch:
  
   - Adds a dev.pcm.0.internal_codec sysctl node for selecting between
 internal and external codec
   - Changes playback sample rate from 96 kHz to 48 kHz for HDMI compatibility
   - Enables i2s clock on codec access
  
  Reviewed by:  br
  Differential Revision:https://reviews.freebsd.org/D8960

Modified:
  head/sys/mips/ingenic/jz4780_aic.c
  head/sys/mips/ingenic/jz4780_codec.c
  head/sys/mips/ingenic/jz4780_codec.h

Modified: head/sys/mips/ingenic/jz4780_aic.c
==
--- head/sys/mips/ingenic/jz4780_aic.c  Thu Dec 29 13:27:04 2016
(r310775)
+++ head/sys/mips/ingenic/jz4780_aic.c  Thu Dec 29 14:00:10 2016
(r310776)
@@ -81,6 +81,7 @@ struct aic_softc {
void*ih;
struct xdma_channel *xchan;
xdma_controller_t   *xdma_tx;
+   int internal_codec;
 };
 
 /* Channel registers */
@@ -120,7 +121,7 @@ struct aic_rate {
 };
 
 static struct aic_rate rate_map[] = {
-   { 96000 },
+   { 48000 },
/* TODO: add more frequences */
{ 0 },
 };
@@ -355,7 +356,6 @@ aic_start(struct sc_pcminfo *scp)
int reg;
 
sc = scp->sc;
-   sc->pos = 0;
 
/* Ensure clock enabled. */
reg = READ4(sc, I2SCR);
@@ -387,10 +387,6 @@ aic_stop(struct sc_pcminfo *scp)
 
xdma_terminate(sc->xchan);
 
-   sc->pos = 0;
-
-   bzero(sc->buf_base, sc->dma_size);
-
return (0);
 }
 
@@ -411,6 +407,8 @@ aicchan_trigger(kobj_t obj, void *data, 
case PCMTRIG_START:
ch->run = 1;
 
+   sc->pos = 0;
+
aic_start(scp);
 
break;
@@ -421,6 +419,10 @@ aicchan_trigger(kobj_t obj, void *data, 
 
aic_stop(scp);
 
+   sc->pos = 0;
+
+   bzero(sc->buf_base, sc->dma_size);
+
break;
}
 
@@ -448,7 +450,7 @@ static uint32_t aic_pfmt[] = {
0
 };
 
-static struct pcmchan_caps aic_pcaps = {96000, 96000, aic_pfmt, 0};
+static struct pcmchan_caps aic_pcaps = {48000, 48000, aic_pfmt, 0};
 
 static struct pcmchan_caps *
 aicchan_getcaps(kobj_t obj, void *data)
@@ -583,16 +585,13 @@ aic_configure_clocks(struct aic_softc *s
 static int
 aic_configure(struct aic_softc *sc)
 {
-   int internal_codec;
int reg;
 
-   internal_codec = 1;
-
WRITE4(sc, AICFR, AICFR_RST);
 
/* Configure AIC */
reg = 0;
-   if (internal_codec) {
+   if (sc->internal_codec) {
reg |= (AICFR_ICDC);
} else {
reg |= (AICFR_SYNCD | AICFR_BCKD);
@@ -610,6 +609,48 @@ aic_configure(struct aic_softc *sc)
 }
 
 static int
+sysctl_hw_pcm_internal_codec(SYSCTL_HANDLER_ARGS)
+{
+   struct sc_pcminfo *scp;
+   struct sc_chinfo *ch;
+   struct aic_softc *sc;
+   int error, val;
+
+   if (arg1 == NULL)
+   return (EINVAL);
+
+   scp = arg1;
+   sc = scp->sc;
+   ch = >chan[0];
+
+   snd_mtxlock(sc->lock);
+
+   val = sc->internal_codec;
+   error = sysctl_handle_int(oidp, , 0, req);
+   if (error || req->newptr == NULL) {
+   snd_mtxunlock(sc->lock);
+   return (error);
+   }
+   if (val < 0 || val > 1) {
+   snd_mtxunlock(sc->lock);
+   return (EINVAL);
+   }
+
+   if (sc->internal_codec != val) {
+   sc->internal_codec = val;
+   if (ch->run)
+   aic_stop(scp);
+   aic_configure(sc);
+   if (ch->run)
+   aic_start(scp);
+   }
+
+   snd_mtxunlock(sc->lock);
+
+   return (0);
+}
+
+static int
 aic_probe(device_t dev)
 {
 
@@ -635,6 +676,7 @@ aic_attach(device_t dev)
sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
sc->dev = dev;
sc->pos = 0;
+   sc->internal_codec = 1;
 
/* Get xDMA controller */
sc->xdma_tx = xdma_ofw_get(sc->dev, "tx");
@@ -718,6 +760,13 @@ aic_attach(device_t dev)
 
mixer_init(dev, _class, scp);
 
+   /* Create device sysctl node. */
+   SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
+   SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
+   OID_AUTO, "internal_codec", CTLTYPE_INT | CTLFLAG_RW,
+   scp, 0, sysctl_hw_pcm_internal_codec, "I",
+   "use internal audio codec");
+
return (0);
 }
 

Modified: head/sys/mips/ingenic/jz4780_codec.c
==
--- head/sys/mips/ingenic/jz4780_codec.cThu Dec 29 13:27:04 2016
(r310775)
+++ head/sys/mips/ingenic/jz4780_codec.c

svn commit: r310308 - in head/sys/mips: conf ingenic

2016-12-19 Thread Jared McNeill 
Author: jmcneill
Date: Tue Dec 20 01:51:09 2016
New Revision: 310308
URL: https://svnweb.freebsd.org/changeset/base/310308

Log:
  Add support for Ingenic JZ4780 LCD controller and enable framebuffer
  console support.
  
  Reviewed by:  kan
  Differential Revision:https://reviews.freebsd.org/D8827

Added:
  head/sys/mips/ingenic/jz4780_lcd.c   (contents, props changed)
  head/sys/mips/ingenic/jz4780_lcd.h   (contents, props changed)
Modified:
  head/sys/mips/conf/JZ4780
  head/sys/mips/ingenic/files.jz4780

Modified: head/sys/mips/conf/JZ4780
==
--- head/sys/mips/conf/JZ4780   Tue Dec 20 01:37:00 2016(r310307)
+++ head/sys/mips/conf/JZ4780   Tue Dec 20 01:51:09 2016(r310308)
@@ -86,6 +86,16 @@ device   mmcsd
 
 device dme
 
+device iic
+device iicbus
+
+# Framebuffer console support
+device vt
+device kbdmux
+device hdmi
+device videomode
+device pty
+
 # USB support
 optionsUSB_DEBUG   # enable debug msgs
 optionsUSB_HOST_ALIGN=128 # L2 cache line size
@@ -95,6 +105,7 @@ device   dwcotg  # DesignWare HS OTG cont
 device usb # USB Bus (required)
 #deviceudbp# USB Double Bulk Pipe devices
 device uhid# "Human Interface Devices"
+device ukbd# Allow keyboard like HIDs to control console
 #deviceulpt# Printer
 device umass   # Disks/Mass storage - Requires scbus and da
 device ums # Mouse

Modified: head/sys/mips/ingenic/files.jz4780
==
--- head/sys/mips/ingenic/files.jz4780  Tue Dec 20 01:37:00 2016
(r310307)
+++ head/sys/mips/ingenic/files.jz4780  Tue Dec 20 01:51:09 2016
(r310308)
@@ -6,6 +6,9 @@ mips/ingenic/jz4780_mmc.c   optional mmc
 mips/ingenic/jz4780_ohci.c optional ohci
 mips/ingenic/jz4780_smb.c  optional iicbus
 mips/ingenic/jz4780_uart.c optional uart
+mips/ingenic/jz4780_lcd.c  optional vt
+dev/hdmi/dwc_hdmi.coptional hdmi iicbus
+dev/hdmi/dwc_hdmi_fdt.coptional hdmi iicbus
 
 mips/ingenic/jz4780_clock.cstandard
 mips/ingenic/jz4780_clk_gen.c  standard
@@ -25,3 +28,6 @@ mips/ingenic/jz4780_mpboot.S  optional sm
 
 # Custom interface between pinctrl and gpio
 mips/ingenic/jz4780_gpio_if.m  standard
+
+# HDMI interface
+dev/hdmi/hdmi_if.m standard

Added: head/sys/mips/ingenic/jz4780_lcd.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/mips/ingenic/jz4780_lcd.c  Tue Dec 20 01:51:09 2016
(r310308)
@@ -0,0 +1,572 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * Ingenic JZ4780 LCD Controller
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include 
+
+#include "fb_if.h"
+#include "hdmi_if.h"
+
+#defineFB_DEFAULT_W800
+#defineFB_DEFAULT_H600
+#defineFB_DEFAULT_REF  60
+#defineFB_BPP  32
+#defineFB_ALIGN(16 * 4)
+#defineFB_MAX_BW   (1920 * 1080 * 60)
+#defineFB_MAX_W2048
+#define

svn commit: r310307 - head/sys/mips/ingenic

2016-12-19 Thread Jared McNeill 
Author: jmcneill
Date: Tue Dec 20 01:37:00 2016
New Revision: 310307
URL: https://svnweb.freebsd.org/changeset/base/310307

Log:
  Choose the closes matching divider instead of one that results in a
  frequency >= target. Fix inverted rounding logic for CLK_SET_ROUND_UP/DOWN.
  
  Reviewed by:  kan
  Differential Revision:https://reviews.freebsd.org/D8784

Modified:
  head/sys/mips/ingenic/jz4780_clk_gen.c

Modified: head/sys/mips/ingenic/jz4780_clk_gen.c
==
--- head/sys/mips/ingenic/jz4780_clk_gen.c  Tue Dec 20 01:34:29 2016
(r310306)
+++ head/sys/mips/ingenic/jz4780_clk_gen.c  Tue Dec 20 01:37:00 2016
(r310307)
@@ -153,23 +153,29 @@ jz4780_clk_gen_set_freq(struct clknode *
 {
struct jz4780_clk_gen_sc *sc;
uint64_t _fout;
-   uint32_t divider, div_reg, div_msk, reg;
+   uint32_t divider, div_reg, div_msk, reg, div_l, div_h;
int rv;
 
sc = clknode_get_softc(clk);
 
-   divider = fin / *fout;
+   /* Find closest divider */
+   div_l = howmany(fin, *fout);
+   div_h = fin / *fout;
+   divider = abs((int64_t)*fout - (fin / div_l)) <
+   abs((int64_t)*fout - (fin / div_h)) ? div_l : div_h;
 
/* Adjust for divider multiplier */
div_reg = divider >> sc->clk_descr->clk_div.div_lg;
divider = div_reg << sc->clk_descr->clk_div.div_lg;
+   if (divider == 0)
+   divider = 1;
 
_fout = fin / divider;
 
/* Rounding */
-   if ((flags & CLK_SET_ROUND_UP) && (*fout < _fout))
+   if ((flags & CLK_SET_ROUND_UP) && (*fout > _fout))
div_reg--;
-   else if ((flags & CLK_SET_ROUND_DOWN) && (*fout > _fout))
+   else if ((flags & CLK_SET_ROUND_DOWN) && (*fout < _fout))
div_reg++;
if (div_reg == 0)
div_reg = 1;
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svn commit: r310306 - in head/sys: arm/allwinner arm/arm arm/freescale/imx conf dev/hdmi

2016-12-19 Thread Jared McNeill 
Author: jmcneill
Date: Tue Dec 20 01:34:29 2016
New Revision: 310306
URL: https://svnweb.freebsd.org/changeset/base/310306

Log:
  Split the DesignWare HDMI-specific code from imx6_hdmi.c into a separate
  file and add a generic DT binding that takes advantage of the extres
  framework for setting up clocks.
  
  Reviewed by:  gonzo
  Differential Revision:https://reviews.freebsd.org/D8826

Added:
  head/sys/dev/hdmi/
  head/sys/dev/hdmi/dwc_hdmi.c   (contents, props changed)
  head/sys/dev/hdmi/dwc_hdmi.h   (contents, props changed)
  head/sys/dev/hdmi/dwc_hdmi_fdt.c   (contents, props changed)
  head/sys/dev/hdmi/dwc_hdmireg.h   (contents, props changed)
  head/sys/dev/hdmi/hdmi_if.m
 - copied unchanged from r310305, head/sys/arm/arm/hdmi_if.m
Deleted:
  head/sys/arm/arm/hdmi_if.m
  head/sys/arm/freescale/imx/imx6_hdmireg.h
Modified:
  head/sys/arm/allwinner/files.allwinner
  head/sys/arm/freescale/imx/files.imx6
  head/sys/arm/freescale/imx/imx6_hdmi.c
  head/sys/conf/files.arm

Modified: head/sys/arm/allwinner/files.allwinner
==
--- head/sys/arm/allwinner/files.allwinner  Tue Dec 20 01:13:11 2016
(r310305)
+++ head/sys/arm/allwinner/files.allwinner  Tue Dec 20 01:34:29 2016
(r310306)
@@ -35,7 +35,7 @@ arm/allwinner/aw_cir.coptional
aw_cir
 arm/allwinner/a10_fb.c optionalvt
 arm/allwinner/a10_hdmi.c   optionalhdmi
 arm/allwinner/a10_hdmiaudio.c  optionalhdmi sound
-arm/arm/hdmi_if.m  optionalhdmi
+dev/hdmi/hdmi_if.m optionalhdmi
 
 arm/allwinner/aw_reset.c   standard
 arm/allwinner/aw_ccu.c standard

Modified: head/sys/arm/freescale/imx/files.imx6
==
--- head/sys/arm/freescale/imx/files.imx6   Tue Dec 20 01:13:11 2016
(r310305)
+++ head/sys/arm/freescale/imx/files.imx6   Tue Dec 20 01:34:29 2016
(r310306)
@@ -24,7 +24,8 @@ arm/freescale/imx/imx6_sdma.c optional 
 arm/freescale/imx/imx6_audmux.coptional sound
 arm/freescale/imx/imx6_ssi.c   optional sound
 
-arm/arm/hdmi_if.m  optional hdmi
+dev/hdmi/hdmi_if.m optional hdmi
+dev/hdmi/dwc_hdmi.coptional hdmi
 arm/freescale/imx/imx6_hdmi.c  optional hdmi
 
 arm/freescale/imx/imx6_ipu.c   optionalvt

Modified: head/sys/arm/freescale/imx/imx6_hdmi.c
==
--- head/sys/arm/freescale/imx/imx6_hdmi.c  Tue Dec 20 01:13:11 2016
(r310305)
+++ head/sys/arm/freescale/imx/imx6_hdmi.c  Tue Dec 20 01:34:29 2016
(r310306)
@@ -44,30 +44,18 @@ __FBSDID("$FreeBSD$");
 #include 
 
 #include 
-#include 
-
-#include 
-#include 
 
 #include 
 #include 
 #include 
-#include 
 
-#include "hdmi_if.h"
+#include 
 
-#defineI2C_DDC_ADDR(0x50 << 1)
-#defineEDID_LENGTH 0x80
+#include "hdmi_if.h"
 
 struct imx_hdmi_softc {
-   device_tsc_dev;
-   struct resource *sc_mem_res;
-   int sc_mem_rid;
-   struct intr_config_hook sc_mode_hook;
-   struct videomodesc_mode;
-   uint8_t *sc_edid;
-   uint8_t sc_edid_len;
-   phandle_t   sc_i2c_xref;
+   struct dwc_hdmi_softc   base;
+   phandle_t   i2c_xref;
 };
 
 static struct ofw_compat_data compat_data[] = {
@@ -76,565 +64,17 @@ static struct ofw_compat_data compat_dat
{NULL,  0}
 };
 
-static inline uint8_t
-RD1(struct imx_hdmi_softc *sc, bus_size_t off)
-{
-
-   return (bus_read_1(sc->sc_mem_res, off));
-}
-
-static inline void
-WR1(struct imx_hdmi_softc *sc, bus_size_t off, uint8_t val)
-{
-
-   bus_write_1(sc->sc_mem_res, off, val);
-}
-
-static void
-imx_hdmi_phy_wait_i2c_done(struct imx_hdmi_softc *sc, int msec)
-{
-   uint8_t val;
-
-   val = RD1(sc, HDMI_IH_I2CMPHY_STAT0) &
-   (HDMI_IH_I2CMPHY_STAT0_DONE | HDMI_IH_I2CMPHY_STAT0_ERROR);
-   while (val == 0) {
-   pause("HDMI_PHY", hz/100);
-   msec -= 10;
-   if (msec <= 0)
-   return;
-   val = RD1(sc, HDMI_IH_I2CMPHY_STAT0) &
-   (HDMI_IH_I2CMPHY_STAT0_DONE | HDMI_IH_I2CMPHY_STAT0_ERROR);
-   }
-}
-
-static void
-imx_hdmi_phy_i2c_write(struct imx_hdmi_softc *sc, unsigned short data,
-unsigned char addr)
-{
-
-   /* clear DONE and ERROR flags */
-   WR1(sc, HDMI_IH_I2CMPHY_STAT0,
-   HDMI_IH_I2CMPHY_STAT0_DONE | HDMI_IH_I2CMPHY_STAT0_ERROR);
-   WR1(sc, HDMI_PHY_I2CM_ADDRESS_ADDR, addr);
-   WR1(sc, HDMI_PHY_I2CM_DATAO_1_ADDR, ((data >> 8) & 0xff));
-

svn commit: r310172 - in head/sys/mips: conf ingenic

2016-12-16 Thread Jared McNeill 
Author: jmcneill
Date: Fri Dec 16 20:04:56 2016
New Revision: 310172
URL: https://svnweb.freebsd.org/changeset/base/310172

Log:
  Add support for Ingenic JZ4780 SMBus controller.
  
  Reviewed by:  kan
  Relnotes: yes
  Differential Revision:https://reviews.freebsd.org/D8793

Added:
  head/sys/mips/ingenic/jz4780_smb.c   (contents, props changed)
  head/sys/mips/ingenic/jz4780_smb.h   (contents, props changed)
Modified:
  head/sys/mips/conf/JZ4780
  head/sys/mips/ingenic/files.jz4780

Modified: head/sys/mips/conf/JZ4780
==
--- head/sys/mips/conf/JZ4780   Fri Dec 16 19:49:22 2016(r310171)
+++ head/sys/mips/conf/JZ4780   Fri Dec 16 20:04:56 2016(r310172)
@@ -75,6 +75,9 @@ deviceext_resources
 
 device gpio
 
+device iicbus
+device iic
+
 device scbus
 device da
 

Modified: head/sys/mips/ingenic/files.jz4780
==
--- head/sys/mips/ingenic/files.jz4780  Fri Dec 16 19:49:22 2016
(r310171)
+++ head/sys/mips/ingenic/files.jz4780  Fri Dec 16 20:04:56 2016
(r310172)
@@ -4,6 +4,7 @@ mips/ingenic/jz4780_dwc_fdt.c   optional d
 mips/ingenic/jz4780_ehci.c optional ehci
 mips/ingenic/jz4780_mmc.c  optional mmc
 mips/ingenic/jz4780_ohci.c optional ohci
+mips/ingenic/jz4780_smb.c  optional iicbus
 mips/ingenic/jz4780_uart.c optional uart
 
 mips/ingenic/jz4780_clock.cstandard

Added: head/sys/mips/ingenic/jz4780_smb.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/mips/ingenic/jz4780_smb.c  Fri Dec 16 20:04:56 2016
(r310172)
@@ -0,0 +1,480 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * Ingenic JZ4780 SMB Controller
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include 
+
+#include "iicbus_if.h"
+
+#defineJZSMB_TIMEOUT   ((300UL * hz) / 1000)
+
+#defineJZSMB_SPEED_STANDARD10
+#defineJZSMB_SETUP_TIME_STANDARD   300
+#defineJZSMB_HOLD_TIME_STANDARD400
+#defineJZSMB_PERIOD_MIN_STANDARD   4000
+#defineJZSMB_PERIOD_MAX_STANDARD   4700
+
+#defineJZSMB_SPEED_FAST40
+#defineJZSMB_SETUP_TIME_FAST   450
+#defineJZSMB_HOLD_TIME_FAST450
+#defineJZSMB_PERIOD_MIN_FAST   600
+#defineJZSMB_PERIOD_MAX_FAST   1300
+
+#defineJZSMB_HCNT_BASE 8
+#defineJZSMB_HCNT_MIN  6
+#defineJZSMB_LCNT_BASE 1
+#defineJZSMB_LCNT_MIN  8
+
+static inline int
+tstohz(const struct timespec *tsp)
+{
+   struct timeval tv;
+
+   TIMESPEC_TO_TIMEVAL(, tsp);
+   return (tvtohz());
+}
+
+static struct ofw_compat_data compat_data[] = {
+   { "ingenic,jz4780-i2c", 1 },
+   { NULL, 0 }
+};
+
+static struct resource_spec jzsmb_spec[] = {
+   { SYS_RES_MEMORY,   0,  RF_ACTIVE },
+   { -1, 0 }
+};
+
+struct jzsmb_softc {
+   struct resource *res;
+   struct mtx  mtx;
+   clk_t   clk;
+   device_tiicbus;
+   int busy;
+   uint32

svn commit: r308903 - head/sys/modules/dtb/allwinner

2016-11-20 Thread Jared McNeill 
Author: jmcneill
Date: Sun Nov 20 19:39:55 2016
New Revision: 308903
URL: https://svnweb.freebsd.org/changeset/base/308903

Log:
  Build and install nanopi-neo.dts and orangepi-plus-2e.dts

Modified:
  head/sys/modules/dtb/allwinner/Makefile

Modified: head/sys/modules/dtb/allwinner/Makefile
==
--- head/sys/modules/dtb/allwinner/Makefile Sun Nov 20 19:38:46 2016
(r308902)
+++ head/sys/modules/dtb/allwinner/Makefile Sun Nov 20 19:39:55 2016
(r308903)
@@ -5,8 +5,10 @@ DTS=   \
bananapim2.dts \
cubieboard.dts \
cubieboard2.dts \
+   nanopi-neo.dts \
olimex-a20-som-evb.dts \
olinuxino-lime.dts \
+   orangepi-plus-2e.dts \
pcduino3.dts \
sinovoip-bpi-m3.dts \
sun5i-a13-olinuxino.dts \
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svn commit: r308902 - head/sys/boot/fdt/dts/arm

2016-11-20 Thread Jared McNeill 
Author: jmcneill
Date: Sun Nov 20 19:38:46 2016
New Revision: 308902
URL: https://svnweb.freebsd.org/changeset/base/308902

Log:
  Add dts for Xunlong Orange Pi Plus 2E.

Added:
  head/sys/boot/fdt/dts/arm/orangepi-plus-2e.dts   (contents, props changed)

Added: head/sys/boot/fdt/dts/arm/orangepi-plus-2e.dts
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm/orangepi-plus-2e.dts  Sun Nov 20 19:38:46 
2016(r308902)
@@ -0,0 +1,121 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include "sun8i-h3-orangepi-plus.dts"
+#include "h3.dtsi"
+
+/ {
+   model = "Xunlong Orange Pi Plus 2E";
+   compatible = "xunlong,orangepi-plus-2e", "allwinner,sun8i-h3";
+
+   reg_gmac_3v3: gmac-3v3 {
+   compatible = "regulator-fixed";
+   pinctrl-names = "default";
+   pinctrl-0 = <_phy_reset_pin>;
+   regulator-name = "gmac-3v3";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   startup-delay-us = <10>;
+   enable-active-high;
+   gpio = < 3 6 GPIO_ACTIVE_HIGH>;
+   };
+};
+
+ {
+   emac_phy_reset_pin: emac_phy_reset_pin@0 {
+   allwinner,pins = "PD6";
+   allwinner,function = "gpio_out";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+
+   codec_pa_pin: codec_pa_pin@0 {
+   allwinner,pins = "PA16";
+   allwinner,function = "gpio_out";
+   allwinner,drive = ;
+   allwinner,pull = ;
+   };
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins_rgmii_a>;
+   phy-supply = <_gmac_3v3>;
+   phy-mode = "rgmii";
+   phy = <>;
+
+   allwinner,leds-active-low;
+   status = "okay";
+
+   phy1: ethernet-phy@1 {
+   reg = <1>;
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+_i2c {
+   status = "okay";
+
+   vdd_cpu: regulator@65 {
+   compatible = "silergy,sy8106a";
+   reg = <0x65>;
+
+   regulator-name = "vdd-cpu";
+   regulator-min-microvolt = <100>;
+   regulator-max-microvolt = <140>;
+   regulator-ramp-delay = <200>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pa_pin>;
+   allwinner,pa-gpios = < 0 16 GPIO_ACTIVE_HIGH>; /* PA16 */
+   status = "okay";
+};
+
+ {
+   cpu-supply = <_cpu>;
+   operating-points = <
+   /* kHzuV */
+   1296000 134
+   120 132
+   1008000 120
+   816000  110
+   648000  104
+   >;
+};
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svn commit: r308901 - head/sys/boot/fdt/dts/arm

2016-11-20 Thread Jared McNeill 
Author: jmcneill
Date: Sun Nov 20 19:38:05 2016
New Revision: 308901
URL: https://svnweb.freebsd.org/changeset/base/308901

Log:
  Add dts for FriendlyARM NanoPi NEO.

Added:
  head/sys/boot/fdt/dts/arm/nanopi-neo.dts   (contents, props changed)
  head/sys/boot/fdt/dts/arm/sun8i-h3-nanopi-neo.dts   (contents, props changed)

Added: head/sys/boot/fdt/dts/arm/nanopi-neo.dts
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm/nanopi-neo.dtsSun Nov 20 19:38:05 2016
(r308901)
@@ -0,0 +1,73 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include "sun8i-h3-nanopi-neo.dts"
+#include "h3.dtsi"
+
+/ {
+   vdd_cpu: reg_cpux_vset {
+   compatible = "regulator-gpio";
+
+   regulator-name = "cpux-supply";
+   regulator-min-microvolt = <110>;
+   regulator-max-microvolt = <130>;
+   regulator-boot-on;
+
+   gpios = <_pio 0 6 GPIO_ACTIVE_HIGH>;  /* GPIOL6 */
+   states = <130 0x1
+ 110 0x0>;
+
+   enable-active-high;
+   };
+};
+
+_i2c {
+   status = "okay";
+};
+
+ {
+phy = <>;
+phy-mode = "mii";
+   allwinner,use-internal-phy;
+   allwinner,leds-active-low;
+status = "okay";
+
+phy1: ethernet-phy@1 {
+reg = <1>;
+};
+};
+
+ {
+   cpu-supply = <_cpu>;
+   operating-points = <
+   /* kHzuV */
+   1008000 130
+   816000  110
+   48  110
+   >;
+};

Added: head/sys/boot/fdt/dts/arm/sun8i-h3-nanopi-neo.dts
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm/sun8i-h3-nanopi-neo.dts   Sun Nov 20 19:38:05 
2016(r308901)
@@ -0,0 +1,128 @@
+/*
+ * Copyright (C) 2016 James Pettigrew <ja...@innovum.com.au>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all

svn commit: r308900 - head/sys/boot/fdt/dts/arm

2016-11-20 Thread Jared McNeill 
Author: jmcneill
Date: Sun Nov 20 19:36:17 2016
New Revision: 308900
URL: https://svnweb.freebsd.org/changeset/base/308900

Log:
  Add dtsi for FreeBSD-specific Allwinner H3 nodes.

Added:
  head/sys/boot/fdt/dts/arm/h3.dtsi   (contents, props changed)

Added: head/sys/boot/fdt/dts/arm/h3.dtsi
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm/h3.dtsi   Sun Nov 20 19:36:17 2016
(r308900)
@@ -0,0 +1,179 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include 
+
+/ {
+   cpus {
+   cpu0: cpu@0 {
+   clocks = <>;
+   clock-latency = <200>;
+   };
+   };
+
+   clocks {
+   pll2: clk@01c20008 {
+   #clock-cells = <1>;
+   compatible = "allwinner,sun8i-h3-pll2-clk";
+   reg = <0x01c20008 0x4>;
+   clocks = <>;
+   clock-output-names = "pll2-1x", "pll2-2x",
+   "pll2-4x", "pll2-8x";
+   };
+
+   ths_clk: clk@1c20074 {
+   #clock-cells = <0>;
+   compatible = "allwinner,sun8i-h3-ths-clk";
+   reg = <0x01c20074 0x4>;
+   clocks = <>;
+   clock-output-names = "ths";
+   };
+
+   codec_clk: clk@01c20140 {
+   #clock-cells = <0>;
+   compatible = "allwinner,sun4i-a10-codec-clk";
+   reg = <0x01c20140 0x4>;
+   clocks = < SUN4I_A10_PLL2_1X>;
+   clock-output-names = "codec";
+   };
+   };
+
+   soc {
+   emac: ethernet@1c3 {
+   compatible = "allwinner,sun8i-h3-emac";
+   reg = <0x01c3 0x104>, <0x01c00030 0x4>;
+   reg-names = "emac", "syscon";
+   interrupts = ;
+   resets = <_rst 17>;
+   reset-names = "ahb";
+   clocks = <_gates 17>;
+   clock-names = "ahb";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+
+   i2c0: i2c@1c2ac00 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2ac00 0x400>;
+   interrupts = ;
+   clocks = <_gates 96>;
+   resets = <_rst 0>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+
+   i2c1: i2c@1c2b000 {
+   compatible = "allwinner,sun6i-a31-i2c";
+   reg = <0x01c2b000 0x400>;
+   interrupts = ;
+   clocks = <_gates 97>;
+   resets = <_rst 1>;
+   status = "disabled";
+   #address-cells = <1>;
+   #size-ce

svn commit: r308833 - head/sys/arm/allwinner

2016-11-19 Thread Jared McNeill 
Author: jmcneill
Date: Sat Nov 19 14:56:22 2016
New Revision: 308833
URL: https://svnweb.freebsd.org/changeset/base/308833

Log:
  On H3, initialize alarm and shutdown trip points and do temperature
  conversion as it is done in the BSP.

Modified:
  head/sys/arm/allwinner/aw_thermal.c

Modified: head/sys/arm/allwinner/aw_thermal.c
==
--- head/sys/arm/allwinner/aw_thermal.c Sat Nov 19 14:45:08 2016
(r308832)
+++ head/sys/arm/allwinner/aw_thermal.c Sat Nov 19 14:56:22 2016
(r308833)
@@ -109,10 +109,13 @@ __FBSDID("$FreeBSD$");
 #defineH3_ADC_ACQUIRE_TIME 0x3f
 #defineH3_FILTER   0x6
 #defineH3_INTC 0x191000
-#defineH3_TEMP_BASE1794000
+#defineH3_TEMP_BASE217
 #defineH3_TEMP_MUL 1000
-#defineH3_TEMP_DIV -8253
+#defineH3_TEMP_DIV 8253
+#defineH3_TEMP_MINUS   1794000
 #defineH3_CLK_RATE 400
+#defineH3_INIT_ALARM   90  /* degC */
+#defineH3_INIT_SHUT105 /* degC */
 
 #defineTEMP_C_TO_K 273
 #defineSENSOR_ENABLE_ALL   (SENSOR0_EN|SENSOR1_EN|SENSOR2_EN)
@@ -131,6 +134,8 @@ TUNABLE_INT("hw.aw_thermal.throttle_enab
 struct aw_thermal_sensor {
const char  *name;
const char  *desc;
+   int init_alarm;
+   int init_shut;
 };
 
 struct aw_thermal_config {
@@ -142,6 +147,7 @@ struct aw_thermal_config {
uint32_tfilter;
uint32_tintc;
int (*to_temp)(uint32_t);
+   uint32_t(*to_reg)(int);
int temp_base;
int temp_mul;
int temp_div;
@@ -177,9 +183,7 @@ static const struct aw_thermal_config a8
.filter = A83T_FILTER,
.intc = A83T_INTC,
.to_temp = a83t_to_temp,
-   .calib0 = 1,
.calib0_mask = 0x,
-   .calib1 = 1,
.calib1_mask = 0x,
 };
 
@@ -215,7 +219,13 @@ static const struct aw_thermal_config a6
 static int
 h3_to_temp(uint32_t val)
 {
-   return (((int)(val * H3_TEMP_MUL) - H3_TEMP_BASE) / H3_TEMP_DIV);
+   return (H3_TEMP_BASE - ((val * H3_TEMP_MUL) / H3_TEMP_DIV));
+}
+
+static uint32_t
+h3_to_reg(int val)
+{
+   return ((H3_TEMP_MINUS - (val * H3_TEMP_DIV)) / H3_TEMP_MUL);
 }
 
 static const struct aw_thermal_config h3_config = {
@@ -224,6 +234,8 @@ static const struct aw_thermal_config h3
[0] = {
.name = "cpu",
.desc = "CPU temperature",
+   .init_alarm = H3_INIT_ALARM,
+   .init_shut = H3_INIT_SHUT,
},
},
.clk_rate = H3_CLK_RATE,
@@ -231,7 +243,7 @@ static const struct aw_thermal_config h3
.filter = H3_FILTER,
.intc = H3_INTC,
.to_temp = h3_to_temp,
-   .calib0 = 1,
+   .to_reg = h3_to_reg,
.calib0_mask = 0xfff,
 };
 
@@ -272,7 +284,7 @@ aw_thermal_init(struct aw_thermal_softc 
uint32_t calib0, calib1;
int error;
 
-   if (sc->conf->calib0 != 0 || sc->conf->calib1 != 0) {
+   if (sc->conf->calib0_mask != 0 || sc->conf->calib1_mask != 0) {
/* Read calibration settings from SRAM */
error = aw_sid_read_tscalib(, );
if (error != 0)
@@ -282,9 +294,9 @@ aw_thermal_init(struct aw_thermal_softc 
calib1 &= sc->conf->calib1_mask;
 
/* Write calibration settings to thermal controller */
-   if (sc->conf->calib0 != 0 && calib0 != 0)
+   if (calib0 != 0)
WR4(sc, THS_CALIB0, calib0);
-   if (sc->conf->calib1 != 0 && calib1 != 0)
+   if (calib1 != 0)
WR4(sc, THS_CALIB1, calib1);
}
 
@@ -313,7 +325,7 @@ aw_thermal_gettemp(struct aw_thermal_sof
 
val = RD4(sc, THS_DATA0 + (sensor * 4));
 
-   return (sc->conf->to_temp(val) + TEMP_C_TO_K);
+   return (sc->conf->to_temp(val));
 }
 
 static int
@@ -324,7 +336,18 @@ aw_thermal_getshut(struct aw_thermal_sof
val = RD4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4));
val = (val >> SHUT_T_HOT_SHIFT) & SHUT_T_HOT_MASK;
 
-   return (sc->conf->to_temp(val) + TEMP_C_TO_K);
+   return (sc->conf->to_temp(val));
+}
+
+static void
+aw_thermal_setshut(struct aw_thermal_softc *sc, int sensor, int temp)
+{
+   uint32_t val;
+
+   val = RD4(sc, THS_SHUTDOWN0_CTRL + (sensor * 4));
+   val &= ~(SHUT_T_HOT_MASK << SHUT_T_HOT_SHIFT);
+   val |= (sc->conf->to_reg(temp) << SHUT_T_HOT_SHIFT);
+   WR4(sc, THS_SHUTDOWN0_CTRL + (sensor *

svn commit: r308705 - head/sys/arm/allwinner

2016-11-15 Thread Jared McNeill 
Author: jmcneill
Date: Tue Nov 15 23:48:30 2016
New Revision: 308705
URL: https://svnweb.freebsd.org/changeset/base/308705

Log:
  On command error, reset only DMA and FIFO engines instead of the entire
  controller. Fixes eMMC device detection on OrangePi Plus 2e (and likely
  others).

Modified:
  head/sys/arm/allwinner/a10_mmc.c

Modified: head/sys/arm/allwinner/a10_mmc.c
==
--- head/sys/arm/allwinner/a10_mmc.cTue Nov 15 23:46:01 2016
(r308704)
+++ head/sys/arm/allwinner/a10_mmc.cTue Nov 15 23:48:30 2016
(r308705)
@@ -58,6 +58,7 @@ __FBSDID("$FreeBSD$");
 #defineA10_MMC_DMA_SEGS((MAXPHYS / PAGE_SIZE) + 1)
 #defineA10_MMC_DMA_MAX_SIZE0x2000
 #defineA10_MMC_DMA_FTRGLEVEL   0x20070008
+#defineA10_MMC_RESET_RETRY 1000
 
 #defineCARD_ID_FREQUENCY   40
 
@@ -229,7 +230,7 @@ a10_mmc_attach(device_t dev)
bus_width = 4;
 
sc->a10_host.f_min = 40;
-   sc->a10_host.f_max = 5000;
+   sc->a10_host.f_max = 5200;
sc->a10_host.host_ocr = MMC_OCR_320_330 | MMC_OCR_330_340;
sc->a10_host.mode = mode_sd;
sc->a10_host.caps = MMC_CAP_HSPEED;
@@ -449,11 +450,27 @@ a10_mmc_req_done(struct a10_mmc_softc *s
 {
struct mmc_command *cmd;
struct mmc_request *req;
+   uint32_t val, mask;
+   int retry;
 
cmd = sc->a10_req->cmd;
if (cmd->error != MMC_ERR_NONE) {
-   /* Reset the controller. */
-   a10_mmc_reset(sc);
+   /* Reset the FIFO and DMA engines. */
+   mask = A10_MMC_CTRL_FIFO_RST | A10_MMC_CTRL_DMA_RST;
+   val = A10_MMC_READ_4(sc, A10_MMC_GCTL);
+   A10_MMC_WRITE_4(sc, A10_MMC_GCTL, val | mask);
+
+   retry = A10_MMC_RESET_RETRY;
+   while (--retry > 0) {
+   val = A10_MMC_READ_4(sc, A10_MMC_GCTL);
+   if ((val & mask) == 0)
+   break;
+   DELAY(10);
+   }
+   if (retry == 0)
+   device_printf(sc->a10_dev,
+   "timeout resetting DMA/FIFO\n");
+   a10_mmc_update_clock(sc, 1);
}
 
req = sc->a10_req;
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svn commit: r308704 - head/sys/arm/allwinner/clk

2016-11-15 Thread Jared McNeill 
Author: jmcneill
Date: Tue Nov 15 23:46:01 2016
New Revision: 308704
URL: https://svnweb.freebsd.org/changeset/base/308704

Log:
  Allow the MMC frequency to be set up to 52MHz for MMC high speed timings.

Modified:
  head/sys/arm/allwinner/clk/aw_mmcclk.c

Modified: head/sys/arm/allwinner/clk/aw_mmcclk.c
==
--- head/sys/arm/allwinner/clk/aw_mmcclk.c  Tue Nov 15 23:03:57 2016
(r308703)
+++ head/sys/arm/allwinner/clk/aw_mmcclk.c  Tue Nov 15 23:46:01 2016
(r308704)
@@ -185,7 +185,7 @@ aw_mmcclk_set_freq(struct clknode *clk, 
ophase = 0;
phase = 5;
n = 2;
-   } else if (*fout <= 5000) {
+   } else if (*fout <= 5200) {
parent_idx = CLK_SRC_SEL_PLL6;
ophase = 3;
phase = 5;
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Re: svn commit: r308640 - in head/sys/arm: altera/socfpga broadcom/bcm2835 freescale/imx freescale/vybrid lpc mv rockchip ti ti/am335x versatile xilinx

2016-11-14 Thread Jared McNeill 
On Nov 14, 2016, at 8:03 AM, Andrew Turner  wrote:
> 
> Modified: head/sys/arm/broadcom/bcm2835/bcm2835_fb.c
...
>   if (sc->height == 0) {
>   if ((OF_getprop(display, "broadcom,height", 
>   , sizeof(cell))) > 0)
> - sc->height = (int)fdt32_to_cpu(cell);
> + sc->height = cell;
>   }
>   }

Looks like you missed an OF_getprop -> OF_getencprop here.

Cheers,
Jared
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svn commit: r308269 - head/sys/arm/allwinner

2016-11-03 Thread Jared McNeill 
Author: jmcneill
Date: Thu Nov  3 23:22:04 2016
New Revision: 308269
URL: https://svnweb.freebsd.org/changeset/base/308269

Log:
  Add support for Allwinner H3 audio codec.
  
  The audio controller in the H3 is more or less the same as A10/A20 except
  some registers are shuffled around. The mixer interface, however, is
  completely different between SoCs. Separate a10_mixer_class and
  h3_mixer_class implementations are now made available. This will also make
  adding support for other SoCs easier in the future.
  
  Reviewed by:  andrew, ganbold
  Relnotes: yes
  Differential Revision:https://reviews.freebsd.org/D8425

Modified:
  head/sys/arm/allwinner/a10_codec.c

Modified: head/sys/arm/allwinner/a10_codec.c
==
--- head/sys/arm/allwinner/a10_codec.c  Thu Nov  3 23:11:33 2016
(r308268)
+++ head/sys/arm/allwinner/a10_codec.c  Thu Nov  3 23:22:04 2016
(r308269)
@@ -27,7 +27,7 @@
  */
 
 /*
- * Allwinner A10/A20 Audio Codec
+ * Allwinner A10/A20 and H3 Audio Codec
  */
 
 #include 
@@ -50,19 +50,46 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#include 
+
 #include 
+#include 
 
 #include "sunxi_dma_if.h"
 #include "mixer_if.h"
-#include "gpio_if.h"
+
+struct a10codec_info;
+
+struct a10codec_config {
+   /* mixer class */
+   struct kobj_class *mixer_class;
+
+   /* toggle DAC/ADC mute */
+   void(*mute)(struct a10codec_info *, int, int);
+
+   /* DRQ types */
+   u_int   drqtype_codec;
+   u_int   drqtype_sdram;
+
+   /* register map */
+   bus_size_t  DPC,
+   DAC_FIFOC,
+   DAC_FIFOS,
+   DAC_TXDATA,
+   ADC_FIFOC,
+   ADC_FIFOS,
+   ADC_RXDATA,
+   DAC_CNT,
+   ADC_CNT;
+};
 
 #defineTX_TRIG_LEVEL   0xf
 #defineRX_TRIG_LEVEL   0x7
 #defineDRQ_CLR_CNT 0x3
 
-#defineAC_DAC_DPC  0x00
+#defineAC_DAC_DPC(_sc) ((_sc)->cfg->DPC)   
 #define DAC_DPC_EN_DA  0x8000
-#defineAC_DAC_FIFOC0x04
+#defineAC_DAC_FIFOC(_sc)   ((_sc)->cfg->DAC_FIFOC)
 #define DAC_FIFOC_FS_SHIFT 29
 #define DAC_FIFOC_FS_MASK  (7U << DAC_FIFOC_FS_SHIFT)
 #define  DAC_FS_48KHZ  0
@@ -86,17 +113,9 @@ __FBSDID("$FreeBSD$");
 #define DAC_FIFOC_TX_BITS  (1U << 5)
 #define DAC_FIFOC_DRQ_EN   (1U << 4)
 #define DAC_FIFOC_FIFO_FLUSH   (1U << 0)
-#defineAC_DAC_FIFOS0x08
-#defineAC_DAC_TXDATA   0x0c
-#defineAC_DAC_ACTL 0x10
-#define DAC_ACTL_DACAREN   (1U << 31)
-#define DAC_ACTL_DACALEN   (1U << 30)
-#define DAC_ACTL_MIXEN (1U << 29)
-#define DAC_ACTL_DACPAS(1U << 8)
-#define DAC_ACTL_PAMUTE(1U << 6)
-#define DAC_ACTL_PAVOL_SHIFT   0
-#define DAC_ACTL_PAVOL_MASK(0x3f << DAC_ACTL_PAVOL_SHIFT)
-#defineAC_ADC_FIFOC0x1c
+#defineAC_DAC_FIFOS(_sc)   ((_sc)->cfg->DAC_FIFOS)
+#defineAC_DAC_TXDATA(_sc)  ((_sc)->cfg->DAC_TXDATA)
+#defineAC_ADC_FIFOC(_sc)   ((_sc)->cfg->ADC_FIFOC)
 #define ADC_FIFOC_FS_SHIFT 29
 #define ADC_FIFOC_FS_MASK  (7U << ADC_FIFOC_FS_SHIFT)
 #define  ADC_FS_48KHZ  0
@@ -108,33 +127,10 @@ __FBSDID("$FreeBSD$");
 #define ADC_FIFOC_RX_BITS  (1U << 6)
 #define ADC_FIFOC_DRQ_EN   (1U << 4)
 #define ADC_FIFOC_FIFO_FLUSH   (1U << 1)
-#defineAC_ADC_FIFOS0x20
-#defineAC_ADC_RXDATA   0x24
-#defineAC_ADC_ACTL 0x28
-#define ADC_ACTL_ADCREN(1U << 31)
-#define ADC_ACTL_ADCLEN(1U << 30)
-#define ADC_ACTL_PREG1EN   (1U << 29)
-#define ADC_ACTL_PREG2EN   (1U << 28)
-#define ADC_ACTL_VMICEN(1U << 27)
-#define ADC_ACTL_ADCG_SHIFT20
-#define ADC_ACTL_ADCG_MASK (7U << ADC_ACTL_ADCG_SHIFT)
-#define ADC_ACTL_ADCIS_SHIFT   17
-#define ADC_ACTL_ADCIS_MASK(7U << ADC_ACTL_ADCIS_SHIFT)
-#define  ADC_IS_LINEIN 0
-#define  ADC_IS_FMIN   1
-#define  ADC_IS_MIC1   2
-#define  ADC_IS_MIC2   3
-#define  ADC_IS_MIC1_L_MIC2_R  4
-#define  ADC_IS_MIC1_LR_MIC2_LR5
-#define  ADC_IS_OMIX   6
-#define  ADC_IS_LINEIN_L_MIC1_R7
-#define ADC_ACTL_LNRDF (1U << 16)

svn commit: r308236 - head/sys/arm/allwinner

2016-11-02 Thread Jared McNeill 
Author: jmcneill
Date: Wed Nov  2 23:58:10 2016
New Revision: 308236
URL: https://svnweb.freebsd.org/changeset/base/308236

Log:
  Add support for the integrated DMA controller found in the Allwinner A31,
  A64, A83T, and H3 SoCs.
  
  Relnotes: yes

Added:
  head/sys/arm/allwinner/a31_dmac.c   (contents, props changed)
Modified:
  head/sys/arm/allwinner/files.allwinner

Added: head/sys/arm/allwinner/a31_dmac.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/allwinner/a31_dmac.c   Wed Nov  2 23:58:10 2016
(r308236)
@@ -0,0 +1,557 @@
+/*-
+ * Copyright (c) 2016 Jared D. McNeill 
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+/*
+ * Allwinner DMA controller
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "sunxi_dma_if.h"
+
+#defineDMA_IRQ_EN_REG0 0x00
+#defineDMA_IRQ_EN_REG1 0x04
+#defineDMA_IRQ_EN_REG(ch)  (DMA_IRQ_EN_REG0 + ((ch) / 8) * 4)
+#define DMA_PKG_IRQ_EN(ch) (1 << (((ch) % 8) * 4 + 1))
+#define DMA_PKG_IRQ_MASK   0xULL
+#defineDMA_IRQ_PEND_REG0   0x10
+#defineDMA_IRQ_PEND_REG1   0x14
+#defineDMA_IRQ_PEND_REG(ch)(DMA_IRQ_PEND_REG0 + ((ch) / 8) * 4)
+#defineDMA_STA_REG 0x30
+#defineDMA_EN_REG(n)   (0x100 + (n) * 0x40 + 0x00)
+#define DMA_EN (1 << 0)
+#defineDMA_PAU_REG(n)  (0x100 + (n) * 0x40 + 0x04)
+#defineDMA_STAR_ADDR_REG(n)(0x100 + (n) * 0x40 + 0x08)
+#defineDMA_CFG_REG(n)  (0x100 + (n) * 0x40 + 0x0c)
+#define DMA_DEST_DATA_WIDTH(0x3 << 25)
+#define DMA_DEST_DATA_WIDTH_SHIFT  25
+#define DMA_DEST_BST_LEN   (0x3 << 22)
+#define DMA_DEST_BST_LEN_SHIFT 22
+#define DMA_DEST_ADDR_MODE (0x1 << 21)
+#define DMA_DEST_ADDR_MODE_SHIFT   21
+#define DMA_DEST_DRQ_TYPE  (0x1f << 16)
+#define DMA_DEST_DRQ_TYPE_SHIFT16
+#define DMA_SRC_DATA_WIDTH (0x3 << 9)
+#define DMA_SRC_DATA_WIDTH_SHIFT   9
+#define DMA_SRC_BST_LEN(0x3 << 6)
+#define DMA_SRC_BST_LEN_SHIFT  6
+#define DMA_SRC_ADDR_MODE  (0x1 << 5)
+#define DMA_SRC_ADDR_MODE_SHIFT5
+#define DMA_SRC_DRQ_TYPE   (0x1f << 0)
+#define DMA_SRC_DRQ_TYPE_SHIFT 0   
+#define DMA_DATA_WIDTH_8BIT0
+#define DMA_DATA_WIDTH_16BIT   1
+#define DMA_DATA_WIDTH_32BIT   2
+#define DMA_DATA_WIDTH_64BIT   3
+#define DMA_ADDR_MODE_LINEAR   0
+#define DMA_ADDR_MODE_IO   1
+#define DMA_BST_LEN_1  0
+#define DMA_BST_LEN_4  1
+#define DMA_BST_LEN_8  2
+#define DMA_BST_LEN_16 3
+#defineDMA_CUR_SRC_REG(n)  (0x100 + (n) * 0x40 + 0x10)
+#defineDMA_CUR_DEST_REG(n) (0x100 + (n) * 0x40 + 0x14)
+#defineDMA_BCNT_LEFT_REG(n)(0x100 + (n) * 0x40 + 0x18)
+#defineDMA_PARA_REG(n) (0x100 + (n) * 0x40 + 0x1c)
+#define WAIT_CYC   (0xff << 0)
+#define WAIT_CYC_SHIFT 0
+
+struct a31dmac_desc {
+   uint32_tconfig;
+   uint32_t

svn commit: r308235 - head/sys/arm/allwinner

2016-11-02 Thread Jared McNeill 
Author: jmcneill
Date: Wed Nov  2 23:53:47 2016
New Revision: 308235
URL: https://svnweb.freebsd.org/changeset/base/308235

Log:
  Register the device's xref handle at attach time.

Modified:
  head/sys/arm/allwinner/a10_dmac.c

Modified: head/sys/arm/allwinner/a10_dmac.c
==
--- head/sys/arm/allwinner/a10_dmac.c   Wed Nov  2 23:49:57 2016
(r308234)
+++ head/sys/arm/allwinner/a10_dmac.c   Wed Nov  2 23:53:47 2016
(r308235)
@@ -168,6 +168,7 @@ a10dmac_attach(device_t dev)
return (ENXIO);
}
 
+   OF_device_register_xref(OF_xref_from_node(ofw_bus_get_node(dev)), dev);
return (0);
 }
 
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svn commit: r308234 - head/sys/arm/allwinner/clk

2016-11-02 Thread Jared McNeill 
Author: jmcneill
Date: Wed Nov  2 23:49:57 2016
New Revision: 308234
URL: https://svnweb.freebsd.org/changeset/base/308234

Log:
  Add support for H3 PLL2 (PLL_Audio).

Modified:
  head/sys/arm/allwinner/clk/aw_pll.c

Modified: head/sys/arm/allwinner/clk/aw_pll.c
==
--- head/sys/arm/allwinner/clk/aw_pll.c Wed Nov  2 23:46:23 2016
(r308233)
+++ head/sys/arm/allwinner/clk/aw_pll.c Wed Nov  2 23:49:57 2016
(r308234)
@@ -171,6 +171,15 @@ __FBSDID("$FreeBSD$");
 #defineA83T_PLLCPUX_POSTDIV_M  (0x3 << 0)
 #defineA83T_PLLCPUX_POSTDIV_M_SHIFT0
 
+#defineH3_PLL2_LOCK(1 << 28)
+#defineH3_PLL2_SDM_EN  (1 << 24)
+#defineH3_PLL2_POST_DIV(0xf << 16)
+#defineH3_PLL2_POST_DIV_SHIFT  16
+#defineH3_PLL2_FACTOR_N(0x7f << 8)
+#defineH3_PLL2_FACTOR_N_SHIFT  8
+#defineH3_PLL2_PRE_DIV (0x1f << 0)
+#defineH3_PLL2_PRE_DIV_SHIFT   0
+
 #defineCLKID_A10_PLL3_1X   0
 #defineCLKID_A10_PLL3_2X   1
 
@@ -278,6 +287,11 @@ static struct aw_pll_factor aw_a23_pll1_
PLLFACTOR(25, 2, 0, 0, 187200),
 };
 
+static struct aw_pll_factor aw_h3_pll2_factors[] = {
+   PLLFACTOR(13, 0, 0, 13, 24576000),
+   PLLFACTOR(6, 0, 0, 7, 22579200),
+};
+
 enum aw_pll_type {
AWPLL_A10_PLL1 = 1,
AWPLL_A10_PLL2,
@@ -292,6 +306,7 @@ enum aw_pll_type {
AWPLL_A80_PLL4,
AWPLL_A83T_PLLCPUX,
AWPLL_H3_PLL1,
+   AWPLL_H3_PLL2,
 };
 
 struct aw_pll_sc {
@@ -698,6 +713,85 @@ a13_pll2_set_freq(struct aw_pll_sc *sc, 
 }
 
 static int
+h3_pll2_recalc(struct aw_pll_sc *sc, uint64_t *freq)
+{
+   uint32_t val, p, n, m;
+
+   DEVICE_LOCK(sc);
+   PLL_READ(sc, );
+   DEVICE_UNLOCK(sc);
+
+   p = ((val & H3_PLL2_POST_DIV) >> H3_PLL2_POST_DIV_SHIFT) + 1;
+   n = ((val & H3_PLL2_FACTOR_N) >> H3_PLL2_FACTOR_N_SHIFT) + 1;
+   m = ((val & H3_PLL2_PRE_DIV) >> H3_PLL2_PRE_DIV_SHIFT) + 1;
+
+   switch (sc->id) {
+   case SUN4I_A10_PLL2_1X:
+   *freq = (*freq * n) / (m * p);
+   break;
+   case SUN4I_A10_PLL2_2X:
+   *freq = (*freq * 2 * n) / m / 4;
+   break;
+   case SUN4I_A10_PLL2_4X:
+   *freq = (*freq * 2 * n) / m / 2;
+   break;
+   case SUN4I_A10_PLL2_8X:
+   *freq = (*freq * 2 * n) / m;
+   break;
+   default:
+   return (EINVAL);
+   }
+
+   return (0);
+}
+
+static int
+h3_pll2_set_freq(struct aw_pll_sc *sc, uint64_t fin, uint64_t *fout,
+int flags)
+{
+   struct aw_pll_factor *f;
+   uint32_t val;
+   int n, error, retry;
+
+   if (sc->id != SUN4I_A10_PLL2_1X)
+   return (ENXIO);
+
+   f = NULL;
+   for (n = 0; n < nitems(aw_h3_pll2_factors); n++) {
+   if (aw_h3_pll2_factors[n].freq == *fout) {
+   f = _h3_pll2_factors[n];
+   break;
+   }
+   }
+   if (f == NULL)
+   return (EINVAL);
+
+   DEVICE_LOCK(sc);
+   PLL_READ(sc, );
+   val &= ~(H3_PLL2_POST_DIV|H3_PLL2_FACTOR_N|H3_PLL2_PRE_DIV);
+   val |= (f->p << H3_PLL2_POST_DIV_SHIFT);
+   val |= (f->n << H3_PLL2_FACTOR_N_SHIFT);
+   val |= (f->m << H3_PLL2_PRE_DIV_SHIFT);
+   val |= AW_PLL_ENABLE;
+   PLL_WRITE(sc, val);
+
+   /* Wait for lock */
+   error = 0;
+   for (retry = 0; retry < 1000; retry++) {
+   PLL_READ(sc, );
+   if ((val & H3_PLL2_LOCK) != 0)
+   break;
+   DELAY(100);
+   }
+   if (retry == 0)
+   error = ETIMEDOUT;
+
+   DEVICE_UNLOCK(sc);
+
+   return (error);
+}
+
+static int
 a23_pll1_set_freq(struct aw_pll_sc *sc, uint64_t fin, uint64_t *fout,
 int flags)
 {
@@ -1006,6 +1100,7 @@ static struct aw_pll_funcs aw_pll_func[]
PLL(AWPLL_A83T_PLLCPUX, a83t_pllcpux_recalc, a83t_pllcpux_set_freq, 
NULL),
PLL(AWPLL_A64_PLLHSIC, a64_pllhsic_recalc, NULL, a64_pllhsic_init),
PLL(AWPLL_H3_PLL1, a23_pll1_recalc, h3_pll1_set_freq, NULL),
+   PLL(AWPLL_H3_PLL2, h3_pll2_recalc, h3_pll2_set_freq, NULL),
 };
 
 static struct ofw_compat_data compat_data[] = {
@@ -1020,6 +1115,7 @@ static struct ofw_compat_data compat_dat
{ "allwinner,sun8i-a23-pll1-clk",   AWPLL_A23_PLL1 },
{ "allwinner,sun8i-a83t-pllcpux-clk",   AWPLL_A83T_PLLCPUX },
{ "allwinner,sun8i-h3-pll1-clk",AWPLL_H3_PLL1 },
+   { "allwinner,sun8i-h3-pll2-clk",AWPLL_H3_PLL2 },
{ "allwinner,sun9i-a80-pll4-clk",   AWPLL_A80_PLL4 },
{ "allwinner,sun50i-a64-pllhsic-clk",   AWPLL_A64_PLLHSIC },
{ NULL, 0 }
___

svn commit: r308233 - head/sys/arm/allwinner/clk

2016-11-02 Thread Jared McNeill 
Author: jmcneill
Date: Wed Nov  2 23:46:23 2016
New Revision: 308233
URL: https://svnweb.freebsd.org/changeset/base/308233

Log:
  The DTS may report fewer than 4 parents for a module clock. Avoid setting
  the module clock parent to an out-of-range index in these cases.

Modified:
  head/sys/arm/allwinner/clk/aw_modclk.c

Modified: head/sys/arm/allwinner/clk/aw_modclk.c
==
--- head/sys/arm/allwinner/clk/aw_modclk.c  Wed Nov  2 23:44:30 2016
(r308232)
+++ head/sys/arm/allwinner/clk/aw_modclk.c  Wed Nov  2 23:46:23 2016
(r308233)
@@ -53,7 +53,6 @@ __FBSDID("$FreeBSD$");
 #defineSCLK_GATING (1 << 31)
 #defineCLK_SRC_SEL (0x3 << 24)
 #defineCLK_SRC_SEL_SHIFT   24
-#defineCLK_SRC_SEL_MAX 0x3
 #defineCLK_RATIO_N (0x3 << 16)
 #defineCLK_RATIO_N_SHIFT   16
 #defineCLK_RATIO_N_MAX 0x3
@@ -69,6 +68,7 @@ static struct ofw_compat_data compat_dat
 struct aw_modclk_sc {
device_tclkdev;
bus_addr_t  reg;
+   u_int   parent_cnt;
 };
 
 #defineMODCLK_READ(sc, val)CLKDEV_READ_4((sc)->clkdev, (sc)->reg, 
(val))
@@ -102,7 +102,7 @@ aw_modclk_set_mux(struct clknode *clk, i
 
sc = clknode_get_softc(clk);
 
-   if (index < 0 || index > CLK_SRC_SEL_MAX)
+   if (index < 0 || index >= sc->parent_cnt)
return (ERANGE);
 
DEVICE_LOCK(sc);
@@ -170,7 +170,7 @@ aw_modclk_set_freq(struct clknode *clk, 
best_diff = (int64_t)*fout; 
best_src = 0;
 
-   for (src = 0; src < CLK_SRC_SEL_MAX; src++) {
+   for (src = 0; src < sc->parent_cnt; src++) {
error = clknode_set_parent_by_idx(clk, src);
if (error != 0)
continue;
@@ -299,6 +299,7 @@ aw_modclk_attach(device_t dev)
sc = clknode_get_softc(clk);
sc->reg = paddr;
sc->clkdev = device_get_parent(dev);
+   sc->parent_cnt = def.parent_cnt;
 
clknode_register(clkdom, clk);
 
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svn commit: r308105 - head/sys/arm/allwinner

2016-10-30 Thread Jared McNeill 
Author: jmcneill
Date: Sun Oct 30 14:39:33 2016
New Revision: 308105
URL: https://svnweb.freebsd.org/changeset/base/308105

Log:
  Fix H3 temperature reporting. The formula in for V1.0 of the H3 datasheet
  seems to be incorrect, so use the same method of conversion as the H3 BSP
  instead.

Modified:
  head/sys/arm/allwinner/aw_thermal.c

Modified: head/sys/arm/allwinner/aw_thermal.c
==
--- head/sys/arm/allwinner/aw_thermal.c Sun Oct 30 12:15:33 2016
(r308104)
+++ head/sys/arm/allwinner/aw_thermal.c Sun Oct 30 14:39:33 2016
(r308105)
@@ -109,9 +109,9 @@ __FBSDID("$FreeBSD$");
 #defineH3_ADC_ACQUIRE_TIME 0x3f
 #defineH3_FILTER   0x6
 #defineH3_INTC 0x191000
-#defineH3_TEMP_BASE2794000
+#defineH3_TEMP_BASE1794000
 #defineH3_TEMP_MUL 1000
-#defineH3_TEMP_DIV -14882
+#defineH3_TEMP_DIV -8253
 #defineH3_CLK_RATE 400
 
 #defineTEMP_C_TO_K 273
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svn commit: r307889 - head/sys/arm/conf

2016-10-24 Thread Jared McNeill 
Author: jmcneill
Date: Mon Oct 24 22:35:45 2016
New Revision: 307889
URL: https://svnweb.freebsd.org/changeset/base/307889

Log:
  Enable driver for SY8106A Buck Regulator.

Modified:
  head/sys/arm/conf/GENERIC

Modified: head/sys/arm/conf/GENERIC
==
--- head/sys/arm/conf/GENERIC   Mon Oct 24 22:35:12 2016(r307888)
+++ head/sys/arm/conf/GENERIC   Mon Oct 24 22:35:45 2016(r307889)
@@ -112,6 +112,7 @@ device  axp209  # AXP209 Power 
Manageme
 device axp81x  # AXP813/818 Power Management Unit
 device bcm2835_bsc
 device icee
+device sy8106a # SY8106A Buck Regulator
 
 # GPIO
 device gpio
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svn commit: r307888 - head/sys/arm/allwinner

2016-10-24 Thread Jared McNeill 
Author: jmcneill
Date: Mon Oct 24 22:35:12 2016
New Revision: 307888
URL: https://svnweb.freebsd.org/changeset/base/307888

Log:
  Defer cpufreq updates from intr handler to the taskqueue_thread queue.

Modified:
  head/sys/arm/allwinner/aw_thermal.c

Modified: head/sys/arm/allwinner/aw_thermal.c
==
--- head/sys/arm/allwinner/aw_thermal.c Mon Oct 24 22:11:33 2016
(r307887)
+++ head/sys/arm/allwinner/aw_thermal.c Mon Oct 24 22:35:12 2016
(r307888)
@@ -42,6 +42,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -249,6 +250,7 @@ struct aw_thermal_softc {
struct resource *res[2];
struct aw_thermal_config*conf;
 
+   struct task cf_task;
int throttle;
int min_freq;
struct cf_level levels[MAX_CF_LEVELS];
@@ -390,6 +392,16 @@ aw_thermal_throttle(struct aw_thermal_so
 }
 
 static void
+aw_thermal_cf_task(void *arg, int pending)
+{
+   struct aw_thermal_softc *sc;
+
+   sc = arg;
+
+   aw_thermal_throttle(sc, 1);
+}
+
+static void
 aw_thermal_cf_pre_change(void *arg, const struct cf_level *level, int *status)
 {
struct aw_thermal_softc *sc;
@@ -430,7 +442,7 @@ aw_thermal_intr(void *arg)
}
 
if ((ints & ALARM_INT_ALL) != 0)
-   aw_thermal_throttle(sc, 1);
+   taskqueue_enqueue(taskqueue_thread, >cf_task);
 }
 
 static int
@@ -461,6 +473,7 @@ aw_thermal_attach(device_t dev)
ih = NULL;
 
sc->conf = THS_CONF(dev);
+   TASK_INIT(>cf_task, 0, aw_thermal_cf_task, sc);
 
if (bus_alloc_resources(dev, aw_thermal_spec, sc->res) != 0) {
device_printf(dev, "cannot allocate resources for device\n");
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svn commit: r307828 - head/sys/arm/conf

2016-10-23 Thread Jared McNeill 
Author: jmcneill
Date: Sun Oct 23 19:02:19 2016
New Revision: 307828
URL: https://svnweb.freebsd.org/changeset/base/307828

Log:
  Add device cpufreq.

Modified:
  head/sys/arm/conf/GENERIC

Modified: head/sys/arm/conf/GENERIC
==
--- head/sys/arm/conf/GENERIC   Sun Oct 23 18:08:34 2016(r307827)
+++ head/sys/arm/conf/GENERIC   Sun Oct 23 19:02:19 2016(r307828)
@@ -59,6 +59,9 @@ devicephy
 device hwreset
 device regulator
 
+# CPU frequency control
+device cpufreq
+
 # Interrupt controller
 optionsINTRNG
 device gic
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svn commit: r307824 - head/sys/arm/allwinner

2016-10-23 Thread Jared McNeill 
Author: jmcneill
Date: Sun Oct 23 17:48:34 2016
New Revision: 307824
URL: https://svnweb.freebsd.org/changeset/base/307824

Log:
  Throttle CPU frequency when hot temperature threshold has been reached to
  prevent overheating.
  
  When sensor 0's alarm interrupt is fired, set a throttle flag. Further
  requests to set CPU frequency will be rejected until sensor 0's temperature
  returns to a level below the hot temperature threshold.
  
  Relnotes: yes

Modified:
  head/sys/arm/allwinner/aw_thermal.c

Modified: head/sys/arm/allwinner/aw_thermal.c
==
--- head/sys/arm/allwinner/aw_thermal.c Sun Oct 23 14:28:29 2016
(r307823)
+++ head/sys/arm/allwinner/aw_thermal.c Sun Oct 23 17:48:34 2016
(r307824)
@@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -51,6 +52,8 @@ __FBSDID("$FreeBSD$");
 
 #include 
 
+#include "cpufreq_if.h"
+
 #defineTHS_CTRL0   0x00
 #defineTHS_CTRL1   0x04
 #define ADC_CALI_EN(1 << 17)
@@ -70,6 +73,14 @@ __FBSDID("$FreeBSD$");
 #define ALARM_INT2_STS (1 << 2)
 #define ALARM_INT1_STS (1 << 1)
 #define ALARM_INT0_STS (1 << 0)
+#defineTHS_ALARM0_CTRL 0x50
+#define ALARM_T_HOT_MASK   0xfff
+#define ALARM_T_HOT_SHIFT  16
+#define ALARM_T_HYST_MASK  0xfff
+#define ALARM_T_HYST_SHIFT 0
+#defineTHS_SHUTDOWN0_CTRL  0x60
+#define SHUT_T_HOT_MASK0xfff
+#define SHUT_T_HOT_SHIFT   16
 #defineTHS_FILTER  0x70
 #defineTHS_CALIB0  0x74
 #defineTHS_CALIB1  0x78
@@ -97,16 +108,24 @@ __FBSDID("$FreeBSD$");
 #defineH3_ADC_ACQUIRE_TIME 0x3f
 #defineH3_FILTER   0x6
 #defineH3_INTC 0x191000
-#defineH3_TEMP_BASE21700
-#defineH3_TEMP_MUL 121168
-#defineH3_TEMP_DIV 100
+#defineH3_TEMP_BASE2794000
+#defineH3_TEMP_MUL 1000
+#defineH3_TEMP_DIV -14882
 #defineH3_CLK_RATE 400
 
 #defineTEMP_C_TO_K 273
 #defineSENSOR_ENABLE_ALL   (SENSOR0_EN|SENSOR1_EN|SENSOR2_EN)
 #defineSHUT_INT_ALL
(SHUT_INT0_STS|SHUT_INT1_STS|SHUT_INT2_STS)
+#defineALARM_INT_ALL   (ALARM_INT0_STS)
 
 #defineMAX_SENSORS 3
+#defineMAX_CF_LEVELS   64
+
+#defineTHROTTLE_ENABLE_DEFAULT 1
+
+/* Enable thermal throttling */
+static int aw_thermal_throttle_enable = THROTTLE_ENABLE_DEFAULT;
+TUNABLE_INT("hw.aw_thermal.throttle_enable", _thermal_throttle_enable);
 
 struct aw_thermal_sensor {
const char  *name;
@@ -118,14 +137,23 @@ struct aw_thermal_config {
int nsensors;
uint64_tclk_rate;
uint32_tadc_acquire_time;
+   int adc_cali_en;
uint32_tfilter;
uint32_tintc;
+   int (*to_temp)(uint32_t);
int temp_base;
int temp_mul;
int temp_div;
-   int calib;
+   int calib0, calib1;
+   uint32_tcalib0_mask, calib1_mask;
 };
 
+static int
+a83t_to_temp(uint32_t val)
+{
+   return ((A83T_TEMP_BASE - (val * A83T_TEMP_MUL)) / A83T_TEMP_DIV);
+}
+
 static const struct aw_thermal_config a83t_config = {
.nsensors = 3,
.sensors = {
@@ -144,14 +172,22 @@ static const struct aw_thermal_config a8
},
.clk_rate = A83T_CLK_RATE,
.adc_acquire_time = A83T_ADC_ACQUIRE_TIME,
+   .adc_cali_en = 1,
.filter = A83T_FILTER,
.intc = A83T_INTC,
-   .temp_base = A83T_TEMP_BASE,
-   .temp_mul = A83T_TEMP_MUL,
-   .temp_div = A83T_TEMP_DIV,
-   .calib = 1,
+   .to_temp = a83t_to_temp,
+   .calib0 = 1,
+   .calib0_mask = 0x,
+   .calib1 = 1,
+   .calib1_mask = 0x,
 };
 
+static int
+a64_to_temp(uint32_t val)
+{
+   return ((A64_TEMP_BASE - (val * A64_TEMP_MUL)) / A64_TEMP_DIV);
+}
+
 static const struct aw_thermal_config a64_config = {
.nsensors = 3,
.sensors = {
@@ -172,11 +208,15 @@ static const struct aw_thermal_config a6
.adc_acquire_time = A64_ADC_ACQUIRE_TIME,
.filter = A64_FILTER,
.intc = A64_INTC,
-   .temp_base = A64_TEMP_BASE,
-   .temp_mul = A64_TEMP_MUL,
-   .temp_div = A64_TEMP_DIV,
+   .to_temp = a64_to_temp,
 };
 
+static int
+h3_to_temp(uint32_t

svn commit: r307393 - head/sys/arm/allwinner

2016-10-16 Thread Jared McNeill 
Author: jmcneill
Date: Sun Oct 16 12:55:31 2016
New Revision: 307393
URL: https://svnweb.freebsd.org/changeset/base/307393

Log:
  aw_ccu on H3 needs access to PRCM space. The r_pio controller works now.

Modified:
  head/sys/arm/allwinner/aw_ccu.c

Modified: head/sys/arm/allwinner/aw_ccu.c
==
--- head/sys/arm/allwinner/aw_ccu.c Sun Oct 16 10:43:12 2016
(r307392)
+++ head/sys/arm/allwinner/aw_ccu.c Sun Oct 16 12:55:31 2016
(r307393)
@@ -82,7 +82,7 @@ static struct ofw_compat_data compat_dat
{ "allwinner,sun6i-a31s",   CLOCK_CCU },
{ "allwinner,sun50i-a64",   CLOCK_CCU },
{ "allwinner,sun8i-a83t",   CLOCK_CCU|CLOCK_PRCM|CLOCK_SYSCTRL },
-   { "allwinner,sun8i-h3", CLOCK_CCU },
+   { "allwinner,sun8i-h3", CLOCK_CCU|CLOCK_PRCM },
{ NULL, 0 }
 };
 
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svn commit: r307382 - in head/sys: arm/conf conf dev/gpio

2016-10-15 Thread Jared McNeill 
Author: jmcneill
Date: Sat Oct 15 20:04:14 2016
New Revision: 307382
URL: https://svnweb.freebsd.org/changeset/base/307382

Log:
  Add driver for GPIO controlled regulator.
  
  Reviewed by:  gonzo, manu, mmel
  Differential Revision:https://reviews.freebsd.org/D8257

Added:
  head/sys/dev/gpio/gpioregulator.c   (contents, props changed)
Modified:
  head/sys/arm/conf/GENERIC
  head/sys/conf/files

Modified: head/sys/arm/conf/GENERIC
==
--- head/sys/arm/conf/GENERIC   Sat Oct 15 19:55:07 2016(r307381)
+++ head/sys/arm/conf/GENERIC   Sat Oct 15 20:04:14 2016(r307382)
@@ -112,6 +112,7 @@ device  icee
 # GPIO
 device gpio
 device gpioled
+device gpioregulator
 
 # SPI
 device spibus

Modified: head/sys/conf/files
==
--- head/sys/conf/files Sat Oct 15 19:55:07 2016(r307381)
+++ head/sys/conf/files Sat Oct 15 20:04:14 2016(r307382)
@@ -1573,6 +1573,7 @@ dev/gpio/gpioc.c  optional gpio   
\
dependency  "gpio_if.h"
 dev/gpio/gpioiic.c optional gpioiic
 dev/gpio/gpioled.c optional gpioled
+dev/gpio/gpioregulator.c   optional gpioregulator fdt ext_resources
 dev/gpio/gpiospi.c optional gpiospi
 dev/gpio/gpio_if.m optional gpio
 dev/gpio/gpiobus_if.m  optional gpio

Added: head/sys/dev/gpio/gpioregulator.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/gpio/gpioregulator.c   Sat Oct 15 20:04:14 2016
(r307382)
@@ -0,0 +1,348 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * GPIO controlled regulators
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include 
+
+#include "regdev_if.h"
+
+struct gpioregulator_state {
+   int val;
+   uint32_tmask;
+};
+
+struct gpioregulator_init_def {
+   struct regnode_init_def reg_init_def;
+   struct gpiobus_pin  *enable_pin;
+   int enable_pin_valid;
+   int startup_delay_us;
+   int nstates;
+   struct gpioregulator_state  *states;
+   int npins;
+   struct gpiobus_pin  **pins;
+};
+
+struct gpioregulator_reg_sc {
+   struct regnode  *regnode;
+   device_tbase_dev;
+   struct regnode_std_param*param;
+   struct gpioregulator_init_def   *def;
+};
+
+struct gpioregulator_softc {
+   device_tdev;
+   struct gpioregulator_reg_sc *reg_sc;
+   struct gpioregulator_init_def   init_def;
+};
+
+static int
+gpioregulator_regnode_init(struct regnode *regnode)
+{
+   struct gpioregulator_reg_sc *sc;
+   int error, n;
+
+   sc = regnode_get_softc(regnode);
+
+   if (sc->def->enable_pin_valid == 1) {
+   error = gpio_pin_setflags(sc->def->enable_pin, GPIO_PIN_OUTPUT);
+   if (error != 0)
+   return (error);
+   }
+
+   for (n = 0; n < sc->def->npins; n++) {
+   error = gpio_pin_setflags(sc->def->pins[n], GPIO_PIN_OUTPUT);
+

svn commit: r307366 - head/sys/arm/allwinner/clk

2016-10-15 Thread Jared McNeill 
Author: jmcneill
Date: Sat Oct 15 13:27:01 2016
New Revision: 307366
URL: https://svnweb.freebsd.org/changeset/base/307366

Log:
  Match "allwinner,sun8i-h3-apb0-gates-clk" compatible string.

Modified:
  head/sys/arm/allwinner/clk/aw_gate.c

Modified: head/sys/arm/allwinner/clk/aw_gate.c
==
--- head/sys/arm/allwinner/clk/aw_gate.cSat Oct 15 13:17:27 2016
(r307365)
+++ head/sys/arm/allwinner/clk/aw_gate.cSat Oct 15 13:27:01 2016
(r307366)
@@ -91,6 +91,8 @@ static struct ofw_compat_data compat_dat
 
{ "allwinner,sun8i-h3-bus-gates-clk",
  (uintptr_t)"Allwinner Bus Clock Gates" },
+   { "allwinner,sun8i-h3-apb0-gates-clk",
+ (uintptr_t)"Allwinner APB0 Clock Gates" },
 
{ "allwinner,sun9i-a80-apbs-gates-clk",
  (uintptr_t)"Allwinner APBS Clock Gates" },
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svn commit: r307354 - head/sys/arm/allwinner/clk

2016-10-15 Thread Jared McNeill 
Author: jmcneill
Date: Sat Oct 15 12:23:54 2016
New Revision: 307354
URL: https://svnweb.freebsd.org/changeset/base/307354

Log:
  Provide a complete A23 PLL1 factor table, from 60MHz to 1872MHz.

Modified:
  head/sys/arm/allwinner/clk/aw_pll.c

Modified: head/sys/arm/allwinner/clk/aw_pll.c
==
--- head/sys/arm/allwinner/clk/aw_pll.c Sat Oct 15 12:22:06 2016
(r307353)
+++ head/sys/arm/allwinner/clk/aw_pll.c Sat Oct 15 12:23:54 2016
(r307354)
@@ -193,12 +193,76 @@ struct aw_pll_factor {
{ .n = (_n), .k = (_k), .m = (_m), .p = (_p), .freq = (_freq) }
 
 static struct aw_pll_factor aw_a23_pll1_factors[] = {
+   PLLFACTOR(9, 0, 0, 2, 6000),
+   PLLFACTOR(10, 0, 0, 2, 6600),
+   PLLFACTOR(11, 0, 0, 2, 7200),
+   PLLFACTOR(12, 0, 0, 2, 7800),
+   PLLFACTOR(13, 0, 0, 2, 8400),
+   PLLFACTOR(14, 0, 0, 2, 9000),
+   PLLFACTOR(15, 0, 0, 2, 9600),
+   PLLFACTOR(16, 0, 0, 2, 10200),
+   PLLFACTOR(17, 0, 0, 2, 10800),
+   PLLFACTOR(18, 0, 0, 2, 11400),
+   PLLFACTOR(9, 0, 0, 1, 12000),
+   PLLFACTOR(10, 0, 0, 1, 13200),
+   PLLFACTOR(11, 0, 0, 1, 14400),
+   PLLFACTOR(12, 0, 0, 1, 15600),
+   PLLFACTOR(13, 0, 0, 1, 16800),
+   PLLFACTOR(14, 0, 0, 1, 18000),
+   PLLFACTOR(15, 0, 0, 1, 19200),
+   PLLFACTOR(16, 0, 0, 1, 20400),
+   PLLFACTOR(17, 0, 0, 1, 21600),
+   PLLFACTOR(18, 0, 0, 1, 22800),
+   PLLFACTOR(9, 0, 0, 0, 24000),
+   PLLFACTOR(10, 0, 0, 0, 26400),
+   PLLFACTOR(11, 0, 0, 0, 28800),
+   PLLFACTOR(12, 0, 0, 0, 31200),
+   PLLFACTOR(13, 0, 0, 0, 33600),
+   PLLFACTOR(14, 0, 0, 0, 36000),
+   PLLFACTOR(15, 0, 0, 0, 38400),
PLLFACTOR(16, 0, 0, 0, 40800),
+   PLLFACTOR(17, 0, 0, 0, 43200),
+   PLLFACTOR(18, 0, 0, 0, 45600),
+   PLLFACTOR(19, 0, 0, 0, 48000),
+   PLLFACTOR(20, 0, 0, 0, 50400),
+   PLLFACTOR(21, 0, 0, 0, 52800),
+   PLLFACTOR(22, 0, 0, 0, 55200),
+   PLLFACTOR(23, 0, 0, 0, 57600),
+   PLLFACTOR(24, 0, 0, 0, 6),
+   PLLFACTOR(25, 0, 0, 0, 62400),
PLLFACTOR(26, 0, 0, 0, 64800),
+   PLLFACTOR(27, 0, 0, 0, 67200),
+   PLLFACTOR(28, 0, 0, 0, 69600),
+   PLLFACTOR(29, 0, 0, 0, 72000),
+   PLLFACTOR(15, 1, 0, 0, 76800),
+   PLLFACTOR(10, 2, 0, 0, 79200),
PLLFACTOR(16, 1, 0, 0, 81600),
+   PLLFACTOR(17, 1, 0, 0, 86400),
+   PLLFACTOR(18, 1, 0, 0, 91200),
+   PLLFACTOR(12, 2, 0, 0, 93600),
+   PLLFACTOR(19, 1, 0, 0, 96000),
PLLFACTOR(20, 1, 0, 0, 100800),
+   PLLFACTOR(21, 1, 0, 0, 105600),
+   PLLFACTOR(14, 2, 0, 0, 108000),
+   PLLFACTOR(22, 1, 0, 0, 110400),
+   PLLFACTOR(23, 1, 0, 0, 115200),
PLLFACTOR(24, 1, 0, 0, 12),
+   PLLFACTOR(16, 2, 0, 0, 122400),
+   PLLFACTOR(25, 1, 0, 0, 124800),
PLLFACTOR(26, 1, 0, 0, 129600),
+   PLLFACTOR(27, 1, 0, 0, 134400),
+   PLLFACTOR(18, 2, 0, 0, 136800),
+   PLLFACTOR(28, 1, 0, 0, 139200),
+   PLLFACTOR(29, 1, 0, 0, 144000),
+   PLLFACTOR(20, 2, 0, 0, 151200),
+   PLLFACTOR(15, 3, 0, 0, 153600),
+   PLLFACTOR(21, 2, 0, 0, 158400),
+   PLLFACTOR(16, 3, 0, 0, 163200),
+   PLLFACTOR(22, 2, 0, 0, 165600),
+   PLLFACTOR(23, 2, 0, 0, 172800),
+   PLLFACTOR(24, 2, 0, 0, 18),
+   PLLFACTOR(18, 3, 0, 0, 182400),
+   PLLFACTOR(25, 2, 0, 0, 187200),
 };
 
 enum aw_pll_type {
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Re: svn commit: r306658 - head/sys/arm/arm

2016-10-04 Thread Jared McNeill 

On Tue, 4 Oct 2016, Mark Millard wrote:


MFC at some point?


Good idea, I will do that.

Cheers,
Jared
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svn commit: r306658 - head/sys/arm/arm

2016-10-03 Thread Jared McNeill 
Author: jmcneill
Date: Mon Oct  3 21:42:05 2016
New Revision: 306658
URL: https://svnweb.freebsd.org/changeset/base/306658

Log:
  Clear GT_CTRL_ENABLE to stop the timer.
  
  Reviewed by:  andrew

Modified:
  head/sys/arm/arm/generic_timer.c

Modified: head/sys/arm/arm/generic_timer.c
==
--- head/sys/arm/arm/generic_timer.cMon Oct  3 20:48:18 2016
(r306657)
+++ head/sys/arm/arm/generic_timer.cMon Oct  3 21:42:05 2016
(r306658)
@@ -259,7 +259,7 @@ arm_tmr_stop(struct eventtimer *et)
sc = (struct arm_tmr_softc *)et->et_priv;
 
ctrl = get_ctrl(sc->physical);
-   ctrl &= GT_CTRL_ENABLE;
+   ctrl &= ~GT_CTRL_ENABLE;
set_ctrl(ctrl, sc->physical);
 
return (0);
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svn commit: r305512 - in head/sys: arm/allwinner/clk boot/fdt/dts/arm

2016-09-06 Thread Jared McNeill 
Author: jmcneill
Date: Wed Sep  7 01:10:16 2016
New Revision: 305512
URL: https://svnweb.freebsd.org/changeset/base/305512

Log:
  Add support for Allwinner A83T CPU frequency scaling.

Modified:
  head/sys/arm/allwinner/clk/aw_cpuclk.c
  head/sys/arm/allwinner/clk/aw_pll.c
  head/sys/boot/fdt/dts/arm/a83t.dtsi
  head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts

Modified: head/sys/arm/allwinner/clk/aw_cpuclk.c
==
--- head/sys/arm/allwinner/clk/aw_cpuclk.c  Wed Sep  7 01:09:25 2016
(r305511)
+++ head/sys/arm/allwinner/clk/aw_cpuclk.c  Wed Sep  7 01:10:16 2016
(r305512)
@@ -47,8 +47,42 @@ __FBSDID("$FreeBSD$");
 
 #include 
 
-#defineCPU_CLK_SRC_SEL_WIDTH   2
-#defineCPU_CLK_SRC_SEL_SHIFT   16
+#defineA10_CPU_CLK_SRC_SEL_WIDTH   2
+#defineA10_CPU_CLK_SRC_SEL_SHIFT   16
+
+#defineA83T_Cx_CLK_SRC_SEL_WIDTH   1
+#defineA83T_C0_CLK_SRC_SEL_SHIFT   12
+#defineA83T_C1_CLK_SRC_SEL_SHIFT   28
+
+struct aw_cpuclk_config {
+   u_int   width;
+   u_int   shift;
+};
+
+static struct aw_cpuclk_config a10_config = {
+   .width = A10_CPU_CLK_SRC_SEL_WIDTH,
+   .shift = A10_CPU_CLK_SRC_SEL_SHIFT,
+};
+
+static struct aw_cpuclk_config a83t_c0_config = {
+   .width = A83T_Cx_CLK_SRC_SEL_WIDTH,
+   .shift = A83T_C0_CLK_SRC_SEL_SHIFT,
+};
+
+static struct aw_cpuclk_config a83t_c1_config = {
+   .width = A83T_Cx_CLK_SRC_SEL_WIDTH,
+   .shift = A83T_C1_CLK_SRC_SEL_SHIFT,
+};
+
+static struct ofw_compat_data compat_data[] = {
+   { "allwinner,sun4i-a10-cpu-clk",(uintptr_t)_config },
+   { "allwinner,sun8i-a83t-c0cpu-clk", (uintptr_t)_c0_config },
+   { "allwinner,sun8i-a83t-c1cpu-clk", (uintptr_t)_c1_config },
+   { NULL, (uintptr_t)NULL }
+};
+
+#defineCPUCLK_CONF(d)  \
+   (void *)ofw_bus_search_compatible((d), compat_data)->ocd_data
 
 static int
 aw_cpuclk_probe(device_t dev)
@@ -56,7 +90,7 @@ aw_cpuclk_probe(device_t dev)
if (!ofw_bus_status_okay(dev))
return (ENXIO);
 
-   if (!ofw_bus_is_compatible(dev, "allwinner,sun4i-a10-cpu-clk"))
+   if (CPUCLK_CONF(dev) == NULL)
return (ENXIO);
 
device_set_desc(dev, "Allwinner CPU Clock");
@@ -68,6 +102,7 @@ aw_cpuclk_attach(device_t dev)
 {
struct clk_mux_def def;
struct clkdom *clkdom;
+   struct aw_cpuclk_config *conf;
bus_addr_t paddr;
bus_size_t psize;
phandle_t node;
@@ -75,6 +110,7 @@ aw_cpuclk_attach(device_t dev)
clk_t clk;
 
node = ofw_bus_get_node(dev);
+   conf = CPUCLK_CONF(dev);
 
if (ofw_reg_to_paddr(node, 0, , , NULL) != 0) {
device_printf(dev, "cannot parse 'reg' property\n");
@@ -105,8 +141,8 @@ aw_cpuclk_attach(device_t dev)
}
def.clkdef.parent_cnt = ncells;
def.offset = paddr;
-   def.shift = CPU_CLK_SRC_SEL_SHIFT;
-   def.width = CPU_CLK_SRC_SEL_WIDTH;
+   def.shift = conf->shift;
+   def.width = conf->width;
 
error = clk_parse_ofw_clk_name(dev, node, );
if (error != 0) {

Modified: head/sys/arm/allwinner/clk/aw_pll.c
==
--- head/sys/arm/allwinner/clk/aw_pll.c Wed Sep  7 01:09:25 2016
(r305511)
+++ head/sys/arm/allwinner/clk/aw_pll.c Wed Sep  7 01:10:16 2016
(r305512)
@@ -157,6 +157,17 @@ __FBSDID("$FreeBSD$");
 #defineA80_PLL4_FACTOR_N   (0xff << 8)
 #defineA80_PLL4_FACTOR_N_SHIFT 8
 
+#defineA83T_PLLCPUX_LOCK_TIME  (0x7 << 24)
+#defineA83T_PLLCPUX_LOCK_TIME_SHIFT24
+#defineA83T_PLLCPUX_CLOCK_OUTPUT_DIS   (1 << 20)
+#defineA83T_PLLCPUX_OUT_EXT_DIVP   (1 << 16)
+#defineA83T_PLLCPUX_FACTOR_N   (0xff << 8)
+#defineA83T_PLLCPUX_FACTOR_N_SHIFT 8
+#defineA83T_PLLCPUX_FACTOR_N_MIN   12
+#defineA83T_PLLCPUX_FACTOR_N_MAX   125
+#defineA83T_PLLCPUX_POSTDIV_M  (0x3 << 0)
+#defineA83T_PLLCPUX_POSTDIV_M_SHIFT0
+
 #defineCLKID_A10_PLL3_1X   0
 #defineCLKID_A10_PLL3_2X   1
 
@@ -202,6 +213,7 @@ enum aw_pll_type {
AWPLL_A31_PLL6,
AWPLL_A64_PLLHSIC,
AWPLL_A80_PLL4,
+   AWPLL_A83T_PLLCPUX,
AWPLL_H3_PLL1,
 };
 
@@ -824,6 +836,46 @@ a64_pllhsic_init(device_t dev, bus_addr_
return (0);
 }
 
+static int
+a83t_pllcpux_recalc(struct aw_pll_sc *sc, uint64_t *freq)
+{
+   uint32_t val, n, p;
+
+   DEVICE_LOCK(sc);
+   PLL_READ(sc, );
+   DEVICE_UNLOCK(sc);
+
+   n = (val & A83T_PLLCPUX_FACTOR_N) >> A83T_PLLCPUX_FACTOR_N_SHIFT;
+   p = (val & A83T_PLLCPUX_OUT_EXT_DIVP) ? 4 : 1;
+
+   *freq = (*freq * n) / p;
+
+   return (0);

svn commit: r305511 - head/sys/arm/allwinner

2016-09-06 Thread Jared McNeill 
Author: jmcneill
Date: Wed Sep  7 01:09:25 2016
New Revision: 305511
URL: https://svnweb.freebsd.org/changeset/base/305511

Log:
  Attach later so axp81x attaches after aw_nmi.

Modified:
  head/sys/arm/allwinner/axp81x.c

Modified: head/sys/arm/allwinner/axp81x.c
==
--- head/sys/arm/allwinner/axp81x.c Wed Sep  7 00:34:45 2016
(r305510)
+++ head/sys/arm/allwinner/axp81x.c Wed Sep  7 01:09:25 2016
(r305511)
@@ -777,9 +777,9 @@ extern devclass_t ofwgpiobus_devclass, g
 extern driver_t ofw_gpiobus_driver, gpioc_driver;
 
 EARLY_DRIVER_MODULE(axp81x, iicbus, axp81x_driver, axp81x_devclass, 0, 0,
-BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
+BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
 EARLY_DRIVER_MODULE(ofw_gpiobus, axp81x_pmu, ofw_gpiobus_driver,
-ofwgpiobus_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
+ofwgpiobus_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
 DRIVER_MODULE(gpioc, axp81x_pmu, gpioc_driver, gpioc_devclass, 0, 0);
 MODULE_VERSION(axp81x, 1);
 MODULE_DEPEND(axp81x, iicbus, 1, 1, 1);
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svn commit: r305505 - in head/sys: arm/conf conf

2016-09-06 Thread Jared McNeill 
Author: jmcneill
Date: Tue Sep  6 21:36:20 2016
New Revision: 305505
URL: https://svnweb.freebsd.org/changeset/base/305505

Log:
  Add generic device-tree cpufreq driver.

Modified:
  head/sys/arm/conf/ALLWINNER
  head/sys/conf/files.arm

Modified: head/sys/arm/conf/ALLWINNER
==
--- head/sys/arm/conf/ALLWINNER Tue Sep  6 21:22:03 2016(r305504)
+++ head/sys/arm/conf/ALLWINNER Tue Sep  6 21:36:20 2016(r305505)
@@ -52,6 +52,9 @@ devicephy
 device hwreset
 device regulator
 
+# CPU frequency control
+device cpufreq
+
 # Interrupt controller
 device gic
 

Modified: head/sys/conf/files.arm
==
--- head/sys/conf/files.arm Tue Sep  6 21:22:03 2016(r305504)
+++ head/sys/conf/files.arm Tue Sep  6 21:36:20 2016(r305505)
@@ -94,6 +94,7 @@ cddl/dev/dtrace/arm/dtrace_subr.c opti
 cddl/dev/fbt/arm/fbt_isa.c optional dtrace_fbt | 
dtraceall compile-with "${FBT_C}"
 crypto/blowfish/bf_enc.c   optionalcrypto | ipsec 
 crypto/des/des_enc.c   optionalcrypto | ipsec | netsmb
+dev/cpufreq/cpufreq_dt.c   optionalcpufreq fdt
 dev/dwc/if_dwc.c   optionaldwc
 dev/dwc/if_dwc_if.moptionaldwc
 dev/fb/fb.coptionalsc
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svn commit: r305503 - in head/sys: arm64/conf conf

2016-09-06 Thread Jared McNeill 
Author: jmcneill
Date: Tue Sep  6 21:18:14 2016
New Revision: 305503
URL: https://svnweb.freebsd.org/changeset/base/305503

Log:
  Add generic device-tree cpufreq driver.

Modified:
  head/sys/arm64/conf/GENERIC
  head/sys/conf/files.arm64

Modified: head/sys/arm64/conf/GENERIC
==
--- head/sys/arm64/conf/GENERIC Tue Sep  6 21:15:35 2016(r305502)
+++ head/sys/arm64/conf/GENERIC Tue Sep  6 21:18:14 2016(r305503)
@@ -96,6 +96,9 @@ devicevirtio_mmio
 device virtio_blk
 device vtnet
 
+# CPU frequency control
+device cpufreq
+
 # Bus drivers
 device pci
 optionsPCI_HP  # PCI-Express native HotPlug

Modified: head/sys/conf/files.arm64
==
--- head/sys/conf/files.arm64   Tue Sep  6 21:15:35 2016(r305502)
+++ head/sys/conf/files.arm64   Tue Sep  6 21:18:14 2016(r305503)
@@ -97,6 +97,7 @@ crypto/blowfish/bf_enc.c  optionalcrypto
 crypto/des/des_enc.c   optionalcrypto | ipsec | netsmb
 dev/acpica/acpi_if.m   optionalacpi
 dev/ahci/ahci_generic.coptional ahci fdt
+dev/cpufreq/cpufreq_dt.c   optionalcpufreq fdt
 dev/hwpmc/hwpmc_arm64.coptionalhwpmc
 dev/hwpmc/hwpmc_arm64_md.c optionalhwpmc
 dev/mmc/host/dwmmc.c   optionaldwmmc fdt
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svn commit: r305501 - head/sys/conf

2016-09-06 Thread Jared McNeill 
Author: jmcneill
Date: Tue Sep  6 21:01:38 2016
New Revision: 305501
URL: https://svnweb.freebsd.org/changeset/base/305501

Log:
  Add "pci" as a dependency to ichss.
  
  Reviewed by:  jhibbits

Modified:
  head/sys/conf/files

Modified: head/sys/conf/files
==
--- head/sys/conf/files Tue Sep  6 20:55:59 2016(r305500)
+++ head/sys/conf/files Tue Sep  6 21:01:38 2016(r305501)
@@ -1236,7 +1236,7 @@ dev/ciss/ciss.c   optional ciss
 dev/cm/smc90cx6.c  optional cm
 dev/cmx/cmx.c  optional cmx
 dev/cmx/cmx_pccard.c   optional cmx pccard
-dev/cpufreq/ichss.coptional cpufreq
+dev/cpufreq/ichss.coptional cpufreq pci
 dev/cs/if_cs.c optional cs
 dev/cs/if_cs_isa.c optional cs isa
 dev/cs/if_cs_pccard.c  optional cs pccard
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svn commit: r305498 - head/sys/dev/cpufreq

2016-09-06 Thread Jared McNeill 
Author: jmcneill
Date: Tue Sep  6 20:43:26 2016
New Revision: 305498
URL: https://svnweb.freebsd.org/changeset/base/305498

Log:
  Add generic device-tree cpufreq driver.
  
  This driver supports two bindings:
   - cpufreq-dt: systems which share clock and voltage across all CPUs
   - arm_big_little_dt: systems which share clock and voltage across all
 CPUs in a single cluster
  
  Reviewed by:  andrew, imp
  Relnotes: yes
  Differential Revision:https://reviews.freebsd.org/D7741

Added:
  head/sys/dev/cpufreq/cpufreq_dt.c   (contents, props changed)

Added: head/sys/dev/cpufreq/cpufreq_dt.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/cpufreq/cpufreq_dt.c   Tue Sep  6 20:43:26 2016
(r305498)
@@ -0,0 +1,360 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * Generic DT based cpufreq driver
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "cpufreq_if.h"
+
+struct cpufreq_dt_opp {
+   uint32_tfreq_khz;
+   uint32_tvoltage_uv;
+};
+
+struct cpufreq_dt_softc {
+   clk_t clk;
+   regulator_t reg;
+
+   struct cpufreq_dt_opp *opp;
+   ssize_t nopp;
+   int clk_latency;
+
+   cpuset_t cpus;
+};
+
+static void
+cpufreq_dt_notify(device_t dev, uint64_t freq)
+{
+#ifdef __aarch64__
+   struct cpufreq_dt_softc *sc;
+   struct pcpu *pc;
+   int cpu;
+
+   sc = device_get_softc(dev);
+
+   CPU_FOREACH(cpu) {
+   if (CPU_ISSET(cpu, >cpus)) {
+   pc = pcpu_find(cpu);
+   pc->pc_clock = freq;
+   }
+   }
+#endif
+}
+
+static const struct cpufreq_dt_opp *
+cpufreq_dt_find_opp(device_t dev, uint32_t freq_mhz)
+{
+   struct cpufreq_dt_softc *sc;
+   ssize_t n;
+
+   sc = device_get_softc(dev);
+
+   for (n = 0; n < sc->nopp; n++)
+   if (CPUFREQ_CMP(sc->opp[n].freq_khz / 1000, freq_mhz))
+   return (>opp[n]);
+
+   return (NULL);
+}
+
+static void
+cpufreq_dt_opp_to_setting(device_t dev, const struct cpufreq_dt_opp *opp,
+struct cf_setting *set)
+{
+   struct cpufreq_dt_softc *sc;
+
+   sc = device_get_softc(dev);
+
+   memset(set, 0, sizeof(*set));
+   set->freq = opp->freq_khz / 1000;
+   set->volts = opp->voltage_uv / 1000;
+   set->power = CPUFREQ_VAL_UNKNOWN;
+   set->lat = sc->clk_latency;
+   set->dev = dev;
+}
+
+static int
+cpufreq_dt_get(device_t dev, struct cf_setting *set)
+{
+   struct cpufreq_dt_softc *sc;
+   const struct cpufreq_dt_opp *opp;
+   uint64_t freq;
+
+   sc = device_get_softc(dev);
+
+   if (clk_get_freq(sc->clk, ) != 0)
+   return (ENXIO);
+
+   opp = cpufreq_dt_find_opp(dev, freq / 100);
+   if (opp == NULL)
+   return (ENOENT);
+
+   cpufreq_dt_opp_to_setting(dev, opp, set);
+
+   return (0);
+}
+
+static int
+cpufreq_dt_set(device_t dev, const struct cf_setting *set)
+{
+   struct cpufreq_dt_softc *sc;
+   const struct cpufreq_dt_opp *opp, *copp;
+   uint64_t freq;
+   int error;
+
+   sc = device_get_softc(dev);
+
+   if (clk_get_freq(sc->clk, ) != 0)
+   return (ENXIO);
+
+   copp = cpufreq_dt_find_opp(dev, freq / 100);
+   if (copp == NULL)
+

svn commit: r305419 - in head/sys/arm: allwinner conf

2016-09-05 Thread Jared McNeill 
Author: jmcneill
Date: Mon Sep  5 13:45:45 2016
New Revision: 305419
URL: https://svnweb.freebsd.org/changeset/base/305419

Log:
  Add sy8106a to Allwinner kernel. This regulator is used to control VDD_CPUX
  and is connected to R_TWI on some H3-based Orange Pi boards.

Modified:
  head/sys/arm/allwinner/files.allwinner
  head/sys/arm/conf/ALLWINNER

Modified: head/sys/arm/allwinner/files.allwinner
==
--- head/sys/arm/allwinner/files.allwinner  Mon Sep  5 13:39:54 2016
(r305418)
+++ head/sys/arm/allwinner/files.allwinner  Mon Sep  5 13:45:45 2016
(r305419)
@@ -28,6 +28,7 @@ dev/usb/controller/generic_ohci.c option
 dev/usb/controller/generic_usb_if.moptionalohci
 arm/allwinner/aw_sid.c standard
 arm/allwinner/aw_thermal.c standard
+dev/iicbus/sy8106a.c   optionalsy8106a
 #arm/allwinner/console.c   standard
 
 arm/allwinner/a10_fb.c optionalvt

Modified: head/sys/arm/conf/ALLWINNER
==
--- head/sys/arm/conf/ALLWINNER Mon Sep  5 13:39:54 2016(r305418)
+++ head/sys/arm/conf/ALLWINNER Mon Sep  5 13:45:45 2016(r305419)
@@ -81,6 +81,7 @@ devicetwsi
 device rsb
 device axp209  # AXP209 Power Management Unit
 device axp81x  # AXP813/818 Power Management Unit
+device sy8106a # SY8106A Buck Regulator
 
 # GPIO
 device gpio
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svn commit: r305418 - head/sys/dev/iicbus

2016-09-05 Thread Jared McNeill 
Author: jmcneill
Date: Mon Sep  5 13:39:54 2016
New Revision: 305418
URL: https://svnweb.freebsd.org/changeset/base/305418

Log:
  Add driver for Silergy Corp. SY8106A buck regulator.

Added:
  head/sys/dev/iicbus/sy8106a.c   (contents, props changed)

Added: head/sys/dev/iicbus/sy8106a.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/iicbus/sy8106a.c   Mon Sep  5 13:39:54 2016
(r305418)
@@ -0,0 +1,302 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * Silergy Corp. SY8106A buck regulator
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include "iicbus_if.h"
+#include "regdev_if.h"
+
+#defineVOUT1_SEL   0x01
+#define SEL_GO (1 << 7)
+#define SEL_VOLTAGE_MASK   0x7f
+#define SEL_VOLTAGE_BASE   68  /* uV */
+#define SEL_VOLTAGE_STEP   1   /* uV */
+#defineVOUT_COM0x02
+#define COM_DISABLE(1 << 0)
+#defineSYS_STATUS  0x06
+
+static struct ofw_compat_data compat_data[] = {
+   { "silergy,sy8106a",1 },
+   { NULL, 0 }
+};
+
+struct sy8106a_reg_sc {
+   struct regnode  *regnode;
+   device_tbase_dev;
+   phandle_t   xref;
+   struct regnode_std_param *param;
+};
+
+struct sy8106a_softc {
+   uint16_taddr;
+
+   /* Regulator */
+   struct sy8106a_reg_sc   *reg;
+};
+
+static int
+sy8106a_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size)
+{
+   struct sy8106a_softc *sc;
+   struct iic_msg msg[2];
+
+   sc = device_get_softc(dev);
+
+   msg[0].slave = sc->addr;
+   msg[0].flags = IIC_M_WR;
+   msg[0].len = 1;
+   msg[0].buf = 
+
+   msg[1].slave = sc->addr;
+   msg[1].flags = IIC_M_RD;
+   msg[1].len = size;
+   msg[1].buf = data;
+
+   return (iicbus_transfer(dev, msg, 2));
+}
+
+static int
+sy8106a_write(device_t dev, uint8_t reg, uint8_t val)
+{
+   struct sy8106a_softc *sc;
+   struct iic_msg msg;
+   uint8_t buffer[2];
+
+   sc = device_get_softc(dev);
+
+   buffer[0] = reg;
+   buffer[1] = val;
+
+   msg.slave = sc->addr;
+   msg.flags = IIC_M_WR;
+   msg.len = 2;
+   msg.buf = buffer;
+
+   return (iicbus_transfer(dev, , 1));
+}
+
+static int
+sy8106a_regnode_init(struct regnode *regnode)
+{
+   return (0);
+}
+
+static int
+sy8106a_regnode_enable(struct regnode *regnode, bool enable, int *udelay)
+{
+   struct sy8106a_reg_sc *sc;
+   uint8_t val;
+
+   sc = regnode_get_softc(regnode);
+
+   sy8106a_read(sc->base_dev, VOUT_COM, , 1);
+   if (enable)
+   val &= ~COM_DISABLE;
+   else
+   val |= COM_DISABLE;
+   sy8106a_write(sc->base_dev, VOUT_COM, val);
+
+   *udelay = sc->param->ramp_delay;
+
+   return (0);
+}
+
+static int
+sy8106a_regnode_set_voltage(struct regnode *regnode, int min_uvolt,
+int max_uvolt, int *udelay)
+{
+   struct sy8106a_reg_sc *sc;
+   int cur_uvolt;
+   uint8_t val, oval;
+
+   sc = regnode_get_softc(regnode);
+
+   /* Get current voltage */
+   sy8106a_read(sc->base_dev, VOUT1_SEL, , 1);
+   cur_uvolt = (oval & SEL_VOL

svn commit: r305417 - head/sys/arm/allwinner/clk

2016-09-05 Thread Jared McNeill 
Author: jmcneill
Date: Mon Sep  5 12:36:54 2016
New Revision: 305417
URL: https://svnweb.freebsd.org/changeset/base/305417

Log:
  Add support for Allwinner H3 PLL_CPUX.
  
  The H3 PLL_CPUX register looks exactly like the one found in A23, but we
  need to follow a specific protocol when making adjustments to the clock.

Modified:
  head/sys/arm/allwinner/clk/aw_pll.c

Modified: head/sys/arm/allwinner/clk/aw_pll.c
==
--- head/sys/arm/allwinner/clk/aw_pll.c Mon Sep  5 11:05:14 2016
(r305416)
+++ head/sys/arm/allwinner/clk/aw_pll.c Mon Sep  5 12:36:54 2016
(r305417)
@@ -187,6 +187,7 @@ static struct aw_pll_factor aw_a23_pll1_
PLLFACTOR(16, 1, 0, 0, 81600),
PLLFACTOR(20, 1, 0, 0, 100800),
PLLFACTOR(24, 1, 0, 0, 12),
+   PLLFACTOR(26, 1, 0, 0, 129600),
 };
 
 enum aw_pll_type {
@@ -201,6 +202,7 @@ enum aw_pll_type {
AWPLL_A31_PLL6,
AWPLL_A64_PLLHSIC,
AWPLL_A80_PLL4,
+   AWPLL_H3_PLL1,
 };
 
 struct aw_pll_sc {
@@ -627,6 +629,72 @@ a23_pll1_recalc(struct aw_pll_sc *sc, ui
 }
 
 static int
+h3_pll1_set_freq(struct aw_pll_sc *sc, uint64_t fin, uint64_t *fout,
+int flags)
+{
+   struct aw_pll_factor *f;
+   uint32_t val, n, k, m, p;
+   int i;
+
+   f = NULL;
+   for (i = 0; i < nitems(aw_a23_pll1_factors); i++) {
+   if (aw_a23_pll1_factors[i].freq == *fout) {
+   f = _a23_pll1_factors[i];
+   break;
+   }
+   }
+   if (f == NULL)
+   return (EINVAL);
+
+   DEVICE_LOCK(sc);
+   PLL_READ(sc, );
+
+   n = (val & A23_PLL1_FACTOR_N) >> A23_PLL1_FACTOR_N_SHIFT;
+   k = (val & A23_PLL1_FACTOR_K) >> A23_PLL1_FACTOR_K_SHIFT;
+   m = (val & A23_PLL1_FACTOR_M) >> A23_PLL1_FACTOR_M_SHIFT;
+   p = (val & A23_PLL1_FACTOR_P) >> A23_PLL1_FACTOR_P_SHIFT;
+
+   if (p < f->p) {
+   val &= ~A23_PLL1_FACTOR_P;
+   val |= (f->p << A23_PLL1_FACTOR_P_SHIFT);
+   PLL_WRITE(sc, val);
+   DELAY(2000);
+   }
+
+   if (m < f->m) {
+   val &= ~A23_PLL1_FACTOR_M;
+   val |= (f->m << A23_PLL1_FACTOR_M_SHIFT);
+   PLL_WRITE(sc, val);
+   DELAY(2000);
+   }
+
+   val &= ~(A23_PLL1_FACTOR_N|A23_PLL1_FACTOR_K);
+   val |= (f->n << A23_PLL1_FACTOR_N_SHIFT);
+   val |= (f->k << A23_PLL1_FACTOR_K_SHIFT);
+   PLL_WRITE(sc, val);
+   DELAY(2000);
+
+   if (m > f->m) {
+   val &= ~A23_PLL1_FACTOR_M;
+   val |= (f->m << A23_PLL1_FACTOR_M_SHIFT);
+   PLL_WRITE(sc, val);
+   DELAY(2000);
+   }
+
+   if (p > f->p) {
+   val &= ~A23_PLL1_FACTOR_P;
+   val |= (f->p << A23_PLL1_FACTOR_P_SHIFT);
+   PLL_WRITE(sc, val);
+   DELAY(2000);
+   }
+
+   DEVICE_UNLOCK(sc);
+
+   return (0);
+   
+}
+
+static int
 a31_pll1_recalc(struct aw_pll_sc *sc, uint64_t *freq)
 {
uint32_t val, m, n, k;
@@ -775,6 +843,7 @@ static struct aw_pll_funcs aw_pll_func[]
PLL(AWPLL_A31_PLL6, a31_pll6_recalc, NULL, a31_pll6_init),
PLL(AWPLL_A80_PLL4, a80_pll4_recalc, NULL, NULL),
PLL(AWPLL_A64_PLLHSIC, a64_pllhsic_recalc, NULL, a64_pllhsic_init),
+   PLL(AWPLL_H3_PLL1, a23_pll1_recalc, h3_pll1_set_freq, NULL),
 };
 
 static struct ofw_compat_data compat_data[] = {
@@ -787,6 +856,7 @@ static struct ofw_compat_data compat_dat
{ "allwinner,sun6i-a31-pll1-clk",   AWPLL_A31_PLL1 },
{ "allwinner,sun6i-a31-pll6-clk",   AWPLL_A31_PLL6 },
{ "allwinner,sun8i-a23-pll1-clk",   AWPLL_A23_PLL1 },
+   { "allwinner,sun8i-h3-pll1-clk",AWPLL_H3_PLL1 },
{ "allwinner,sun9i-a80-pll4-clk",   AWPLL_A80_PLL4 },
{ "allwinner,sun50i-a64-pllhsic-clk",   AWPLL_A64_PLLHSIC },
{ NULL, 0 }
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svn commit: r305416 - in head/sys/arm/allwinner: . clk

2016-09-05 Thread Jared McNeill 
Author: jmcneill
Date: Mon Sep  5 11:05:14 2016
New Revision: 305416
URL: https://svnweb.freebsd.org/changeset/base/305416

Log:
  Add support for the Allwinner H3 Thermal Sensor Controller. The H3 embeds
  a single thermal sensor located in the CPU.

Modified:
  head/sys/arm/allwinner/aw_thermal.c
  head/sys/arm/allwinner/clk/aw_thsclk.c
  head/sys/arm/allwinner/files.allwinner

Modified: head/sys/arm/allwinner/aw_thermal.c
==
--- head/sys/arm/allwinner/aw_thermal.c Mon Sep  5 08:42:36 2016
(r305415)
+++ head/sys/arm/allwinner/aw_thermal.c Mon Sep  5 11:05:14 2016
(r305416)
@@ -82,16 +82,26 @@ __FBSDID("$FreeBSD$");
 #defineA83T_FILTER 0x4
 #defineA83T_INTC   0x1000
 #defineA83T_TEMP_BASE  2719000
+#defineA83T_TEMP_MUL   1000
 #defineA83T_TEMP_DIV   14186
 #defineA83T_CLK_RATE   2400
 
 #defineA64_ADC_ACQUIRE_TIME0x190
 #defineA64_FILTER  0x6
-#define A64_INTC   0x18000
+#defineA64_INTC0x18000
 #defineA64_TEMP_BASE   217
+#defineA64_TEMP_MUL1000
 #defineA64_TEMP_DIV8560
 #defineA64_CLK_RATE400
 
+#defineH3_ADC_ACQUIRE_TIME 0x3f
+#defineH3_FILTER   0x6
+#defineH3_INTC 0x191000
+#defineH3_TEMP_BASE21700
+#defineH3_TEMP_MUL 121168
+#defineH3_TEMP_DIV 100
+#defineH3_CLK_RATE 400
+
 #defineTEMP_C_TO_K 273
 #defineSENSOR_ENABLE_ALL   (SENSOR0_EN|SENSOR1_EN|SENSOR2_EN)
 #defineSHUT_INT_ALL
(SHUT_INT0_STS|SHUT_INT1_STS|SHUT_INT2_STS)
@@ -110,8 +120,10 @@ struct aw_thermal_config {
uint32_tadc_acquire_time;
uint32_tfilter;
uint32_tintc;
-   uint32_ttemp_base;
-   uint32_ttemp_div;
+   int temp_base;
+   int temp_mul;
+   int temp_div;
+   int calib;
 };
 
 static const struct aw_thermal_config a83t_config = {
@@ -135,7 +147,9 @@ static const struct aw_thermal_config a8
.filter = A83T_FILTER,
.intc = A83T_INTC,
.temp_base = A83T_TEMP_BASE,
+   .temp_mul = A83T_TEMP_MUL,
.temp_div = A83T_TEMP_DIV,
+   .calib = 1,
 };
 
 static const struct aw_thermal_config a64_config = {
@@ -159,11 +173,30 @@ static const struct aw_thermal_config a6
.filter = A64_FILTER,
.intc = A64_INTC,
.temp_base = A64_TEMP_BASE,
+   .temp_mul = A64_TEMP_MUL,
.temp_div = A64_TEMP_DIV,
 };
 
+static const struct aw_thermal_config h3_config = {
+   .nsensors = 1,
+   .sensors = {
+   [0] = {
+   .name = "cpu",
+   .desc = "CPU temperature",
+   },
+   },
+   .clk_rate = H3_CLK_RATE,
+   .adc_acquire_time = H3_ADC_ACQUIRE_TIME,
+   .filter = H3_FILTER,
+   .intc = H3_INTC,
+   .temp_base = H3_TEMP_BASE,
+   .temp_mul = H3_TEMP_MUL,
+   .temp_div = H3_TEMP_DIV,
+};
+
 static struct ofw_compat_data compat_data[] = {
{ "allwinner,sun8i-a83t-ts",(uintptr_t)_config },
+   { "allwinner,sun8i-h3-ts",  (uintptr_t)_config },
{ "allwinner,sun50i-a64-ts",(uintptr_t)_config },
{ NULL, (uintptr_t)NULL }
 };
@@ -191,14 +224,16 @@ aw_thermal_init(struct aw_thermal_softc 
uint32_t calib0, calib1;
int error;
 
-   /* Read calibration settings from SRAM */
-   error = aw_sid_read_tscalib(, );
-   if (error != 0)
-   return (error);
-
-   /* Write calibration settings to thermal controller */
-   WR4(sc, THS_CALIB0, calib0);
-   WR4(sc, THS_CALIB1, calib1);
+   if (sc->conf->calib) {
+   /* Read calibration settings from SRAM */
+   error = aw_sid_read_tscalib(, );
+   if (error != 0)
+   return (error);
+
+   /* Write calibration settings to thermal controller */
+   WR4(sc, THS_CALIB0, calib0);
+   WR4(sc, THS_CALIB1, calib1);
+   }
 
/* Configure ADC acquire time (CLK_IN/(N+1)) and enable sensors */
WR4(sc, THS_CTRL1, ADC_CALI_EN);
@@ -221,7 +256,8 @@ aw_thermal_init(struct aw_thermal_softc 
 static int
 aw_thermal_reg_to_temp(struct aw_thermal_softc *sc, uint32_t val)
 {
-   return ((sc->conf->temp_base - val * 1000) / sc->conf->temp_div);
+   return ((sc->conf->temp_base - (val * sc->conf->temp_mul)) /
+

svn commit: r305399 - head/sys/boot/fdt/dts/arm64

2016-09-04 Thread Jared McNeill 
Author: jmcneill
Date: Sun Sep  4 22:30:46 2016
New Revision: 305399
URL: https://svnweb.freebsd.org/changeset/base/305399

Log:
  A64 thermal sensor IRQ is GIC_SPI 31, not 41.

Modified:
  head/sys/boot/fdt/dts/arm64/a64.dtsi

Modified: head/sys/boot/fdt/dts/arm64/a64.dtsi
==
--- head/sys/boot/fdt/dts/arm64/a64.dtsiSun Sep  4 22:08:04 2016
(r305398)
+++ head/sys/boot/fdt/dts/arm64/a64.dtsiSun Sep  4 22:30:46 2016
(r305399)
@@ -110,7 +110,7 @@
rtp: rtp@01c25000 {
compatible = "allwinner,sun50i-a64-ts";
reg = <0x01c25000 0x400>;
-   interrupts = ;
+   interrupts = ;
clocks = <_gates 72>, <_clk>;
clock-names = "ahb", "ths";
resets = <_rst 136>;
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Re: svn commit: r305354 - head/sys/arm/allwinner

2016-09-03 Thread Jared McNeill 

Hi Oliver --

It's really just a serial number. The Allwinner A20 datasheet refers to it 
as a root key, later ones such as A83T refer to it as chip ID. U-Boot 
uses the same process to generate MAC addresses for all Allwinner boards.


Cheers,
Jared


On Sat, 3 Sep 2016, Oliver Pinter wrote:


Hi!

On 9/3/16, Jared McNeill <jmcne...@freebsd.org> wrote:

Author: jmcneill
Date: Sat Sep  3 15:28:09 2016
New Revision: 305354
URL: https://svnweb.freebsd.org/changeset/base/305354

Log:
  Use the root key in the Security ID EFUSE (when valid) to generate a
  MAC address instead of creating a random one each boot.


Could you please describe a little more about this root key? What is
it? What's the main purpose? Is is a crypto root key?



Modified:
  head/sys/arm/allwinner/if_awg.c

Modified: head/sys/arm/allwinner/if_awg.c
==
--- head/sys/arm/allwinner/if_awg.c Sat Sep  3 15:26:28 2016
(r305353)
+++ head/sys/arm/allwinner/if_awg.c Sat Sep  3 15:28:09 2016
(r305354)
@@ -62,6 +62,7 @@ __FBSDID("$FreeBSD$");
 #include 

 #include 
+#include 
 #include 
 #include 

@@ -1277,6 +1278,7 @@ awg_get_eaddr(device_t dev, uint8_t *ead
 {
struct awg_softc *sc;
uint32_t maclo, machi, rnd;
+   u_char rootkey[16];

sc = device_get_softc(dev);

@@ -1285,9 +1287,19 @@ awg_get_eaddr(device_t dev, uint8_t *ead

if (maclo == 0x && machi == 0x) {
/* MAC address in hardware is invalid, create one */
-   rnd = arc4random();
-   maclo = 0x00f2 | (rnd & 0x);
-   machi = rnd & 0x;
+   if (aw_sid_get_rootkey(rootkey) == 0 &&
+   (rootkey[3] | rootkey[12] | rootkey[13] | rootkey[14] |
+rootkey[15]) != 0) {
+   /* MAC address is derived from the root key in SID */
+   maclo = (rootkey[13] << 24) | (rootkey[12] << 16) |
+   (rootkey[3] << 8) | 0x02;
+   machi = (rootkey[15] << 8) | rootkey[14];
+   } else {
+   /* Create one */
+   rnd = arc4random();
+   maclo = 0x00f2 | (rnd & 0x);
+   machi = rnd & 0x;
+   }
}

eaddr[0] = maclo & 0xff;
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svn commit: r305354 - head/sys/arm/allwinner

2016-09-03 Thread Jared McNeill 
Author: jmcneill
Date: Sat Sep  3 15:28:09 2016
New Revision: 305354
URL: https://svnweb.freebsd.org/changeset/base/305354

Log:
  Use the root key in the Security ID EFUSE (when valid) to generate a
  MAC address instead of creating a random one each boot.

Modified:
  head/sys/arm/allwinner/if_awg.c

Modified: head/sys/arm/allwinner/if_awg.c
==
--- head/sys/arm/allwinner/if_awg.c Sat Sep  3 15:26:28 2016
(r305353)
+++ head/sys/arm/allwinner/if_awg.c Sat Sep  3 15:28:09 2016
(r305354)
@@ -62,6 +62,7 @@ __FBSDID("$FreeBSD$");
 #include 
 
 #include 
+#include 
 #include 
 #include 
 
@@ -1277,6 +1278,7 @@ awg_get_eaddr(device_t dev, uint8_t *ead
 {
struct awg_softc *sc;
uint32_t maclo, machi, rnd;
+   u_char rootkey[16];
 
sc = device_get_softc(dev);
 
@@ -1285,9 +1287,19 @@ awg_get_eaddr(device_t dev, uint8_t *ead
 
if (maclo == 0x && machi == 0x) {
/* MAC address in hardware is invalid, create one */
-   rnd = arc4random();
-   maclo = 0x00f2 | (rnd & 0x);
-   machi = rnd & 0x;
+   if (aw_sid_get_rootkey(rootkey) == 0 &&
+   (rootkey[3] | rootkey[12] | rootkey[13] | rootkey[14] |
+rootkey[15]) != 0) {
+   /* MAC address is derived from the root key in SID */
+   maclo = (rootkey[13] << 24) | (rootkey[12] << 16) |
+   (rootkey[3] << 8) | 0x02;
+   machi = (rootkey[15] << 8) | rootkey[14];
+   } else {
+   /* Create one */
+   rnd = arc4random();
+   maclo = 0x00f2 | (rnd & 0x);
+   machi = rnd & 0x;
+   }
}
 
eaddr[0] = maclo & 0xff;
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svn commit: r305352 - in head/sys: arm/allwinner arm/allwinner/clk arm64/conf conf

2016-09-03 Thread Jared McNeill 
*sc;
-   int i;
+   clk_t clk_ahb, clk_ths;
+   hwreset_t rst;
+   int i, error;
+   void *ih;
 
sc = device_get_softc(dev);
+   clk_ahb = clk_ths = NULL;
+   rst = NULL;
+   ih = NULL;
 
sc->conf = THS_CONF(dev);
 
-   if (bus_alloc_resources(dev, aw_thermal_spec, >res) != 0) {
+   if (bus_alloc_resources(dev, aw_thermal_spec, sc->res) != 0) {
device_printf(dev, "cannot allocate resources for device\n");
return (ENXIO);
}
 
+   if (clk_get_by_ofw_name(dev, 0, "ahb", _ahb) == 0) {
+   error = clk_enable(clk_ahb);
+   if (error != 0) {
+   device_printf(dev, "cannot enable ahb clock\n");
+   goto fail;
+   }
+   }
+   if (clk_get_by_ofw_name(dev, 0, "ths", _ths) == 0) {
+   error = clk_set_freq(clk_ths, sc->conf->clk_rate, 0);
+   if (error != 0) {
+   device_printf(dev, "cannot set ths clock rate\n");
+   goto fail;
+   }
+   error = clk_enable(clk_ths);
+   if (error != 0) {
+   device_printf(dev, "cannot enable ths clock\n");
+   goto fail;
+   }
+   }
+   if (hwreset_get_by_ofw_idx(dev, 0, 0, ) == 0) {
+   error = hwreset_deassert(rst);
+   if (error != 0) {
+   device_printf(dev, "cannot de-assert reset\n");
+   goto fail;
+   }
+   }
+
+   error = bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
+   NULL, aw_thermal_intr, dev, );
+   if (error != 0) {
+   device_printf(dev, "cannot setup interrupt handler\n");
+   goto fail;
+   }
+
if (aw_thermal_init(sc) != 0)
-   return (ENXIO);
+   goto fail;
 
-   for (i = 0; sc->conf[i].sensor != THS_SENSOR_END; i++)
+   for (i = 0; i < sc->conf->nsensors; i++)
SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
-   OID_AUTO, sc->conf[i].name,
+   OID_AUTO, sc->conf->sensors[i].name,
CTLTYPE_INT | CTLFLAG_RD,
-   sc, sc->conf[i].sensor, aw_thermal_sysctl, "IK0",
-   sc->conf[i].desc);
+   sc, i, aw_thermal_sysctl, "IK0",
+   sc->conf->sensors[i].desc);
 
return (0);
+
+fail:
+   if (ih != NULL)
+   bus_teardown_intr(dev, sc->res[1], ih);
+   if (rst != NULL)
+   hwreset_release(rst);
+   if (clk_ahb != NULL)
+   clk_release(clk_ahb);
+   if (clk_ths != NULL)
+   clk_release(clk_ths);
+   bus_release_resources(dev, aw_thermal_spec, sc->res);
+
+   return (ENXIO);
 }
 
 static device_method_t aw_thermal_methods[] = {

Added: head/sys/arm/allwinner/clk/aw_thsclk.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/allwinner/clk/aw_thsclk.c  Sat Sep  3 15:26:00 2016
(r305352)
@@ -0,0 +1,320 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * Allwinner THS clocks
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include

svn commit: r305351 - head/sys/boot/fdt/dts/arm64

2016-09-03 Thread Jared McNeill 
Author: jmcneill
Date: Sat Sep  3 15:24:30 2016
New Revision: 305351
URL: https://svnweb.freebsd.org/changeset/base/305351

Log:
  Add cpu-supply xref to cpu@0

Modified:
  head/sys/boot/fdt/dts/arm64/pine64_plus.dts

Modified: head/sys/boot/fdt/dts/arm64/pine64_plus.dts
==
--- head/sys/boot/fdt/dts/arm64/pine64_plus.dts Sat Sep  3 15:23:59 2016
(r305350)
+++ head/sys/boot/fdt/dts/arm64/pine64_plus.dts Sat Sep  3 15:24:30 2016
(r305351)
@@ -31,6 +31,14 @@
 
 #include 
 
+/ {
+   cpus {
+   cpu@0 {
+   cpu-supply = <_dcdc2>;
+   };
+   };
+};
+
  {
emac_phy_reset_pin_pine64_plus: emac_phy_reset_pin@0 {
allwinner,pins = "PD14";
@@ -64,6 +72,10 @@
reg_dc1dc: dc1sw {
regulator-name = "dc1sw";
};
+
+   reg_dcdc2: dcdc2 {
+   regulator-name = "dcdc2";
+   };
};
};
 };
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svn commit: r305350 - head/sys/boot/fdt/dts/arm64

2016-09-03 Thread Jared McNeill 
Author: jmcneill
Date: Sat Sep  3 15:23:59 2016
New Revision: 305350
URL: https://svnweb.freebsd.org/changeset/base/305350

Log:
  Add SID, THS, and CPU operating points.

Modified:
  head/sys/boot/fdt/dts/arm64/a64.dtsi

Modified: head/sys/boot/fdt/dts/arm64/a64.dtsi
==
--- head/sys/boot/fdt/dts/arm64/a64.dtsiSat Sep  3 15:22:50 2016
(r305349)
+++ head/sys/boot/fdt/dts/arm64/a64.dtsiSat Sep  3 15:23:59 2016
(r305350)
@@ -27,6 +27,21 @@
  */
 
 / {
+   cpus {
+   cpu@0 {
+   clocks = <>;
+   clock-latency = <200>;
+   operating-points = <
+   /* kHzuV */
+   120 130
+   1008000 120
+   816000  110
+   648000  104
+   408000  104
+   >;
+   };
+   };
+
clocks {
pll_hsic: clk@01c20044 {
#clock-cells = <0>;
@@ -49,6 +64,14 @@
 "usb_hsic_pll", "usb_hsic_12m",
 "usb_otg_ohci", "usb_ohci0";
};
+
+   ths_clk: clk@01c20074 {
+   #clock-cells = <0>;
+   compatible = "allwinner,sun50i-a64-ths-clk";
+   reg = <0x01c20074 0x4>;
+   clocks = <>;
+   clock-output-names = "ths";
+   };
};
 
soc {
@@ -79,6 +102,21 @@
#size-cells = <0>;
};
 
+   sid: eeprom@01c14000 {
+   compatible = "allwinner,sun8i-a83t-sid";
+   reg = <0x01c14000 0x400>;
+   };
+
+   rtp: rtp@01c25000 {
+   compatible = "allwinner,sun50i-a64-ts";
+   reg = <0x01c25000 0x400>;
+   interrupts = ;
+   clocks = <_gates 72>, <_clk>;
+   clock-names = "ahb", "ths";
+   resets = <_rst 136>;
+   #thermal-sensor-cells = <0>;
+   };
+
usbphy: phy@01c19400 {
compatible = "allwinner,sun50i-a64-usb-phy";
reg = <0x01c19400 0x24 0x01c1a800 0x4 0x01c1b800 0x4>;
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svn commit: r305349 - head/sys/arm/allwinner

2016-09-03 Thread Jared McNeill 
Author: jmcneill
Date: Sat Sep  3 15:22:50 2016
New Revision: 305349
URL: https://svnweb.freebsd.org/changeset/base/305349

Log:
  Add support for reading root key on A83T/A64.

Modified:
  head/sys/arm/allwinner/aw_sid.c

Modified: head/sys/arm/allwinner/aw_sid.c
==
--- head/sys/arm/allwinner/aw_sid.c Sat Sep  3 15:08:46 2016
(r305348)
+++ head/sys/arm/allwinner/aw_sid.c Sat Sep  3 15:22:50 2016
(r305349)
@@ -52,6 +52,11 @@ __FBSDID("$FreeBSD$");
 #defineSID_THERMAL_CALIB0  (SID_SRAM + 0x34)
 #defineSID_THERMAL_CALIB1  (SID_SRAM + 0x38)
 
+#defineA10_ROOT_KEY_OFF0x0
+#defineA83T_ROOT_KEY_OFF   SID_SRAM
+
+#defineROOT_KEY_SIZE   4
+
 enum sid_type {
A10_SID = 1,
A20_SID,
@@ -67,7 +72,8 @@ static struct ofw_compat_data compat_dat
 
 struct aw_sid_softc {
struct resource *res;
-   int type;
+   int type;
+   bus_size_t  root_key_off;
 };
 
 static struct aw_sid_softc *aw_sid_sc;
@@ -81,9 +87,6 @@ enum sid_keys {
AW_SID_ROOT_KEY,
 };
 
-#defineROOT_KEY_OFF0x0
-#defineROOT_KEY_SIZE   4
-
 #defineRD4(sc, reg)bus_read_4((sc)->res, (reg))
 #defineWR4(sc, reg, val)   bus_write_4((sc)->res, (reg), (val))
 
@@ -118,17 +121,20 @@ aw_sid_attach(device_t dev)
 
sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
switch (sc->type) {
-   case A10_SID:
-   case A20_SID:
-   SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
-   SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
-   OID_AUTO, "rootkey",
-   CTLTYPE_STRING | CTLFLAG_RD,
-   dev, AW_SID_ROOT_KEY, aw_sid_sysctl, "A", "Root Key");
+   case A83T_SID:
+   sc->root_key_off = A83T_ROOT_KEY_OFF;
break;
default:
+   sc->root_key_off = A10_ROOT_KEY_OFF;
break;
}
+
+   SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
+   SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
+   OID_AUTO, "rootkey",
+   CTLTYPE_STRING | CTLFLAG_RD,
+   dev, AW_SID_ROOT_KEY, aw_sid_sysctl, "A", "Root Key");
+
return (0);
 }
 
@@ -159,11 +165,9 @@ aw_sid_get_rootkey(u_char *out)
sc = aw_sid_sc;
if (sc == NULL)
return (ENXIO);
-   if (sc->type != A10_SID && sc->type != A20_SID)
-   return (ENXIO);
 
for (i = 0; i < ROOT_KEY_SIZE ; i++) {
-   tmp = RD4(aw_sid_sc, ROOT_KEY_OFF + (i * 4));
+   tmp = RD4(aw_sid_sc, aw_sid_sc->root_key_off + (i * 4));
be32enc([i * 4], tmp);
}
 
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svn commit: r305247 - head/sys/arm/allwinner/clk

2016-09-01 Thread Jared McNeill 
Author: jmcneill
Date: Thu Sep  1 21:20:07 2016
New Revision: 305247
URL: https://svnweb.freebsd.org/changeset/base/305247

Log:
  Add support for changing A23 PLL1 frequency.

Modified:
  head/sys/arm/allwinner/clk/aw_pll.c

Modified: head/sys/arm/allwinner/clk/aw_pll.c
==
--- head/sys/arm/allwinner/clk/aw_pll.c Thu Sep  1 21:19:11 2016
(r305246)
+++ head/sys/arm/allwinner/clk/aw_pll.c Thu Sep  1 21:20:07 2016
(r305247)
@@ -110,14 +110,14 @@ __FBSDID("$FreeBSD$");
 #defineA13_PLL2_PRE_DIV(0x1f << 0)
 #defineA13_PLL2_PRE_DIV_SHIFT  0
 
+#defineA23_PLL1_FACTOR_P   (0x3 << 16)
+#defineA23_PLL1_FACTOR_P_SHIFT 16
 #defineA23_PLL1_FACTOR_N   (0x1f << 8)
 #defineA23_PLL1_FACTOR_N_SHIFT 8
 #defineA23_PLL1_FACTOR_K   (0x3 << 4)
 #defineA23_PLL1_FACTOR_K_SHIFT 4
 #defineA23_PLL1_FACTOR_M   (0x3 << 0)
 #defineA23_PLL1_FACTOR_M_SHIFT 0
-#defineA23_PLL1_FACTOR_P   (0x3 << 16)
-#defineA23_PLL1_FACTOR_P_SHIFT 16
 
 #defineA31_PLL1_LOCK   (1 << 28)
 #defineA31_PLL1_CPU_SIGMA_DELTA_EN (1 << 24)
@@ -171,6 +171,24 @@ __FBSDID("$FreeBSD$");
 #defineCLKID_A31_PLL6  0
 #defineCLKID_A31_PLL6_X2   1
 
+struct aw_pll_factor {
+   unsigned intn;
+   unsigned intk;
+   unsigned intm;
+   unsigned intp;
+   uint64_tfreq;
+};
+#definePLLFACTOR(_n, _k, _m, _p, _freq)\
+   { .n = (_n), .k = (_k), .m = (_m), .p = (_p), .freq = (_freq) }
+
+static struct aw_pll_factor aw_a23_pll1_factors[] = {
+   PLLFACTOR(16, 0, 0, 0, 40800),
+   PLLFACTOR(26, 0, 0, 0, 64800),
+   PLLFACTOR(16, 1, 0, 0, 81600),
+   PLLFACTOR(20, 1, 0, 0, 100800),
+   PLLFACTOR(24, 1, 0, 0, 12),
+};
+
 enum aw_pll_type {
AWPLL_A10_PLL1 = 1,
AWPLL_A10_PLL2,
@@ -557,6 +575,39 @@ a13_pll2_set_freq(struct aw_pll_sc *sc, 
 }
 
 static int
+a23_pll1_set_freq(struct aw_pll_sc *sc, uint64_t fin, uint64_t *fout,
+int flags)
+{
+   struct aw_pll_factor *f;
+   uint32_t val;
+   int n;
+
+   f = NULL;
+   for (n = 0; n < nitems(aw_a23_pll1_factors); n++) {
+   if (aw_a23_pll1_factors[n].freq == *fout) {
+   f = _a23_pll1_factors[n];
+   break;
+   }
+   }
+   if (f == NULL)
+   return (EINVAL);
+
+   DEVICE_LOCK(sc);
+   PLL_READ(sc, );
+   val &= ~(A23_PLL1_FACTOR_N|A23_PLL1_FACTOR_K|A23_PLL1_FACTOR_M|
+A23_PLL1_FACTOR_P);
+   val |= (f->n << A23_PLL1_FACTOR_N_SHIFT);
+   val |= (f->k << A23_PLL1_FACTOR_K_SHIFT);
+   val |= (f->m << A23_PLL1_FACTOR_M_SHIFT);
+   val |= (f->p << A23_PLL1_FACTOR_P_SHIFT);
+   PLL_WRITE(sc, val);
+   DEVICE_UNLOCK(sc);
+
+   return (0);
+   
+}
+
+static int
 a23_pll1_recalc(struct aw_pll_sc *sc, uint64_t *freq)
 {
uint32_t val, m, n, k, p;
@@ -719,7 +770,7 @@ static struct aw_pll_funcs aw_pll_func[]
PLL(AWPLL_A10_PLL5, a10_pll5_recalc, NULL, NULL),
PLL(AWPLL_A10_PLL6, a10_pll6_recalc, a10_pll6_set_freq, a10_pll6_init),
PLL(AWPLL_A13_PLL2, a13_pll2_recalc, a13_pll2_set_freq, NULL),
-   PLL(AWPLL_A23_PLL1, a23_pll1_recalc, NULL, NULL),
+   PLL(AWPLL_A23_PLL1, a23_pll1_recalc, a23_pll1_set_freq, NULL),
PLL(AWPLL_A31_PLL1, a31_pll1_recalc, NULL, NULL),
PLL(AWPLL_A31_PLL6, a31_pll6_recalc, NULL, a31_pll6_init),
PLL(AWPLL_A80_PLL4, a80_pll4_recalc, NULL, NULL),
___
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svn commit: r305246 - head/sys/arm/allwinner

2016-09-01 Thread Jared McNeill 
Author: jmcneill
Date: Thu Sep  1 21:19:11 2016
New Revision: 305246
URL: https://svnweb.freebsd.org/changeset/base/305246

Log:
  Add support for setting DCDC2 voltage.

Modified:
  head/sys/arm/allwinner/axp81x.c

Modified: head/sys/arm/allwinner/axp81x.c
==
--- head/sys/arm/allwinner/axp81x.c Thu Sep  1 21:16:29 2016
(r305245)
+++ head/sys/arm/allwinner/axp81x.c Thu Sep  1 21:19:11 2016
(r305246)
@@ -61,8 +61,13 @@ __FBSDID("$FreeBSD$");
 MALLOC_DEFINE(M_AXP81X_REG, "AXP81x regulator", "AXP81x power regulator");
 
 #defineAXP_ICTYPE  0x03
+#defineAXP_POWERCTL1   0x10
+#define AXP_POWERCTL1_DCDC2(1 << 1)
 #defineAXP_POWERCTL2   0x12
 #define AXP_POWERCTL2_DC1SW(1 << 7)
+#defineAXP_VOLTCTL_DCDC2   0x21
+#define AXP_VOLTCTL_STATUS (1 << 7)
+#define AXP_VOLTCTL_MASK   0x7f
 #defineAXP_POWERBAT0x32
 #define AXP_POWERBAT_SHUTDOWN  (1 << 7)
 #defineAXP_IRQEN1  0x40
@@ -109,10 +114,18 @@ struct axp81x_regdef {
char*supply_name;
uint8_t enable_reg;
uint8_t enable_mask;
+   uint8_t voltage_reg;
+   int voltage_min;
+   int voltage_max;
+   int voltage_step1;
+   int voltage_nstep1;
+   int voltage_step2;
+   int voltage_nstep2;
 };
 
 enum axp81x_reg_id {
-   AXP81X_REG_ID_DC1SW
+   AXP81X_REG_ID_DC1SW,
+   AXP81X_REG_ID_DCDC2,
 };
 
 static struct axp81x_regdef axp81x_regdefs[] = {
@@ -122,6 +135,19 @@ static struct axp81x_regdef axp81x_regde
.enable_reg = AXP_POWERCTL2,
.enable_mask = AXP_POWERCTL2_DC1SW,
},
+   {
+   .id = AXP81X_REG_ID_DCDC2,
+   .name = "dcdc2",
+   .enable_reg = AXP_POWERCTL1,
+   .enable_mask = AXP_POWERCTL1_DCDC2,
+   .voltage_reg = AXP_VOLTCTL_DCDC2,
+   .voltage_min = 500,
+   .voltage_max = 1300,
+   .voltage_step1 = 10,
+   .voltage_nstep1 = 70,
+   .voltage_step2 = 20,
+   .voltage_nstep2 = 5,
+   },
 };
 
 struct axp81x_softc;
@@ -218,17 +244,82 @@ axp81x_regnode_enable(struct regnode *re
return (0);
 }
 
+static void
+axp81x_regnode_reg_to_voltage(struct axp81x_reg_sc *sc, uint8_t val, int *uv)
+{
+   if (val < sc->def->voltage_nstep1)
+   *uv = sc->def->voltage_min + val * sc->def->voltage_step1;
+   else
+   *uv = sc->def->voltage_min +
+   (sc->def->voltage_nstep1 * sc->def->voltage_step1) +
+   ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2);
+   *uv *= 1000;
+}
+
+static int
+axp81x_regnode_voltage_to_reg(struct axp81x_reg_sc *sc, int min_uvolt,
+int max_uvolt, uint8_t *val)
+{
+   uint8_t nval;
+   int nstep, uvolt;
+
+   nval = 0;
+   uvolt = sc->def->voltage_min * 1000;
+
+   for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt;
+nstep++) {
+   ++nval;
+   uvolt += (sc->def->voltage_step1 * 1000);
+   }
+   for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt;
+nstep++) {
+   ++nval;
+   uvolt += (sc->def->voltage_step2 * 1000);
+   }
+   if (uvolt > max_uvolt)
+   return (EINVAL);
+
+   *val = nval;
+   return (0);
+}
+
 static int
 axp81x_regnode_set_voltage(struct regnode *regnode, int min_uvolt,
 int max_uvolt, int *udelay)
 {
-   return (ENXIO);
+   struct axp81x_reg_sc *sc;
+   uint8_t val;
+
+   sc = regnode_get_softc(regnode);
+
+   if (!sc->def->voltage_step1 || !sc->def->voltage_step2)
+   return (ENXIO);
+
+   if (axp81x_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, ) != 0)
+   return (ERANGE);
+
+   axp81x_write(sc->base_dev, sc->def->voltage_reg, val);
+
+   *udelay = 0;
+
+   return (0);
 }
 
 static int
 axp81x_regnode_get_voltage(struct regnode *regnode, int *uvolt)
 {
-   return (ENXIO);
+   struct axp81x_reg_sc *sc;
+   uint8_t val;
+
+   sc = regnode_get_softc(regnode);
+
+   if (!sc->def->voltage_step1 || !sc->def->voltage_step2)
+   return (ENXIO);
+
+   axp81x_read(sc->base_dev, sc->def->voltage_reg, , 1);
+   axp81x_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt);
+
+   return (0);
 }
 
 static regnode_method_t axp81x_regnode_methods[] = {
@@ -519,6 +610,10 @@ axp81x_reg_attach(device_t dev, phandle_
 
memset(, 0, sizeof(initdef));
regulator_parse_ofw_stdparam(dev, node, );
+   if

svn commit: r305134 - in head/sys/boot/fdt/dts: . arm64

2016-08-31 Thread Jared McNeill 
Author: jmcneill
Date: Wed Aug 31 16:56:54 2016
New Revision: 305134
URL: https://svnweb.freebsd.org/changeset/base/305134

Log:
  Add Allwinner A64 (sun50i) and Pine64 dts files.
  
  Reviewed by:  andrew, imp, manu, wca
  Differential Revision:https://reviews.freebsd.org/D7169

Added:
  head/sys/boot/fdt/dts/arm64/
  head/sys/boot/fdt/dts/arm64/Makefile   (contents, props changed)
  head/sys/boot/fdt/dts/arm64/a64.dtsi   (contents, props changed)
  head/sys/boot/fdt/dts/arm64/pine64_plus.dts   (contents, props changed)
  head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-common.dtsi   (contents, props 
changed)
  head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64-plus.dts   (contents, props 
changed)
  head/sys/boot/fdt/dts/arm64/sun50i-a64-pine64.dts   (contents, props changed)
  head/sys/boot/fdt/dts/arm64/sun50i-a64.dtsi   (contents, props changed)
Modified:
  head/sys/boot/fdt/dts/Makefile

Modified: head/sys/boot/fdt/dts/Makefile
==
--- head/sys/boot/fdt/dts/Makefile  Wed Aug 31 15:47:58 2016
(r305133)
+++ head/sys/boot/fdt/dts/Makefile  Wed Aug 31 16:56:54 2016
(r305134)
@@ -1,5 +1,5 @@
 # $FreeBSD$
 
-SUBDIR=arm mips powerpc
+SUBDIR=arm arm64 mips powerpc
 
 .include 

Added: head/sys/boot/fdt/dts/arm64/Makefile
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm64/MakefileWed Aug 31 16:56:54 2016
(r305134)
@@ -0,0 +1,7 @@
+# $FreeBSD$
+
+DTS!=ls *.dts
+
+all: test-dts
+
+.include 

Added: head/sys/boot/fdt/dts/arm64/a64.dtsi
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm64/a64.dtsiWed Aug 31 16:56:54 2016
(r305134)
@@ -0,0 +1,151 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/ {
+   clocks {
+   pll_hsic: clk@01c20044 {
+   #clock-cells = <0>;
+   compatible = "allwinner,sun50i-a64-pllhsic-clk";
+   reg = <0x01c20044 0x4>;
+   clocks = <>;
+   clock-output-names = "pll_hsic";
+   };
+
+   usb_clk: clk@01c200cc {
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+   compatible = "allwinner,sun8i-a83t-usb-clk";
+   reg = <0x01c200cc 0x4>;
+   clocks = <>, <_hsic>;
+   clock-indices = <8>, <9>,
+   <10>, <11>,
+   <16>, <17>;
+   clock-output-names = "usb_phy0", "usb_phy1",
+"usb_hsic_pll", "usb_hsic_12m",
+"usb_otg_ohci", "usb_ohci0";
+   };
+   };
+
+   soc {
+   watchdog: watchdog@01c20ca0 {
+   compatible = "allwinner,sun6i-a31-wdt";
+   reg = <0x01c20ca0 0x20>;
+   interrupts = ;
+   clocks = <>;
+   };
+
+   nmi_intc: interrupt-controller@01f00c0c {
+

svn commit: r305120 - head/sys/arm/allwinner

2016-08-31 Thread Jared McNeill 
Author: jmcneill
Date: Wed Aug 31 10:45:53 2016
New Revision: 305120
URL: https://svnweb.freebsd.org/changeset/base/305120

Log:
  Add support for Allwinner A64 USB PHY.
  
  Reviewed by:  manu

Modified:
  head/sys/arm/allwinner/aw_usbphy.c

Modified: head/sys/arm/allwinner/aw_usbphy.c
==
--- head/sys/arm/allwinner/aw_usbphy.c  Wed Aug 31 10:45:33 2016
(r305119)
+++ head/sys/arm/allwinner/aw_usbphy.c  Wed Aug 31 10:45:53 2016
(r305120)
@@ -40,6 +40,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -53,25 +54,89 @@ __FBSDID("$FreeBSD$");
 #include "phy_if.h"
 
 #defineUSBPHY_NPHYS4
+#defineUSBPHY_NRES USBPHY_NPHYS
+
+enum awusbphy_type {
+   AWUSBPHY_TYPE_A10 = 1,
+   AWUSBPHY_TYPE_A13,
+   AWUSBPHY_TYPE_A20,
+   AWUSBPHY_TYPE_A31,
+   AWUSBPHY_TYPE_A83T,
+   AWUSBPHY_TYPE_H3,
+   AWUSBPHY_TYPE_A64
+};
 
 static struct ofw_compat_data compat_data[] = {
-   { "allwinner,sun4i-a10-usb-phy",1 },
-   { "allwinner,sun5i-a13-usb-phy",1 },
-   { "allwinner,sun6i-a31-usb-phy",1 },
-   { "allwinner,sun7i-a20-usb-phy",1 },
-   { "allwinner,sun8i-a83t-usb-phy",   1 },
-   { "allwinner,sun8i-h3-usb-phy", 1 },
+   { "allwinner,sun4i-a10-usb-phy",AWUSBPHY_TYPE_A10 },
+   { "allwinner,sun5i-a13-usb-phy",AWUSBPHY_TYPE_A13 },
+   { "allwinner,sun6i-a31-usb-phy",AWUSBPHY_TYPE_A31 },
+   { "allwinner,sun7i-a20-usb-phy",AWUSBPHY_TYPE_A20 },
+   { "allwinner,sun8i-a83t-usb-phy",   AWUSBPHY_TYPE_A83T },
+   { "allwinner,sun8i-h3-usb-phy", AWUSBPHY_TYPE_H3 },
+   { "allwinner,sun50i-a64-usb-phy",   AWUSBPHY_TYPE_A64 },
{ NULL, 0 }
 };
 
 struct awusbphy_softc {
+   struct resource *   res[USBPHY_NRES];
regulator_t reg[USBPHY_NPHYS];
gpio_pin_t  id_det_pin;
int id_det_valid;
gpio_pin_t  vbus_det_pin;
int vbus_det_valid;
+   enum awusbphy_type  phy_type;
 };
 
+static struct resource_spec awusbphy_spec[] = {
+   { SYS_RES_MEMORY,   0,  RF_ACTIVE },
+   { SYS_RES_MEMORY,   1,  RF_ACTIVE },
+   { SYS_RES_MEMORY,   2,  RF_ACTIVE | RF_OPTIONAL },
+   { SYS_RES_MEMORY,   3,  RF_ACTIVE | RF_OPTIONAL },
+   { -1, 0 }
+};
+
+#defineRD4(sc, i, o)   bus_read_4((sc)->res[(i)], (o))
+#defineWR4(sc, i, o, v)bus_write_4((sc)->res[(i)], (o), (v))
+#defineCLR4(sc, i, o, m)   WR4(sc, i, o, RD4(sc, i, o) & ~(m))
+#defineSET4(sc, i, o, m)   WR4(sc, i, o, RD4(sc, i, o) | (m))
+
+#defineOTG_PHY_CFG 0x20
+#define OTG_PHY_ROUTE_OTG  (1 << 0)
+#definePMU_IRQ_ENABLE  0x00
+#define PMU_AHB_INCR8  (1 << 10)
+#define PMU_AHB_INCR4  (1 << 9)
+#define PMU_AHB_INCRX_ALIGN(1 << 8)
+#define PMU_ULPI_BYPASS(1 << 0)
+#definePMU_UNK_H3  0x10
+#define PMU_UNK_H3_CLR 0x2
+
+static void
+awusbphy_configure(device_t dev, int phyno)
+{
+   struct awusbphy_softc *sc;
+
+   sc = device_get_softc(dev);
+
+   if (sc->res[phyno] == NULL)
+   return;
+
+   if (sc->phy_type == AWUSBPHY_TYPE_A64)  {
+   CLR4(sc, phyno, PMU_UNK_H3, PMU_UNK_H3_CLR);
+
+   /* EHCI0 and OTG share a PHY */
+   if (phyno == 0)
+   SET4(sc, 0, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG);
+   else if (phyno == 1)
+   CLR4(sc, 0, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG);
+   }
+
+   if (phyno > 0) {
+   /* Enable passby */
+   SET4(sc, phyno, PMU_IRQ_ENABLE, PMU_ULPI_BYPASS |
+   PMU_AHB_INCR8 | PMU_AHB_INCR4 | PMU_AHB_INCRX_ALIGN);
+   }
+}
+
 static int
 awusbphy_init(device_t dev)
 {
@@ -86,6 +151,8 @@ awusbphy_init(device_t dev)
sc = device_get_softc(dev);
node = ofw_bus_get_node(dev);
 
+   sc->phy_type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
+
/* Enable clocks */
for (off = 0; clk_get_by_ofw_index(dev, 0, off, ) == 0; off++) {
error = clk_enable(clk);
@@ -123,6 +190,10 @@ awusbphy_init(device_t dev)
if (error == 0)
sc->vbus_det_valid = 1;
 
+   /* Allocate resources */
+   if (bus_alloc_resources(dev, awusbphy_spec, sc->res) != 0)
+   device_printf(dev, "couldn't allocate resources\n");
+
return (0);
 }
 
@@ -159,6 +230,9 @@ awusbphy_phy_enable(device_t dev, intptr
 
sc = device_get_softc(dev);
 
+   /* Configure PHY */
+   awusbphy_configure(dev, phy);
+
/* Regulators are optional. If

svn commit: r305058 - head/sys/arm/allwinner

2016-08-30 Thread Jared McNeill 
Author: jmcneill
Date: Tue Aug 30 10:21:32 2016
New Revision: 305058
URL: https://svnweb.freebsd.org/changeset/base/305058

Log:
  Add support for Allwinner A64 watchdog timer.

Modified:
  head/sys/arm/allwinner/aw_wdog.c

Modified: head/sys/arm/allwinner/aw_wdog.c
==
--- head/sys/arm/allwinner/aw_wdog.cTue Aug 30 08:34:49 2016
(r305057)
+++ head/sys/arm/allwinner/aw_wdog.cTue Aug 30 10:21:32 2016
(r305058)
@@ -30,6 +30,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -54,6 +55,7 @@ __FBSDID("$FreeBSD$");
 #defineA10_WDOG_CTRL   0x00
 #defineA31_WDOG_CTRL   0x10
 #define WDOG_CTRL_RESTART  (1 << 0)
+#define A31_WDOG_CTRL_KEY  (0xa57 << 1)
 #defineA10_WDOG_MODE   0x04
 #defineA31_WDOG_MODE   0x18
 #define A10_WDOG_MODE_INTVL_SHIFT  3
@@ -92,6 +94,7 @@ struct aw_wdog_softc {
struct resource *   res;
struct mtx  mtx;
uint8_t wdog_ctrl;
+   uint32_twdog_ctrl_key;
uint8_t wdog_mode;
uint8_t wdog_mode_intvl_shift;
uint8_t wdog_mode_en;
@@ -108,7 +111,8 @@ static struct ofw_compat_data compat_dat
{NULL, 0}
 };
 
-static void aw_wdog_watchdog_fn(void *private, u_int cmd, int *error);
+static void aw_wdog_watchdog_fn(void *, u_int, int *);
+static void aw_wdog_shutdown_fn(void *, int);
 
 static int
 aw_wdog_probe(device_t dev)
@@ -160,6 +164,7 @@ aw_wdog_attach(device_t dev)
break;
case A31_WATCHDOG:
sc->wdog_ctrl = A31_WDOG_CTRL;
+   sc->wdog_ctrl_key = A31_WDOG_CTRL_KEY;
sc->wdog_mode = A31_WDOG_MODE;
sc->wdog_mode_intvl_shift = A31_WDOG_MODE_INTVL_SHIFT;
sc->wdog_mode_en = WDOG_MODE_EN;
@@ -173,6 +178,9 @@ aw_wdog_attach(device_t dev)
 
mtx_init(>mtx, "AW Watchdog", "aw_wdog", MTX_DEF);
EVENTHANDLER_REGISTER(watchdog_list, aw_wdog_watchdog_fn, sc, 0);
+   EVENTHANDLER_REGISTER(shutdown_final, aw_wdog_shutdown_fn, sc,
+   SHUTDOWN_PRI_LAST - 1);
+   
return (0);
 }
 
@@ -198,7 +206,8 @@ aw_wdog_watchdog_fn(void *private, u_int
WRITE(sc, sc->wdog_mode,
  (wd_intervals[i].value << sc->wdog_mode_intvl_shift) |
sc->wdog_mode_en);
-   WRITE(sc, sc->wdog_ctrl, WDOG_CTRL_RESTART);
+   WRITE(sc, sc->wdog_ctrl,
+   WDOG_CTRL_RESTART | sc->wdog_ctrl_key);
if (sc->wdog_config)
WRITE(sc, sc->wdog_config,
sc->wdog_config_value);
@@ -222,6 +231,13 @@ aw_wdog_watchdog_fn(void *private, u_int
mtx_unlock(>mtx);
 }
 
+static void
+aw_wdog_shutdown_fn(void *private, int howto)
+{
+   if ((howto & (RB_POWEROFF|RB_HALT)) == 0)
+   aw_wdog_watchdog_reset();
+}
+
 void
 aw_wdog_watchdog_reset()
 {
@@ -237,6 +253,8 @@ aw_wdog_watchdog_reset()
if (aw_wdog_sc->wdog_config)
WRITE(aw_wdog_sc, aw_wdog_sc->wdog_config,
  aw_wdog_sc->wdog_config_value);
+   WRITE(aw_wdog_sc, aw_wdog_sc->wdog_ctrl,
+   WDOG_CTRL_RESTART | aw_wdog_sc->wdog_ctrl_key);
while(1)
;
 
___
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svn commit: r305026 - head/sys/boot/efi/libefi

2016-08-29 Thread Jared McNeill 
Author: jmcneill
Date: Mon Aug 29 20:01:53 2016
New Revision: 305026
URL: https://svnweb.freebsd.org/changeset/base/305026

Log:
  When the EFI implementation (like U-Boot) does not support WaitForKey, we
  can emulate efi_cons_poll(0 with a flag and caching the last key read with
  ReadKeyStroke. This fixes the loader.efi countdown timer on Pine64 (and
  other U-Boot + EFI using platforms).
  
  Reviewed by:  imp, manu
  Differential Revision:https://reviews.freebsd.org/D7670

Modified:
  head/sys/boot/efi/libefi/efi_console.c

Modified: head/sys/boot/efi/libefi/efi_console.c
==
--- head/sys/boot/efi/libefi/efi_console.c  Mon Aug 29 20:01:49 2016
(r305025)
+++ head/sys/boot/efi/libefi/efi_console.c  Mon Aug 29 20:01:53 2016
(r305026)
@@ -51,6 +51,9 @@ void HO(void);
 void end_term(void);
 #endif
 
+static EFI_INPUT_KEY key_cur;
+static int key_pending;
+
 static void efi_cons_probe(struct console *);
 static int efi_cons_init(int);
 void efi_cons_putchar(int);
@@ -436,14 +439,20 @@ efi_cons_getchar()
EFI_STATUS status;
UINTN junk;
 
-   /* Try to read a key stroke. We wait for one if none is pending. */
-   status = conin->ReadKeyStroke(conin, );
-   while (status == EFI_NOT_READY) {
-   /* Some EFI implementation (u-boot for example) do not support 
WaitForKey */
-   if (conin->WaitForKey != NULL)
-   BS->WaitForEvent(1, >WaitForKey, );
+   if (key_pending) {
+   key = key_cur;
+   key_pending = 0;
+   } else {
+   /* Try to read a key stroke. We wait for one if none is 
pending. */
status = conin->ReadKeyStroke(conin, );
+   while (status == EFI_NOT_READY) {
+   /* Some EFI implementation (u-boot for example) do not 
support WaitForKey */
+   if (conin->WaitForKey != NULL)
+   BS->WaitForEvent(1, >WaitForKey, );
+   status = conin->ReadKeyStroke(conin, );
+   }
}
+
switch (key.ScanCode) {
case 0x17: /* ESC */
return (0x1b);  /* esc */
@@ -456,9 +465,20 @@ efi_cons_getchar()
 int
 efi_cons_poll()
 {
+   EFI_INPUT_KEY key;
+   EFI_STATUS status;
+
+   if (conin->WaitForKey == NULL) {
+   if (key_pending)
+   return (1);
+   status = conin->ReadKeyStroke(conin, );
+   if (status == EFI_SUCCESS) {
+   key_cur = key;
+   key_pending = 1;
+   }
+   return (key_pending);
+   }
 
-   if (conin->WaitForKey == NULL)
-   return (1);
/* This can clear the signaled state. */
return (BS->CheckEvent(conin->WaitForKey) == EFI_SUCCESS);
 }
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svn commit: r304805 - in head/sys: arm64/conf conf

2016-08-25 Thread Jared McNeill 
Author: jmcneill
Date: Thu Aug 25 13:59:19 2016
New Revision: 304805
URL: https://svnweb.freebsd.org/changeset/base/304805

Log:
  Add support for Allwinner A64.
  
  Reviewed by:  andrew, manu
  Relnotes: yes

Modified:
  head/sys/arm64/conf/GENERIC
  head/sys/conf/files.arm64

Modified: head/sys/arm64/conf/GENERIC
==
--- head/sys/arm64/conf/GENERIC Thu Aug 25 13:46:52 2016(r304804)
+++ head/sys/arm64/conf/GENERIC Thu Aug 25 13:59:19 2016(r304805)
@@ -86,6 +86,7 @@ options   WITNESS_SKIPSPIN# Don't run wi
 optionsMALLOC_DEBUG_MAXZONES=8 # Separate malloc(9) zones
 
 # SoC support
+optionsSOC_ALLWINNER_A64
 optionsSOC_CAVM_THUNDERX
 optionsSOC_HISI_HI6220
 
@@ -103,6 +104,7 @@ options PCI_IOV # PCI SR-IOV support
 # Ethernet NICs
 device mii
 device miibus  # MII bus support
+device awg # Allwinner EMAC Gigabit Ethernet
 device em  # Intel PRO/1000 Gigabit Ethernet Family
 device igb # Intel PRO/1000 PCIE Server Gigabit Family
 device ix  # Intel 10Gb Ethernet Family
@@ -118,6 +120,7 @@ device  da
 device pass# Passthrough device (direct ATA/SCSI access)
 
 # MMC/SD/SDIO Card slot support
+device aw_mmc  # Allwinner SD/MMC controller
 device mmc # mmc/sd bus
 device mmcsd   # mmc/sd flash cards
 device dwmmc
@@ -125,18 +128,45 @@ devicedwmmc
 # Serial (COM) ports
 device uart# Generic UART driver
 device uart_ns8250 # ns8250-type UART driver
+device uart_snps
 device pl011
 
 # USB support
 optionsUSB_DEBUG   # enable debug msgs
+device aw_ehci # Allwinner EHCI USB interface (USB 2.0)
+device aw_usbphy   # Allwinner USB PHY
 device dwcotg  # DWC OTG controller
-device ohci# OHCI PCI->USB interface
-device ehci# EHCI PCI->USB interface (USB 2.0)
+device ohci# OHCI USB interface
+device ehci# EHCI USB interface (USB 2.0)
 device xhci# XHCI PCI->USB interface (USB 3.0)
 device usb # USB Bus (required)
 device ukbd# Keyboard
 device umass   # Disks/Mass storage - Requires scbus 
and da
 
+# GPIO
+device aw_gpio # Allwinner GPIO controller
+device gpio
+device fdt_pinctrl
+
+# I2C
+device aw_rsb  # Allwinner Reduced Serial Bus
+device iicbus
+
+# Clock and reset controllers
+device aw_ccu  # Allwinner clock controller
+
+# Interrupt controllers
+device aw_nmi  # Allwinner NMI support
+
+# Real-time clock support
+device aw_rtc  # Allwinner Real-time Clock
+
+# Watchdog controllers
+device aw_wdog # Allwinner Watchdog
+
+# Power management controllers
+device axp81x  # X-Powers AXP81x PMIC
+
 # Pseudo devices.
 device loop# Network loopback
 device random  # Entropy device
@@ -148,6 +178,13 @@ device gif # IPv6 and IPv4 
tunneling
 device firmware# firmware assist module
 device psci# Support for ARM PSCI
 
+# EXT_RESOURCES pseudo devices
+optionsEXT_RESOURCES
+device clk
+device phy
+device hwreset
+device regulator
+
 # The `bpf' device enables the Berkeley Packet Filter.
 # Be aware of the administrative consequences of enabling this!
 # Note that 'bpf' is required for DHCP.

Modified: head/sys/conf/files.arm64
==
--- head/sys/conf/files.arm64   Thu Aug 25 13:46:52 2016(r304804)
+++ head/sys/conf/files.arm64   Thu Aug 25 13:59:19 2016(r304805)
@@ -11,6 +11,30 @@ cloudabi64_vdso_blob.o   optionalcompat_
no-implicit-rule\
clean   "cloudabi64_vdso_blob.o"
 #
+arm/allwinner/a10_ehci.c   optionalehci aw_ehci
+arm/allwinner/a10_gpio.c   optionalgpio aw_gpio
+arm/allwinner/a10_mmc.coptionalmmc aw_mmc
+arm/allwinner/a64/a64_padconf.coptionalsoc_allwinner_a64
+arm/allwinner/a64/a64_r_padconf.c optional soc_allwinner_a64
+arm/allwinner/aw_ccu.c optionalaw_ccu
+arm/allwinner/aw_nmi.c optionalaw_nmi \
+   compile-with "${NORMAL_C} -I$S/gnu/dts/include"
+arm/allwinner/aw_reset.c   optionalaw_ccu
+arm/allwinner/aw_rsb.c

svn commit: r304798 - head/sys/arm/allwinner/clk

2016-08-25 Thread Jared McNeill 
Author: jmcneill
Date: Thu Aug 25 10:29:41 2016
New Revision: 304798
URL: https://svnweb.freebsd.org/changeset/base/304798

Log:
  Add support for Allwinner A64 PLL_PERIPH0/PLL_PERIPH1 and PLL_HSIC clocks.
  
  Reviewed by:  andrew, manu

Modified:
  head/sys/arm/allwinner/clk/aw_pll.c

Modified: head/sys/arm/allwinner/clk/aw_pll.c
==
--- head/sys/arm/allwinner/clk/aw_pll.c Thu Aug 25 10:28:47 2016
(r304797)
+++ head/sys/arm/allwinner/clk/aw_pll.c Thu Aug 25 10:29:41 2016
(r304798)
@@ -142,6 +142,15 @@ __FBSDID("$FreeBSD$");
 #defineA31_PLL6_DEFAULT_K  0x1
 #defineA31_PLL6_TIMEOUT10
 
+#defineA64_PLLHSIC_LOCK(1 << 28)
+#defineA64_PLLHSIC_FRAC_CLK_OUT(1 << 25)
+#defineA64_PLLHSIC_PLL_MODE_SEL(1 << 24)
+#defineA64_PLLHSIC_PLL_SDM_EN  (1 << 20)
+#defineA64_PLLHSIC_FACTOR_N(0x7f << 8)
+#defineA64_PLLHSIC_FACTOR_N_SHIFT  8
+#defineA64_PLLHSIC_PRE_DIV_M   (0xf << 0)
+#defineA64_PLLHSIC_PRE_DIV_M_SHIFT 0
+
 #defineA80_PLL4_CLK_OUT_EN (1 << 20)
 #defineA80_PLL4_PLL_DIV2   (1 << 18)
 #defineA80_PLL4_PLL_DIV1   (1 << 16)
@@ -172,6 +181,7 @@ enum aw_pll_type {
AWPLL_A23_PLL1,
AWPLL_A31_PLL1,
AWPLL_A31_PLL6,
+   AWPLL_A64_PLLHSIC,
AWPLL_A80_PLL4,
 };
 
@@ -601,6 +611,7 @@ a31_pll6_init(device_t dev, bus_addr_t r
val &= ~(A31_PLL6_FACTOR_N | A31_PLL6_FACTOR_K | A31_PLL6_BYPASS_EN);
val |= (A31_PLL6_DEFAULT_N << A31_PLL6_FACTOR_N_SHIFT);
val |= (A31_PLL6_DEFAULT_K << A31_PLL6_FACTOR_K_SHIFT);
+   val |= AW_PLL_ENABLE;
CLKDEV_WRITE_4(dev, reg, val);
 
/* Wait for PLL to become stable */
@@ -613,9 +624,6 @@ a31_pll6_init(device_t dev, bus_addr_t r
 
CLKDEV_DEVICE_UNLOCK(dev);
 
-   if (retry == 0)
-   return (ETIMEDOUT);
-
return (0);
 }
 
@@ -663,6 +671,40 @@ a80_pll4_recalc(struct aw_pll_sc *sc, ui
return (0);
 }
 
+static int
+a64_pllhsic_recalc(struct aw_pll_sc *sc, uint64_t *freq)
+{
+   uint32_t val, n, m;
+
+   DEVICE_LOCK(sc);
+   PLL_READ(sc, );
+   DEVICE_UNLOCK(sc);
+
+   n = ((val & A64_PLLHSIC_FACTOR_N) >> A64_PLLHSIC_FACTOR_N_SHIFT) + 1;
+   m = ((val & A64_PLLHSIC_PRE_DIV_M) >> A64_PLLHSIC_PRE_DIV_M_SHIFT) + 1;
+
+   *freq = (*freq * n) / m;
+
+   return (0);
+}
+
+static int
+a64_pllhsic_init(device_t dev, bus_addr_t reg, struct clknode_init_def *def)
+{
+   uint32_t val;
+
+   /*
+* PLL_HSIC default is 480MHz, just enable it.
+*/
+   CLKDEV_DEVICE_LOCK(dev);
+   CLKDEV_READ_4(dev, reg, );
+   val |= AW_PLL_ENABLE;
+   CLKDEV_WRITE_4(dev, reg, val);
+   CLKDEV_DEVICE_UNLOCK(dev);
+
+   return (0);
+}
+
 #definePLL(_type, _recalc, _set_freq, _init)   \
[(_type)] = {   \
.recalc = (_recalc),\
@@ -681,6 +723,7 @@ static struct aw_pll_funcs aw_pll_func[]
PLL(AWPLL_A31_PLL1, a31_pll1_recalc, NULL, NULL),
PLL(AWPLL_A31_PLL6, a31_pll6_recalc, NULL, a31_pll6_init),
PLL(AWPLL_A80_PLL4, a80_pll4_recalc, NULL, NULL),
+   PLL(AWPLL_A64_PLLHSIC, a64_pllhsic_recalc, NULL, a64_pllhsic_init),
 };
 
 static struct ofw_compat_data compat_data[] = {
@@ -694,6 +737,7 @@ static struct ofw_compat_data compat_dat
{ "allwinner,sun6i-a31-pll6-clk",   AWPLL_A31_PLL6 },
{ "allwinner,sun8i-a23-pll1-clk",   AWPLL_A23_PLL1 },
{ "allwinner,sun9i-a80-pll4-clk",   AWPLL_A80_PLL4 },
+   { "allwinner,sun50i-a64-pllhsic-clk",   AWPLL_A64_PLLHSIC },
{ NULL, 0 }
 };
 
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svn commit: r304796 - head/sys/arm/allwinner/clk

2016-08-25 Thread Jared McNeill 
Author: jmcneill
Date: Thu Aug 25 10:27:22 2016
New Revision: 304796
URL: https://svnweb.freebsd.org/changeset/base/304796

Log:
  Switch parent clock when setting frequency if a new parent is a better
  candidate for the target rate.
  
  Reviewed by:  andrew, manu

Modified:
  head/sys/arm/allwinner/clk/aw_modclk.c

Modified: head/sys/arm/allwinner/clk/aw_modclk.c
==
--- head/sys/arm/allwinner/clk/aw_modclk.c  Thu Aug 25 10:24:14 2016
(r304795)
+++ head/sys/arm/allwinner/clk/aw_modclk.c  Thu Aug 25 10:27:22 2016
(r304796)
@@ -160,28 +160,47 @@ aw_modclk_set_freq(struct clknode *clk, 
 int flags, int *stop)
 {
struct aw_modclk_sc *sc;
-   uint32_t val, m, n, best_m, best_n;
+   uint32_t val, m, n, src, best_m, best_n, best_src;
uint64_t cur_freq;
int64_t best_diff, cur_diff;
+   int error;
 
sc = clknode_get_softc(clk);
best_n = best_m = 0;
best_diff = (int64_t)*fout; 
+   best_src = 0;
 
-   for (n = 0; n <= CLK_RATIO_N_MAX; n++)
-   for (m = 0; m <= CLK_RATIO_M_MAX; m++) {
-   cur_freq = fin / (1 << n) / (m + 1);
-   cur_diff = (int64_t)*fout - cur_freq;
-   if (cur_diff >= 0 && cur_diff < best_diff) {
-   best_diff = cur_diff;
-   best_m = m;
-   best_n = n;
+   for (src = 0; src < CLK_SRC_SEL_MAX; src++) {
+   error = clknode_set_parent_by_idx(clk, src);
+   if (error != 0)
+   continue;
+   error = clknode_get_freq(clknode_get_parent(clk), );
+   if (error != 0)
+   continue;
+
+   for (n = 0; n <= CLK_RATIO_N_MAX; n++)
+   for (m = 0; m <= CLK_RATIO_M_MAX; m++) {
+   cur_freq = fin / (1 << n) / (m + 1);
+   cur_diff = (int64_t)*fout - cur_freq;
+   if (cur_diff >= 0 && cur_diff < best_diff) {
+   best_src = src;
+   best_diff = cur_diff;
+   best_m = m;
+   best_n = n;
+   }
}
-   }
+   }
 
if (best_diff == (int64_t)*fout)
return (ERANGE);
 
+   error = clknode_set_parent_by_idx(clk, best_src);
+   if (error != 0)
+   return (error);
+   error = clknode_get_freq(clknode_get_parent(clk), );
+   if (error != 0)
+   return (error);
+
DEVICE_LOCK(sc);
MODCLK_READ(sc, );
val &= ~(CLK_RATIO_N | CLK_RATIO_M);
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svn commit: r304795 - head/sys/arm/allwinner/clk

2016-08-25 Thread Jared McNeill 
Author: jmcneill
Date: Thu Aug 25 10:24:14 2016
New Revision: 304795
URL: https://svnweb.freebsd.org/changeset/base/304795

Log:
  Add support for Allwinner multi-parent bus gates.
  
  Reviewed by:  andrew, manu

Modified:
  head/sys/arm/allwinner/clk/aw_gate.c

Modified: head/sys/arm/allwinner/clk/aw_gate.c
==
--- head/sys/arm/allwinner/clk/aw_gate.cThu Aug 25 10:20:27 2016
(r304794)
+++ head/sys/arm/allwinner/clk/aw_gate.cThu Aug 25 10:24:14 2016
(r304795)
@@ -44,6 +44,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -89,11 +90,14 @@ static struct ofw_compat_data compat_dat
  (uintptr_t)"Allwinner APB0 Clock Gates" },
 
{ "allwinner,sun8i-h3-bus-gates-clk",
- (uintptr_t)"Allwinner Bus Clock Gates"},
+ (uintptr_t)"Allwinner Bus Clock Gates" },
 
{ "allwinner,sun9i-a80-apbs-gates-clk",
  (uintptr_t)"Allwinner APBS Clock Gates" },
 
+   { "allwinner,sunxi-multi-bus-gates-clk",
+ (uintptr_t)"Allwinner Multi Bus Clock Gates" },
+
{ NULL, 0 }
 };
 
@@ -119,6 +123,43 @@ aw_gate_create(device_t dev, bus_addr_t 
 }
 
 static int
+aw_gate_add(device_t dev, struct clkdom *clkdom, phandle_t node,
+bus_addr_t paddr)
+{
+   const char **names;
+   uint32_t *indices;
+   clk_t clk_parent;
+   int index, nout, error;
+
+   indices = NULL;
+
+   nout = clk_parse_ofw_out_names(dev, node, , );
+   if (nout == 0) {
+   device_printf(dev, "no clock outputs found\n");
+   return (ENOENT);
+   }
+   if (indices == NULL) {
+   device_printf(dev, "no clock-indices property\n");
+   return (ENXIO);
+   }
+
+   error = clk_get_by_ofw_index(dev, node, 0, _parent);
+   if (error != 0) {
+   device_printf(dev, "cannot parse clock parent\n");
+   return (ENXIO);
+   }
+
+   for (index = 0; index < nout; index++) {
+   error = aw_gate_create(dev, paddr, clkdom,
+   clk_get_name(clk_parent), names[index], indices[index]);
+   if (error)
+   return (error);
+   }
+
+   return (0);
+}
+
+static int
 aw_gate_probe(device_t dev)
 {
const char *d;
@@ -138,16 +179,11 @@ static int
 aw_gate_attach(device_t dev)
 {
struct clkdom *clkdom;
-   const char **names;
-   int index, nout, error;
-   uint32_t *indices;
-   clk_t clk_parent;
bus_addr_t paddr;
bus_size_t psize;
-   phandle_t node;
+   phandle_t node, child;
 
node = ofw_bus_get_node(dev);
-   indices = NULL;
 
if (ofw_reg_to_paddr(node, 0, , , NULL) != 0) {
device_printf(dev, "cannot parse 'reg' property\n");
@@ -156,44 +192,21 @@ aw_gate_attach(device_t dev)
 
clkdom = clkdom_create(dev);
 
-   nout = clk_parse_ofw_out_names(dev, node, , );
-   if (nout == 0) {
-   device_printf(dev, "no clock outputs found\n");
-   error = ENOENT;
-   goto fail;
-   }
-   if (indices == NULL) {
-   device_printf(dev, "no clock-indices property\n");
-   error = ENXIO;
-   goto fail;
-   }
-
-   error = clk_get_by_ofw_index(dev, 0, 0, _parent);
-   if (error != 0) {
-   device_printf(dev, "cannot parse clock parent\n");
-   return (ENXIO);
-   }
-
-   for (index = 0; index < nout; index++) {
-   error = aw_gate_create(dev, paddr, clkdom,
-   clk_get_name(clk_parent), names[index], indices[index]);
-   if (error)
-   goto fail;
-   }
+   if (ofw_bus_is_compatible(dev, "allwinner,sunxi-multi-bus-gates-clk")) {
+   for (child = OF_child(node); child > 0; child = OF_peer(child))
+   aw_gate_add(dev, clkdom, child, paddr);
+   } else
+   aw_gate_add(dev, clkdom, node, paddr);
 
if (clkdom_finit(clkdom) != 0) {
device_printf(dev, "cannot finalize clkdom initialization\n");
-   error = ENXIO;
-   goto fail;
+   return (ENXIO);
}
 
if (bootverbose)
clkdom_dump(clkdom);
 
return (0);
-
-fail:
-   return (error);
 }
 
 static device_method_t aw_gate_methods[] = {
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svn commit: r304794 - head/sys/arm/allwinner

2016-08-25 Thread Jared McNeill 
Author: jmcneill
Date: Thu Aug 25 10:20:27 2016
New Revision: 304794
URL: https://svnweb.freebsd.org/changeset/base/304794

Log:
  Expose DC1SW as a regulator switch. On Pine64 this is used to control EMAC
  PHY power.
  
  Reviewed by:  andrew, manu

Modified:
  head/sys/arm/allwinner/axp81x.c

Modified: head/sys/arm/allwinner/axp81x.c
==
--- head/sys/arm/allwinner/axp81x.c Thu Aug 25 10:14:56 2016
(r304793)
+++ head/sys/arm/allwinner/axp81x.c Thu Aug 25 10:20:27 2016
(r304794)
@@ -52,10 +52,17 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
-#include "iicbus_if.h"
+#include 
+
 #include "gpio_if.h"
+#include "iicbus_if.h"
+#include "regdev_if.h"
+
+MALLOC_DEFINE(M_AXP81X_REG, "AXP81x regulator", "AXP81x power regulator");
 
 #defineAXP_ICTYPE  0x03
+#defineAXP_POWERCTL2   0x12
+#define AXP_POWERCTL2_DC1SW(1 << 7)
 #defineAXP_POWERBAT0x32
 #define AXP_POWERBAT_SHUTDOWN  (1 << 7)
 #defineAXP_IRQEN1  0x40
@@ -96,6 +103,37 @@ static struct resource_spec axp81x_spec[
{ -1, 0 }
 };
 
+struct axp81x_regdef {
+   intptr_tid;
+   char*name;
+   char*supply_name;
+   uint8_t enable_reg;
+   uint8_t enable_mask;
+};
+
+enum axp81x_reg_id {
+   AXP81X_REG_ID_DC1SW
+};
+
+static struct axp81x_regdef axp81x_regdefs[] = {
+   {
+   .id = AXP81X_REG_ID_DC1SW,
+   .name = "dc1sw",
+   .enable_reg = AXP_POWERCTL2,
+   .enable_mask = AXP_POWERCTL2_DC1SW,
+   },
+};
+
+struct axp81x_softc;
+
+struct axp81x_reg_sc {
+   struct regnode  *regnode;
+   device_tbase_dev;
+   struct axp81x_regdef*def;
+   phandle_t   xref;
+   struct regnode_std_param *param;
+};
+
 struct axp81x_softc {
struct resource *res;
uint16_taddr;
@@ -103,6 +141,10 @@ struct axp81x_softc {
device_tgpiodev;
struct mtx  mtx;
int busy;
+
+   /* Regulators */
+   struct axp81x_reg_sc**regs;
+   int nregs;
 };
 
 #defineAXP_LOCK(sc)mtx_lock(&(sc)->mtx)
@@ -150,6 +192,56 @@ axp81x_write(device_t dev, uint8_t reg, 
return (iicbus_transfer(dev, msg, 2));
 }
 
+static int
+axp81x_regnode_init(struct regnode *regnode)
+{
+   return (0);
+}
+
+static int
+axp81x_regnode_enable(struct regnode *regnode, bool enable, int *udelay)
+{
+   struct axp81x_reg_sc *sc;
+   uint8_t val;
+
+   sc = regnode_get_softc(regnode);
+
+   axp81x_read(sc->base_dev, sc->def->enable_reg, , 1);
+   if (enable)
+   val |= sc->def->enable_mask;
+   else
+   val &= ~sc->def->enable_mask;
+   axp81x_write(sc->base_dev, sc->def->enable_reg, val);
+
+   *udelay = 0;
+
+   return (0);
+}
+
+static int
+axp81x_regnode_set_voltage(struct regnode *regnode, int min_uvolt,
+int max_uvolt, int *udelay)
+{
+   return (ENXIO);
+}
+
+static int
+axp81x_regnode_get_voltage(struct regnode *regnode, int *uvolt)
+{
+   return (ENXIO);
+}
+
+static regnode_method_t axp81x_regnode_methods[] = {
+   /* Regulator interface */
+   REGNODEMETHOD(regnode_init, axp81x_regnode_init),
+   REGNODEMETHOD(regnode_enable,   axp81x_regnode_enable),
+   REGNODEMETHOD(regnode_set_voltage,  axp81x_regnode_set_voltage),
+   REGNODEMETHOD(regnode_get_voltage,  axp81x_regnode_get_voltage),
+   REGNODEMETHOD_END
+};
+DEFINE_CLASS_1(axp81x_regnode, axp81x_regnode_class, axp81x_regnode_methods,
+sizeof(struct axp81x_reg_sc), regnode_class);
+
 static void
 axp81x_shutdown(void *devp, int howto)
 {
@@ -417,6 +509,56 @@ axp81x_get_node(device_t dev, device_t b
return (ofw_bus_get_node(dev));
 }
 
+static struct axp81x_reg_sc *
+axp81x_reg_attach(device_t dev, phandle_t node,
+struct axp81x_regdef *def)
+{
+   struct axp81x_reg_sc *reg_sc;
+   struct regnode_init_def initdef;
+   struct regnode *regnode;
+
+   memset(, 0, sizeof(initdef));
+   regulator_parse_ofw_stdparam(dev, node, );
+   initdef.id = def->id;
+   initdef.ofw_node = node;
+   regnode = regnode_create(dev, _regnode_class, );
+   if (regnode == NULL) {
+   device_printf(dev, "cannot create regulator\n");
+   return (NULL);
+   }
+
+   reg_sc = regnode_get_softc(regnode);
+   reg_sc->regnode = regnode;
+   reg_sc->base_dev = dev;
+   reg_sc->def = def;
+   reg_sc->xref = OF_xref_from_node(node);
+   reg_sc->param = regnode_get_stdparam(regnode);
+
+   regnode_register(regnode);
+
+   return (reg_sc);
+}
+
+static int

svn commit: r304793 - head/sys/arm/allwinner

2016-08-25 Thread Jared McNeill 
Author: jmcneill
Date: Thu Aug 25 10:14:56 2016
New Revision: 304793
URL: https://svnweb.freebsd.org/changeset/base/304793

Log:
  Remove dependency on allwinner_soc_family() as it is not available on arm64.
  
  Reviewed by:  andrew, manu

Modified:
  head/sys/arm/allwinner/aw_rtc.c

Modified: head/sys/arm/allwinner/aw_rtc.c
==
--- head/sys/arm/allwinner/aw_rtc.c Thu Aug 25 09:16:25 2016
(r304792)
+++ head/sys/arm/allwinner/aw_rtc.c Thu Aug 25 10:14:56 2016
(r304793)
@@ -62,7 +62,7 @@ __FBSDID("$FreeBSD$");
 #defineLOSC_MAGIC  0x16aa
 #defineLOSC_BUSY_MASK  0x0380
 
-#defineIS_SUN7I(allwinner_soc_family() == 
ALLWINNERSOC_SUN7I)
+#defineIS_SUN7I(sc->type == A20_RTC)
 
 #defineYEAR_MIN(IS_SUN7I ? 1970 : 2010)
 #defineYEAR_MAX(IS_SUN7I ? 2100 : 2073)
@@ -108,6 +108,7 @@ static struct ofw_compat_data compat_dat
 
 struct aw_rtc_softc {
struct resource *res;
+   int type;
bus_size_t  rtc_date;
bus_size_t  rtc_time;
 };
@@ -169,8 +170,9 @@ aw_rtc_attach(device_t dev)
device_printf(dev, "could not allocate resources\n");
return (ENXIO);
}
-   
-   switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data) {
+
+   sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
+   switch (sc->type) {
case A10_RTC:
case A20_RTC:
sc->rtc_date = A10_RTC_DATE_REG;
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svn commit: r302939 - head/sys/arm/allwinner

2016-07-16 Thread Jared McNeill 
Author: jmcneill
Date: Sat Jul 16 18:06:41 2016
New Revision: 302939
URL: https://svnweb.freebsd.org/changeset/base/302939

Log:
  Add support for Allwinner H3 EMAC.
  
  H3 EMAC is the same as A83T/A64 except the SoC includes an (optional)
  internal 10/100 PHY. Both internal and external PHYs are supported on H3
  with this driver.

Modified:
  head/sys/arm/allwinner/if_awg.c

Modified: head/sys/arm/allwinner/if_awg.c
==
--- head/sys/arm/allwinner/if_awg.c Sat Jul 16 15:52:14 2016
(r302938)
+++ head/sys/arm/allwinner/if_awg.c Sat Jul 16 18:06:41 2016
(r302939)
@@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -69,9 +70,10 @@ __FBSDID("$FreeBSD$");
 #include 
 
 #include "miibus_if.h"
+#include "gpio_if.h"
 
-#defineRD4(sc, reg)bus_read_4((sc)->res[0], (reg))
-#defineWR4(sc, reg, val)   bus_write_4((sc)->res[0], (reg), (val))
+#defineRD4(sc, reg)bus_read_4((sc)->res[_RES_EMAC], (reg))
+#defineWR4(sc, reg, val)   bus_write_4((sc)->res[_RES_EMAC], 
(reg), (val))
 
 #defineAWG_LOCK(sc)mtx_lock(&(sc)->mtx)
 #defineAWG_UNLOCK(sc)  mtx_unlock(&(sc)->mtx);
@@ -101,6 +103,25 @@ __FBSDID("$FreeBSD$");
 #defineTX_INTERVAL_DEFAULT 64
 #defineRX_BATCH_DEFAULT64
 
+/* syscon EMAC clock register */
+#defineEMAC_CLK_EPHY_ADDR  (0x1f << 20)/* H3 */
+#defineEMAC_CLK_EPHY_ADDR_SHIFT 20
+#defineEMAC_CLK_EPHY_LED_POL   (1 << 17)   /* H3 */
+#defineEMAC_CLK_EPHY_SHUTDOWN  (1 << 16)   /* H3 */
+#defineEMAC_CLK_EPHY_SELECT(1 << 15)   /* H3 */
+#defineEMAC_CLK_RMII_EN(1 << 13)
+#defineEMAC_CLK_ETXDC  (0x7 << 10)
+#defineEMAC_CLK_ETXDC_SHIFT10
+#defineEMAC_CLK_ERXDC  (0x1f << 5)
+#defineEMAC_CLK_ERXDC_SHIFT5
+#defineEMAC_CLK_PIT(0x1 << 2)
+#define EMAC_CLK_PIT_MII   (0 << 2)
+#define EMAC_CLK_PIT_RGMII (1 << 2)
+#defineEMAC_CLK_SRC(0x3 << 0)
+#define EMAC_CLK_SRC_MII   (0 << 0)
+#define EMAC_CLK_SRC_EXT_RGMII (1 << 0)
+#define EMAC_CLK_SRC_RGMII (2 << 0)
+
 /* Burst length of RX and TX DMA transfers */
 static int awg_burst_len = BURST_LEN_DEFAULT;
 TUNABLE_INT("hw.awg.burst_len", _burst_len);
@@ -121,8 +142,14 @@ TUNABLE_INT("hw.awg.tx_interval", _t
 static int awg_rx_batch = RX_BATCH_DEFAULT;
 TUNABLE_INT("hw.awg.rx_batch", _rx_batch);
 
+enum awg_type {
+   EMAC_A83T = 1,
+   EMAC_H3,
+};
+
 static struct ofw_compat_data compat_data[] = {
-   { "allwinner,sun8i-a83t-emac",  1 },
+   { "allwinner,sun8i-a83t-emac",  EMAC_A83T },
+   { "allwinner,sun8i-h3-emac",EMAC_H3 },
{ NULL, 0 }
 };
 
@@ -151,8 +178,15 @@ struct awg_rxring {
u_int   cur;
 };
 
+enum {
+   _RES_EMAC,
+   _RES_IRQ,
+   _RES_SYSCON,
+   _RES_NITEMS
+};
+
 struct awg_softc {
-   struct resource *res[2];
+   struct resource *res[_RES_NITEMS];
struct mtx  mtx;
if_tifp;
device_tmiibus;
@@ -162,6 +196,7 @@ struct awg_softc {
u_int   mdc_div_ratio_m;
int link;
int if_flags;
+   enum awg_type   type;
 
struct awg_txring   tx;
struct awg_rxring   rx;
@@ -170,6 +205,7 @@ struct awg_softc {
 static struct resource_spec awg_spec[] = {
{ SYS_RES_MEMORY,   0,  RF_ACTIVE },
{ SYS_RES_IRQ,  0,  RF_ACTIVE },
+   { SYS_RES_MEMORY,   1,  RF_ACTIVE | RF_OPTIONAL },
{ -1, 0 }
 };
 
@@ -1016,49 +1052,73 @@ awg_ioctl(if_t ifp, u_long cmd, caddr_t 
 }
 
 static int
-awg_setup_extres(device_t dev)
+awg_setup_phy(device_t dev)
 {
struct awg_softc *sc;
-   hwreset_t rst_ahb;
-   clk_t clk_ahb, clk_tx, clk_tx_parent;
-   regulator_t reg;
+   clk_t clk_tx, clk_tx_parent;
const char *tx_parent_name;
char *phy_type;
phandle_t node;
-   uint64_t freq;
-   int error, div;
+   uint32_t reg, tx_delay, rx_delay;
+   int error;
 
sc = device_get_softc(dev);
node = ofw_bus_get_node(dev);
-   rst_ahb = NULL;
-   clk_ahb = NULL;
-   clk_tx = NULL;
-   clk_tx_parent = NULL;
-   reg = NULL;
-   phy_type = NULL;
 
-   /* Get AHB clock and reset resources */
-   error = hwreset_get_by_ofw_name(dev, 0, "ahb", _ahb);
-   if (error != 0) {
-   device_printf(dev, "cannot get ahb reset\n");
-   goto fail;
-   }
-   error = clk_get_by_ofw_name(dev, 0, "ahb",

svn commit: r302786 - head/sys/arm/allwinner

2016-07-13 Thread Jared McNeill 
Author: jmcneill
Date: Wed Jul 13 20:46:54 2016
New Revision: 302786
URL: https://svnweb.freebsd.org/changeset/base/302786

Log:
  Allwinner Gigabit EMAC performance improvements.
  
   - Support DEVICE_POLLING
   - Increase TX descriptors to 1024
   - Add support for passing a chain of mbufs to if_input, reducing the
 number of calls to mtx_unlock/mtx_lock under load.
   - Remove duplicate byteswap when setting TX_INT_CTL in TX descriptor.
   - Set undocumented "TX_NEXT_FRAME" bit in TX control 1 register.
 According to the A83T BSP, setting this bit allows the DMA engine to
 operate on a packet while receiving another.
  
  Tested on A83T (1000Mbps PHY) and H3 (100Mbps PHY).
  
  Reviewed by:  manu
  Differential Revision:https://reviews.freebsd.org/D7031

Modified:
  head/sys/arm/allwinner/if_awg.c
  head/sys/arm/allwinner/if_awgreg.h

Modified: head/sys/arm/allwinner/if_awg.c
==
--- head/sys/arm/allwinner/if_awg.c Wed Jul 13 20:44:02 2016
(r302785)
+++ head/sys/arm/allwinner/if_awg.c Wed Jul 13 20:46:54 2016
(r302786)
@@ -30,6 +30,8 @@
  * Allwinner Gigabit Ethernet MAC (EMAC) controller
  */
 
+#include "opt_device_polling.h"
+
 #include 
 __FBSDID("$FreeBSD$");
 
@@ -77,7 +79,7 @@ __FBSDID("$FreeBSD$");
 #defineAWG_ASSERT_UNLOCKED(sc) mtx_assert(&(sc)->mtx, MA_NOTOWNED)
 
 #defineDESC_ALIGN  4
-#defineTX_DESC_COUNT   256
+#defineTX_DESC_COUNT   1024
 #defineTX_DESC_SIZE(sizeof(struct emac_desc) * 
TX_DESC_COUNT)
 #defineRX_DESC_COUNT   256
 #defineRX_DESC_SIZE(sizeof(struct emac_desc) * 
RX_DESC_COUNT)
@@ -97,6 +99,7 @@ __FBSDID("$FreeBSD$");
 #defineRX_TX_PRI_DEFAULT   0
 #definePAUSE_TIME_DEFAULT  0x400
 #defineTX_INTERVAL_DEFAULT 64
+#defineRX_BATCH_DEFAULT64
 
 /* Burst length of RX and TX DMA transfers */
 static int awg_burst_len = BURST_LEN_DEFAULT;
@@ -114,6 +117,10 @@ TUNABLE_INT("hw.awg.pause_time", _pa
 static int awg_tx_interval = TX_INTERVAL_DEFAULT;
 TUNABLE_INT("hw.awg.tx_interval", _tx_interval);
 
+/* Maximum number of mbufs to send to if_input */
+static int awg_rx_batch = RX_BATCH_DEFAULT;
+TUNABLE_INT("hw.awg.rx_batch", _rx_batch);
+
 static struct ofw_compat_data compat_data[] = {
{ "allwinner,sun8i-a83t-emac",  1 },
{ NULL, 0 }
@@ -353,7 +360,7 @@ awg_setup_txdesc(struct awg_softc *sc, i
status = TX_DESC_CTL;
size = flags | len;
if ((index & (awg_tx_interval - 1)) == 0)
-   size |= htole32(TX_INT_CTL);
+   size |= TX_INT_CTL;
++sc->tx.queued;
}
 
@@ -617,6 +624,20 @@ awg_setup_rxfilter(struct awg_softc *sc)
 }
 
 static void
+awg_enable_intr(struct awg_softc *sc)
+{
+   /* Enable interrupts */
+   WR4(sc, EMAC_INT_EN, RX_INT_EN | TX_INT_EN | TX_BUF_UA_INT_EN);
+}
+
+static void
+awg_disable_intr(struct awg_softc *sc)
+{
+   /* Disable interrupts */
+   WR4(sc, EMAC_INT_EN, 0);
+}
+
+static void
 awg_init_locked(struct awg_softc *sc)
 {
struct mii_data *mii;
@@ -640,11 +661,18 @@ awg_init_locked(struct awg_softc *sc)
WR4(sc, EMAC_BASIC_CTL_1, val);
 
/* Enable interrupts */
-   WR4(sc, EMAC_INT_EN, RX_INT_EN | TX_INT_EN | TX_BUF_UA_INT_EN);
+#ifdef DEVICE_POLLING
+   if ((if_getcapenable(ifp) & IFCAP_POLLING) == 0)
+   awg_enable_intr(sc);
+   else
+   awg_disable_intr(sc);
+#else
+   awg_enable_intr(sc);
+#endif
 
/* Enable transmit DMA */
val = RD4(sc, EMAC_TX_CTL_1);
-   WR4(sc, EMAC_TX_CTL_1, val | TX_DMA_EN | TX_MD);
+   WR4(sc, EMAC_TX_CTL_1, val | TX_DMA_EN | TX_MD | TX_NEXT_FRAME);
 
/* Enable receive DMA */
val = RD4(sc, EMAC_RX_CTL_1);
@@ -703,7 +731,7 @@ awg_stop(struct awg_softc *sc)
WR4(sc, EMAC_RX_CTL_0, val & ~RX_EN);
 
/* Disable interrupts */
-   WR4(sc, EMAC_INT_EN, 0);
+   awg_disable_intr(sc);
 
/* Disable transmit DMA */
val = RD4(sc, EMAC_TX_CTL_1);
@@ -718,15 +746,18 @@ awg_stop(struct awg_softc *sc)
if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
 }
 
-static void
+static int
 awg_rxintr(struct awg_softc *sc)
 {
if_t ifp;
-   struct mbuf *m, *m0;
-   int error, index, len;
+   struct mbuf *m, *m0, *mh, *mt;
+   int error, index, len, cnt, npkt;
uint32_t status;
 
ifp = sc->ifp;
+   mh = mt = NULL;
+   cnt = 0;
+   npkt = 0;
 
bus_dmamap_sync(sc->rx.desc_tag, sc->rx.desc_map,
BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
@@ -760,9 +791,23 @@ awg_rxintr(struct awg_softc *sc)
}
}
 
-

svn commit: r302785 - head/sys/arm/allwinner/clk

2016-07-13 Thread Jared McNeill 
Author: jmcneill
Date: Wed Jul 13 20:44:02 2016
New Revision: 302785
URL: https://svnweb.freebsd.org/changeset/base/302785

Log:
  H3/A83T: Use PLL_PERIPH/2 for AHB2 parent clock.
  
  Reviewed by:  manu

Modified:
  head/sys/arm/allwinner/clk/aw_ahbclk.c

Modified: head/sys/arm/allwinner/clk/aw_ahbclk.c
==
--- head/sys/arm/allwinner/clk/aw_ahbclk.c  Wed Jul 13 19:41:19 2016
(r302784)
+++ head/sys/arm/allwinner/clk/aw_ahbclk.c  Wed Jul 13 20:44:02 2016
(r302785)
@@ -140,10 +140,14 @@ aw_ahbclk_init(struct clknode *clk, devi
A83T_AHB1_CLK_SRC_SEL_SHIFT;
break;
case AW_H3_AHB2:
+   /* Set source to PLL_PERIPH/2 */
+   index = H3_AHB2_CLK_CFG_PLL_PERIPH_DIV2;
DEVICE_LOCK(sc);
AHBCLK_READ(sc, );
+   val &= ~H3_AHB2_CLK_CFG;
+   val |= (index << H3_AHB2_CLK_CFG_SHIFT);
+   AHBCLK_WRITE(sc, val);
DEVICE_UNLOCK(sc);
-   index = (val & H3_AHB2_CLK_CFG) >> H3_AHB2_CLK_CFG_SHIFT;
break;
default:
return (ENXIO);
@@ -189,12 +193,7 @@ aw_ahbclk_recalc_freq(struct clknode *cl
pre_div = 1;
break;
case AW_H3_AHB2:
-   src_sel = (val & H3_AHB2_CLK_CFG) >> H3_AHB2_CLK_CFG_SHIFT;
-   if (src_sel == H3_AHB2_CLK_CFG_PLL_PERIPH_DIV2)
-   div = 2;
-   else
-   div = 1;
-   pre_div = 1;
+   div = pre_div = 1;
break;
default:
div = 1 << ((val & A10_AHB_CLK_DIV_RATIO) >>
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svn commit: r302593 - head/sys/arm/allwinner

2016-07-11 Thread Jared McNeill 
Author: jmcneill
Date: Mon Jul 11 20:15:46 2016
New Revision: 302593
URL: https://svnweb.freebsd.org/changeset/base/302593

Log:
  Add support for Allwinner A64.
  
  Reviewed by:  andrew, manu

Modified:
  head/sys/arm/allwinner/aw_ccu.c

Modified: head/sys/arm/allwinner/aw_ccu.c
==
--- head/sys/arm/allwinner/aw_ccu.c Mon Jul 11 20:14:50 2016
(r302592)
+++ head/sys/arm/allwinner/aw_ccu.c Mon Jul 11 20:15:46 2016
(r302593)
@@ -80,6 +80,7 @@ static struct ofw_compat_data compat_dat
{ "allwinner,sun7i-a20",CLOCK_CCU },
{ "allwinner,sun6i-a31",CLOCK_CCU },
{ "allwinner,sun6i-a31s",   CLOCK_CCU },
+   { "allwinner,sun50i-a64",   CLOCK_CCU },
{ "allwinner,sun8i-a83t",   CLOCK_CCU|CLOCK_PRCM|CLOCK_SYSCTRL },
{ "allwinner,sun8i-h3", CLOCK_CCU },
{ NULL, 0 }
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svn commit: r302592 - head/sys/arm/allwinner

2016-07-11 Thread Jared McNeill 
Author: jmcneill
Date: Mon Jul 11 20:14:50 2016
New Revision: 302592
URL: https://svnweb.freebsd.org/changeset/base/302592

Log:
  Return early from bus_dmamap_load callback if the error indicator is set.
  
  Reviewed by:  andrew, manu

Modified:
  head/sys/arm/allwinner/a10_mmc.c

Modified: head/sys/arm/allwinner/a10_mmc.c
==
--- head/sys/arm/allwinner/a10_mmc.cMon Jul 11 20:13:46 2016
(r302591)
+++ head/sys/arm/allwinner/a10_mmc.cMon Jul 11 20:14:50 2016
(r302592)
@@ -364,6 +364,10 @@ a10_dma_cb(void *arg, bus_dma_segment_t 
 
sc = (struct a10_mmc_softc *)arg;
sc->a10_dma_map_err = err;
+
+   if (err)
+   return;
+
dma_desc = sc->a10_dma_desc;
/* Note nsegs is guaranteed to be zero if err is non-zero. */
for (i = 0; i < nsegs; i++) {
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svn commit: r302591 - head/sys/arm/allwinner

2016-07-11 Thread Jared McNeill 
Author: jmcneill
Date: Mon Jul 11 20:13:46 2016
New Revision: 302591
URL: https://svnweb.freebsd.org/changeset/base/302591

Log:
  Add support for arm64. The allwinner_soc_family() function is not available
  on arm64 and all SoCs using the old FIFO register location are 32-bit only,
  so unconditionally use the new location for arm64.
  
  Reviewed by:  andrew, manu

Modified:
  head/sys/arm/allwinner/a10_mmc.c

Modified: head/sys/arm/allwinner/a10_mmc.c
==
--- head/sys/arm/allwinner/a10_mmc.cMon Jul 11 20:09:17 2016
(r302590)
+++ head/sys/arm/allwinner/a10_mmc.cMon Jul 11 20:13:46 2016
(r302591)
@@ -182,6 +182,7 @@ a10_mmc_attach(device_t dev)
MTX_DEF);
callout_init_mtx(>a10_timeoutc, >a10_mtx, 0);
 
+#if defined(__arm__)
/*
 * Later chips use a different FIFO offset. Unfortunately the FDT
 * uses the same compatible string for old and new implementations.
@@ -196,6 +197,9 @@ a10_mmc_attach(device_t dev)
sc->a10_fifo_reg = A31_MMC_FIFO;
break;
}
+#else /* __aarch64__ */
+   sc->a10_fifo_reg = A31_MMC_FIFO;
+#endif
 
/* De-assert reset */
if (hwreset_get_by_ofw_name(dev, 0, "ahb", >a10_rst_ahb) == 0) {
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svn commit: r302590 - head/sys/arm/allwinner

2016-07-11 Thread Jared McNeill 
Author: jmcneill
Date: Mon Jul 11 20:09:17 2016
New Revision: 302590
URL: https://svnweb.freebsd.org/changeset/base/302590

Log:
  Add support for Allwinner A64 CPUx-PORT and CPUs-PORT Port Controllers.
  
  Reviewed by:  andrew, manu

Modified:
  head/sys/arm/allwinner/a10_gpio.c

Modified: head/sys/arm/allwinner/a10_gpio.c
==
--- head/sys/arm/allwinner/a10_gpio.c   Mon Jul 11 20:06:21 2016
(r302589)
+++ head/sys/arm/allwinner/a10_gpio.c   Mon Jul 11 20:09:17 2016
(r302590)
@@ -57,6 +57,10 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#if defined(__aarch64__)
+#include "opt_soc.h"
+#endif
+
 #include "gpio_if.h"
 
 #defineA10_GPIO_DEFAULT_CAPS   (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | 
\
@@ -116,6 +120,12 @@ extern const struct allwinner_padconf a8
 extern const struct allwinner_padconf a83t_r_padconf;
 #endif
 
+/* Defined in a64_padconf.c */
+#ifdef SOC_ALLWINNER_A64
+extern const struct allwinner_padconf a64_padconf;
+extern const struct allwinner_padconf a64_r_padconf;
+#endif
+
 static struct ofw_compat_data compat_data[] = {
 #ifdef SOC_ALLWINNER_A10
{"allwinner,sun4i-a10-pinctrl", (uintptr_t)_padconf},
@@ -143,6 +153,10 @@ static struct ofw_compat_data compat_dat
{"allwinner,sun8i-h3-pinctrl",  (uintptr_t)_padconf},
{"allwinner,sun8i-h3-r-pinctrl",(uintptr_t)_r_padconf},
 #endif
+#ifdef SOC_ALLWINNER_A64
+   {"allwinner,sun50i-a64-pinctrl",(uintptr_t)_padconf},
+   {"allwinner,sun50i-a64-r-pinctrl",  (uintptr_t)_r_padconf},
+#endif
{NULL,  0}
 };
 
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svn commit: r302589 - head/sys/arm/allwinner/a64

2016-07-11 Thread Jared McNeill 
Author: jmcneill
Date: Mon Jul 11 20:06:21 2016
New Revision: 302589
URL: https://svnweb.freebsd.org/changeset/base/302589

Log:
  Add Allwinner A64 padconf settings.
  
  Reviewed by:  andrew, manu

Added:
  head/sys/arm/allwinner/a64/
  head/sys/arm/allwinner/a64/a64_padconf.c   (contents, props changed)
  head/sys/arm/allwinner/a64/a64_r_padconf.c   (contents, props changed)

Added: head/sys/arm/allwinner/a64/a64_padconf.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/allwinner/a64/a64_padconf.cMon Jul 11 20:06:21 2016
(r302589)
@@ -0,0 +1,160 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "opt_soc.h"
+
+#ifdef SOC_ALLWINNER_A64
+
+static const struct allwinner_pins a64_pins[] = {
+   { "PB0",  1, 0,   { "gpio_in", "gpio_out", "uart2", NULL, "jtag", NULL, 
"eint" } },
+   { "PB1",  1, 1,   { "gpio_in", "gpio_out", "uart2", NULL, "jtag", 
"sim", "eint" } },
+   { "PB2",  1, 2,   { "gpio_in", "gpio_out", "uart2", NULL, "jtag", 
"sim", "eint" } },
+   { "PB3",  1, 3,   { "gpio_in", "gpio_out", "uart2", "i2s0", "jtag", 
"sim", "eint" } },
+   { "PB4",  1, 4,   { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", 
"eint" } },
+   { "PB5",  1, 5,   { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", 
"eint" } },
+   { "PB6",  1, 6,   { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", 
"eint" } },
+   { "PB7",  1, 7,   { "gpio_in", "gpio_out", "aif2", "pcm0", NULL, "sim", 
"eint" } },
+   { "PB8",  1, 8,   { "gpio_in", "gpio_out", NULL, NULL, "uart0", NULL, 
"eint" } },
+   { "PB9",  1, 9,   { "gpio_in", "gpio_out", NULL, NULL, "uart0", NULL, 
"eint" } },
+
+   { "PC0",  2, 0,   { "gpio_in", "gpio_out", "nand", NULL, "spi0" } },
+   { "PC1",  2, 1,   { "gpio_in", "gpio_out", "nand", "mmc2", "spi0" } },
+   { "PC2",  2, 2,   { "gpio_in", "gpio_out", "nand", NULL, "spi0" } },
+   { "PC3",  2, 3,   { "gpio_in", "gpio_out", "nand", NULL, "spi0" } },
+   { "PC4",  2, 4,   { "gpio_in", "gpio_out", "nand" } },
+   { "PC5",  2, 5,   { "gpio_in", "gpio_out", "nand", "mmc2" } },
+   { "PC6",  2, 6,   { "gpio_in", "gpio_out", "nand", "mmc2" } },
+   { "PC7",  2, 7,   { "gpio_in", "gpio_out", "nand" } },
+   { "PC8",  2, 8,   { "gpio_in", "gpio_out", "nand", "mmc2" } },
+

svn commit: r302588 - head/sys/conf

2016-07-11 Thread Jared McNeill 
Author: jmcneill
Date: Mon Jul 11 20:05:03 2016
New Revision: 302588
URL: https://svnweb.freebsd.org/changeset/base/302588

Log:
  Add SOC_ALLWINNER_A64 option for Allwinner A64 (sun50i) SoCs.

Modified:
  head/sys/conf/options.arm64

Modified: head/sys/conf/options.arm64
==
--- head/sys/conf/options.arm64 Mon Jul 11 20:03:31 2016(r302587)
+++ head/sys/conf/options.arm64 Mon Jul 11 20:05:03 2016(r302588)
@@ -8,5 +8,6 @@ THUNDERX_PASS_1_1_ERRATAopt_global.h
 VFPopt_global.h
 
 # SoC Support
+SOC_ALLWINNER_A64  opt_soc.h
 SOC_CAVM_THUNDERX  opt_soc.h
 SOC_HISI_HI6220opt_soc.h
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svn commit: r302587 - head/sys/arm/allwinner

2016-07-11 Thread Jared McNeill 
Author: jmcneill
Date: Mon Jul 11 20:03:31 2016
New Revision: 302587
URL: https://svnweb.freebsd.org/changeset/base/302587

Log:
  Include sys/rman.h to fix build on arm64.

Modified:
  head/sys/arm/allwinner/aw_nmi.c

Modified: head/sys/arm/allwinner/aw_nmi.c
==
--- head/sys/arm/allwinner/aw_nmi.c Mon Jul 11 20:02:51 2016
(r302586)
+++ head/sys/arm/allwinner/aw_nmi.c Mon Jul 11 20:03:31 2016
(r302587)
@@ -35,6 +35,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
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svn commit: r302586 - head/sys/arm/allwinner

2016-07-11 Thread Jared McNeill 
Author: jmcneill
Date: Mon Jul 11 20:02:51 2016
New Revision: 302586
URL: https://svnweb.freebsd.org/changeset/base/302586

Log:
  Attach RSB early. Children of RSB may provide resources necessary for
  other devices such as interrupts, GPIOs, and regulators.

Modified:
  head/sys/arm/allwinner/aw_rsb.c

Modified: head/sys/arm/allwinner/aw_rsb.c
==
--- head/sys/arm/allwinner/aw_rsb.c Mon Jul 11 20:00:57 2016
(r302585)
+++ head/sys/arm/allwinner/aw_rsb.c Mon Jul 11 20:02:51 2016
(r302586)
@@ -472,6 +472,8 @@ static driver_t rsb_driver = {
 
 static devclass_t rsb_devclass;
 
-DRIVER_MODULE(iicbus, rsb, iicbus_driver, iicbus_devclass, 0, 0);
-DRIVER_MODULE(rsb, simplebus, rsb_driver, rsb_devclass, 0, 0);
+EARLY_DRIVER_MODULE(iicbus, rsb, iicbus_driver, iicbus_devclass, 0, 0,
+BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE);
+EARLY_DRIVER_MODULE(rsb, simplebus, rsb_driver, rsb_devclass, 0, 0,
+BUS_PASS_RESOURCE + BUS_PASS_ORDER_MIDDLE);
 MODULE_VERSION(rsb, 1);
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svn commit: r302585 - head/sys/arm/allwinner

2016-07-11 Thread Jared McNeill 
Author: jmcneill
Date: Mon Jul 11 20:00:57 2016
New Revision: 302585
URL: https://svnweb.freebsd.org/changeset/base/302585

Log:
  Build fix for arm64. The phy interface uses intptr_t for the "phy"
  parameter, not int.

Modified:
  head/sys/arm/allwinner/aw_usbphy.c

Modified: head/sys/arm/allwinner/aw_usbphy.c
==
--- head/sys/arm/allwinner/aw_usbphy.c  Mon Jul 11 19:58:00 2016
(r302584)
+++ head/sys/arm/allwinner/aw_usbphy.c  Mon Jul 11 20:00:57 2016
(r302585)
@@ -148,7 +148,7 @@ awusbphy_vbus_detect(device_t dev, int *
 }
 
 static int
-awusbphy_phy_enable(device_t dev, int phy, bool enable)
+awusbphy_phy_enable(device_t dev, intptr_t phy, bool enable)
 {
struct awusbphy_softc *sc;
regulator_t reg;
@@ -177,8 +177,9 @@ awusbphy_phy_enable(device_t dev, int ph
} else
error = regulator_disable(reg);
if (error != 0) {
-   device_printf(dev, "couldn't %s regulator for phy %d\n",
-   enable ? "enable" : "disable", phy);
+   device_printf(dev,
+   "couldn't %s regulator for phy %jd\n",
+   enable ? "enable" : "disable", (intmax_t)phy);
return (error);
}
 
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svn commit: r302584 - head/sys/arm/allwinner

2016-07-11 Thread Jared McNeill 
Author: jmcneill
Date: Mon Jul 11 19:58:00 2016
New Revision: 302584
URL: https://svnweb.freebsd.org/changeset/base/302584

Log:
  Remove unused bus_space prototypes.

Modified:
  head/sys/arm/allwinner/a10_ehci.c

Modified: head/sys/arm/allwinner/a10_ehci.c
==
--- head/sys/arm/allwinner/a10_ehci.c   Mon Jul 11 17:31:30 2016
(r302583)
+++ head/sys/arm/allwinner/a10_ehci.c   Mon Jul 11 19:58:00 2016
(r302584)
@@ -88,9 +88,6 @@ __FBSDID("$FreeBSD$");
 static device_attach_t a10_ehci_attach;
 static device_detach_t a10_ehci_detach;
 
-bs_r_1_proto(reversed);
-bs_w_1_proto(reversed);
-
 struct aw_ehci_softc {
ehci_softc_tsc;
clk_t   clk;
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svn commit: r302523 - head/sys/dev/extres/clk

2016-07-10 Thread Jared McNeill 
Author: jmcneill
Date: Sun Jul 10 10:53:50 2016
New Revision: 302523
URL: https://svnweb.freebsd.org/changeset/base/302523

Log:
  Add clk_get_by_ofw_node_index, which is like clk_get_by_ofw_index but
  operates on a specific OF node instead of the pass in device's OF node.
  
  Reviewed by:  andrew, mmel
  Differential Revision:https://reviews.freebsd.org/D6957

Modified:
  head/sys/dev/extres/clk/clk.c
  head/sys/dev/extres/clk/clk.h

Modified: head/sys/dev/extres/clk/clk.c
==
--- head/sys/dev/extres/clk/clk.c   Sun Jul 10 10:38:28 2016
(r302522)
+++ head/sys/dev/extres/clk/clk.c   Sun Jul 10 10:53:50 2016
(r302523)
@@ -1198,13 +1198,7 @@ clk_get_by_id(device_t dev, struct clkdo
 int
 clk_get_by_ofw_index(device_t dev, int idx, clk_t *clk)
 {
-   phandle_t cnode, parent, *cells;
-   device_t clockdev;
-   int ncells, rv;
-   struct clkdom *clkdom;
-   struct clknode *clknode;
-
-   *clk = NULL;
+   phandle_t cnode;
 
cnode = ofw_bus_get_node(dev);
if (cnode <= 0) {
@@ -1213,6 +1207,20 @@ clk_get_by_ofw_index(device_t dev, int i
return (ENXIO);
}
 
+   return (clk_get_by_ofw_node_index(dev, cnode, idx, clk));
+}
+
+int
+clk_get_by_ofw_node_index(device_t dev, phandle_t cnode, int idx, clk_t *clk)
+{
+   phandle_t parent, *cells;
+   device_t clockdev;
+   int ncells, rv;
+   struct clkdom *clkdom;
+   struct clknode *clknode;
+
+   *clk = NULL;
+
rv = ofw_bus_parse_xref_list_alloc(cnode, "clocks", "#clock-cells", idx,
, , );
if (rv != 0) {

Modified: head/sys/dev/extres/clk/clk.h
==
--- head/sys/dev/extres/clk/clk.h   Sun Jul 10 10:38:28 2016
(r302522)
+++ head/sys/dev/extres/clk/clk.h   Sun Jul 10 10:53:50 2016
(r302523)
@@ -131,6 +131,8 @@ const char *clk_get_name(clk_t clk);
 #ifdef FDT
 int clk_get_by_ofw_index(device_t dev, int idx, clk_t *clk);
 int clk_get_by_ofw_name(device_t dev, const char *name, clk_t *clk);
+int clk_get_by_ofw_node_index(device_t dev, phandle_t node, int idx,
+clk_t *clk);
 int clk_parse_ofw_out_names(device_t dev, phandle_t node,
 const char ***out_names, uint32_t **indices);
 int clk_parse_ofw_clk_name(device_t dev, phandle_t node, const char **name);
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svn commit: r302522 - head/sys/arm/allwinner

2016-07-10 Thread Jared McNeill 
Author: jmcneill
Date: Sun Jul 10 10:38:28 2016
New Revision: 302522
URL: https://svnweb.freebsd.org/changeset/base/302522

Log:
  Align descriptors and data buffers to 32 bits. This restriction is
  described in the A20 (and later) user manuals.

Modified:
  head/sys/arm/allwinner/a10_mmc.c
  head/sys/arm/allwinner/a10_mmc.h

Modified: head/sys/arm/allwinner/a10_mmc.c
==
--- head/sys/arm/allwinner/a10_mmc.cSun Jul 10 10:21:22 2016
(r302521)
+++ head/sys/arm/allwinner/a10_mmc.cSun Jul 10 10:38:28 2016
(r302522)
@@ -316,7 +316,8 @@ a10_mmc_setup_dma(struct a10_mmc_softc *
 
/* Allocate the DMA descriptor memory. */
dma_desc_size = sizeof(struct a10_mmc_dma_desc) * A10_MMC_DMA_SEGS;
-   error = bus_dma_tag_create(bus_get_dma_tag(sc->a10_dev), 1, 0,
+   error = bus_dma_tag_create(bus_get_dma_tag(sc->a10_dev),
+   A10_MMC_DMA_ALIGN, 0,
BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
dma_desc_size, 1, dma_desc_size, 0, NULL, NULL, >a10_dma_tag);
if (error)
@@ -334,7 +335,8 @@ a10_mmc_setup_dma(struct a10_mmc_softc *
return (sc->a10_dma_map_err);
 
/* Create the DMA map for data transfers. */
-   error = bus_dma_tag_create(bus_get_dma_tag(sc->a10_dev), 1, 0,
+   error = bus_dma_tag_create(bus_get_dma_tag(sc->a10_dev),
+   A10_MMC_DMA_ALIGN, 0,
BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
A10_MMC_DMA_MAX_SIZE * A10_MMC_DMA_SEGS, A10_MMC_DMA_SEGS,
A10_MMC_DMA_MAX_SIZE, BUS_DMA_ALLOCNOW, NULL, NULL,

Modified: head/sys/arm/allwinner/a10_mmc.h
==
--- head/sys/arm/allwinner/a10_mmc.hSun Jul 10 10:21:22 2016
(r302521)
+++ head/sys/arm/allwinner/a10_mmc.hSun Jul 10 10:38:28 2016
(r302522)
@@ -196,4 +196,7 @@ struct a10_mmc_dma_desc {
uint32_t next;
 };
 
+/* DMA descriptors and data buffers must be aligned to 32-bits */
+#defineA10_MMC_DMA_ALIGN   4
+
 #endif /* _A10_MMC_H_ */
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svn commit: r302521 - head/sys/arm/allwinner

2016-07-10 Thread Jared McNeill 
Author: jmcneill
Date: Sun Jul 10 10:21:22 2016
New Revision: 302521
URL: https://svnweb.freebsd.org/changeset/base/302521

Log:
  In the absence of a bus-width property, default to 4-bit bus width instead
  of 1-bit.

Modified:
  head/sys/arm/allwinner/a10_mmc.c

Modified: head/sys/arm/allwinner/a10_mmc.c
==
--- head/sys/arm/allwinner/a10_mmc.cSun Jul 10 10:17:38 2016
(r302520)
+++ head/sys/arm/allwinner/a10_mmc.cSun Jul 10 10:21:22 2016
(r302521)
@@ -255,7 +255,7 @@ a10_mmc_attach(device_t dev)
a10_mmc_pio_mode ? "disabled" : "enabled");
 
if (OF_getencprop(node, "bus-width", _width, sizeof(uint32_t)) <= 0)
-   bus_width = 1;
+   bus_width = 4;
 
sc->a10_host.f_min = 40;
sc->a10_host.f_max = 5000;
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svn commit: r301841 - head/sys/dev/dwc

2016-06-12 Thread Jared McNeill 
Author: jmcneill
Date: Sun Jun 12 22:55:50 2016
New Revision: 301841
URL: https://svnweb.freebsd.org/changeset/base/301841

Log:
  Fix an issue with multicast hash filters on Amlogic and Allwinner boards.
  
  For DWC_GMAC_ALT_DESC implementations, the multicast hash table has only
  64 entries. Instead of 8 registers starting at 0x500, a pair of registers
  at 0x08 and 0x0c are used instead.
  
  Approved by:  re (hrs)
  Submitted by: Guy Yur 

Modified:
  head/sys/dev/dwc/if_dwc.c
  head/sys/dev/dwc/if_dwc.h

Modified: head/sys/dev/dwc/if_dwc.c
==
--- head/sys/dev/dwc/if_dwc.c   Sun Jun 12 15:37:35 2016(r301840)
+++ head/sys/dev/dwc/if_dwc.c   Sun Jun 12 22:55:50 2016(r301841)
@@ -587,14 +587,13 @@ dwc_setup_rxfilter(struct dwc_softc *sc)
struct ifmultiaddr *ifma;
struct ifnet *ifp;
uint8_t *eaddr, val;
-   uint32_t crc, ffval, hashbit, hashreg, hi, lo, hash[8], hmask;
+   uint32_t crc, ffval, hashbit, hashreg, hi, lo, hash[8];
int nhash, i;
 
DWC_ASSERT_LOCKED(sc);
 
ifp = sc->ifp;
nhash = sc->mactype == DWC_GMAC_ALT_DESC ? 2 : 8;
-   hmask = ((nhash << 5) - 1) | 0xf;
 
/*
 * Set the multicast (group) filter hash.
@@ -615,11 +614,10 @@ dwc_setup_rxfilter(struct dwc_softc *sc)
ifma->ifma_addr), ETHER_ADDR_LEN);
 
/* Take lower 8 bits and reverse it */
-   val = bitreverse(~crc & 0xff) & hmask;
+   val = bitreverse(~crc & 0xff);
if (sc->mactype == DWC_GMAC_ALT_DESC)
-   hashreg = (val >> 5) == 0;
-   else
-   hashreg = (val >> 5);
+   val >>= nhash; /* Only need lower 6 bits */
+   hashreg = (val >> 5);
hashbit = (val & 31);
hash[hashreg] |= (1 << hashbit);
}
@@ -642,8 +640,13 @@ dwc_setup_rxfilter(struct dwc_softc *sc)
WRITE4(sc, MAC_ADDRESS_LOW(0), lo);
WRITE4(sc, MAC_ADDRESS_HIGH(0), hi);
WRITE4(sc, MAC_FRAME_FILTER, ffval);
-   for (i = 0; i < nhash; i++)
-   WRITE4(sc, HASH_TABLE_REG(i), hash[i]);
+   if (sc->mactype == DWC_GMAC_ALT_DESC) {
+   WRITE4(sc, GMAC_MAC_HTLOW, hash[0]);
+   WRITE4(sc, GMAC_MAC_HTHIGH, hash[1]);
+   } else {
+   for (i = 0; i < nhash; i++)
+   WRITE4(sc, HASH_TABLE_REG(i), hash[i]);
+   }
 }
 
 static int

Modified: head/sys/dev/dwc/if_dwc.h
==
--- head/sys/dev/dwc/if_dwc.h   Sun Jun 12 15:37:35 2016(r301840)
+++ head/sys/dev/dwc/if_dwc.h   Sun Jun 12 22:55:50 2016(r301841)
@@ -53,6 +53,8 @@
 #define FRAME_FILTER_HMC   (1 << 2)
 #define FRAME_FILTER_HUC   (1 << 1)
 #define FRAME_FILTER_PR(1 << 0)/* All Incoming Frames 
*/
+#defineGMAC_MAC_HTHIGH 0x08
+#defineGMAC_MAC_HTLOW  0x0c
 #defineGMII_ADDRESS0x10
 #define GMII_ADDRESS_PA_MASK   0x1f/* Phy device */
 #define GMII_ADDRESS_PA_SHIFT  11
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svn commit: r301693 - head/sys/dev/dwc

2016-06-08 Thread Jared McNeill 
Author: jmcneill
Date: Wed Jun  8 20:22:25 2016
New Revision: 301693
URL: https://svnweb.freebsd.org/changeset/base/301693

Log:
  Multicast filters on DWC_GMAC_ALT_DESC type implementations use a different
  hash register setup. In addition, strip trailing FCS in receive path.
  
  Reviewed by:  loos
  Differential Revision:https://reviews.freebsd.org/D6653

Modified:
  head/sys/dev/dwc/if_dwc.c

Modified: head/sys/dev/dwc/if_dwc.c
==
--- head/sys/dev/dwc/if_dwc.c   Wed Jun  8 20:01:10 2016(r301692)
+++ head/sys/dev/dwc/if_dwc.c   Wed Jun  8 20:22:25 2016(r301693)
@@ -587,19 +587,26 @@ dwc_setup_rxfilter(struct dwc_softc *sc)
struct ifmultiaddr *ifma;
struct ifnet *ifp;
uint8_t *eaddr, val;
-   uint32_t crc, ffval, hashbit, hashreg, hi, lo, reg;
+   uint32_t crc, ffval, hashbit, hashreg, hi, lo, hash[8], hmask;
+   int nhash, i;
 
DWC_ASSERT_LOCKED(sc);
 
ifp = sc->ifp;
+   nhash = sc->mactype == DWC_GMAC_ALT_DESC ? 2 : 8;
+   hmask = ((nhash << 5) - 1) | 0xf;
 
/*
 * Set the multicast (group) filter hash.
 */
-   if ((ifp->if_flags & IFF_ALLMULTI))
+   if ((ifp->if_flags & IFF_ALLMULTI) != 0) {
ffval = (FRAME_FILTER_PM);
-   else {
+   for (i = 0; i < nhash; i++)
+   hash[i] = ~0;
+   } else {
ffval = (FRAME_FILTER_HMC);
+   for (i = 0; i < nhash; i++)
+   hash[i] = 0;
if_maddr_rlock(ifp);
TAILQ_FOREACH(ifma, >ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
@@ -608,13 +615,13 @@ dwc_setup_rxfilter(struct dwc_softc *sc)
ifma->ifma_addr), ETHER_ADDR_LEN);
 
/* Take lower 8 bits and reverse it */
-   val = bitreverse(~crc & 0xff);
-   hashreg = (val >> 5);
+   val = bitreverse(~crc & 0xff) & hmask;
+   if (sc->mactype == DWC_GMAC_ALT_DESC)
+   hashreg = (val >> 5) == 0;
+   else
+   hashreg = (val >> 5);
hashbit = (val & 31);
-
-   reg = READ4(sc, HASH_TABLE_REG(hashreg));
-   reg |= (1 << hashbit);
-   WRITE4(sc, HASH_TABLE_REG(hashreg), reg);
+   hash[hashreg] |= (1 << hashbit);
}
if_maddr_runlock(ifp);
}
@@ -635,6 +642,8 @@ dwc_setup_rxfilter(struct dwc_softc *sc)
WRITE4(sc, MAC_ADDRESS_LOW(0), lo);
WRITE4(sc, MAC_ADDRESS_HIGH(0), hi);
WRITE4(sc, MAC_FRAME_FILTER, ffval);
+   for (i = 0; i < nhash; i++)
+   WRITE4(sc, HASH_TABLE_REG(i), hash[i]);
 }
 
 static int
@@ -759,6 +768,9 @@ dwc_rxfinish_locked(struct dwc_softc *sc
m->m_len = len;
if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
 
+   /* Remove trailing FCS */
+   m_adj(m, -ETHER_CRC_LEN);
+
DWC_UNLOCK(sc);
(*ifp->if_input)(ifp, m);
DWC_LOCK(sc);
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svn commit: r301082 - head/sys/arm/allwinner

2016-05-31 Thread Jared McNeill 
Author: jmcneill
Date: Tue May 31 21:58:09 2016
New Revision: 301082
URL: https://svnweb.freebsd.org/changeset/base/301082

Log:
  Fix a crash while iterating compat strings when no match is found.
  
  Spotted by:   ian

Modified:
  head/sys/arm/allwinner/aw_ccu.c

Modified: head/sys/arm/allwinner/aw_ccu.c
==
--- head/sys/arm/allwinner/aw_ccu.c Tue May 31 21:34:02 2016
(r301081)
+++ head/sys/arm/allwinner/aw_ccu.c Tue May 31 21:58:09 2016
(r301082)
@@ -192,7 +192,7 @@ aw_ccu_search_compatible(void) 
phandle_t root;
 
root = OF_finddevice("/");
-   for (compat = compat_data; compat_data->ocd_str != NULL; compat++)
+   for (compat = compat_data; compat->ocd_str != NULL; compat++)
if (fdt_is_compatible(root, compat->ocd_str))
break;
 
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svn commit: r300728 - in head/sys: arm/allwinner dev/usb/controller

2016-05-26 Thread Jared McNeill 
Author: jmcneill
Date: Thu May 26 10:50:39 2016
New Revision: 300728
URL: https://svnweb.freebsd.org/changeset/base/300728

Log:
  Enable USB PHY regulators when requested by the host controller driver.
  
  Previously the USB PHY driver would enable all regulators at attach time.
  This prevented boards from booting when powered by the USB OTG port, as
  it didn't take VBUS presence into consideration.

Modified:
  head/sys/arm/allwinner/a10_ehci.c
  head/sys/arm/allwinner/aw_usbphy.c
  head/sys/dev/usb/controller/generic_ohci.c

Modified: head/sys/arm/allwinner/a10_ehci.c
==
--- head/sys/arm/allwinner/a10_ehci.c   Thu May 26 10:30:03 2016
(r300727)
+++ head/sys/arm/allwinner/a10_ehci.c   Thu May 26 10:50:39 2016
(r300728)
@@ -61,6 +61,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 
 #define EHCI_HC_DEVSTR "Allwinner Integrated USB 2.0 
controller"
 
@@ -94,6 +95,7 @@ struct aw_ehci_softc {
ehci_softc_tsc;
clk_t   clk;
hwreset_t   rst;
+   phy_t   phy;
 };
 
 struct aw_ehci_conf {
@@ -225,6 +227,18 @@ a10_ehci_attach(device_t self)
goto error;
}
 
+   /* Enable USB PHY */
+   err = phy_get_by_ofw_name(self, "usb", _sc->phy);
+   if (err != 0) {
+   device_printf(self, "Could not get phy\n");
+   goto error;
+   }
+   err = phy_enable(self, aw_sc->phy);
+   if (err != 0) {
+   device_printf(self, "Could not enable phy\n");
+   goto error;
+   }
+
/* Enable passby */
reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE);
reg_value |= SW_AHB_INCR8; /* AHB INCR8 enable */

Modified: head/sys/arm/allwinner/aw_usbphy.c
==
--- head/sys/arm/allwinner/aw_usbphy.c  Thu May 26 10:30:03 2016
(r300727)
+++ head/sys/arm/allwinner/aw_usbphy.c  Thu May 26 10:50:39 2016
(r300728)
@@ -43,12 +43,16 @@ __FBSDID("$FreeBSD$");
 
 #include 
 #include 
+#include 
 
 #include 
 #include 
 #include 
+#include 
 
-#defineUSBPHY_NUMOFF   3
+#include "phy_if.h"
+
+#defineUSBPHY_NPHYS4
 
 static struct ofw_compat_data compat_data[] = {
{ "allwinner,sun4i-a10-usb-phy",1 },
@@ -60,15 +64,28 @@ static struct ofw_compat_data compat_dat
{ NULL, 0 }
 };
 
+struct awusbphy_softc {
+   regulator_t reg[USBPHY_NPHYS];
+   gpio_pin_t  id_det_pin;
+   int id_det_valid;
+   gpio_pin_t  vbus_det_pin;
+   int vbus_det_valid;
+};
+
 static int
 awusbphy_init(device_t dev)
 {
+   struct awusbphy_softc *sc;
+   phandle_t node;
char pname[20];
int error, off;
regulator_t reg;
hwreset_t rst;
clk_t clk;
 
+   sc = device_get_softc(dev);
+   node = ofw_bus_get_node(dev);
+
/* Enable clocks */
for (off = 0; clk_get_by_ofw_index(dev, off, ) == 0; off++) {
error = clk_enable(clk);
@@ -89,17 +106,80 @@ awusbphy_init(device_t dev)
}
}
 
-   /* Enable regulator(s) */
-   for (off = 0; off < USBPHY_NUMOFF; off++) {
+   /* Get regulators */
+   for (off = 0; off < USBPHY_NPHYS; off++) {
snprintf(pname, sizeof(pname), "usb%d_vbus-supply", off);
-   if (regulator_get_by_ofw_property(dev, pname, ) != 0)
-   continue;
-   error = regulator_enable(reg);
-   if (error != 0) {
-   device_printf(dev, "couldn't enable regulator %s\n",
-   pname);
+   if (regulator_get_by_ofw_property(dev, pname, ) == 0)
+   sc->reg[off] = reg;
+   }
+
+   /* Get GPIOs */
+   error = gpio_pin_get_by_ofw_property(dev, node, "usb0_id_det-gpios",
+   >id_det_pin);
+   if (error == 0)
+   sc->id_det_valid = 1;
+   error = gpio_pin_get_by_ofw_property(dev, node, "usb0_vbus_det-gpios",
+   >vbus_det_pin);
+   if (error == 0)
+   sc->vbus_det_valid = 1;
+
+   return (0);
+}
+
+static int
+awusbphy_vbus_detect(device_t dev, int *val)
+{
+   struct awusbphy_softc *sc;
+   bool active;
+   int error;
+
+   sc = device_get_softc(dev);
+
+   if (sc->vbus_det_valid) {
+   error = gpio_pin_is_active(sc->vbus_det_pin, );
+   if (error != 0)
return (error);
-   }
+   *val = active;
+   return (0);
+   }
+
+   *val = 1;
+   return (0);
+}
+
+static int
+awusbphy_phy_enable(device_t dev, int phy, bool enable)
+{
+   struct awusbphy_softc *sc;
+   regulator_t reg;
+   int error,

svn commit: r299871 - in head/sys: arm/allwinner boot/fdt/dts/arm

2016-05-15 Thread Jared McNeill 
Author: jmcneill
Date: Sun May 15 22:36:55 2016
New Revision: 299871
URL: https://svnweb.freebsd.org/changeset/base/299871

Log:
  Add Allwinner A83T thermal sensor controller support.
  
  The A83T thermal sensor controller has three sensors. Sensor 0 corresponds
  to CPU cluster 0, sensor 1 to CPU cluster 1, and sensor 2 to the GPU. This
  driver exports the temperature sensor readings via sysctl.
  
  Calibration data is obtained from SRAM found in the Secure ID module.
  
  Reviewed by:  manu
  Differential Revision:https://reviews.freebsd.org/D6378

Added:
  head/sys/arm/allwinner/aw_sid.c   (contents, props changed)
  head/sys/arm/allwinner/aw_sid.h   (contents, props changed)
  head/sys/arm/allwinner/aw_thermal.c   (contents, props changed)
Modified:
  head/sys/arm/allwinner/files.allwinner
  head/sys/boot/fdt/dts/arm/a83t.dtsi

Added: head/sys/arm/allwinner/aw_sid.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/allwinner/aw_sid.c Sun May 15 22:36:55 2016
(r299871)
@@ -0,0 +1,135 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * Allwinner secure ID controller
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#defineSID_SRAM0x200
+#defineSID_THERMAL_CALIB0  (SID_SRAM + 0x34)
+#defineSID_THERMAL_CALIB1  (SID_SRAM + 0x38)
+
+static struct ofw_compat_data compat_data[] = {
+   { "allwinner,sun8i-a83t-sid",   1 },
+   { NULL, 0 }
+};
+
+struct aw_sid_softc {
+   struct resource *res;
+};
+
+static struct aw_sid_softc *aw_sid_sc;
+
+static struct resource_spec aw_sid_spec[] = {
+   { SYS_RES_MEMORY,   0,  RF_ACTIVE },
+   { -1, 0 }
+};
+
+#defineRD4(sc, reg)bus_read_4((sc)->res, (reg))
+#defineWR4(sc, reg, val)   bus_write_4((sc)->res, (reg), (val))
+
+static int
+aw_sid_probe(device_t dev)
+{
+   if (!ofw_bus_status_okay(dev))
+   return (ENXIO);
+
+   if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
+   return (ENXIO);
+
+   device_set_desc(dev, "Allwinner Secure ID Controller");
+   return (BUS_PROBE_DEFAULT);
+}
+
+static int
+aw_sid_attach(device_t dev)
+{
+   struct aw_sid_softc *sc;
+
+   sc = device_get_softc(dev);
+
+   if (bus_alloc_resources(dev, aw_sid_spec, >res) != 0) {
+   device_printf(dev, "cannot allocate resources for device\n");
+   return (ENXIO);
+   }
+
+   aw_sid_sc = sc;
+
+   return (0);
+}
+
+int
+aw_sid_read_tscalib(uint32_t *calib0, uint32_t *calib1)
+{
+   struct aw_sid_softc *sc;
+
+   sc = aw_sid_sc;
+   if (sc == NULL)
+   return (ENXIO);
+
+   *calib0 = RD4(sc, SID_THERMAL_CALIB0);
+   *calib1 = RD4(sc, SID_THERMAL_CALIB1);
+
+   return (0);
+}
+
+static device_method_t aw_sid_methods[] = {
+   /* Device interface */
+   DEVMETHOD(device_probe, aw_sid_probe),
+   DEVMETHOD(device_attach,aw_sid_attach),
+
+   DEVMETHOD_END
+};
+
+static driver_t aw_sid_driver = {
+   "aw_sid",
+   aw_sid_methods,
+   sizeof(struct aw_sid_softc),
+};
+
+static devclass_t aw_sid_devclass;
+
+EARLY_DRIVER_MODULE(aw_sid, simplebus, aw_sid_driver, aw_sid_devclass, 0, 0,
+BUS_PASS_RESOURCE + BUS_PASS_ORDER_FIRST);

svn commit: r299863 - head/sys/boot/fdt/dts/arm

2016-05-15 Thread Jared McNeill 
Author: jmcneill
Date: Sun May 15 17:25:31 2016
New Revision: 299863
URL: https://svnweb.freebsd.org/changeset/base/299863

Log:
  Enable SATA power regulator at boot on Sinovoip BananaPi BPI-M3.

Modified:
  head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts

Modified: head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts
==
--- head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts   Sun May 15 16:43:47 
2016(r299862)
+++ head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts   Sun May 15 17:25:31 
2016(r299863)
@@ -37,6 +37,15 @@
status = "okay";
 };
 
+_ahci_5v {
+   gpio = < 3 25 GPIO_ACTIVE_HIGH>;/* PD25 */
+   status = "okay";
+};
+
+_pwr_pin_a {
+   allwinner,pins = "PD25";
+};
+
 _usb1_vbus {
gpio = < 3 24 GPIO_ACTIVE_HIGH>;/* PD24 */
status = "okay";
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svn commit: r299862 - head/sys/arm/allwinner

2016-05-15 Thread Jared McNeill 
Author: jmcneill
Date: Sun May 15 16:43:47 2016
New Revision: 299862
URL: https://svnweb.freebsd.org/changeset/base/299862

Log:
  Reduce complexity of RSB by always using polling mode. Unfortunately
  gpiobus methods can be called with non-sleepable locks held.
  
  Reviewed by:  mmel

Modified:
  head/sys/arm/allwinner/aw_rsb.c
  head/sys/arm/allwinner/axp81x.c

Modified: head/sys/arm/allwinner/aw_rsb.c
==
--- head/sys/arm/allwinner/aw_rsb.c Sun May 15 15:56:48 2016
(r299861)
+++ head/sys/arm/allwinner/aw_rsb.c Sun May 15 16:43:47 2016
(r299862)
@@ -38,7 +38,6 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 
@@ -100,7 +99,6 @@ static struct ofw_compat_data compat_dat
 
 static struct resource_spec rsb_spec[] = {
{ SYS_RES_MEMORY,   0,  RF_ACTIVE },
-   { SYS_RES_IRQ,  0,  RF_ACTIVE },
{ -1, 0 }
 };
 
@@ -125,12 +123,11 @@ static const struct {
 };
 
 struct rsb_softc {
-   struct resource *res[2];
+   struct resource *res;
struct mtx  mtx;
clk_t   clk;
hwreset_t   rst;
device_tiicbus;
-   void*ih;
int busy;
uint32_tstatus;
uint16_tcur_addr;
@@ -141,8 +138,8 @@ struct rsb_softc {
 #defineRSB_LOCK(sc)mtx_lock(&(sc)->mtx)
 #defineRSB_UNLOCK(sc)  mtx_unlock(&(sc)->mtx)
 #defineRSB_ASSERT_LOCKED(sc)   mtx_assert(&(sc)->mtx, MA_OWNED)
-#defineRSB_READ(sc, reg)   bus_read_4((sc)->res[0], (reg))
-#defineRSB_WRITE(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
+#defineRSB_READ(sc, reg)   bus_read_4((sc)->res, (reg))
+#defineRSB_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val))
 
 static phandle_t
 rsb_get_node(device_t bus, device_t dev)
@@ -202,34 +199,24 @@ static int
 rsb_start(device_t dev)
 {
struct rsb_softc *sc;
-   int error, retry, polling;
+   int error, retry;
 
sc = device_get_softc(dev);
-   polling = cold || !THREAD_CAN_SLEEP();
 
RSB_ASSERT_LOCKED(sc);
 
-   /* Enable interrupts */
-   if (!polling)
-   RSB_WRITE(sc, RSB_INTE, INT_MASK);
-
/* Start the transfer */
RSB_WRITE(sc, RSB_CTRL, GLOBAL_INT_ENB | START_TRANS);
 
/* Wait for transfer to complete */
-   if (polling) {
-   error = ETIMEDOUT;
-   for (retry = RSB_I2C_TIMEOUT; retry > 0; retry--) {
-   sc->status |= RSB_READ(sc, RSB_INTS);
-   if ((sc->status & INT_TRANS_OVER) != 0) {
-   error = 0;
-   break;
-   }
-   DELAY((1000 * hz) / RSB_I2C_TIMEOUT);
+   error = ETIMEDOUT;
+   for (retry = RSB_I2C_TIMEOUT; retry > 0; retry--) {
+   sc->status |= RSB_READ(sc, RSB_INTS);
+   if ((sc->status & INT_TRANS_OVER) != 0) {
+   error = 0;
+   break;
}
-   } else {
-   error = mtx_sleep(sc, >mtx, 0, "i2ciowait",
-   RSB_I2C_TIMEOUT);
+   DELAY((1000 * hz) / RSB_I2C_TIMEOUT);
}
if (error == 0 && (sc->status & INT_TRANS_OVER) == 0) {
device_printf(dev, "transfer error, status 0x%08x\n",
@@ -237,9 +224,6 @@ rsb_start(device_t dev)
error = EIO;
}
 
-   /* Disable interrupts */
-   RSB_WRITE(sc, RSB_INTE, 0);
-
return (error);
 
 }
@@ -389,23 +373,6 @@ done:
return (error);
 }
 
-static void
-rsb_intr(void *arg)
-{
-   struct rsb_softc *sc;
-   uint32_t val;
-
-   sc = arg;
-
-   RSB_LOCK(sc);
-   val = RSB_READ(sc, RSB_INTS);
-   RSB_WRITE(sc, RSB_INTS, val);
-   sc->status |= val;
-   if ((sc->status & INT_MASK) != 0)
-   wakeup(sc);
-   RSB_UNLOCK(sc);
-}
-
 static int
 rsb_probe(device_t dev)
 {
@@ -443,19 +410,12 @@ rsb_attach(device_t dev)
}
}
 
-   if (bus_alloc_resources(dev, rsb_spec, sc->res) != 0) {
+   if (bus_alloc_resources(dev, rsb_spec, >res) != 0) {
device_printf(dev, "cannot allocate resources for device\n");
error = ENXIO;
goto fail;
}
 
-   error = bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
-   NULL, rsb_intr, sc, >ih);
-   if (error != 0) {
-   device_printf(dev, "cannot setup interrupt handler\n");
-   goto fail;
-   }
-
sc->iicbus = device_add_child(dev, "iicbus", -1);
if (sc->iicbus == NULL) {
device_printf(dev, "cannot add iicbus child device\n");
@@ -468,9 +428,7 @@ rsb_attach(device_t dev)
return

svn commit: r299861 - head/sys/boot/fdt/dts/arm

2016-05-15 Thread Jared McNeill 
Author: jmcneill
Date: Sun May 15 15:56:48 2016
New Revision: 299861
URL: https://svnweb.freebsd.org/changeset/base/299861

Log:
  Add gpio-leds for Sinovoip BananaPi BPI-M3.
  
  The green LED on the board is wired to AXP813 GPIO0 and the blue
  LED is wired to AXP813 GPIO1.

Modified:
  head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts

Modified: head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts
==
--- head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts   Sun May 15 15:54:41 
2016(r299860)
+++ head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts   Sun May 15 15:56:48 
2016(r299861)
@@ -104,5 +104,23 @@
reg = <0x3a3>;
interrupt-parent = <_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+   gpio-controller;
+   #gpio-cells = <1>;
+   };
+};
+
+/ {
+   leds {
+   compatible = "gpio-leds";
+
+   green_led {
+   gpios = < 0>;/* AXP PMIC GPIO0 */
+   label = "green_led";
+   };
+
+   blue_led {
+   gpios = < 1>;/* AXP PMIC GPIO1 */
+   label = "blue_led";
+   };
};
 };
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svn commit: r299860 - head/sys/arm/allwinner

2016-05-15 Thread Jared McNeill 
Author: jmcneill
Date: Sun May 15 15:54:41 2016
New Revision: 299860
URL: https://svnweb.freebsd.org/changeset/base/299860

Log:
  Add support for the AXP813/AXP818 power key and GPIO pins.

Modified:
  head/sys/arm/allwinner/axp81x.c

Modified: head/sys/arm/allwinner/axp81x.c
==
--- head/sys/arm/allwinner/axp81x.c Sun May 15 15:52:34 2016
(r299859)
+++ head/sys/arm/allwinner/axp81x.c Sun May 15 15:54:41 2016
(r299860)
@@ -40,20 +40,51 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 
 #include 
 #include 
 
+#include 
+
 #include 
 #include 
 
 #include "iicbus_if.h"
+#include "gpio_if.h"
 
 #defineAXP_ICTYPE  0x03
 #defineAXP_POWERBAT0x32
 #define AXP_POWERBAT_SHUTDOWN  (1 << 7)
+#defineAXP_IRQEN1  0x40
+#defineAXP_IRQEN2  0x41
+#defineAXP_IRQEN3  0x42
+#defineAXP_IRQEN4  0x43
+#defineAXP_IRQEN5  0x44
+#define AXP_IRQEN5_POKSIRQ (1 << 4)
+#defineAXP_IRQEN6  0x45
+#defineAXP_IRQSTAT50x4c
+#define AXP_IRQSTAT5_POKSIRQ   (1 << 4)
+#defineAXP_GPIO0_CTRL  0x90
+#defineAXP_GPIO1_CTRL  0x92
+#define AXP_GPIO_FUNC  (0x7 << 0)
+#define AXP_GPIO_FUNC_SHIFT0
+#define AXP_GPIO_FUNC_DRVLO0
+#define AXP_GPIO_FUNC_DRVHI1
+#define AXP_GPIO_FUNC_INPUT2
+#defineAXP_GPIO_SIGBIT 0x94
+#defineAXP_GPIO_PD 0x97
+
+static const struct {
+   const char *name;
+   uint8_t ctrl_reg;
+} axp81x_pins[] = {
+   { "GPIO0", AXP_GPIO0_CTRL },
+   { "GPIO1", AXP_GPIO1_CTRL },
+};
 
 static struct ofw_compat_data compat_data[] = {
{ "x-powers,axp813",1 },
@@ -61,11 +92,23 @@ static struct ofw_compat_data compat_dat
{ NULL, 0 }
 };
 
+static struct resource_spec axp81x_spec[] = {
+   { SYS_RES_IRQ,  0,  RF_ACTIVE },
+   { -1, 0 }
+};
+
 struct axp81x_softc {
+   struct resource *res;
uint16_taddr;
-   struct intr_config_hook enum_hook;
+   void*ih;
+   device_tgpiodev;
+   struct mtx  mtx;
+   int busy;
 };
 
+#defineAXP_LOCK(sc)mtx_lock(&(sc)->mtx)
+#defineAXP_UNLOCK(sc)  mtx_unlock(&(sc)->mtx)
+
 static int
 axp81x_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size)
 {
@@ -124,6 +167,267 @@ axp81x_shutdown(void *devp, int howto)
axp81x_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN);
 }
 
+static void
+axp81x_intr(void *arg)
+{
+   struct axp81x_softc *sc;
+   device_t dev;
+   uint8_t val;
+   int error;
+
+   dev = arg;
+   sc = device_get_softc(dev);
+
+   error = axp81x_read(dev, AXP_IRQSTAT5, , 1);
+   if (error != 0)
+   return;
+
+   if (val != 0) {
+   if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) {
+   if (bootverbose)
+   device_printf(dev, "Power button pressed\n");
+   shutdown_nice(RB_POWEROFF);
+   }
+   /* Acknowledge */
+   axp81x_write(dev, AXP_IRQSTAT5, val);
+   }
+}
+
+static device_t
+axp81x_gpio_get_bus(device_t dev)
+{
+   struct axp81x_softc *sc;
+
+   sc = device_get_softc(dev);
+
+   return (sc->gpiodev);
+}
+
+static int
+axp81x_gpio_pin_max(device_t dev, int *maxpin)
+{
+   *maxpin = nitems(axp81x_pins) - 1;
+
+   return (0);
+}
+
+static int
+axp81x_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
+{
+   if (pin >= nitems(axp81x_pins))
+   return (EINVAL);
+
+   snprintf(name, GPIOMAXNAME, "%s", axp81x_pins[pin].name);
+
+   return (0);
+}
+
+static int
+axp81x_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
+{
+   if (pin >= nitems(axp81x_pins))
+   return (EINVAL);
+
+   *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
+
+   return (0);
+}
+
+static int
+axp81x_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
+{
+   struct axp81x_softc *sc;
+   uint8_t data, func;
+   int error;
+
+   if (pin >= nitems(axp81x_pins))
+   return (EINVAL);
+
+   sc = device_get_softc(dev);
+
+   AXP_LOCK(sc);
+   THREAD_SLEEPING_OK();
+   error = axp81x_read(dev, axp81x_pins[pin].ctrl_reg, , 1);
+   if (error == 0) {
+   func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
+   if (func == AXP_GPIO_FUNC_INPUT)
+   *flags = GPIO_PIN_INPUT;
+   else if (func == AXP_GPIO_FUNC_DRVLO ||
+   func ==

svn commit: r299859 - head/sys/arm/allwinner

2016-05-15 Thread Jared McNeill 
Author: jmcneill
Date: Sun May 15 15:52:34 2016
New Revision: 299859
URL: https://svnweb.freebsd.org/changeset/base/299859

Log:
  Allow RSB to be used from interrupt handlers.
  
  The driver uses polling mode if cold or !THREAD_CAN_SLEEP() and now
  implements the bus_* interface.

Modified:
  head/sys/arm/allwinner/aw_rsb.c

Modified: head/sys/arm/allwinner/aw_rsb.c
==
--- head/sys/arm/allwinner/aw_rsb.c Sun May 15 15:31:44 2016
(r299858)
+++ head/sys/arm/allwinner/aw_rsb.c Sun May 15 15:52:34 2016
(r299859)
@@ -38,6 +38,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -201,21 +202,22 @@ static int
 rsb_start(device_t dev)
 {
struct rsb_softc *sc;
-   int error, retry;
+   int error, retry, polling;
 
sc = device_get_softc(dev);
+   polling = cold || !THREAD_CAN_SLEEP();
 
RSB_ASSERT_LOCKED(sc);
 
/* Enable interrupts */
-   if (!cold)
+   if (!polling)
RSB_WRITE(sc, RSB_INTE, INT_MASK);
 
/* Start the transfer */
RSB_WRITE(sc, RSB_CTRL, GLOBAL_INT_ENB | START_TRANS);
 
/* Wait for transfer to complete */
-   if (cold) {
+   if (polling) {
error = ETIMEDOUT;
for (retry = RSB_I2C_TIMEOUT; retry > 0; retry--) {
sc->status |= RSB_READ(sc, RSB_INTS);
@@ -482,6 +484,17 @@ static device_method_t rsb_methods[] = {
DEVMETHOD(device_probe, rsb_probe),
DEVMETHOD(device_attach,rsb_attach),
 
+   /* Bus interface */
+   DEVMETHOD(bus_setup_intr,   bus_generic_setup_intr),
+   DEVMETHOD(bus_teardown_intr,bus_generic_teardown_intr),
+   DEVMETHOD(bus_alloc_resource,   bus_generic_alloc_resource),
+   DEVMETHOD(bus_release_resource, bus_generic_release_resource),
+   DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
+   DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
+   DEVMETHOD(bus_adjust_resource,  bus_generic_adjust_resource),
+   DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
+   DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
+
/* OFW methods */
DEVMETHOD(ofw_bus_get_node, rsb_get_node),
 
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svn commit: r299789 - head/sys/boot/fdt/dts/arm

2016-05-14 Thread Jared McNeill 
Author: jmcneill
Date: Sat May 14 23:36:00 2016
New Revision: 299789
URL: https://svnweb.freebsd.org/changeset/base/299789

Log:
  Add pmic (AXP813) child node to r_rsb for Sinovoip BananaPi BPI-M3.

Modified:
  head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts

Modified: head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts
==
--- head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts   Sat May 14 23:35:11 
2016(r299788)
+++ head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts   Sat May 14 23:36:00 
2016(r299789)
@@ -95,3 +95,14 @@
pinctrl-0 = <_pins_a>;
status = "okay";
 };
+
+_rsb {
+   status = "okay";
+
+   axp81x: pmic@3a3 {
+   compatible = "x-powers,axp813";
+   reg = <0x3a3>;
+   interrupt-parent = <_intc>;
+   interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+   };
+};
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svn commit: r299787 - in head/sys/arm: allwinner conf

2016-05-14 Thread Jared McNeill 
Author: jmcneill
Date: Sat May 14 23:34:57 2016
New Revision: 299787
URL: https://svnweb.freebsd.org/changeset/base/299787

Log:
  Add and enable Allwinner RSB and AXP81x power management IC drivers.

Modified:
  head/sys/arm/allwinner/files.allwinner
  head/sys/arm/conf/ALLWINNER

Modified: head/sys/arm/allwinner/files.allwinner
==
--- head/sys/arm/allwinner/files.allwinner  Sat May 14 23:33:57 2016
(r299786)
+++ head/sys/arm/allwinner/files.allwinner  Sat May 14 23:34:57 2016
(r299787)
@@ -12,12 +12,14 @@ arm/allwinner/a10_mmc.c optional
mmc
 arm/allwinner/a10_sramc.c  standard
 arm/allwinner/aw_nmi.c optionalintrng
 arm/allwinner/aw_if_dwc.c  optionaldwc
+arm/allwinner/aw_rsb.c optionalrsb
 arm/allwinner/aw_rtc.c standard
 arm/allwinner/aw_wdog.cstandard
 arm/allwinner/a20/a20_cpu_cfg.cstandard
 arm/allwinner/allwinner_machdep.c  standard
 arm/allwinner/aw_mp.c  optionalsmp
 arm/allwinner/axp209.c optionalaxp209
+arm/allwinner/axp81x.c optionalaxp81x
 arm/allwinner/if_awg.c optionalawg
 arm/allwinner/if_emac.coptionalemac
 arm/allwinner/sunxi_dma_if.m   standard

Modified: head/sys/arm/conf/ALLWINNER
==
--- head/sys/arm/conf/ALLWINNER Sat May 14 23:33:57 2016(r299786)
+++ head/sys/arm/conf/ALLWINNER Sat May 14 23:34:57 2016(r299787)
@@ -94,7 +94,9 @@ devicerandom  # Entropy device
 device iicbus
 device iic
 device twsi
+device rsb
 device axp209  # AXP209 Power Management Unit
+device axp81x  # AXP813/818 Power Management Unit
 
 # GPIO
 device gpio
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svn commit: r299786 - head/sys/arm/allwinner

2016-05-14 Thread Jared McNeill 
Author: jmcneill
Date: Sat May 14 23:33:57 2016
New Revision: 299786
URL: https://svnweb.freebsd.org/changeset/base/299786

Log:
  Add a basic driver for X-Powers AXP813 and AXP818 power management ICs.
  
  This driver simply installs a shutdown event handler for handling
  RB_POWEROFF at shutdown. Tested on a Sinovoip BananaPi BPI-M3.

Added:
  head/sys/arm/allwinner/axp81x.c   (contents, props changed)

Added: head/sys/arm/allwinner/axp81x.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/allwinner/axp81x.c Sat May 14 23:33:57 2016
(r299786)
@@ -0,0 +1,180 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * X-Powers AXP813/818 PMU for Allwinner SoCs
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "iicbus_if.h"
+
+#defineAXP_ICTYPE  0x03
+#defineAXP_POWERBAT0x32
+#define AXP_POWERBAT_SHUTDOWN  (1 << 7)
+
+static struct ofw_compat_data compat_data[] = {
+   { "x-powers,axp813",1 },
+   { "x-powers,axp818",1 },
+   { NULL, 0 }
+};
+
+struct axp81x_softc {
+   uint16_taddr;
+   struct intr_config_hook enum_hook;
+};
+
+static int
+axp81x_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size)
+{
+   struct axp81x_softc *sc;
+   struct iic_msg msg[2];
+
+   sc = device_get_softc(dev);
+
+   msg[0].slave = sc->addr;
+   msg[0].flags = IIC_M_WR;
+   msg[0].len = 1;
+   msg[0].buf = 
+
+   msg[1].slave = sc->addr;
+   msg[1].flags = IIC_M_RD;
+   msg[1].len = size;
+   msg[1].buf = data;
+
+   return (iicbus_transfer(dev, msg, 2));
+}
+
+static int
+axp81x_write(device_t dev, uint8_t reg, uint8_t val)
+{
+   struct axp81x_softc *sc;
+   struct iic_msg msg[2];
+
+   sc = device_get_softc(dev);
+
+   msg[0].slave = sc->addr;
+   msg[0].flags = IIC_M_WR;
+   msg[0].len = 1;
+   msg[0].buf = 
+
+   msg[1].slave = sc->addr;
+   msg[1].flags = IIC_M_WR;
+   msg[1].len = 1;
+   msg[1].buf = 
+
+   return (iicbus_transfer(dev, msg, 2));
+}
+
+static void
+axp81x_shutdown(void *devp, int howto)
+{
+   device_t dev;
+
+   if ((howto & RB_POWEROFF) == 0)
+   return;
+
+   dev = devp;
+
+   if (bootverbose)
+   device_printf(dev, "Shutdown AXP81x\n");
+
+   axp81x_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN);
+}
+
+static int
+axp81x_probe(device_t dev)
+{
+   if (!ofw_bus_status_okay(dev))
+   return (ENXIO);
+
+   if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
+   return (ENXIO);
+
+   device_set_desc(dev, "X-Powers AXP81x Power Management Unit");
+
+   return (BUS_PROBE_DEFAULT);
+}
+
+static int
+axp81x_attach(device_t dev)
+{
+   struct axp81x_softc *sc;
+   uint8_t chip_id;
+
+   sc = device_get_softc(dev);
+
+   sc->addr = iicbus_get_addr(dev);
+
+   if (bootverbose) {
+   axp81x_read(dev, AXP_ICTYPE, _id, 1);
+   device_printf(dev, "chip ID 0x%02x\n", chip_id);
+   }
+
+   EVENTHANDLER_REGISTER(shutdown_final, axp81x_shutdown, dev,
+   SHUTDOWN_PRI_LAST);
+
+   return (0);
+}
+
+s

svn commit: r299781 - head/sys/arm/allwinner

2016-05-14 Thread Jared McNeill 
Author: jmcneill
Date: Sat May 14 23:27:54 2016
New Revision: 299781
URL: https://svnweb.freebsd.org/changeset/base/299781

Log:
  Add a driver for the Allwinner Reduced Serial Bus (RSB).
  
  The RSB controller speaks a simplified two wire protocol at speeds up to
  20MHz. It is used on sun8i and sun9i family SoCs to communicate with
  power management ICs.
  
  RSB isn't really I2C or SMBus, but the driver exposes an iicbus interface
  to simplify power management IC drivers (which may need to support both
  RSB and I2C connectivity).

Added:
  head/sys/arm/allwinner/aw_rsb.c   (contents, props changed)

Added: head/sys/arm/allwinner/aw_rsb.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/allwinner/aw_rsb.c Sat May 14 23:27:54 2016
(r299781)
@@ -0,0 +1,506 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * Allwinner RSB (Reduced Serial Bus)
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include "iicbus_if.h"
+
+#defineRSB_CTRL0x00
+#define START_TRANS(1 << 7)
+#define GLOBAL_INT_ENB (1 << 1)
+#define SOFT_RESET (1 << 0)
+#defineRSB_CCR 0x04
+#defineRSB_INTE0x08
+#defineRSB_INTS0x0c
+#define INT_TRANS_ERR_ID(x)(((x) >> 8) & 0xf)
+#define INT_LOAD_BSY   (1 << 2)
+#define INT_TRANS_ERR  (1 << 1)
+#define INT_TRANS_OVER (1 << 0)
+#define INT_MASK   
(INT_LOAD_BSY|INT_TRANS_ERR|INT_TRANS_OVER)
+#defineRSB_DADDR0  0x10
+#defineRSB_DADDR1  0x14
+#defineRSB_DLEN0x18
+#define DLEN_READ  (1 << 4)
+#defineRSB_DATA0   0x1c
+#defineRSB_DATA1   0x20
+#defineRSB_CMD 0x2c
+#define CMD_SRTA   0xe8
+#define CMD_RD80x8b
+#define CMD_RD16   0x9c
+#define CMD_RD32   0xa6
+#define CMD_WR80x4e
+#define CMD_WR16   0x59
+#define CMD_WR32   0x63
+#defineRSB_DAR 0x30
+#define DAR_RTA(0xff << 16)
+#define DAR_RTA_SHIFT  16
+#define DAR_DA (0x << 0)
+#define DAR_DA_SHIFT   0
+
+#defineRSB_MAXLEN  8
+#defineRSB_RESET_RETRY 100
+#defineRSB_I2C_TIMEOUT hz
+
+#defineRSB_ADDR_PMIC_PRIMARY   0x3a3
+#defineRSB_ADDR_PMIC_SECONDARY 0x745
+#defineRSB_ADDR_PERIPH_IC  0xe89
+
+static struct ofw_compat_data compat_data[] = {
+   { "allwinner,sun8i-a23-rsb",1 },
+   { NULL, 0 }
+};
+
+static struct resource_spec rsb_spec[] = {
+   { SYS_RES_MEMORY,   0,  RF_ACTIVE },
+   { SYS_RES_IRQ,  0,  RF_ACTIVE },
+   { -1, 0 }
+};
+
+/*
+ * Device address to Run-time address mappings.
+ *
+ * Run-time address (RTA) is an 8-bit value used to address the device during
+ * a read or write transaction. The following are valid RTAs:
+ *  0x17 0x2d 0x3a 0x4e 0x59 0x63 0x7

svn commit: r299779 - head/sys/boot/fdt/dts/arm

2016-05-14 Thread Jared McNeill 
Author: jmcneill
Date: Sat May 14 23:22:52 2016
New Revision: 299779
URL: https://svnweb.freebsd.org/changeset/base/299779

Log:
  Add node for A83T NMI interrupt controller.

Modified:
  head/sys/boot/fdt/dts/arm/a83t.dtsi

Modified: head/sys/boot/fdt/dts/arm/a83t.dtsi
==
--- head/sys/boot/fdt/dts/arm/a83t.dtsi Sat May 14 23:22:38 2016
(r299778)
+++ head/sys/boot/fdt/dts/arm/a83t.dtsi Sat May 14 23:22:52 2016
(r299779)
@@ -89,6 +89,14 @@
};
 
soc {
+   nmi_intc: interrupt-controller@01f00c0c {
+   compatible = "allwinner,sun6i-a31-sc-nmi";
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   reg = <0x01f00c0c 0x38>;
+   interrupts = ;
+   };
+
i2c0: i2c@01c2ac00 {
compatible = "allwinner,sun8i-a83t-i2c";
reg = <0x01c2ac00 0x400>;
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svn commit: r299748 - in head/sys: boot/fdt/dts/arm modules/dtb/allwinner

2016-05-14 Thread Jared McNeill 
Author: jmcneill
Date: Sat May 14 18:47:36 2016
New Revision: 299748
URL: https://svnweb.freebsd.org/changeset/base/299748

Log:
  Add DTS files for the Allwinner A83T SoC and the Sinovoip BananaPi BPI-M3
  development board.

Added:
  head/sys/boot/fdt/dts/arm/a83t.dtsi   (contents, props changed)
  head/sys/boot/fdt/dts/arm/sinovoip-bpi-m3.dts   (contents, props changed)
  head/sys/boot/fdt/dts/arm/sun8i-a83t-sinovoip-bpi-m3.dts   (contents, props 
changed)
  head/sys/boot/fdt/dts/arm/sun8i-a83t.dtsi   (contents, props changed)
Modified:
  head/sys/modules/dtb/allwinner/Makefile

Added: head/sys/boot/fdt/dts/arm/a83t.dtsi
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/boot/fdt/dts/arm/a83t.dtsi Sat May 14 18:47:36 2016
(r299748)
@@ -0,0 +1,223 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/ {
+   pmu {
+   compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu";
+
+   /* Cluster 0 only */
+   interrupts = ,
+,
+,
+;
+   };
+
+   clocks {
+   /* cpus_clk compatible in gnu dt is incorrect */
+   cpus_clk: clk@01f01400 {
+compatible = "allwinner,sun8i-a83t-cpus-clk";
+   };
+
+   pll_hsic: clk@01c20044 {
+   #clock-cells = <0>;
+   compatible = "allwinner,sun9i-a80-pll4-clk";
+   reg = <0x01c20044 0x4>;
+   clocks = <>;
+   clock-output-names = "pll_hsic";
+   };
+
+   usb_clk: clk@01c200cc {
+   #clock-cells = <1>;
+   #reset-cells = <1>;
+   compatible = "allwinner,sun8i-a83t-usb-clk";
+   reg = <0x01c200cc 0x4>;
+   clocks = <>, <_hsic>;
+   clock-indices = <8>, <9>,
+   <10>, <11>,
+   <16>;
+   clock-output-names = "usb_phy0", "usb_phy1",
+"usb_hsic_pll", "usb_hsic_12m",
+"usb_ohci0";
+   };
+
+   mii_phy_tx_clk: clk@1 {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   clock-frequency = <2500>;
+   clock-output-names = "mii_phy_tx";
+   };
+
+   emac_int_tx_clk: clk@2 {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   clock-frequency = <12500>;
+   clock-output-names = "emac_int_tx";
+   };
+
+   emac_tx_clk: clk@01c00030 {
+   #clock-cells = <0>;
+   compatible = "allwinner,sun8i-a83t-emac-clk";
+   reg = <0x01c00030 0x4>;
+   clocks = <_phy_tx_clk>, <_int_tx_clk>;
+   clock-output-names = "emac_tx";
+   };
+   };
+
+   soc {
+

svn commit: r299745 - head/sys/dev/iicbus/twsi

2016-05-14 Thread Jared McNeill 
Author: jmcneill
Date: Sat May 14 18:02:47 2016
New Revision: 299745
URL: https://svnweb.freebsd.org/changeset/base/299745

Log:
  Add allwinner,sun8i-a83t-i2c to the list of compatible devices.

Modified:
  head/sys/dev/iicbus/twsi/a10_twsi.c

Modified: head/sys/dev/iicbus/twsi/a10_twsi.c
==
--- head/sys/dev/iicbus/twsi/a10_twsi.c Sat May 14 13:44:49 2016
(r299744)
+++ head/sys/dev/iicbus/twsi/a10_twsi.c Sat May 14 18:02:47 2016
(r299745)
@@ -66,6 +66,7 @@ __FBSDID("$FreeBSD$");
 static struct ofw_compat_data compat_data[] = {
{"allwinner,sun4i-a10-i2c", 1},
{"allwinner,sun6i-a31-i2c", 1},
+   {"allwinner,sun8i-a83t-i2c", 1},
{NULL, 0},
 };
 
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svn commit: r299743 - head/sys/arm/conf

2016-05-14 Thread Jared McNeill 
Author: jmcneill
Date: Sat May 14 10:39:57 2016
New Revision: 299743
URL: https://svnweb.freebsd.org/changeset/base/299743

Log:
  Update comment at top of file to mention all currently supported Allwinner
  SoCs. Previously mentioned A20 and A31, added A31S, A83T, and H3.

Modified:
  head/sys/arm/conf/ALLWINNER

Modified: head/sys/arm/conf/ALLWINNER
==
--- head/sys/arm/conf/ALLWINNER Sat May 14 10:18:27 2016(r299742)
+++ head/sys/arm/conf/ALLWINNER Sat May 14 10:39:57 2016(r299743)
@@ -1,5 +1,6 @@
 #
-# ALLWINNER -- Custom configuration for the Allwinner A20 and A31 ARM SoC
+# ALLWINNER -- Custom configuration for the Allwinner A20, A31, A31S, A83T,
+# and H3 ARM SoCs.
 #
 # For more information on this file, please read the config(5) manual page,
 # and/or the handbook section on Kernel Configuration Files:
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svn commit: r299113 - in head/sys: arm/allwinner arm/allwinner/a83t arm/allwinner/clk arm/conf conf

2016-05-05 Thread Jared McNeill 
Author: jmcneill
Date: Thu May  5 09:41:57 2016
New Revision: 299113
URL: https://svnweb.freebsd.org/changeset/base/299113

Log:
  Add support for the Allwinner A83T (sun8iw6p1) SoC.
  
  Clocks, GPIO, UART, SD card / eMMC, USB, watchdog, and ethernet are
  supported. Note that the A83T contains two clusters of four Cortex-A7
  CPUs, and only CPUs in first cluster are started for now.
  
  Tested on a Sinovoip Banana Pi BPI-M3.

Added:
  head/sys/arm/allwinner/a83t/
  head/sys/arm/allwinner/a83t/a83t_padconf.c   (contents, props changed)
  head/sys/arm/allwinner/a83t/a83t_r_padconf.c   (contents, props changed)
  head/sys/arm/allwinner/a83t/files.a83t   (contents, props changed)
  head/sys/arm/allwinner/a83t/std.a83t   (contents, props changed)
  head/sys/arm/allwinner/clk/aw_cpusclk.c   (contents, props changed)
Modified:
  head/sys/arm/allwinner/a10_ehci.c
  head/sys/arm/allwinner/a10_gpio.c
  head/sys/arm/allwinner/allwinner_machdep.c
  head/sys/arm/allwinner/allwinner_machdep.h
  head/sys/arm/allwinner/aw_ccu.c
  head/sys/arm/allwinner/aw_mp.c
  head/sys/arm/allwinner/aw_mp.h
  head/sys/arm/allwinner/aw_usbphy.c
  head/sys/arm/allwinner/clk/aw_ahbclk.c
  head/sys/arm/allwinner/clk/aw_apbclk.c
  head/sys/arm/allwinner/clk/aw_gate.c
  head/sys/arm/allwinner/clk/aw_gmacclk.c
  head/sys/arm/allwinner/clk/aw_pll.c
  head/sys/arm/allwinner/clk/aw_usbclk.c
  head/sys/arm/allwinner/files.allwinner
  head/sys/arm/allwinner/std.allwinner
  head/sys/arm/conf/ALLWINNER
  head/sys/conf/options.arm

Modified: head/sys/arm/allwinner/a10_ehci.c
==
--- head/sys/arm/allwinner/a10_ehci.c   Thu May  5 08:17:55 2016
(r299112)
+++ head/sys/arm/allwinner/a10_ehci.c   Thu May  5 09:41:57 2016
(r299113)
@@ -112,6 +112,7 @@ static struct ofw_compat_data compat_dat
{ "allwinner,sun4i-a10-ehci",   (uintptr_t)_ehci_conf },
{ "allwinner,sun6i-a31-ehci",   (uintptr_t)_ehci_conf },
{ "allwinner,sun7i-a20-ehci",   (uintptr_t)_ehci_conf },
+   { "allwinner,sun8i-a83t-ehci",  (uintptr_t)_ehci_conf },
{ NULL, (uintptr_t)NULL }
 };
 

Modified: head/sys/arm/allwinner/a10_gpio.c
==
--- head/sys/arm/allwinner/a10_gpio.c   Thu May  5 08:17:55 2016
(r299112)
+++ head/sys/arm/allwinner/a10_gpio.c   Thu May  5 09:41:57 2016
(r299113)
@@ -99,6 +99,12 @@ extern const struct allwinner_padconf a3
 extern const struct allwinner_padconf a31_r_padconf;
 #endif
 
+/* Defined in a83t_padconf.c */
+#ifdef SOC_ALLWINNER_A83T
+extern const struct allwinner_padconf a83t_padconf;
+extern const struct allwinner_padconf a83t_r_padconf;
+#endif
+
 static struct ofw_compat_data compat_data[] = {
 #ifdef SOC_ALLWINNER_A10
{"allwinner,sun4i-a10-pinctrl", (uintptr_t)_padconf},
@@ -115,6 +121,10 @@ static struct ofw_compat_data compat_dat
 #if defined(SOC_ALLWINNER_A31) || defined(SOC_ALLWINNER_A31S)
{"allwinner,sun6i-a31-r-pinctrl",   (uintptr_t)_r_padconf},
 #endif
+#ifdef SOC_ALLWINNER_A83T
+   {"allwinner,sun8i-a83t-pinctrl",(uintptr_t)_padconf},
+   {"allwinner,sun8i-a83t-r-pinctrl",  (uintptr_t)_r_padconf},
+#endif
{NULL,  0}
 };
 

Added: head/sys/arm/allwinner/a83t/a83t_padconf.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/allwinner/a83t/a83t_padconf.c  Thu May  5 09:41:57 2016
(r299113)
@@ -0,0 +1,162 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARIS

svn commit: r299084 - head/sys/arm/allwinner

2016-05-04 Thread Jared McNeill 
Author: jmcneill
Date: Wed May  4 20:06:20 2016
New Revision: 299084
URL: https://svnweb.freebsd.org/changeset/base/299084

Log:
  Add driver for Allwinner A83T/H3/A64 Gigabit Ethernet.
  
  The datasheets refer to this controller as EMAC, not to be confused with
  the fast ethernet controller (also named EMAC) found in A10/A20 SoCs.
  
  Tested on a BananaPi M3 (A83T), which uses an external RGMII PHY (RTL8211E).
  
  Reviewed by:  adrian
  Differential Revision:https://reviews.freebsd.org/D6169

Added:
  head/sys/arm/allwinner/if_awg.c   (contents, props changed)
  head/sys/arm/allwinner/if_awgreg.h   (contents, props changed)
Modified:
  head/sys/arm/allwinner/files.allwinner

Modified: head/sys/arm/allwinner/files.allwinner
==
--- head/sys/arm/allwinner/files.allwinner  Wed May  4 18:08:38 2016
(r299083)
+++ head/sys/arm/allwinner/files.allwinner  Wed May  4 20:06:20 2016
(r299084)
@@ -18,6 +18,7 @@ arm/allwinner/a20/a20_cpu_cfg.c   standar
 arm/allwinner/allwinner_machdep.c  standard
 arm/allwinner/aw_mp.c  optionalsmp
 arm/allwinner/axp209.c optionalaxp209
+arm/allwinner/if_awg.c optionalawg
 arm/allwinner/if_emac.coptionalemac
 arm/allwinner/sunxi_dma_if.m   standard
 dev/iicbus/twsi/a10_twsi.c optionaltwsi

Added: head/sys/arm/allwinner/if_awg.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/allwinner/if_awg.c Wed May  4 20:06:20 2016
(r299084)
@@ -0,0 +1,1418 @@
+/*-
+ * Copyright (c) 2016 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * Allwinner Gigabit Ethernet MAC (EMAC) controller
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "miibus_if.h"
+
+#defineRD4(sc, reg)bus_read_4((sc)->res[0], (reg))
+#defineWR4(sc, reg, val)   bus_write_4((sc)->res[0], (reg), (val))
+
+#defineAWG_LOCK(sc)mtx_lock(&(sc)->mtx)
+#defineAWG_UNLOCK(sc)  mtx_unlock(&(sc)->mtx);
+#defineAWG_ASSERT_LOCKED(sc)   mtx_assert(&(sc)->mtx, MA_OWNED)
+#defineAWG_ASSERT_UNLOCKED(sc) mtx_assert(&(sc)->mtx, MA_NOTOWNED)
+
+#defineDESC_ALIGN  4
+#defineTX_DESC_COUNT   256
+#defineTX_DESC_SIZE(sizeof(struct emac_desc) * 
TX_DESC_COUNT)
+#defineRX_DESC_COUNT   256
+#defineRX_DESC_SIZE(sizeof(struct emac_desc) * 
RX_DESC_COUNT)
+
+#defineDESC_OFF(n) ((n) * sizeof(struct emac_desc))
+#defineTX_NEXT(n)  (((n) + 1) & (TX_DESC_COUNT - 1))
+#defineTX_SKIP(n, o)   (((n) + (o)) & (TX_DESC_COUNT - 1))
+#defineRX_NEXT(n)  (((n) + 1) & (RX_DESC_COUNT - 1))
+
+#defineTX_MAX_SEGS 10
+
+#defineSOFT_RST_RETRY  1000
+#defineMII_BUSY_RETRY  1000
+#defineMDIO_FREQ   250
+
+#defineBURST_LEN_DEFAULT   8
+#defineRX_TX_PRI_DEFAULT   0
+#define

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