On 09/08/2014 07:12 PM, Jonathan McCune wrote:
> No, but if you are creating the MLE page tables and the MLE itself, you may
> be able to help yourself out by artificially imposing a page-alignment
> requirement. That is small enough to be easy for the Linux kernel
> allocator and hopefully large
Hej Jonathan,
On 08:57 Mon 08 Sep , Jonathan McCune wrote:
> If you consider the alignment requirements of the entry point, and layout
> your MLE with the entry point in the first 4K, you may be able to mask
> things such that you do not have to care about the low 12 bits.
AFAIK, there are no
Hello,
just a short question about some of the more bloody details of Intel
TXT. There are 2 specs atm - Intel TXT SDG (May 2014, rev 11) and the
Intel 64/IA-32 Arch SDM (June 2014, rev. 51). Both define the state of
the platform after SINIT ran and returned control to the user (the mle).
Both man
