Re: invalid netmasks should be reported
ok deraadt
Klemens Nanni wrote:
> On Wed, Mar 27, 2019 at 12:34:52PM +0100, Petr Hoffmann wrote:
> > I noticed it is possible to specify an invalid netmask,
> > e.g. 1.1.1.1/10/20 and still get the address loaded into a table. I
> > conjecture this was introduced by the following change:
> >
> > a7ede25358dad545e0342d2a9f8ef6ce68c6df66
> > Zap bits in host_v4(), use mask parameter
> That was me:
>
> revision 1.326
> date: 2018/07/31 22:48:04; author: kn; state: Exp; lines: +10 -11
> Zap v4mask and v6mask in host()
>
> Simply defer checks whether a mask has been specified to where it's set
> in
> host_*(); this is to reduce address family specific code.
>
> OK sashan
>
> > It looks like the author missed the path addresses are loaded by pfctl's '-T
> > add' command. I guess the '/20' is dropped in host() and then '/10' is
> > processed within host_ip() by inet_net_pton() so no error is reported.
> Good find, thanks.
>
> > OLD:
> > # pfctl -t tableta -T add 1.1.1.1/10/20
> > 1 table created.
> > 1/1 addresses added.
> >
> > NEW:
> > # $PFCTL -t tableta -T add
> > 1.1.1.1/10/20
> > netmask is invalid: /10/20
> Yup; this only affects tables, though. For the ruleset parser, strings
> with more than one "/" already fail the `xhost' production in parse.y:
>
> $ pfctl -vnf-
> pass to 1/2/3
> stdin:1: syntax error
>
> > diff --git a/sbin/pfctl/pfctl_parser.c b/sbin/pfctl/pfctl_parser.c
> > index ee3c2926f1a..5737846123d 100644
> > --- a/sbin/pfctl/pfctl_parser.c
> > +++ b/sbin/pfctl/pfctl_parser.c
> > @@ -1627,7 +1627,7 @@ host(const char *s, int opts)
> > if_name++;
> > }
> >
> > - if ((p = strrchr(ps, '/')) != NULL) {
> > + if ((p = strchr(ps, '/')) != NULL) {
> > mask = strtonum(p+1, 0, 128, );
> > if (errstr) {
> > fprintf(stderr, "netmask is %s: %s\n", errstr, p);
> OK kn; anyone else?
>
Re: invalid netmasks should be reported
On Wed, Mar 27, 2019 at 12:34:52PM +0100, Petr Hoffmann wrote:
> I noticed it is possible to specify an invalid netmask,
> e.g. 1.1.1.1/10/20 and still get the address loaded into a table. I
> conjecture this was introduced by the following change:
>
> a7ede25358dad545e0342d2a9f8ef6ce68c6df66
> Zap bits in host_v4(), use mask parameter
That was me:
revision 1.326
date: 2018/07/31 22:48:04; author: kn; state: Exp; lines: +10 -11
Zap v4mask and v6mask in host()
Simply defer checks whether a mask has been specified to where it's set
in
host_*(); this is to reduce address family specific code.
OK sashan
> It looks like the author missed the path addresses are loaded by pfctl's '-T
> add' command. I guess the '/20' is dropped in host() and then '/10' is
> processed within host_ip() by inet_net_pton() so no error is reported.
Good find, thanks.
> OLD:
> # pfctl -t tableta -T add 1.1.1.1/10/20
> 1 table created.
> 1/1 addresses added.
>
> NEW:
> # $PFCTL -t tableta -T add
> 1.1.1.1/10/20
> netmask is invalid: /10/20
Yup; this only affects tables, though. For the ruleset parser, strings
with more than one "/" already fail the `xhost' production in parse.y:
$ pfctl -vnf-
pass to 1/2/3
stdin:1: syntax error
> diff --git a/sbin/pfctl/pfctl_parser.c b/sbin/pfctl/pfctl_parser.c
> index ee3c2926f1a..5737846123d 100644
> --- a/sbin/pfctl/pfctl_parser.c
> +++ b/sbin/pfctl/pfctl_parser.c
> @@ -1627,7 +1627,7 @@ host(const char *s, int opts)
> if_name++;
> }
>
> - if ((p = strrchr(ps, '/')) != NULL) {
> + if ((p = strchr(ps, '/')) != NULL) {
> mask = strtonum(p+1, 0, 128, );
> if (errstr) {
> fprintf(stderr, "netmask is %s: %s\n", errstr, p);
OK kn; anyone else?
Re: hibernate_io function
On Fri, Mar 29, 2019 at 12:58:18PM +, Shivaprashanth H wrote: > Another section I am facing difficulty in understanding is thats called > TRAMPOLINE > > I am not finding much details on this. so whats the concept here? > The image unpack code places the machine into a mode compatible with our existing "resume from S3" trampoline. This is code that resumes the machine from real mode back into the kernel. The code is in sys/arch/[i386,amd64]/[i386,amd64]/acpi_wakecode.s -ml > > From: Theo de Raadt > Sent: Friday, March 29, 2019 7:05:54 AM > To: Mike Larkin > Cc: Shivaprashanth H; tech@openbsd.org > Subject: Re: hibernate_io function > > Mike Larkin wrote: > > > On Thu, Mar 28, 2019 at 07:02:11AM +, Shivaprashanth H wrote: > > > hi Larkin, > > > > > > yes. I am looking to port the hibernate feature from openbsd to freebsd. > > > > > > so in freebsd, i see dev/ada > > > > > > > I don't know what physical device that corresponds to. According to the > > FreeBSD man page, that could really be anything that communicates using > > the ATA command set. > > > > Once you find out what physical device it is, you'll need to implement > > a side-effect-free I/O routine. The ones we've built so far > > (wd/ahci/nvme/sdmmc) all reimplement a write function that uses private > > memory carved out of an area reserved in memory called the piglet. The > > machine is quiesced by that point (no interrupts, etc) and the write > > routine is required to only touch memory in the page it has been assigned > > in the piglet. The one that is likely closest to your needs is > > ahci_hibernate_io, found in /sys/dev/ic/ahci.c. The layout of the private > > area in the piglet is described by the struct at the head of that function. > > > > Note that in the case softraid(4) is being used, the private page is shared > > between both the side effect free softraid I/O functions and whatever > > underlying device-specific side effect free I/O function. IIRC when I > > wrote that code, I put one struct at one end of the private page and > > the other struct at the other end. I am not sure if FreeBSD has a similar > > concept. > > > > Good luck. > > And then, you'll need the underlying VM functionality that handles this > concept called "piglet", a reserved zone for storaged so that the internal > state can be copied side-effect-free to/from disk.. > > And then you'll need the actual soft-state vs hard-state storage, and > all timeouts deactivated, in all drivers, the way that suspend/resume > handle it. > > hibernate (and suspend/resume) took about 5 years to incrementally > develop in OpenBSD. > > There are lots of pieces, which we built in relationship to our > own ACPI stack, and you may not have the pleasure of making the > same decisions we made. > > the side-effect-free drivers are only a small piece of the total > framework. You may need more than good luck... > > > Disclaimer: "This message is intended only for the designated recipient(s). > It may contain confidential or proprietary information and may be subject to > other confidentiality protections. If you are not a designated recipient, you > may not review, copy or distribute this message. Please notify the sender by > e-mail and delete this message. GlobalEdge does not accept any liability for > virus infected mails."
Re: patch: minor tyop in if_jme
On 2019/03/29 15:12, leo_...@volny.cz wrote:
> [not currently subscribed, please Cc, thanks.]
>
> Yes, despite the reservation in the comment above the code with the
> tyop, the offending condition is indeed triggered on this
> particularly cheap craptop. Figuring that out is a separate
> matter...
thanks, typo fixed.
> --zeurkous.
>
> Index: src/sys/dev/pci/if_jme.c
> ===
> RCS file: /cvs/src/sys/dev/pci/if_jme.c,v
> retrieving revision 1.50
> diff -u -p -r1.50 if_jme.c
> --- src/sys/dev/pci/if_jme.c 8 Sep 2017 05:36:52 - 1.50
> +++ src/sys/dev/pci/if_jme.c 29 Mar 2019 13:57:36 -
> @@ -1738,7 +1738,7 @@ jme_rxeof(struct jme_softc *sc)
> pktlen = JME_RX_BYTES(letoh32(desc->buflen));
> if (nsegs != howmany(pktlen, MCLBYTES)) {
> printf("%s: RX fragment count(%d) "
> - "and packet size(%d) mismach\n",
> + "and packet size(%d) mismatch\n",
>sc->sc_dev.dv_xname, nsegs, pktlen);
> break;
> }
>
> --
> Friggin' Machines!
>
patch: minor tyop in if_jme
[not currently subscribed, please Cc, thanks.]
Yes, despite the reservation in the comment above the code with the
tyop, the offending condition is indeed triggered on this
particularly cheap craptop. Figuring that out is a separate
matter...
--zeurkous.
Index: src/sys/dev/pci/if_jme.c
===
RCS file: /cvs/src/sys/dev/pci/if_jme.c,v
retrieving revision 1.50
diff -u -p -r1.50 if_jme.c
--- src/sys/dev/pci/if_jme.c8 Sep 2017 05:36:52 - 1.50
+++ src/sys/dev/pci/if_jme.c29 Mar 2019 13:57:36 -
@@ -1738,7 +1738,7 @@ jme_rxeof(struct jme_softc *sc)
pktlen = JME_RX_BYTES(letoh32(desc->buflen));
if (nsegs != howmany(pktlen, MCLBYTES)) {
printf("%s: RX fragment count(%d) "
- "and packet size(%d) mismach\n",
+ "and packet size(%d) mismatch\n",
sc->sc_dev.dv_xname, nsegs, pktlen);
break;
}
--
Friggin' Machines!
Re: deprecate TASKQ_CANTSLEEP
> Date: Fri, 29 Mar 2019 14:28:42 +1000
> From: David Gwynne
>
> nothing uses it anymore, and i don't think it's useful either.
>
> for those who don't know what it did, it marked the threads used by a
> taskq so the scheduler knew they shouldnt sleep. this was used in the
> early stages of the mpsafe network stack changes to mark the softnet
> taskqs as nonsleeping so we could turn that back into an interrupt
> context with less issues. it's pretty obvious now that softnets are
> going to remain as threads though.
>
> ok?
Well, the idea was also that we wanted to keep the packet forwarding
path low-latency and therefore wanted to make sure the softnet thread
would never sleep. If the consesnus is indeed that that isn't
necessary (or isn't achievable) that's fine. And I'm all for removing
this API.
> Index: share/man/man9/task_add.9
> ===
> RCS file: /cvs/src/share/man/man9/task_add.9,v
> retrieving revision 1.18
> diff -u -p -r1.18 task_add.9
> --- share/man/man9/task_add.9 16 Dec 2018 03:40:12 - 1.18
> +++ share/man/man9/task_add.9 29 Mar 2019 04:26:01 -
> @@ -81,9 +81,6 @@ argument:
> .Bl -tag -width xxx -offset indent
> .It Dv TASKQ_MPSAFE
> The threads servicing the taskq will be run without the kernel big lock.
> -.It Dv TASKQ_CANTSLEEP
> -The tasks run via the taskq cannot sleep.
> -.El
> .Pp
> .Fn taskq_destroy
> causes the resources associated with a previously created taskq to be freed.
> Index: sys/sys/task.h
> ===
> RCS file: /cvs/src/sys/sys/task.h,v
> retrieving revision 1.13
> diff -u -p -r1.13 task.h
> --- sys/sys/task.h16 Dec 2018 03:36:02 - 1.13
> +++ sys/sys/task.h29 Mar 2019 04:26:01 -
> @@ -35,7 +35,6 @@ struct task {
> TAILQ_HEAD(task_list, task);
>
> #define TASKQ_MPSAFE (1 << 0)
> -#define TASKQ_CANTSLEEP (1 << 1)
>
> #define TASK_INITIALIZER(_f, _a) {{ NULL, NULL }, (_f), (_a), 0 }
>
> Index: sys/kern/kern_task.c
> ===
> RCS file: /cvs/src/sys/kern/kern_task.c,v
> retrieving revision 1.23
> diff -u -p -r1.23 kern_task.c
> --- sys/kern/kern_task.c 16 Dec 2018 03:36:02 - 1.23
> +++ sys/kern/kern_task.c 29 Mar 2019 04:26:01 -
> @@ -59,9 +59,6 @@ struct taskq taskq_sys_mp = {
> TAILQ_HEAD_INITIALIZER(taskq_sys_mp.tq_worklist)
> };
>
> -typedef int (*sleepfn)(const volatile void *, struct mutex *, int,
> -const char *, int);
> -
> struct taskq *const systq = _sys;
> struct taskq *const systqmp = _sys_mp;
>
> @@ -70,7 +67,7 @@ voidtaskq_create_thread(void *);
> void taskq_barrier_task(void *);
> int taskq_sleep(const volatile void *, struct mutex *, int,
> const char *, int);
> -int taskq_next_work(struct taskq *, struct task *, sleepfn);
> +int taskq_next_work(struct taskq *, struct task *);
> void taskq_thread(void *);
>
> void
> @@ -246,21 +243,7 @@ task_del(struct taskq *tq, struct task *
> }
>
> int
> -taskq_sleep(const volatile void *ident, struct mutex *mtx, int priority,
> -const char *wmesg, int tmo)
> -{
> - u_int *flags = >p_flag;
> - int rv;
> -
> - atomic_clearbits_int(flags, P_CANTSLEEP);
> - rv = msleep(ident, mtx, priority, wmesg, tmo);
> - atomic_setbits_int(flags, P_CANTSLEEP);
> -
> - return (tmo);
> -}
> -
> -int
> -taskq_next_work(struct taskq *tq, struct task *work, sleepfn tqsleep)
> +taskq_next_work(struct taskq *tq, struct task *work)
> {
> struct task *next;
>
> @@ -271,7 +254,7 @@ taskq_next_work(struct taskq *tq, struct
> return (0);
> }
>
> - tqsleep(tq, >tq_mtx, PWAIT, "bored", 0);
> + msleep(tq, >tq_mtx, PWAIT, "bored", 0);
> }
>
> TAILQ_REMOVE(>tq_worklist, next, t_entry);
> @@ -291,7 +274,6 @@ taskq_next_work(struct taskq *tq, struct
> void
> taskq_thread(void *xtq)
> {
> - sleepfn tqsleep = msleep;
> struct taskq *tq = xtq;
> struct task work;
> int last;
> @@ -299,12 +281,7 @@ taskq_thread(void *xtq)
> if (ISSET(tq->tq_flags, TASKQ_MPSAFE))
> KERNEL_UNLOCK();
>
> - if (ISSET(tq->tq_flags, TASKQ_CANTSLEEP)) {
> - tqsleep = taskq_sleep;
> - atomic_setbits_int(>p_flag, P_CANTSLEEP);
> - }
> -
> - while (taskq_next_work(tq, , tqsleep)) {
> + while (taskq_next_work(tq, )) {
> (*work.t_func)(work.t_arg);
> sched_pause(yield);
> }
> @@ -312,9 +289,6 @@ taskq_thread(void *xtq)
> mtx_enter(>tq_mtx);
> last = (--tq->tq_running == 0);
> mtx_leave(>tq_mtx);
> -
> - if (ISSET(tq->tq_flags, TASKQ_CANTSLEEP))
> - atomic_clearbits_int(>p_flag, P_CANTSLEEP);
>
> if (ISSET(tq->tq_flags, TASKQ_MPSAFE))
> KERNEL_LOCK();
>
>
net/if_var.h locks documentation
I'm mostly interested in indicating that when we have a valid reference
to an `ifp', obtained via if_get(9), it is safe to dereference if_softc.
ok?
Index: net/if_var.h
===
RCS file: /cvs/src/sys/net/if_var.h,v
retrieving revision 1.94
diff -u -p -r1.94 if_var.h
--- net/if_var.h9 Jan 2019 01:14:21 - 1.94
+++ net/if_var.h29 Mar 2019 14:49:36 -
@@ -106,6 +106,9 @@ struct if_clone {
* c only used in ioctl or routing socket contexts (kernel lock)
* k kernel lock
* N net lock
+ *
+ * For SRP related structures that allow lock-free reads, the write lock
+ * is indicated below.
*/
/*
* Structure defining a queue for a network interface.
@@ -115,7 +118,7 @@ struct if_clone {
TAILQ_HEAD(ifnet_head, ifnet); /* the actual queue head */
struct ifnet { /* and the entries */
- void*if_softc; /* lower-level data for this if */
+ void*if_softc; /* [I] lower-level data for this if */
struct refcnt if_refcnt;
TAILQ_ENTRY(ifnet) if_list; /* [k] all struct ifnets are chained */
TAILQ_HEAD(, ifaddr) if_addrlist; /* [N] list of addresses per if */
@@ -156,7 +159,7 @@ struct ifnet { /* and the
entries */
struct task if_linkstatetask; /* [I] task to do route updates */
/* procedure handles */
- SRPL_HEAD(, ifih) if_inputs;/* input routines (dequeue) */
+ SRPL_HEAD(, ifih) if_inputs;/* [k] input routines (dequeue) */
int (*if_output)(struct ifnet *, struct mbuf *, struct sockaddr *,
struct rtentry *); /* output routine (enqueue) */
/* link level output function */
Fix output accounting when a bridge is down
When a bridge is not in RUNNING state packets are simply enqueued on the
interface. But since the introduction of bridge_ifenqueue() they are
accounted as being sent through the bridge. Diff below fixes that by
calling if_enqueue() directly.
ok?
Index: net/if_bridge.c
===
RCS file: /cvs/src/sys/net/if_bridge.c,v
retrieving revision 1.325
diff -u -p -r1.325 if_bridge.c
--- net/if_bridge.c 12 Mar 2019 11:45:00 - 1.325
+++ net/if_bridge.c 29 Mar 2019 13:27:59 -
@@ -737,8 +737,10 @@ bridge_output(struct ifnet *ifp, struct
*/
sc = bif->bridge_sc;
if ((sc->sc_if.if_flags & IFF_RUNNING) == 0) {
- dst_if = ifp;
- goto sendunicast;
+ /* Loop prevention. */
+ m->m_flags |= M_PROTO1;
+ error = if_enqueue(ifp, m);
+ return (error);
}
#if NBPFILTER > 0
@@ -810,7 +812,6 @@ bridge_output(struct ifnet *ifp, struct
return (0);
}
-sendunicast:
if ((dst_if->if_flags & IFF_RUNNING) == 0) {
m_freem(m);
return (ENETDOWN);
Re: hibernate_io function
Another section I am facing difficulty in understanding is thats called TRAMPOLINE I am not finding much details on this. so whats the concept here? From: Theo de Raadt Sent: Friday, March 29, 2019 7:05:54 AM To: Mike Larkin Cc: Shivaprashanth H; tech@openbsd.org Subject: Re: hibernate_io function Mike Larkin wrote: > On Thu, Mar 28, 2019 at 07:02:11AM +, Shivaprashanth H wrote: > > hi Larkin, > > > > yes. I am looking to port the hibernate feature from openbsd to freebsd. > > > > so in freebsd, i see dev/ada > > > > I don't know what physical device that corresponds to. According to the > FreeBSD man page, that could really be anything that communicates using > the ATA command set. > > Once you find out what physical device it is, you'll need to implement > a side-effect-free I/O routine. The ones we've built so far > (wd/ahci/nvme/sdmmc) all reimplement a write function that uses private > memory carved out of an area reserved in memory called the piglet. The > machine is quiesced by that point (no interrupts, etc) and the write > routine is required to only touch memory in the page it has been assigned > in the piglet. The one that is likely closest to your needs is > ahci_hibernate_io, found in /sys/dev/ic/ahci.c. The layout of the private > area in the piglet is described by the struct at the head of that function. > > Note that in the case softraid(4) is being used, the private page is shared > between both the side effect free softraid I/O functions and whatever > underlying device-specific side effect free I/O function. IIRC when I > wrote that code, I put one struct at one end of the private page and > the other struct at the other end. I am not sure if FreeBSD has a similar > concept. > > Good luck. And then, you'll need the underlying VM functionality that handles this concept called "piglet", a reserved zone for storaged so that the internal state can be copied side-effect-free to/from disk.. And then you'll need the actual soft-state vs hard-state storage, and all timeouts deactivated, in all drivers, the way that suspend/resume handle it. hibernate (and suspend/resume) took about 5 years to incrementally develop in OpenBSD. There are lots of pieces, which we built in relationship to our own ACPI stack, and you may not have the pleasure of making the same decisions we made. the side-effect-free drivers are only a small piece of the total framework. You may need more than good luck... Disclaimer: "This message is intended only for the designated recipient(s). It may contain confidential or proprietary information and may be subject to other confidentiality protections. If you are not a designated recipient, you may not review, copy or distribute this message. Please notify the sender by e-mail and delete this message. GlobalEdge does not accept any liability for virus infected mails."
Follow Up / WE BUY YOUR VPN BUSINESS
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Re: pci_sdhc: Intel eMMC controller fix
Index: dev/pci/pcidevs === RCS file: /cvs/src/sys/dev/pci/pcidevs,v retrieving revision 1.1881 diff -u -p -r1.1881 pcidevs --- dev/pci/pcidevs 20 Mar 2019 10:51:25 - 1.1881 +++ dev/pci/pcidevs 29 Mar 2019 07:57:20 - @@ -4467,6 +4467,7 @@ product INTEL WL_3165_1 0x3165 Dual Ban product INTEL WL_3165_20x3166 Dual Band Wireless AC 3165 product INTEL GLK_UHD_605 0x3184 UHD Graphics 605 product INTEL GLK_UHD_600 0x3185 UHD Graphics 600 +product INTEL GLK_EMMC 0x31cc Gemini Lake eMMC product INTEL 312440x3200 31244 SATA product INTEL 82855PM_HB 0x3340 82855PM Host product INTEL 82855PM_AGP 0x3341 82855PM AGP Index: dev/pci/sdhc_pci.c === RCS file: /cvs/src/sys/dev/pci/sdhc_pci.c,v retrieving revision 1.20 diff -u -p -r1.20 sdhc_pci.c --- dev/pci/sdhc_pci.c 30 Apr 2016 11:32:23 - 1.20 +++ dev/pci/sdhc_pci.c 29 Mar 2019 07:57:20 - @@ -127,6 +127,12 @@ sdhc_pci_attach(struct device *parent, s PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENE_SDCARD) sc->sc.sc_flags |= SDHC_F_NOPWR0; + /* Some Intel controllers break if set to 0V bus power. */ + if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL && + (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_APOLLOLAKE_EMMC || + PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_GLK_EMMC)) + sc->sc.sc_flags |= SDHC_F_NOPWR0; + /* Some RICOH controllers need to be bumped into the right mode. */ if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RICOH && (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RICOH_R5U822 ||
Re: pci_sdhc: Intel eMMC controller fix
On 3/26/19, Mark Kettenis wrote: > Did you test this with SD-cards in slots as well as with eMMC? > Tried again with Samsung 16GB card in slot plus NOPWR0 patch and sdmmcdebug=1 eMMC works, SD slot does not work. Also tested with combinations of existing sdhc flags NODDR50, NOPWR0 or none. sdmmc0: can't send memory OCR sdmmc0: can't enable card I do not know how to fix SD/MMC slot right now. Will send patch for eMMC device ids instead of matching only intel vendor id. In the meantime I hope this debug level helps. dmesg: OpenBSD 6.5-beta (GENERIC.MP) #0: Thu Mar 28 22:05:35 EDT 2019 r...@sandisk.my.domain:/usr/src/sys/arch/amd64/compile/GENERIC.MP real mem = 451104 (3920MB) avail mem = 3976196096 (3791MB) mpath0 at root scsibus0 at mpath0: 256 targets mainbus0 at root bios0 at mainbus0: SMBIOS rev. 3.0 @ 0x78758000 (23 entries) bios0: vendor Insyde Corp. version "V1.07" date 04/13/2018 bios0: Acer Spin SP111-32N acpi0 at bios0: rev 2 acpi0: sleep states S0 S3 S4 S5 acpi0: tables DSDT FACP MSDM UEFI SSDT DBG2 LPIT MCFG PRAM SSDT SSDT SSDT SSDT DMAR BDAT TPM2 HPET NPKT SSDT SSDT FPDT UEFI DBGP WSMT SSDT SSDT SSDT APIC WDAT BGRT NHLT acpi0: wakeup devices PXSX(S4) RP01(S4) PXSX(S4) RP02(S4) PXSX(S4) RP03(S4) PXSX(S4) RP04(S4) PXSX(S4) RP05(S4) PXSX(S4) RP06(S4) XHC_(S3) XDCI(S4) HDAS(S3) acpitimer0 at acpi0: 3579545 Hz, 24 bits acpimcfg0 at acpi0 acpimcfg0: addr 0xe000, bus 0-63 acpihpet0 at acpi0: 1920 Hz acpimadt0 at acpi0 addr 0xfee0: PC-AT compat cpu0 at mainbus0: apid 0 (boot processor) cpu0: Intel(R) Pentium(R) CPU N4200 @ 1.10GHz, 4582.18 MHz, 06-5c-09 cpu0: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,3DNOWP,PERF,ITSC,FSGSBASE,SMEP,ERMS,MPX,RDSEED,SMAP,CLFLUSHOPT,PT,SHA,IBRS,IBPB,STIBP,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES cpu0: 1MB 64b/line 16-way L2 cache cpu0: smt 0, core 0, package 0 mtrr: Pentium Pro MTRR support, 10 var ranges, 88 fixed ranges cpu0: apic clock running at 80MHz cpu0: mwait min=64, max=64, C-substates=0.2.0.2.4.2.1.1, IBE cpu1 at mainbus0: apid 2 (application processor) cpu1: Intel(R) Pentium(R) CPU N4200 @ 1.10GHz, 4583.71 MHz, 06-5c-09 cpu1: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,3DNOWP,PERF,ITSC,FSGSBASE,SMEP,ERMS,MPX,RDSEED,SMAP,CLFLUSHOPT,PT,SHA,IBRS,IBPB,STIBP,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES cpu1: 1MB 64b/line 16-way L2 cache cpu1: smt 0, core 1, package 0 cpu2 at mainbus0: apid 4 (application processor) cpu2: Intel(R) Pentium(R) CPU N4200 @ 1.10GHz, 4583.71 MHz, 06-5c-09 cpu2: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,3DNOWP,PERF,ITSC,FSGSBASE,SMEP,ERMS,MPX,RDSEED,SMAP,CLFLUSHOPT,PT,SHA,IBRS,IBPB,STIBP,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES cpu2: 1MB 64b/line 16-way L2 cache cpu2: smt 0, core 2, package 0 cpu3 at mainbus0: apid 6 (application processor) cpu3: Intel(R) Pentium(R) CPU N4200 @ 1.10GHz, 4583.71 MHz, 06-5c-09 cpu3: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,3DNOWP,PERF,ITSC,FSGSBASE,SMEP,ERMS,MPX,RDSEED,SMAP,CLFLUSHOPT,PT,SHA,IBRS,IBPB,STIBP,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES cpu3: 1MB 64b/line 16-way L2 cache cpu3: smt 0, core 3, package 0 ioapic0 at mainbus0: apid 1 pa 0xfec0, version 20, 120 pins acpiprt0 at acpi0: bus 0 (PCI0) acpiprt1 at acpi0: bus -1 (RP01) acpiprt2 at acpi0: bus 1 (RP02) acpiprt3 at acpi0: bus -1 (RP03) acpiprt4 at acpi0: bus -1 (RP04) acpiprt5 at acpi0: bus -1 (RP05) acpiprt6 at acpi0: bus -1 (RP06) acpiec0 at acpi0 acpi0: GPE 0x2c already enabled acpicpu0 at acpi0: C3(10@150 mwait.1@0x60), C2(10@50 mwait.1@0x21), C1(1000@1 mwait.1@0x1), PSS acpicpu1 at acpi0: C3(10@150 mwait.1@0x60), C2(10@50 mwait.1@0x21), C1(1000@1 mwait.1@0x1), PSS acpicpu2 at acpi0: C3(10@150 mwait.1@0x60), C2(10@50 mwait.1@0x21), C1(1000@1 mwait.1@0x1), PSS acpicpu3 at acpi0: C3(10@150 mwait.1@0x60), C2(10@50 mwait.1@0x21), C1(1000@1 mwait.1@0x1), PSS acpipwrres0 at acpi0: FN00 acpitz0 at acpi0: critical temperature is 100 degC acpipci0 at acpi0 PCI0: 0x 0x0011 0x0001 acpiac0 at acpi0: AC unit online acpibat0 at acpi0: BAT0 model "AP16L5J" serial type LION oem
