pf dropping window updates and acks

2013-10-11 Thread Gerhard Roth 
In January bluhm@ introduced 'data_end' to pf.c:tcp_track_full().
Now this breaks the handling of non-data packets. They may be rejected
because the SEQ_GEQ(src-seqhi, data_end) check fails.

The patch below should fix this.

Gerhard



Index: sys/net/pf.c
===
RCS file: /cvs/src/sys/net/pf.c,v
retrieving revision 1.841
diff -u -p -u -p -r1.841 pf.c
--- sys/net/pf.c9 Oct 2013 09:32:01 -   1.841
+++ sys/net/pf.c11 Oct 2013 09:57:20 -
@@ -3940,7 +3940,7 @@ pf_tcp_track_full(struct pf_pdesc *pd, s
if (seq == end) {
/* Ease sequencing restrictions on no data packets */
seq = src-seqlo;
-   end = seq;
+   data_end = end = seq;
}
 
ackskew = dst-seqlo - ack;

Re: pf dropping window updates and acks

2013-10-11 Thread Mike Belopuhov 
On Fri, Oct 11, 2013 at 12:09 +0200, Gerhard Roth wrote:
 In January bluhm@ introduced 'data_end' to pf.c:tcp_track_full().
 Now this breaks the handling of non-data packets. They may be rejected
 because the SEQ_GEQ(src-seqhi, data_end) check fails.
 
 The patch below should fix this.
 

Makes sense to me.  OK mikeb

 Gerhard
 
 
 
 Index: sys/net/pf.c
 ===
 RCS file: /cvs/src/sys/net/pf.c,v
 retrieving revision 1.841
 diff -u -p -u -p -r1.841 pf.c
 --- sys/net/pf.c  9 Oct 2013 09:32:01 -   1.841
 +++ sys/net/pf.c  11 Oct 2013 09:57:20 -
 @@ -3940,7 +3940,7 @@ pf_tcp_track_full(struct pf_pdesc *pd, s
   if (seq == end) {
   /* Ease sequencing restrictions on no data packets */
   seq = src-seqlo;
 - end = seq;
 + data_end = end = seq;
   }
  
   ackskew = dst-seqlo - ack;

Re: Allwinner

2013-10-11 Thread Markus Hennecke 
On Sat, 5 Oct 2013, Artturi Alm wrote:

 Current version attached, extract to /sys/arch/armv7 and read the short
 notes file, no more out of allwinner/ patches needed thanks to armv7.
 
 A20 support still needs a workaround under /sys/arch/arm/cortex/ which
 i didn't include as i think support is still 'subtly' broken anyway..
 And ahci is still not working for me, but there's a couple of
 new drivers included.
 Ethernet driver survived make build of userland with /usr/src mounted
 via nfs, fwiw.
 
 Now this is totally usable for me as-is already, so any feedback is
 welcome, be it finding out possible bugs and/or confirming it's working.

Great work! I made a few changes to fix the timer code for the A20 CPU, 
the diff to your code is attached. With this I am almost booting the 
kernel on a cubieboard 2:

Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California.  All rights reserved.
Copyright (c) 1995-2013 OpenBSD. All rights reserved.  http://www.OpenBSD.org

OpenBSD 5.4-current (GENERIC-ALLWINNER) #22: Fri Oct 11 19:17:11 CEST 2013

mar...@antigone.markus-hennecke.de:/usr/src/sys/arch/armv7/compile/GENERIC-ALLWINNER
real mem  = 1073741824 (1024MB)
avail mem = 1040007168 (991MB)
mainbus0 at root
cortex0 at mainbus0
ampintc0 at cortex0 nirq 160
cpu0 at mainbus0: ARM Cortex A7 rev 4 (ARMv7 core)
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu0: 32KB(32b/l,2way) I-cache, 32KB(64b/l,4way) wr-back D-cache
allwinner0 at mainbus0: A20
awpio0 at allwinner0
awccmu0 at allwinner0
awtimer0 at allwinner0: tick rate 32KHz hz 100  stat rate 32KHz stathz 128 
counter 24000 KHz
awdog0 at allwinner0
awrtc0 at allwinner0
awuart0 at allwinner0: console
awe0 at allwinner0
awe0: address 00:00:00:00:00:00
rlphy0 at awe0 phy 1: RTL8201L 10/100 PHY, rev. 1
ahci0 at allwinner0 GHC 0x8000AE AHCI 1.1
ahci0: capabilities 
0x6726ff80NCQ,SSNTF,SALP,SAL,SCLO,SAM,SPM,PMD,SSC,PSC,CCCS, 1 ports, 32 cmds, 
gen 1 (1.5Gbps) and 2 (3Gbps)
ahci0: ports implemented: 0x0001
ahci0.0: port reset
ahci0: no device detected on port 0
scsibus0 at ahci0: 32 targets
ehci0 at allwinner0
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 Allwinner EHCI root hub rev 2.00/1.00 addr 1
ehci1 at allwinner0
usb1 at ehci1: USB revision 2.0
uhub1 at usb1 Allwinner EHCI root hub rev 2.00/1.00 addr 1
gpio0 at awpio0: 18 pins
gpio1 at awpio0: 24 pins
gpio2 at awpio0: 25 pins
gpio3 at awpio0: 28 pins
gpio4 at awpio0: 12 pins
gpio5 at awpio0: 6 pins
gpio6 at awpio0: 12 pins
gpio7 at awpio0: 28 pins
gpio8 at awpio0: 22 pins
/dev/ksyms: Symbol table not valid.

Here the output stops, I will look into that later. At this point I am 
unable to figure out how to set the ethaddr in the u-boot version I am 
using. setenv ethaddr xx:xx:xx:xx:xx:xx doesn't seem to have any effect.

Kind regards
Markusdiff -u ./GENERIC-ALLWINNER /usr/src/sys/arch/armv7/allwinner/GENERIC-ALLWINNER
--- ./GENERIC-ALLWINNER Sat Oct  5 13:31:15 2013
+++ /usr/src/sys/arch/armv7/allwinner/GENERIC-ALLWINNER Fri Oct 11 19:17:46 2013
@@ -136,6 +136,7 @@
 # XXX missing usable drivers, like run(4).
 
 ukphy* at mii? # unknown PHYs
+rlphy* at mii?
 
 scsibus*   at scsi?
 sd*at scsibus?
diff -u ./allwinnerreg.h /usr/src/sys/arch/armv7/allwinner/allwinnerreg.h
--- ./allwinnerreg.hThu Oct  3 02:33:30 2013
+++ /usr/src/sys/arch/armv7/allwinner/allwinnerreg.hFri Oct 11 16:34:06 2013
@@ -69,7 +69,7 @@
 /* A20 / Cortex-A7 */
 #define GIC_ADDR   0x01c8 /* = periphbase */
 #define GIC_SIZE   0x8000
-#define CPUCONFG_ADDR  0x01c25000 /* not in use */
+#define CPUCONFG_ADDR  0x01c25c00 /* not in use */
 #defineCPUCONFG_SIZE   0x200
-#defineCPUCNTRS_ADDR   0x01c25200 /* used by awtimer */
+#defineCPUCNTRS_ADDR   0x01c25e00 /* used by awtimer */
 #defineCPUCNTRS_SIZE   0x200
diff -u ./awtimer.c /usr/src/sys/arch/armv7/allwinner/awtimer.c
--- ./awtimer.c Fri Oct  4 13:25:23 2013
+++ /usr/src/sys/arch/armv7/allwinner/awtimer.c Fri Oct 11 19:16:40 2013
@@ -57,15 +57,16 @@
 #define TIMER_CTRL(_t) (0x10 + ((_t) * 0x10))
 
 /* A20 counter */
-#define OSC24M_CNT64_CTRL  0x280
-#define OSC24M_CNT64_LOW   0x284
-#define OSC24M_CNT64_HIGH  0x288
+#define OSC24M_CNT64_CTRL  0x80
+#define OSC24M_CNT64_LOW   0x84
+#define OSC24M_CNT64_HIGH  0x88
 
 /* A1X counter */
 #define CNT64_CTRL 0xa0
 #define CNT64_LOW  0xa4
 #define CNT64_HIGH 0xa8
 
+#define CNT64_SYNCH(1  4) /* sync to OSC24M counter */
 #define CNT64_RL_EN(1  1) /* read latch enable */
 #define CNT64_CLR_EN   (1  0) /* clear enable */
 
@@ -153,7 +154,7 @@
 awtimer_attach(struct device *parent, struct device *self, void *args)
 {
struct aw_attach_args   *aw = args;
-   uint32_t now, cr;
+   uint32_t now, cr, v;

Re: Allwinner

2013-10-11 Thread Artturi Alm 

On 10/11/13 20:39, Markus Hennecke wrote:

On Sat, 5 Oct 2013, Artturi Alm wrote:


Current version attached, extract to /sys/arch/armv7 and read the short
notes file, no more out of allwinner/ patches needed thanks to armv7.

A20 support still needs a workaround under /sys/arch/arm/cortex/ which
i didn't include as i think support is still 'subtly' broken anyway..
And ahci is still not working for me, but there's a couple of
new drivers included.
Ethernet driver survived make build of userland with /usr/src mounted
via nfs, fwiw.

Now this is totally usable for me as-is already, so any feedback is
welcome, be it finding out possible bugs and/or confirming it's working.


Great work! I made a few changes to fix the timer code for the A20 CPU,
the diff to your code is attached. With this I am almost booting the
kernel on a cubieboard 2:

Copyright (c) 1982, 1986, 1989, 1991, 1993
 The Regents of the University of California.  All rights reserved.
Copyright (c) 1995-2013 OpenBSD. All rights reserved.  http://www.OpenBSD.org

OpenBSD 5.4-current (GENERIC-ALLWINNER) #22: Fri Oct 11 19:17:11 CEST 2013
 
mar...@antigone.markus-hennecke.de:/usr/src/sys/arch/armv7/compile/GENERIC-ALLWINNER
real mem  = 1073741824 (1024MB)
avail mem = 1040007168 (991MB)
mainbus0 at root
cortex0 at mainbus0
ampintc0 at cortex0 nirq 160
cpu0 at mainbus0: ARM Cortex A7 rev 4 (ARMv7 core)
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu0: 32KB(32b/l,2way) I-cache, 32KB(64b/l,4way) wr-back D-cache
allwinner0 at mainbus0: A20
awpio0 at allwinner0
awccmu0 at allwinner0
awtimer0 at allwinner0: tick rate 32KHz hz 100  stat rate 32KHz stathz 128 
counter 24000 KHz
awdog0 at allwinner0
awrtc0 at allwinner0
awuart0 at allwinner0: console
awe0 at allwinner0
awe0: address 00:00:00:00:00:00
rlphy0 at awe0 phy 1: RTL8201L 10/100 PHY, rev. 1
ahci0 at allwinner0 GHC 0x8000AE AHCI 1.1
ahci0: capabilities 
0x6726ff80NCQ,SSNTF,SALP,SAL,SCLO,SAM,SPM,PMD,SSC,PSC,CCCS, 1 ports, 32 cmds, 
gen 1 (1.5Gbps) and 2 (3Gbps)
ahci0: ports implemented: 0x0001
ahci0.0: port reset
ahci0: no device detected on port 0
scsibus0 at ahci0: 32 targets
ehci0 at allwinner0
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 Allwinner EHCI root hub rev 2.00/1.00 addr 1
ehci1 at allwinner0
usb1 at ehci1: USB revision 2.0
uhub1 at usb1 Allwinner EHCI root hub rev 2.00/1.00 addr 1
gpio0 at awpio0: 18 pins
gpio1 at awpio0: 24 pins
gpio2 at awpio0: 25 pins
gpio3 at awpio0: 28 pins
gpio4 at awpio0: 12 pins
gpio5 at awpio0: 6 pins
gpio6 at awpio0: 12 pins
gpio7 at awpio0: 28 pins
gpio8 at awpio0: 22 pins
/dev/ksyms: Symbol table not valid.

Here the output stops, I will look into that later. At this point I am
unable to figure out how to set the ethaddr in the u-boot version I am
using. setenv ethaddr xx:xx:xx:xx:xx:xx doesn't seem to have any effect.

Kind regards
Markus



Hi,

Thanks for the patch, it looks correct when compared to the user manual
and shows how ugly sources may get when not paid enough attention,
will fix the whitespaces there also. Note that Cortex-A7 should
support agtimer found in arch/arm/cortex, which would allow cleaning
up awtimer.c from the 'added on'-kind of hacks to support A20,
priorities have kept me from trying that one out so far.

To allow it to boot further you would have to change ICP_ADDR and
ICD_ADDR in ampintc, iirc. possibly 0x1000 and 0x2000 respectively,
which is not the fix that would ever get commited even if allwinner
would be on cvs, as it'll break Cortex-A9, and unfortunately, masking
by cpu is not working option either, there is example of where it would
fail already (exynos).
FDT is the only clean solution i can think of, when there is priority on
keeping arch/arm/cortex free of SoC-dependent code.

About ethaddr, have you tried pinging another host from u-boot?
Does your u-boot support emac? the one i initially downloaded for
cubieboard2 did not iirc., if you can boot the bsd.umg over network,
and still get 00:00:00:00:00:00, i will power up my cb2 to fix awe,
as it's so far untested on A20 afaik.


-Artturi

Re: Allwinner

2013-10-11 Thread Patrick Wildt 

Am 11.10.2013 um 22:46 schrieb Artturi Alm artturi@gmail.com:

 On 10/11/13 20:39, Markus Hennecke wrote:
 On Sat, 5 Oct 2013, Artturi Alm wrote:
 
 Current version attached, extract to /sys/arch/armv7 and read the short
 notes file, no more out of allwinner/ patches needed thanks to armv7.
 
 A20 support still needs a workaround under /sys/arch/arm/cortex/ which
 i didn't include as i think support is still 'subtly' broken anyway..
 And ahci is still not working for me, but there's a couple of
 new drivers included.
 Ethernet driver survived make build of userland with /usr/src mounted
 via nfs, fwiw.
 
 Now this is totally usable for me as-is already, so any feedback is
 welcome, be it finding out possible bugs and/or confirming it's working.
 
 Great work! I made a few changes to fix the timer code for the A20 CPU,
 the diff to your code is attached. With this I am almost booting the
 kernel on a cubieboard 2:
 
 Copyright (c) 1982, 1986, 1989, 1991, 1993
 The Regents of the University of California.  All rights reserved.
 Copyright (c) 1995-2013 OpenBSD. All rights reserved.  http://www.OpenBSD.org
 
 OpenBSD 5.4-current (GENERIC-ALLWINNER) #22: Fri Oct 11 19:17:11 CEST 2013
 
 mar...@antigone.markus-hennecke.de:/usr/src/sys/arch/armv7/compile/GENERIC-ALLWINNER
 real mem  = 1073741824 (1024MB)
 avail mem = 1040007168 (991MB)
 mainbus0 at root
 cortex0 at mainbus0
 ampintc0 at cortex0 nirq 160
 cpu0 at mainbus0: ARM Cortex A7 rev 4 (ARMv7 core)
 cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
 cpu0: 32KB(32b/l,2way) I-cache, 32KB(64b/l,4way) wr-back D-cache
 allwinner0 at mainbus0: A20
 awpio0 at allwinner0
 awccmu0 at allwinner0
 awtimer0 at allwinner0: tick rate 32KHz hz 100  stat rate 32KHz stathz 128   
   counter 24000 KHz
 awdog0 at allwinner0
 awrtc0 at allwinner0
 awuart0 at allwinner0: console
 awe0 at allwinner0
 awe0: address 00:00:00:00:00:00
 rlphy0 at awe0 phy 1: RTL8201L 10/100 PHY, rev. 1
 ahci0 at allwinner0 GHC 0x8000AE AHCI 1.1
 ahci0: capabilities 
 0x6726ff80NCQ,SSNTF,SALP,SAL,SCLO,SAM,SPM,PMD,SSC,PSC,CCCS, 1 ports, 32 
 cmds, gen 1 (1.5Gbps) and 2 (3Gbps)
 ahci0: ports implemented: 0x0001
 ahci0.0: port reset
 ahci0: no device detected on port 0
 scsibus0 at ahci0: 32 targets
 ehci0 at allwinner0
 usb0 at ehci0: USB revision 2.0
 uhub0 at usb0 Allwinner EHCI root hub rev 2.00/1.00 addr 1
 ehci1 at allwinner0
 usb1 at ehci1: USB revision 2.0
 uhub1 at usb1 Allwinner EHCI root hub rev 2.00/1.00 addr 1
 gpio0 at awpio0: 18 pins
 gpio1 at awpio0: 24 pins
 gpio2 at awpio0: 25 pins
 gpio3 at awpio0: 28 pins
 gpio4 at awpio0: 12 pins
 gpio5 at awpio0: 6 pins
 gpio6 at awpio0: 12 pins
 gpio7 at awpio0: 28 pins
 gpio8 at awpio0: 22 pins
 /dev/ksyms: Symbol table not valid.
 
 Here the output stops, I will look into that later. At this point I am
 unable to figure out how to set the ethaddr in the u-boot version I am
 using. setenv ethaddr xx:xx:xx:xx:xx:xx doesn't seem to have any effect.
 
 Kind regards
 Markus
 
 
 Hi,
 
 Thanks for the patch, it looks correct when compared to the user manual
 and shows how ugly sources may get when not paid enough attention,
 will fix the whitespaces there also. Note that Cortex-A7 should
 support agtimer found in arch/arm/cortex, which would allow cleaning
 up awtimer.c from the 'added on'-kind of hacks to support A20,
 priorities have kept me from trying that one out so far.
 
 To allow it to boot further you would have to change ICP_ADDR and
 ICD_ADDR in ampintc, iirc. possibly 0x1000 and 0x2000 respectively,
 which is not the fix that would ever get commited even if allwinner
 would be on cvs, as it'll break Cortex-A9, and unfortunately, masking
 by cpu is not working option either, there is example of where it would
 fail already (exynos).
 FDT is the only clean solution i can think of, when there is priority on
 keeping arch/arm/cortex free of SoC-dependent code.

Exactly.  We have already talked and discussed that a lot. :)
There is no other way around it.

 
 About ethaddr, have you tried pinging another host from u-boot?
 Does your u-boot support emac? the one i initially downloaded for
 cubieboard2 did not iirc., if you can boot the bsd.umg over network,
 and still get 00:00:00:00:00:00, i will power up my cb2 to fix awe,
 as it's so far untested on A20 afaik.

Maybe Allwinner stores the mac address in some magic register? i.MX6 does that.
u-boot might be able to push the ethaddr env using the FDT.

 
 
 -Artturi