This should be easier to read and follows the 8 rules in Section 5 of
RFC 6724.
I tried to hit all (implemented) rules of RFC 6724 and found only one
behavioural difference, if there are two global unicast addresses
configured on an interface, like this:
inet6
> Date: Thu, 4 Jun 2020 20:33:00 +0200
> From: Christian Weisgerber
>
> Here's a proposal for implementing cpu_rnd_messybits() as a read of
> the cycle counter on alpha, powerpc, and sparc64. Since I don't have
> those archs, the diff is not even compile-tested.
>
> * alpha: RPCC is a 32-bit
This diff is for macppc "model PowerBook5,4". It adds the missing
audio volume control by changing the driver from aoa(4) to snapper(4).
Before the diff, I needed to put my ear near the speaker to check if
audio was playing. After the diff, the speaker was so loud (about
output.level=0.75) that
Here's a proposal for implementing cpu_rnd_messybits() as a read of
the cycle counter on alpha, powerpc, and sparc64. Since I don't have
those archs, the diff is not even compile-tested.
* alpha: RPCC is a 32-bit counter (in a 64-bit register)
* powerpc: TB is a 64-bit counter split into two
On Wed, Jun 03, 2020 at 05:13:42PM +0300, Paul Irofti wrote:
> On 2020-05-31 20:46, Mark Kettenis wrote:
> > Forget about all that for a moment. Here is an alternative suggestion:
> >
> > On sparc64 we need to support both tick_timecounter and
> > sys_tick_timecounter. So we need some sort of
> Date: Thu, 4 Jun 2020 17:34:44 -0400
> From: George Koehler
>
> This diff is for macppc "model PowerBook5,4". It adds the missing
> audio volume control by changing the driver from aoa(4) to snapper(4).
>
> Before the diff, I needed to put my ear near the speaker to check if
> audio was
this builds on the work mpi has been doing to prepare ix for multiq
operation. the main change is to call if_attach_queues and
if_attach_iqueues to allocate an ifq and ifiq per tx ring and rx
ring respectivly, and then tie them together. ix rx rings deliver
packets into ifiqs, and ifqs push
Mark Kettenis wrote:
> Apple just made too big a mess of their OFW device tree :(.
this isn't even the worst...
I'm also ok with George's hack.
> On 5 Jun 2020, at 4:33 am, Christian Weisgerber wrote:
>
> Here's a proposal for implementing cpu_rnd_messybits() as a read of
> the cycle counter on alpha, powerpc, and sparc64. Since I don't have
> those archs, the diff is not even compile-tested.
>
> * alpha: RPCC is a 32-bit counter
sparc64 works
alpha also works
can't test macppc for a while more, but it also looks good.
Wed, 3 Jun 2020 20:25:27 +0200 Klemens Nanni
> On Wed, Jun 03, 2020 at 05:33:24PM +0100, Nicholas Marriott wrote:
> > Actually I've got them the wrong way round here, but others have already
> > explained them anyway :-).
> Yup, which is why I will simply drop the diff: way too much hassle for
11 matches
Mail list logo
