In message [EMAIL PROTECTED], John Pettitt writes:
I read the work phk did (http://phk.freebsd.dk/soekris/pps/) and came up
with the following product idea.
The spec:
PCI 3.3v board with:
10Mhz OCXO (provision for external clock source?)
Uart (serial is an endangered on many PC's)
From: Poul-Henning Kamp [EMAIL PROTECTED]
Subject: Re: [time-nuts] Thought experiment on a low cost timing board
Date: Sat, 25 Feb 2006 10:45:54 +
Message-ID: [EMAIL PROTECTED]
Poul-Henning,
Another thing you have to be aware of is something called
'meta-stability' when you latch a signal
My solution was to replace the 'HC390 change with the elegant
PIC-based divider chain invented by Tom van Baak. This uses the 10 MHz
signal as the PIC's clock, and the tight code based on a fixed number
of wait states makes a fully synchronous divider. I was unable to
measure ANY
Arnold Tibus wrote:
Unfortunately there is only the hex list of the pic code.
As I would like to experiment as well with this modification
and try to change some parameters to fit my LPRO
and some different OCXOs I own,
is there a way to get the commented source code of it?
I
In message [EMAIL PROTECTED], Magnus Danielson writes:
Consider adding a D/A converter for tweaking OCXO. Using the two-tier
trick which SRS uses in the PRS10 may be a good and cheap way.
two-tier trick? Lacking the PRS10 schematics/service manuals...
They have two 12 bit D/As which are
They have two 12 bit D/As which are summed through a 1:1000 network to
give around 20 bits of effective resolution at the cost of some
discontinuities.
Because the ratio is only a quarter of the full ratio of the
individual D/A's, they can always center the interresting range in the
lower
PCI 3.3v board with:
10Mhz OCXO (provision for external clock source?)
Uart (serial is an endangered on many PC's)
Free running counter driven from the OCXO and readable by PC
inputs to latch the counter (how many?) with the latched result
also readable (for PPS)
I've been
I thought I'd ask opinions here about the quality of my GPSDO.
I have an HP Z3816A. I had it off for a few months (moving things
around) but started it up again several weeks ago. I've noticed it has a
24 hr fluctuation on its EFC control. I think it is related to ambient
temperature and pretty
What prompted this in the first place was the horrible temperature
sensitivity my soekris boxes exhibit - I can only keep them to within
10us of the gps 95% of the time and the occasional 100us excursion is
not uncommon. I want to be stable to the limit of the gps I'm using
- for no
At 3:50 PM -0800 2/25/06, John Pettitt wrote:
I had several goals in mind when I asked the initial question:
1) a low cost high stability ntp stratum 1 clock board - something that
when added to a sub $100 gps would yield a really stable time source for
ntp. To do this it really needs to let the
Hello Poul-Henning,
how does SRS handle OCXO aging?
If the fine DAC only has 1:1000 of their 12-bit coarse DAC, and the EFC
range is +-20Hz, then the LSB DAC can only control about 2E-09 or so over its
full range if my math is correct.
Good OCXO's (e.g. MTI) crystals usually age between
I'm primarily interested in temperature stability. I want to make my PC keep
good time rather than wander around when the box warms up because I started
reading my mail.
I've been thinking of something for a PCI card. I'm willing to cheat and
leave the adjacent slot empty if the OCXO is a
A couple of things:
a) Your box is already NTP-stabalized, right?
b) Have you looked at just going for a TCXO + a frequency synthesizer
chip and overriding the current clock on your motherboard?
My guess is that such a combination will have your computer keeping
time about as well as you'll
John Pettitt [EMAIL PROTECTED] wrote:
Tim Shoppa wrote:
My gut feeling: back up a little bit. Figure out how to do what you
want without a PCI bus, without gold fingers, without BGA's, etc.
I had several goals in mind when I asked the initial question:
1) a low cost high stability
From: Poul-Henning Kamp [EMAIL PROTECTED]
Subject: Re: [time-nuts] Thought experiment on a low cost timing board
Date: Sat, 25 Feb 2006 19:11:15 +
Message-ID: [EMAIL PROTECTED]
In message [EMAIL PROTECTED], Magnus Danielson writes:
Consider adding a D/A converter for tweaking OCXO.
In message [EMAIL PROTECTED], Hal Murray writes:
One of the things I was thinking about putting in the FPGA was a pair of 32
bit counters for implementing the unix date/time directly.
You don't even need 32bits for that:
http://phk.freebsd.dk/pubs/timecounter.pdf
And doing it in
In message [EMAIL PROTECTED], [EMAIL PROTECTED] writes:
Good OCXO's (e.g. MTI) crystals usually age between 3E-09 to 5E-010 per day
as per their spec.
They use this for the OCXO which is steered by the Rb cell, so they have
a very high feedback frequency, so I think they just live with the
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