From: "Poul-Henning Kamp" <[EMAIL PROTECTED]> Subject: Re: [time-nuts] Thought experiment on a low cost timing board Date: Sat, 25 Feb 2006 10:45:54 +0000 Message-ID: <[EMAIL PROTECTED]>
Poul-Henning, > Another thing you have to be aware of is something called > 'meta-stability' when you latch a signal in one synchronous clock > domain on a signal which is not in that domain. The usual trick > is to synchronize the external signal to the clockdomain through a > sequence (2-3) of latches. (the delay is constant and known, so > it can be handled in software). The trick here is to sample-in the trigger signal into the clock of the counters and then the counters is locked into a set of flip-flop synchronously in that clock domain. Thus registers can then be read in another clock-domain (the PCI bus clock), but best is naturally to re-clock it again in the same fashion. > Consider adding a D/A converter for tweaking OCXO. Using the two-tier > trick which SRS uses in the PRS10 may be a good and cheap way. two-tier trick? Lacking the PRS10 schematics/service manuals... Cheers, Magnus _______________________________________________ time-nuts mailing list [email protected] https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
