By the way,
If you do get a Garmin 15, make sure it is the H or L model which has WAAS.
The
regular model 15, which is cheaper, does not have WAAS.
BillWB6BNQ
WB6BNQ wrote:
If you go to the Garmin web site and look at their OEM page, you can order the
OEM versions for around $55 from
If you go to the Garmin web site and look at their OEM page, you can order the
OEM versions for around $55 from Garmin directly. I have one of their models, a
15xx OEM module (including the pigtail cable). It has PPS stated as good to 1us
but I was told it was actually good to 100ns with SA
What is the best way to generate a very stable 10.001MHz(low E-13 or
-110dBc/1Hz) to be to do high resolution heterodyne(Allan deviation)
measurements?
Using DDS?
Using PTS 500 or 250 synth and divide? Using HP 8662A and divide?
Some smart pll circuit by locking the 1000Hz to the reference in some
John -
Maybe I am not totally awake yet or have too many other things on my mind,
but, I do not understand your plots. I assume the measurements were made
with one Z3801A being the DUT and the other the reference, and, both locked
to GPS at the time. While it is probably available someplace,
ssSsSs
ssSsSSstestSSSssSs
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test?
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Here I put the two runs in color on the same plot:
http://www.leapsecond.com/museum/z3801a/z3801a-free-lock.gif
That's an interesting graph.
I find it strange that the free-running system is better than the locked
system in the range from 50 to 5000 seconds.
Hi Hal,
All GPSDO, by
That looks like a classical underdamped PLL response. You usually see this
sort of hump in a phase-noise plot when your PLL is about to break into
oscillation. :)
Either someone at HP was careless with the loop-filter constants and came
close to running out of phase margin, the Z3801A is not
On Sat, 26 Jan 2008, Bruce Griffiths wrote:
The following paper on the symmetry and correlation between the USB and
LSB components of PM and AM may be of interest:
http://tf.nist.gov/timefreq/general/pdf/1326.pdf
Where among other results it is shown that a phase detector has the same
Very nice. Thanks! (I'll report when I have my holdover experiment
finished in a few days.)
John
Tom Van Baak said the following on 01/25/2008 05:34 PM:
Tom's plots at http://www.leapsecond.com/pages/z3801a-osc/ show 13
Z3801As running in unlocked mode, measured against one of his most
The following paper on the symmetry and correlation between the USB and
LSB components of PM and AM may be of interest:
http://tf.nist.gov/timefreq/general/pdf/1326.pdf
Where among other results it is shown that a phase detector has the same
response to coherent PM sidebands and PM noise
The following paper details the effect of clock noise aliasing by
digital dividers:
http://tf.nist.gov/timefreq/general/pdf/1380.pdf
Bruce
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John -
That is great. 4 days will be over before we know it. 73 - Mike
Mike B. Feher, N4FS
89 Arnold Blvd.
Howell, NJ, 07731
732-886-5960
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On
Behalf Of John Ackermann N8UR
Sent: Friday, January 25, 2008 10:58 AM
John -
Your link did not work for me. Thanks - Mike
Mike B. Feher, N4FS
89 Arnold Blvd.
Howell, NJ, 07731
732-886-5960
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On
Behalf Of John Ackermann N8UR
Sent: Friday, January 25, 2008 8:34 AM
To: Discussion of
Anders Time said the following on 01/25/2008 07:23 AM:
What is the best way to generate a very stable 10.001MHz(low E-13 or
-110dBc/1Hz) to be to do high resolution heterodyne(Allan deviation)
measurements?
Using DDS?
Using PTS 500 or 250 synth and divide? Using HP 8662A and divide?
Some
That looks like a classical underdamped PLL response. You usually see this
sort of hump in a phase-noise plot when your PLL is about to break into
oscillation. :)
Either someone at HP was careless with the loop-filter constants and came
close to running out of phase margin, the Z3801A is
Here I put the two runs in color on the same plot:
http://www.leapsecond.com/museum/z3801a/z3801a-free-lock.gif
That's an interesting graph.
I find it strange that the free-running system is better than the locked
system in the range from 50 to 5000 seconds.
Does that mean the filter needs a
Don Collie jnr wrote:
ssSsSs
ssSsSSstestSSSssSs
?? -- Test message just above the noise floor?
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Bruce Griffiths wrote:
The following paper on the symmetry and correlation between the USB and
LSB components of PM and AM may be of interest:
http://tf.nist.gov/timefreq/general/pdf/1326.pdf
Where among other results it is shown that a phase detector has the same
response to coherent PM
The following paper details a method used by NIST for PM and AM noise
measurement system calibration.
http://tf.nist.gov/timefreq/general/pdf/1000.pdf
An accuracy of 0.14dB or better is possible.
Unlike the beat frequency method a phase detector with a sinusoidal
response isnt required.
The
There was a thread some time ago just about that. It was probably 2007, so
if you look in the archives, you should find it.
I will look for it too, as I want to index it for future reference, and if I
find it first, I'll post it again.
Didier
-Original Message-
From: [EMAIL
I realized that there hasn't been data posted about how the Z3801A
performs when operating normally in GPS lock mode -- TVB's excellent
page focuses on the oscillators when they are free running.
So, I just did an experiment measuring two well aged Z3801As in GPS lock
against one another. No
One option is to use just the programmable divider part of a PLL IC,
such as those from National Semiconductors or Analog Devices. Or, use a
Hittite HMC394 programmable counter preceded by a fast /2 flip flop.
The PLLs will need serial programming via a micro-controller or other
logic
Anders Time wrote:
What is the best way to generate a very stable 10.001MHz(low E-13 or
-110dBc/1Hz) to be to do high resolution heterodyne(Allan deviation)
measurements?
Using DDS?
Using PTS 500 or 250 synth and divide? Using HP 8662A and divide?
Some smart pll circuit by locking the 1000Hz
John Ackermann N8UR wrote:
I realized that there hasn't been data posted about how the Z3801A
performs when operating normally in GPS lock mode -- TVB's excellent
page focuses on the oscillators when they are free running.
So, I just did an experiment measuring two well aged Z3801As in GPS
Anders Time wrote:
Have been locking around for a good article on how to design a good Low
phase noise digital divider(in 600MHz to 10MHz area), but the have not found
any good literature. Today most people talk about regenerative dividers, but
are a rather complex subject.
Does anyone have
Sorry, I mistyped. Try this:
http://www.febo.com/pages/oscillators/z3801a/
John
Mike Feher said the following on 01/25/2008 08:41 AM:
John -
Your link did not work for me. Thanks - Mike
Mike B. Feher, N4FS
89 Arnold Blvd.
Howell, NJ, 07731
732-886-5960
Hi Mike --
Tom's plots at http://www.leapsecond.com/pages/z3801a-osc/ show 13
Z3801As running in unlocked mode, measured against one of his most
excellent references. So I think that plot shows what you're looking
for. I was just trying to show what you get when you are running in the
normal
Thanks to all of you who gave me suggestions. For only a test, I would
think only a PC connection plus software would be needed. The ! PPS
output would only be useful if I could use the units as a timing
module, which I do not think is correct for the Garmins I have been
looking at?
Mike, you did inspire me to do the follow-on experiment. I'm now
measuring the two units again, but this time with the antenna on unit 2
(the not-as-good one) disconnected just at the start of the run. It'll
take about 4 days to gather the same data as the other plots, so be
patient. :-)
John
I have had good success with the Garmin 15H indoors achieving DGPS / WAAS
positioning accuracy.
Frank - KC8YEY
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of [EMAIL PROTECTED]
Sent: Friday, January 25, 2008 8:48 AM
To: time-nuts@febo.com
Subject:
Anders
One option is to use just the programmable divider part of a PLL IC,
such as those from National Semiconductors or Analog Devices. Or, use a
Hittite HMC394 programmable counter preceded by a fast /2 flip flop.
The PLLs will need serial programming via a micro-controller or other
logic
See:
http://www.karlquist.com/FCS95.pdf
Or look at the 1995 FCS proceedings.
Rick Karlquist
John Ackermann N8UR wrote:
Anders Time said the following on 01/25/2008 07:23 AM:
What is the best way to generate a very stable 10.001MHz(low E-13 or
-110dBc/1Hz) to be to do high resolution
Tom's plots at http://www.leapsecond.com/pages/z3801a-osc/ show 13
Z3801As running in unlocked mode, measured against one of his most
excellent references. So I think that plot shows what you're looking
for. I was just trying to show what you get when you are running in the
normal locked
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