On 07/22/2012 01:39 AM, Bob Camp wrote:
HI
The Collins paper that Bruce referred to is the standard work on limiters /
jitter / bandwidth. It can't and doesn't address all the possible issues in a
full blown design. The math for the basic approach is all there though.
Indeed. It's a good
Maybe, it is on my list for the university IEEE download for months.
And this is the only reference?
I have seen some similar issues in a few BPSK receiver papers. Not for
time-nuting but for S/N.
- Henry
Magnus Danielson schrieb:
On 07/22/2012 01:39 AM, Bob Camp wrote:
HI
The Collins
Hi
There are papers on limiters in radio IF's going back at least into the 1930's.
That's a long... list.
Bob
On Jul 22, 2012, at 3:36 PM, ehydra wrote:
Maybe, it is on my list for the university IEEE download for months.
And this is the only reference?
I have seen some similar issues in
Wow, I have not checked this list for some time. But there is a lot said
about zero crossing detectors.
Lots and lots of replies, so many that I have not looked at all of them.
1. Do not use CMOS inverters. Even though so much has been published on
using these in linear mode by
adding a
Hi
The feedback inverter is indeed a problem with fast logic, just bias it to mid
point off the supply instead.
Narrow filters can be both a good and a bad thing at the same time. They clean
up the signal, but the also have delay. If they are narrow enough they have
lots of delay. That would
Narrow filters have high tempco on their group delay, so that's no good either.
Didier KO4BB
Bill Fuqua wlfuq...@uky.edu wrote:
Wow, I have not checked this list for some time. But there is a lot
said
about zero crossing detectors.
Lots and lots of replies, so many that I have not looked at
On 7/22/2012 2:41 PM, Bob Camp wrote:
Hi
The feedback inverter is indeed a problem with fast logic, just bias it to mid
point off the supply instead.
1. Do not use CMOS inverters. Even though so much has been published on
using these in linear mode by
adding a feedback resistor, they
