> I as well wish there was a quick way of converting it back to 10Mhz. I am
> sure it can be done, just not sure how or where to look
If the 10 MHz is visible for a second or two, there is probably a gate to
turn it on/off. If I wanted 10 MHz, I'd open it up and trace the wire back.
If it
Bryan, I also found a stable 30MHz which I think is used to clock the
optional DDS board so I intend to experiment adding an AD9851 board with 6x
multiplier enabled but first I want to try and understand why the unit
locks and only outputs 10MHz from the XC9572, something in the firmware
appears
Good question Will.
First, it divides the 10 MHz down to 1 MHz, so the oscillator would have to
be off by 10 Hz for it to lock onto the wrong cycle.
Second, the full implementation also feeds 5 MHz from the oscillator into
one of the processor's counters and checks the count every second. It
You missed the part about the 10MHz being divided by 10 million
to produce a 1PPS signal that is compared to the second 1PPS signal...
-Chuck Harris
Will wrote:
Hi,
I'm new and trying to get to grips with things.
If I understand correctly, please forgive if I have it wrong, This
locks a
Thanks Hal, that's interesting, will try and see how far I can get.
-=Bryan=-
> To: time-nuts@febo.com
> From: hmur...@megapathdsl.net
> Date: Fri, 25 Sep 2015 23:40:40 -0700
> CC: hmur...@megapathdsl.net
> Subject: Re: [time-nuts] FE-5680B Rubidium and DDS
>
>
> > I as well wish there was a
Clint, where are you seeing a 10Mhz output from the XC9752. That may be the
easier approach if 10Mhz is the desired frequency. just send it to a buffer/
amplifier. Likely most users will want to do that anyways to add additional
outputs.
-=Bryan=-
> Date: Sat, 26 Sep 2015 07:36:30 +0100
>
The 10MHz output comes from the XC9572 CPLD but the fact that it's there
for a few seconds makes me thing it's possible to recover it, by fair means
or foul.
It's possible it's just a gate, certainly looks like it's bing switched off
and there's a file which claims to be a dump of the CPLD (as
On Sat, Sep 26, 2015 at 9:54 AM, Magnus Danielson <
mag...@rubidium.dyndns.org> wrote:
> If you have an oven, it is wise to discard beat-note frequencies outside
> of some suitable range, so that it first needs to go within that range
> before any attempt to lock it is done, so that worst part of
In a few weeks I will be posting another plot. After the EFC slope drift
reversal from positive to negative, it is now starting to flatten again and
it looks like it will be again reversing and going positive again. Starting
to look sinusoidal.
Bob
>>> -Original Message-
>>> From:
mag...@rubidium.dyndns.org said:
> Another method would be to measure the phase-detector beat-note frequency
> (most have mixer-like behavior), which you should be able to measure with
> quite good precision, then set the EFC accordingly and then close the loop.
How do you get the sign out of
Hi Hal,
On 09/26/2015 11:47 PM, Hal Murray wrote:
mag...@rubidium.dyndns.org said:
Another method would be to measure the phase-detector beat-note frequency
(most have mixer-like behavior), which you should be able to measure with
quite good precision, then set the EFC accordingly and then
Hi
Why not do a FLL based on the counter and let the TDC run at 5 MHz (with 5X
the resolution)?
It’s reasonable to believe that if you run the FLL for a while you will get
things
quite close. That should allow you to run the TDC at 10 MHz.
Bob
> On Sep 26, 2015, at 7:22 AM, Jim Harman
Hi,
Another method would be to measure the phase-detector beat-note
frequency (most have mixer-like behavior), which you should be able to
measure with quite good precision, then set the EFC accordingly and then
close the loop.
If you measure for sufficient time, and fail to detect a
Hello All,
Thank you for all the answers. I have been experimenting relentlessly with
phase detectors, and finally I came up with a circuit that will isolate
lagging and forward pulses.
So, if signal is lagging the compare, it will send one pulse from the
output of the first flip flop. If the
Hello All,
Of course I could not wait for tomorrow, so built and tested the phase
comparator that I mentioned in my previous email. (with a change)
I hooked up the output (labeled 4 and 5) to my scope, and introduced a very
small phase difference between clocks,
and I get tiny tiny pulses
Hi
If you digitize the beat note it’s fairly simple:
The beat note is not really a sine wave. It’s periodic, but not a pure sine.
The
reason is fairly simple. The frequency changes as the beat note changes the EFC.
You have a lower frequency as it gets closer to the “zero frequency”.
The net
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