[time-nuts] Wavecrest 2079 and Timelab
Hi, I would like to receive some feedback on the Wavecrest 2079 using Timelab. The main question is: can someone send me some outputs related to the noise floor of the Wavecrest? I would like to be reassured that, as written in the manual, the function double(:meas:data) get the equivalent of 15 digit resolution. Thank you Luciano Message sent via Atmail Open - http://atmail.org/ ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] looking for SMT oscillator SC cut, with no oven
You might start with Leeson's equation to calculate the resonator Q that you need to get the phase noise you desire. Overtone resonators have higher Q, but they are too stiff to keep on frequency (with a reactive tuning network) under conditions in which the resonator is exposed to any practical range of (ambient) temperatures. Said another way, to get the phase noise you desire, you may need a Q that can only be achieved with an overtone resonator that cannot be brought/kept on frequency except by keeping its temperature stable (which needs to be above any expected ambient). There is a lot of good material on this topic at http://www.ieee-uffc.org/publications/books/index.asp If you can afford the complexity and power of synthesizing the desired frequency (with a DDS, perhaps) from the overtone resonator you could absorb the resonator inaccuracy with tuning commands that you send to the DDS. Mike -Original Message- From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Jim Lux Sent: Wednesday, August 26, 2015 2:24 PM To: Discussion of precise time and frequency measurement Subject: [time-nuts] looking for SMT oscillator SC cut, with no oven For a project at work, I'm looking for a good close in phase noise oscillator (better than -100dBc@ 10Hz, -120dBc would be nice) at 100 MHz in a SMT form factor. But it doesn't need good temperature stability. There's tons of SMT OCXOs out there with reasonably good performance, but they draw watts. My application is actually quite temperature stable already AND I have an external reference to measure against. Most of the lower powered oscillator modules are TCXO, and have, maybe, -80dBc at 10MHz. I guess we could go to a discrete design with a crystal and amplifier, but a little clock module would be a simpler solution. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] looking for SMT oscillator SC cut, with no oven
kb...@n1k.org said: Is there anything fundamental about SC that forces the turn over temperature to be high? Simple answer yes. More complicated answer : that depends. The crystal curve on an AT or an IT centers roughly at room temperature. When you fiddle the angles to get a stress compensated blank, that center point moves up to the 90 to 100 C range. Thanks. I guess I thought there was an extra degree of freedom so you could pick the turn over temperature. The graph at the bottom of this URL http://www.4timing.com/techcrystal.htm shows that there are actually 3 turn over temperatures. Do AT crystals used in ovens take advantage of the UTP? -- So we are just lucky that an AT cut works well at a convenient temperature and that an SC cut works well with an oven. A life form on some other star might not be so lucky. -- These are my opinions. I hate spam. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Chinese GPSDO 10 MHz error
So how does a frequency lock work? How is it implemented? Can someone sketch a schematic? And what equipment or technique is used to measure a 2hz error at 100GHz? Bob -Original Message- From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Tim Shoppa Sent: Wednesday, August 26, 2015 5:18 PM To: Discussion of precise time and frequency measurement Subject: Re: [time-nuts] Chinese GPSDO 10 MHz error Full KE5FX evaluation of BG7TBL GPSDO here: http://www.ke5fx.com/gpscomp.htm I'm wondering out loud if it might, like many hobbyist GPSDO's, be frequency-locked rather than phase-locked and thus susceptible to last-digit- counter bobble in some long-averaging counter. Tim N3QE On Wed, Aug 26, 2015 at 3:18 PM, Perry Sandeen via time-nuts time- n...@febo.com wrote: Hi, On the EEVBLOG (http://www.eevblog.com/forum/index.php) They mention that the 2014-11-06version GPSDO that was “most extensively tested, so far (by ke5x and others). (Has a) known bug, outputfrequency is not exactly 10mhz (9,999,999.999,800 Hz). This translates to ~2hzerror at 100ghz.” A question is if this bug isjust for this particular model or all other versions suspect? I realize that in and of itsself it is very small error, but errors tend to multiply or cause incorrectconclusions to testing. Another question is will the LHdisplay unit they offer work with other Trimble units such as are offered byRDR? That said, these models seem tobe a very nice turn-key systems. Regards, Perrier ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
[time-nuts] More GPS testing, KS-24361 quirk
More testing... I lost everything from roughly 12:00-24:00 UTC Tue and 10:00-20:00 UTC Wed I stumbled into an interesting quirk in the KS-24361. Short version: After it has been in holdover for 5 or 6 minutes, the GPS unit switches to tracking the non-GPS unit and says it isn't in holdover mode anymore. Long story: I have a program collecting statistics. It was plugged into the unit with the GPS, aka Secondary. A graph of holdover time didn't make sense. The response to :ROSC:HOLD:DUR? is something like 3.08000E+002,1 I think the 1 at the end says it's in holdover mode and the 308 is the number of seconds it has been in holdover. Graphing holdover shows the ramp I expect for 5 or 6 minutes. Then it drops out of holdover. It returns to holdover for a minute or two when I expect it to be recovering. Digging deeper, the status page switches from Holdover: GPS 1PPS invalid to: Recovery: fine freq adj [TI -50.0 ns] 1PPS TI -50.0 ns relative to Ext and then to Locked to Ext: stabilizing frequency TFOM 3 FFOM 1 The other box, non-GPS, aka Primary, does stay in Holdover. -- Secondary Receiver Status -- SYNCHRONIZATION . [ Outputs Valid ] SmartClock Mode ___ Reference Outputs ___ Locked to Ext TFOM 3 FFOM 0 Recovery 1PPS TI +50.0 ns relative to Ext Holdover HOLD THR 1.000 us Power-up Holdover Uncertainty Predict 11.5 us/initial 24 hrs ACQUISITION [ Ext 1PPS Valid ] Tracking: 0 Not Tracking: 10 ___ Time PRN El Az PRN El Az UTC 06:40:32 27 Aug 2015 * 1 55 270 *31 64 90 GPS 1PPS Invalid: not tracking * 3 35 310 *32 72 352 ANT DLY 1.000 us * 4 52 216Position *11 37 243MODE Hold *14 23 56 22 17 114LAT N 37:26:04.813 *23 23 260LON W 122:12:15.762 25 10 55HGT+9.95 m (GPS) ELEV MASK 10 deg *attempting to track HEALTH MONITOR . [ OK ] Self Test: OKInt Pwr: OK Oven Pwr: OK OCXO: OK EFC: OK GPS Rcv: OK -- These are my opinions. I hate spam. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Chinese GPSDO 10 MHz error
Many hobbyist GPSDO's work, by counting OCXO cycles between some number of GPS PPS assertions. Software adjusts EFC based on frequency count. Often times the frequency count used as input to the software has not just random +/- 1 bobble in last digit, but also an extra count or two in last digit depending on the hobbyists' gating choices. The systematic extra count or two will result in a frequency offset between hobbyist GPSDO and PPS. Other times bugs in the software that drives EFC might result in a systematic frequency offset. We just had a poster last week who came here with such a scheme. Tim N3QE On Wed, Aug 26, 2015 at 11:54 PM, Bob Benward rbenw...@verizon.net wrote: So how does a frequency lock work? How is it implemented? Can someone sketch a schematic? And what equipment or technique is used to measure a 2hz error at 100GHz? Bob -Original Message- From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Tim Shoppa Sent: Wednesday, August 26, 2015 5:18 PM To: Discussion of precise time and frequency measurement Subject: Re: [time-nuts] Chinese GPSDO 10 MHz error Full KE5FX evaluation of BG7TBL GPSDO here: http://www.ke5fx.com/gpscomp.htm I'm wondering out loud if it might, like many hobbyist GPSDO's, be frequency-locked rather than phase-locked and thus susceptible to last-digit- counter bobble in some long-averaging counter. Tim N3QE On Wed, Aug 26, 2015 at 3:18 PM, Perry Sandeen via time-nuts time- n...@febo.com wrote: Hi, On the EEVBLOG (http://www.eevblog.com/forum/index.php) They mention that the 2014-11-06version GPSDO that was “most extensively tested, so far (by ke5x and others). (Has a) known bug, outputfrequency is not exactly 10mhz (9,999,999.999,800 Hz). This translates to ~2hzerror at 100ghz.” A question is if this bug isjust for this particular model or all other versions suspect? I realize that in and of itsself it is very small error, but errors tend to multiply or cause incorrectconclusions to testing. Another question is will the LHdisplay unit they offer work with other Trimble units such as are offered byRDR? That said, these models seem tobe a very nice turn-key systems. Regards, Perrier ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Chinese GPSDO 10 MHz error
Look in the manual for the 8640B as they use FLL there when the lock button is pushed on the front panel. Simply, in one case, in lock, the numbers driving the frequency readout is saved and then when the oscillator drifts one way or the other, an EFC is applied that attempts to make the new readout driver number equal to the saved number. Regards - Mike Mike B. Feher, EOZ Inc. 89 Arnold Blvd. Howell, NJ, 07731 732-886-5960 office 908-902-3831 cell -Original Message- From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Bob Benward Sent: Wednesday, August 26, 2015 11:55 PM To: 'Discussion of precise time and frequency measurement' Subject: Re: [time-nuts] Chinese GPSDO 10 MHz error So how does a frequency lock work? How is it implemented? Can someone sketch a schematic? And what equipment or technique is used to measure a 2hz error at 100GHz? Bob -Original Message- From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Tim Shoppa Sent: Wednesday, August 26, 2015 5:18 PM To: Discussion of precise time and frequency measurement Subject: Re: [time-nuts] Chinese GPSDO 10 MHz error Full KE5FX evaluation of BG7TBL GPSDO here: http://www.ke5fx.com/gpscomp.htm I'm wondering out loud if it might, like many hobbyist GPSDO's, be frequency-locked rather than phase-locked and thus susceptible to last-digit- counter bobble in some long-averaging counter. Tim N3QE On Wed, Aug 26, 2015 at 3:18 PM, Perry Sandeen via time-nuts time- n...@febo.com wrote: Hi, On the EEVBLOG (http://www.eevblog.com/forum/index.php) They mention that the 2014-11-06version GPSDO that was “most extensively tested, so far (by ke5x and others). (Has a) known bug, outputfrequency is not exactly 10mhz (9,999,999.999,800 Hz). This translates to ~2hzerror at 100ghz.” A question is if this bug isjust for this particular model or all other versions suspect? I realize that in and of itsself it is very small error, but errors tend to multiply or cause incorrectconclusions to testing. Another question is will the LHdisplay unit they offer work with other Trimble units such as are offered byRDR? That said, these models seem tobe a very nice turn-key systems. Regards, Perrier ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
[time-nuts] HP5065A in the word
Hi all the HP5065A owner. I thought it was very interesting to have a list of existing HP5065A in the world. In particular, it would be nice to see where is situated the old and the new still operating. I prepared then a list with some information such as serial number, options etc. . If you want you can fill in your details and send them to me, I'll add them to the list. I'll be waiting, thanks, visit the snlist site: http://www.timeok.it/wp/hp5065a-corner-3/ Luciano Timeok Message sent via Atmail Open - http://atmail.org/ ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Chinese GPSDO 10 MHz error
The simplest form of a frequency locked loop is the XOR gate, when the driving signals are 50% square waves. To achieve lock, the phase difference will be proportional to the voltage needed to the VCO to generate the desired frequency. Start with a 5V digital gate, suppose your VCO needs 2.5V to be in frequency: the XOR output will be at 50% duty cycle to generate, out of an RC, 2.5V and the phase difference (between the reference and the VCO) will be 90 (or 270) degrees. The difference will be more or less than 90 if the required voltage is more or less than 2.5V (positive EFC) or will be more or less than 270 if the VCO has a negative EFC. On Thu, Aug 27, 2015 at 5:54 AM, Bob Benward rbenw...@verizon.net wrote: So how does a frequency lock work? How is it implemented? Can someone sketch a schematic? And what equipment or technique is used to measure a 2hz error at 100GHz? Bob -Original Message- From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Tim Shoppa Sent: Wednesday, August 26, 2015 5:18 PM To: Discussion of precise time and frequency measurement Subject: Re: [time-nuts] Chinese GPSDO 10 MHz error Full KE5FX evaluation of BG7TBL GPSDO here: http://www.ke5fx.com/gpscomp.htm I'm wondering out loud if it might, like many hobbyist GPSDO's, be frequency-locked rather than phase-locked and thus susceptible to last-digit- counter bobble in some long-averaging counter. Tim N3QE On Wed, Aug 26, 2015 at 3:18 PM, Perry Sandeen via time-nuts time- n...@febo.com wrote: Hi, On the EEVBLOG (http://www.eevblog.com/forum/index.php) They mention that the 2014-11-06version GPSDO that was “most extensively tested, so far (by ke5x and others). (Has a) known bug, outputfrequency is not exactly 10mhz (9,999,999.999,800 Hz). This translates to ~2hzerror at 100ghz.” A question is if this bug isjust for this particular model or all other versions suspect? I realize that in and of itsself it is very small error, but errors tend to multiply or cause incorrectconclusions to testing. Another question is will the LHdisplay unit they offer work with other Trimble units such as are offered byRDR? That said, these models seem tobe a very nice turn-key systems. Regards, Perrier ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Chinese GPSDO 10 MHz error
On Thu, 27 Aug 2015 17:19:34 +0200 Azelio Boriani azelio.bori...@gmail.com wrote: The simplest form of a frequency locked loop is the XOR gate, when the driving signals are 50% square waves. To achieve lock, the phase difference will be proportional to the voltage needed to the VCO to generate the desired frequency. Start with a 5V digital gate, suppose your VCO needs 2.5V to be in frequency: the XOR output will be at 50% duty cycle to generate, out of an RC, 2.5V and the phase difference (between the reference and the VCO) will be 90 (or 270) degrees. The difference will be more or less than 90 if the required voltage is more or less than 2.5V (positive EFC) or will be more or less than 270 if the VCO has a negative EFC. This is the description of a XOR gate based PLL, not an FLL. The basic difference between PLL and FLL is very very simple: A PLL measures phase, a FLL measures frequency. The control loop then steers the measured value to be as close as possible to a predetermined constant. As this steering loop is not perfect, there will be a small error. Depending on what is measured, it's either a phase or a frequency error. Attila Kinali -- I must not become metastable. Metastability is the mind-killer. Metastability is the little-death that brings total obliteration. I will face my metastability. I will permit it to pass over me and through me. And when it has gone past I will turn the inner eye to see its path. Where the metastability has gone there will be nothing. Only I will remain. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] FLL errors [WAS: Chinese GPSDO...]
Tim wrote: Many hobbyist GPSDO's work, by counting OCXO cycles between some number of GPS PPS assertions. Software adjusts EFC based on frequency count. Often times the frequency count used as input to the software has not just random +/- 1 bobble in last digit, but also an extra count or two in last digit depending on the hobbyists' gating choices. The systematic extra count or two will result in a frequency offset between hobbyist GPSDO and PPS. Other times bugs in the software that drives EFC might result in a systematic frequency offset. Good explanation. The thing that hobbyists seem to miss is that carefully designed dither is necessary to randomize irreducible FLL errors after systematic errors are minimized. To elaborate a bit, it is first necessary to chase down ALL of the systematic biases and minimize them. Once that is done, one must add just enough dither to the process to make the remaining errors stochastic and gaussian. [But understand -- dither is not a magic bullet. Adding enough dither to obtain a stochastic result without minimizing the systematic biases only gets you a source that is on frequency on average, but has high phase noise and xDEV.] Best regards, Charles ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Chinese GPSDO 10 MHz error
Hi At the most basic level: FLL is frequency locked. Consider a lock system driven by an FM discriminator. (That’s how the idea originally was done.) The output of the detector is a voltage proportional to the frequency error. With a simple loop (gain only / no integrator) you have a static frequency error. More gain gets you less frequency error. PLL is a phase locked loop. A system with a DBM running as a detector is an old school way to do this. The output of the detector is proportional to the phase difference. With a simple loop (gain only, no integrator) you have a static phase error. More gain gets you less phase error and possibly stability issues. If you add an integrator to either control loop, things get more complicated. If you go further than that they get you into a lot of debates :) The distinction between the two is much easier to see when each is paired with a simple loop. Bob On Aug 27, 2015, at 7:36 PM, Azelio Boriani azelio.bori...@gmail.com wrote: Since I have not found a strong definition for the FLL, I assumed: if PLL= zero phase error (and so zero frequency error) the FLL= same frequency, random phase. The XOR with RC is a perfect fit for this: same frequency all the time but phase determined by the EFC needed to have that frequency. The phase = constant, in the XOR/RC is true as long as the VCO is stable and the EFC has not to be altered to steer the VCO, that constant is not a design parameter but walks with the VCO frequency movement. On Thu, Aug 27, 2015 at 10:50 PM, Attila Kinali att...@kinali.ch wrote: On Thu, 27 Aug 2015 17:19:34 +0200 Azelio Boriani azelio.bori...@gmail.com wrote: The simplest form of a frequency locked loop is the XOR gate, when the driving signals are 50% square waves. To achieve lock, the phase difference will be proportional to the voltage needed to the VCO to generate the desired frequency. Start with a 5V digital gate, suppose your VCO needs 2.5V to be in frequency: the XOR output will be at 50% duty cycle to generate, out of an RC, 2.5V and the phase difference (between the reference and the VCO) will be 90 (or 270) degrees. The difference will be more or less than 90 if the required voltage is more or less than 2.5V (positive EFC) or will be more or less than 270 if the VCO has a negative EFC. This is the description of a XOR gate based PLL, not an FLL. The basic difference between PLL and FLL is very very simple: A PLL measures phase, a FLL measures frequency. The control loop then steers the measured value to be as close as possible to a predetermined constant. As this steering loop is not perfect, there will be a small error. Depending on what is measured, it's either a phase or a frequency error. Attila Kinali -- I must not become metastable. Metastability is the mind-killer. Metastability is the little-death that brings total obliteration. I will face my metastability. I will permit it to pass over me and through me. And when it has gone past I will turn the inner eye to see its path. Where the metastability has gone there will be nothing. Only I will remain. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
[time-nuts] DAC voltage on KS-24361 during holdover from jamming tests
http://www.megapathdsl.net/~hmurray/time-nuts/GPSDO/JAM-KS-2015-Aug-26.png -- These are my opinions. I hate spam. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] More GPS testing, KS-24361 quirk
Hi It would be really interesting to eventually dig up a spec on just what these two boxes are supposed to do. There are far to many “interesting features” for them all to have been un-intentional. Bob On Aug 27, 2015, at 5:41 AM, Hal Murray hmur...@megapathdsl.net wrote: More testing... I lost everything from roughly 12:00-24:00 UTC Tue and 10:00-20:00 UTC Wed I stumbled into an interesting quirk in the KS-24361. Short version: After it has been in holdover for 5 or 6 minutes, the GPS unit switches to tracking the non-GPS unit and says it isn't in holdover mode anymore. Long story: I have a program collecting statistics. It was plugged into the unit with the GPS, aka Secondary. A graph of holdover time didn't make sense. The response to :ROSC:HOLD:DUR? is something like 3.08000E+002,1 I think the 1 at the end says it's in holdover mode and the 308 is the number of seconds it has been in holdover. Graphing holdover shows the ramp I expect for 5 or 6 minutes. Then it drops out of holdover. It returns to holdover for a minute or two when I expect it to be recovering. Digging deeper, the status page switches from Holdover: GPS 1PPS invalid to: Recovery: fine freq adj [TI -50.0 ns] 1PPS TI -50.0 ns relative to Ext and then to Locked to Ext: stabilizing frequency TFOM 3 FFOM 1 The other box, non-GPS, aka Primary, does stay in Holdover. -- Secondary Receiver Status -- SYNCHRONIZATION . [ Outputs Valid ] SmartClock Mode ___ Reference Outputs ___ Locked to Ext TFOM 3 FFOM 0 Recovery 1PPS TI +50.0 ns relative to Ext Holdover HOLD THR 1.000 us Power-up Holdover Uncertainty Predict 11.5 us/initial 24 hrs ACQUISITION [ Ext 1PPS Valid ] Tracking: 0 Not Tracking: 10 ___ Time PRN El Az PRN El Az UTC 06:40:32 27 Aug 2015 * 1 55 270 *31 64 90 GPS 1PPS Invalid: not tracking * 3 35 310 *32 72 352 ANT DLY 1.000 us * 4 52 216Position *11 37 243MODE Hold *14 23 56 22 17 114LAT N 37:26:04.813 *23 23 260LON W 122:12:15.762 25 10 55HGT+9.95 m (GPS) ELEV MASK 10 deg *attempting to track HEALTH MONITOR . [ OK ] Self Test: OKInt Pwr: OK Oven Pwr: OK OCXO: OK EFC: OK GPS Rcv: OK -- These are my opinions. I hate spam. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Chinese GPSDO 10 MHz error
Attila, I concur with you, what Azelio described is a standard off the shelf PLL. An XOR for a Type I phase discriminator, characterized by a 90 degree phase lock, and with more complicated logic, a Type II PLL which locks at zero degrees. In a well designed loop, in both cases over the long term the frequency is exact, what it does have to a large extent, is phase jitter. So how does someone measure an error to 2 parts in a hundred billion? Or is that a 2 cycle slip in 100 gig cycles? Thanks to all that replied. Bob -Original Message- From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Attila Kinali Sent: Thursday, August 27, 2015 4:51 PM To: Discussion of precise time and frequency measurement Subject: Re: [time-nuts] Chinese GPSDO 10 MHz error On Thu, 27 Aug 2015 17:19:34 +0200 Azelio Boriani azelio.bori...@gmail.com wrote: The simplest form of a frequency locked loop is the XOR gate, when the driving signals are 50% square waves. To achieve lock, the phase difference will be proportional to the voltage needed to the VCO to generate the desired frequency. Start with a 5V digital gate, suppose your VCO needs 2.5V to be in frequency: the XOR output will be at 50% duty cycle to generate, out of an RC, 2.5V and the phase difference (between the reference and the VCO) will be 90 (or 270) degrees. The difference will be more or less than 90 if the required voltage is more or less than 2.5V (positive EFC) or will be more or less than 270 if the VCO has a negative EFC. This is the description of a XOR gate based PLL, not an FLL. The basic difference between PLL and FLL is very very simple: A PLL measures phase, a FLL measures frequency. The control loop then steers the measured value to be as close as possible to a predetermined constant. As this steering loop is not perfect, there will be a small error. Depending on what is measured, it's either a phase or a frequency error. Attila Kinali -- I must not become metastable. Metastability is the mind-killer. Metastability is the little-death that brings total obliteration. I will face my metastability. I will permit it to pass over me and through me. And when it has gone past I will turn the inner eye to see its path. Where the metastability has gone there will be nothing. Only I will remain. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] FLL errors
Azelio wrote: Since I have not found a strong definition for the FLL, I assumed: if PLL= zero phase error (and so zero frequency error) the FLL= same frequency, random phase. The XOR with RC is a perfect fit for this: same frequency all the time but phase determined by the EFC needed to have that frequency. The phase = constant, in the XOR/RC is true as long as the VCO is stable and the EFC has not to be altered to steer the VCO, that constant is not a design parameter but walks with the VCO frequency movement. The x in xLL refers to the parameter that is measured, which the LL attempts -- more or less successfully, depending on the particular implementation -- to drive to zero. (More correctly, the LL attempts to drive the measured quantity to a constant. Many PLLs do not lock with the controlled oscillator at 0 phase relative to the reference oscillator, they lock near 90 or 180 degrees. This includes PLLs with XOR phase detectors, which lock with the VCO at ~90 degrees to the reference oscillator.) An XOR measures the *phase* difference between two oscillators, and an xLL with an XOR detector is, therefore, a PLL. If it is incapable of locking stably, that does not make it an FLL -- it is just a defective PLL. An FLL measures the *frequency* difference between two oscillators and attempts to drive it to zero. (As I mentioned in my previous post, because of systematic biases, the FLL actually drives the frequency difference to a low value near zero. Carefully engineered dither can be added to redistribute the error stochastically around zero.) Best regards, Charles ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] looking for SMT oscillator SC cut, with no oven
Hi On Aug 26, 2015, at 7:28 PM, Hal Murray hmur...@megapathdsl.net wrote: dk...@arcor.de said: SC requires high temperature, that does not go together well with SMD and low power. Is there anything fundamental about SC that forces the turn over temperature to be high? Simple answer yes. More complicated answer : that depends. The crystal curve on an AT or an IT centers roughly at room temperature. When you fiddle the angles to get a stress compensated blank, that center point moves up to the 90 to 100 C range. To get a turn down around room, you are looking at something that is 70C away from the center of the curve. Think of a normal AT that is operating around -40C. The analogy is not perfect, but it is close enough. The crystal is moving a lot if it has a turn that far off center. Now for the more complicated part. Depending on exactly what you mean by SC, the angles that go into the blank can be fiddled a bit. You get something that has a label like “modified SC’ on it. It no longer is stress compensated. It’s still pretty good. You can bump the center of the curves up or down 10 or 20 degrees and still be “close” by some definition. The further you go, the more elastic your definition needs to be. Even with some fiddling, you still have a room temperature crystal with some major temperature slopes inside the operating range. You do *not* want to let that crystal see a draft :) Indeed if you move the phase noise limit down to 1 Hz and below, the thermal noise in a typical room will be your dominant noise source. Bob Or is is something like SC is only used in ovens and they have to be higher than ambient so nobody ever makes one at the magic angle that would give a lower turn over temp. -- These are my opinions. I hate spam. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] looking for SMT oscillator SC cut, with no oven
On 8/26/15 4:46 PM, Alex Pummer wrote: But if he needs 100dBc at 10Hz that is Wenzel's stronghold [https://twitter.com/ultralownoise] look that: http://www.wenzel.com/wp-content/parts/501-04517.pdf Yep.. got one of those sitting on my desk (or one that's very similar).. but it's a 2x2 block that draws many watts.. I want something that is 0.5x0.5 and draws 100-200 milliwatts or so. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] 3 corner hat
Thank you for the answers. I've already posted my formulas that work for phase noise. But John, I will now try your method with the Timepod and see how they compare. I did get the N corner to work with the Timepod, but as you say, that's for ADEV. You're welcome -- I haven't seen that done for PN, but on the surface I don't see why it wouldn't work. You'll always get the best data with the dual-source technique, though. It would be good to hear how your results from the two different methods compare to each other. Re: the spurs, any uncorrelated spurs on the Ch0 and Ch2 sources should average out just like the noise. But for high-level spurs close to the carrier, this process may take too long to be useful, and it won't be helpful for removing common-mode interference like ground loops. Frequency drift between Ch0 and Ch2 will also tend to keep the spurs from cancelling, and will also make it hard for the software to remove them. It's a good idea to use clean, stable sources for these types of measurements whenever possible. Just a personal note. The Timepod is the worlds best bit of electronics ever, and if John Miles was English, I would recommend him for a knighthood. John, hope you're blushing now. Heh, I'm afraid I'd have to politely decline the title. Too many people already mistake me for Rowan Atkinson, and that would only make matters worse! -- john, KE5FX Miles Design LLC ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Chinese GPSDO 10 MHz error
it is a bit more complicated FLL need circuit which is sensitive to frequency difference, it looks always, PLL need a phase detector and has a capture range, which is depend mainly on the bandwidth of the loop filter there are combined phase /frequency detectors, which are sequential circuits/logic, usually with some uncertainty --and therefore more phase noise-- at zero phase difference 73 Alex On 8/27/2015 1:50 PM, Attila Kinali wrote: On Thu, 27 Aug 2015 17:19:34 +0200 Azelio Boriani azelio.bori...@gmail.com wrote: The simplest form of a frequency locked loop is the XOR gate, when the driving signals are 50% square waves. To achieve lock, the phase difference will be proportional to the voltage needed to the VCO to generate the desired frequency. Start with a 5V digital gate, suppose your VCO needs 2.5V to be in frequency: the XOR output will be at 50% duty cycle to generate, out of an RC, 2.5V and the phase difference (between the reference and the VCO) will be 90 (or 270) degrees. The difference will be more or less than 90 if the required voltage is more or less than 2.5V (positive EFC) or will be more or less than 270 if the VCO has a negative EFC. This is the description of a XOR gate based PLL, not an FLL. The basic difference between PLL and FLL is very very simple: A PLL measures phase, a FLL measures frequency. The control loop then steers the measured value to be as close as possible to a predetermined constant. As this steering loop is not perfect, there will be a small error. Depending on what is measured, it's either a phase or a frequency error. Attila Kinali ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] looking for SMT oscillator SC cut, with no oven
Hi On Aug 27, 2015, at 3:58 AM, Hal Murray hmur...@megapathdsl.net wrote: kb...@n1k.org said: Is there anything fundamental about SC that forces the turn over temperature to be high? Simple answer yes. More complicated answer : that depends. The crystal curve on an AT or an IT centers roughly at room temperature. When you fiddle the angles to get a stress compensated blank, that center point moves up to the 90 to 100 C range. Thanks. I guess I thought there was an extra degree of freedom so you could pick the turn over temperature. Life would be so much simpler if that was true …. There are indeed a range of cuts you could make. Working out the in’s and outs of any one of them is a megabuck sort of endeavor. You can predict that this or that will happen. That only gets you just so far. There are a lot of fine details that you can only find out by experiment. The graph at the bottom of this URL http://www.4timing.com/techcrystal.htm shows that there are actually 3 turn over temperatures. The Beckman graph at the bottom of that page shows a number of curves that have no turnover (those below 0 angle) . For the ones that do have a turnover, each one has an upper turn and a lower turn. The magic point in the middle that they all go through is generally called the inflection temperature. Lots of make your head hurt info at: http://www.ieee-uffc.org/frequency-control/learning/fc_conqtz2.html I don’t see anything on a quick Google search that actually give the Beckman constants. Do AT crystals used in ovens take advantage of the UTP? Yes. On a precision AT based oven, the oven temperature is matched to the turn over of the crystal by a process known as “turn hunting”. Once this is done the unit is run over temperature and the offset from this point is adjusted to optimize the temperature performance. In a modern approach, the oven gain is also optimized for best temperature performance during the same set of temperature runs. -- So we are just lucky that an AT cut works well at a convenient temperature and that an SC cut works well with an oven. A life form on some other star might not be so lucky. The AT is far from luck. A *lot* of people spent a few decades running experiments to come up with what we call the AT. I often wonder if we have run out of two letter combinations for naming cuts and soon will have to go to three letter combos. Likewise the SC was not so much a search for temperature performance as for stress compensation in a single plane. An enormous amount of effort went into both the theoretical and the experimental sides of that discovery. In both cases, the parts we have are as much a function of equipment as anything else. The SC required double axis cutting and x-ray gear to be perfected. Earlier, the AT and it’s many cousins required the whole single axis X-ray and cutting prices to be worked out. That doesn’t even get into mounting structures or enclosures … Bob -- These are my opinions. I hate spam. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Chinese GPSDO 10 MHz error
Since I have not found a strong definition for the FLL, I assumed: if PLL= zero phase error (and so zero frequency error) the FLL= same frequency, random phase. The XOR with RC is a perfect fit for this: same frequency all the time but phase determined by the EFC needed to have that frequency. The phase = constant, in the XOR/RC is true as long as the VCO is stable and the EFC has not to be altered to steer the VCO, that constant is not a design parameter but walks with the VCO frequency movement. On Thu, Aug 27, 2015 at 10:50 PM, Attila Kinali att...@kinali.ch wrote: On Thu, 27 Aug 2015 17:19:34 +0200 Azelio Boriani azelio.bori...@gmail.com wrote: The simplest form of a frequency locked loop is the XOR gate, when the driving signals are 50% square waves. To achieve lock, the phase difference will be proportional to the voltage needed to the VCO to generate the desired frequency. Start with a 5V digital gate, suppose your VCO needs 2.5V to be in frequency: the XOR output will be at 50% duty cycle to generate, out of an RC, 2.5V and the phase difference (between the reference and the VCO) will be 90 (or 270) degrees. The difference will be more or less than 90 if the required voltage is more or less than 2.5V (positive EFC) or will be more or less than 270 if the VCO has a negative EFC. This is the description of a XOR gate based PLL, not an FLL. The basic difference between PLL and FLL is very very simple: A PLL measures phase, a FLL measures frequency. The control loop then steers the measured value to be as close as possible to a predetermined constant. As this steering loop is not perfect, there will be a small error. Depending on what is measured, it's either a phase or a frequency error. Attila Kinali -- I must not become metastable. Metastability is the mind-killer. Metastability is the little-death that brings total obliteration. I will face my metastability. I will permit it to pass over me and through me. And when it has gone past I will turn the inner eye to see its path. Where the metastability has gone there will be nothing. Only I will remain. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Chinese GPSDO 10 MHz error
Hi On Aug 26, 2015, at 11:54 PM, Bob Benward rbenw...@verizon.net wrote: So how does a frequency lock work? How is it implemented? Can someone sketch a schematic? And what equipment or technique is used to measure a 2hz error at 100GHz? As with all things, this is a “that depends sort of thing. You can measure it with a (accurate) wall clock if you wait for 10^11 seconds (that’s quite a while). If you have a counter than can measure 1x10^-9 s (1 ns) then you can get to 1x10^-11 by watching a pps for about a hundred seconds. That’s not to bad to do. If you want to do it quickly, there are commercial test boxes (the TimePod is one of many) that will measure much better than this at 1 second. If you want do it in the basement, a DMTD is a cheap way to do it. In all of these cases, you need something “better than” the device you are trying to measure to use as a comparison standard. Put another way - your counter needs to be calibrated to better than 1 ppm to measure 1 ppm. In the case of the GPSDO measurement, checking against a Cs standard or a Hydrogen Maser would work. You might also use a “known good” GPSDO. The comparison may be between 1 pps outputs or between 10 MHz outputs. In both cases the data should be the same. Your choice of 1 pps or 10 MHz needs to match up between your measuring gear, your DUT, and your reference standard. Lots of choices, lots of ways to do it. Many pieces of gear you could use to get the job done. Bob Bob -Original Message- From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Tim Shoppa Sent: Wednesday, August 26, 2015 5:18 PM To: Discussion of precise time and frequency measurement Subject: Re: [time-nuts] Chinese GPSDO 10 MHz error Full KE5FX evaluation of BG7TBL GPSDO here: http://www.ke5fx.com/gpscomp.htm I'm wondering out loud if it might, like many hobbyist GPSDO's, be frequency-locked rather than phase-locked and thus susceptible to last-digit- counter bobble in some long-averaging counter. Tim N3QE On Wed, Aug 26, 2015 at 3:18 PM, Perry Sandeen via time-nuts time- n...@febo.com wrote: Hi, On the EEVBLOG (http://www.eevblog.com/forum/index.php) They mention that the 2014-11-06version GPSDO that was “most extensively tested, so far (by ke5x and others). (Has a) known bug, outputfrequency is not exactly 10mhz (9,999,999.999,800 Hz). This translates to ~2hzerror at 100ghz.” A question is if this bug isjust for this particular model or all other versions suspect? I realize that in and of itsself it is very small error, but errors tend to multiply or cause incorrectconclusions to testing. Another question is will the LHdisplay unit they offer work with other Trimble units such as are offered byRDR? That said, these models seem tobe a very nice turn-key systems. Regards, Perrier ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
