On Mon, 20 Jan 2020 16:34:08 -0800
jimlux wrote:
> On 1/20/20 3:40 PM, Mark Haun wrote:
> > On Mon, 20 Jan 2020 17:31:51 -0500
> > Bob kb8tq wrote:
> >
> > Unfortunately I suspect the added digital power consumption in the
> > FPGA would be greater than the analog power for a PLL solution. As
>
On 1/20/20 3:40 PM, Mark Haun wrote:
On Mon, 20 Jan 2020 17:31:51 -0500
Bob kb8tq wrote:
Unfortunately I suspect the added digital power consumption in the FPGA
would be greater than the analog power for a PLL solution. As much as
it pains me to say that as a DSP guy ;) I need to think about
On Mon, 20 Jan 2020 15:40:08 -0800
Mark Haun wrote:
> I was about to say that adding a second ADC channel is really expensive
> (like $50 between AD9266 and AD9269), but I really like this idea...
> just couple a reference oscillator into the main signal path at an
> appropriate level, then use a
Link does not work, but
https://www.digikey.de/product-detail/de/ecs-inc/ECOC-2522-100.000-3FC/XC2265-ND/6578492
Sorry, Gerhard
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Am 20.01.20 um 22:57 schrieb Attila Kinali:
On Mon, 20 Jan 2020 12:50:09 -0800
Mark Haun wrote:
True enough, but remember that my motivation for using the OCXO in the
first place was to combine the required phase-noise spec with
OCXO-class frequency stability (this is for narrowband coherent
On Mon, 20 Jan 2020 17:31:51 -0500
Bob kb8tq wrote:
> > On Jan 20, 2020, at 5:16 PM, jimlux wrote:
> > On 1/20/20 1:57 PM, Attila Kinali wrote:
> >> And then there ia third way, which is IMHO even better:
> >> Your application is an SDR system, i.e. you already need some
> >> signal processing fo
Hi
> On Jan 20, 2020, at 5:16 PM, jimlux wrote:
>
> On 1/20/20 1:57 PM, Attila Kinali wrote:
>
>> And then there ia third way, which is IMHO even better:
>> Your application is an SDR system, i.e. you already need some
>> signal processing for the system to work. Why not extend this
>> to use
On 1/20/20 1:57 PM, Attila Kinali wrote:
And then there ia third way, which is IMHO even better:
Your application is an SDR system, i.e. you already need some
signal processing for the system to work. Why not extend this
to use it for the reference as well? Add another ADC and feed
the reference
On 1/20/20 1:13 PM, Bob kb8tq wrote:
Hi
I think you will find that some fairly generic oscillators will hit the “more or
less 1x10^-10” sort of spec needed for HF com work. A good OCXO will get
you into the 1x10^-12 range. The limit generally is the “floor” imposed by
propagation variance at HF.
On 1/20/20 12:50 PM, Mark Haun wrote:
On Mon, 20 Jan 2020 15:25:00 -0500
Bob kb8tq wrote:
On Jan 20, 2020, at 2:57 PM, Mark Haun wrote:
Agree except you were starting from the VFOV numbers for the 100-MHz
version. If you use their numbers for the 10-MHz version and add
20 dB for an ideal 10x
On Mon, 20 Jan 2020 12:50:09 -0800
Mark Haun wrote:
> True enough, but remember that my motivation for using the OCXO in the
> first place was to combine the required phase-noise spec with
> OCXO-class frequency stability (this is for narrowband coherent
> modulation schemes on the shortwave band
Hi
I think you will find that some fairly generic oscillators will hit the “more
or
less 1x10^-10” sort of spec needed for HF com work. A good OCXO will get
you into the 1x10^-12 range. The limit generally is the “floor” imposed by
propagation variance at HF.
Bob
> On Jan 20, 2020, at 3:50 P
On Mon, 20 Jan 2020 15:25:00 -0500
Bob kb8tq wrote:
> On Jan 20, 2020, at 2:57 PM, Mark Haun wrote:
> > Agree except you were starting from the VFOV numbers for the 100-MHz
> > version. If you use their numbers for the 10-MHz version and add
> > 20 dB for an ideal 10x multiplication, for compari
Hi
> On Jan 20, 2020, at 3:12 PM, jimlux wrote:
>
> On 1/20/20 11:44 AM, Bob kb8tq wrote:
>> Hi
>>> On Jan 20, 2020, at 2:38 PM, jimlux wrote:
>>>
>>> On 1/20/20 10:01 AM, Mark Haun wrote:
>>>
A fair question... in fact I was initially planning to use the ABLNO +
a PLL. The OCXOs
Hi
> On Jan 20, 2020, at 2:57 PM, Mark Haun wrote:
>
> On Mon, 20 Jan 2020 14:22:41 -0500
> Bob kb8tq wrote:
>> On Jan 20, 2020, at 1:36 PM, Mark Haun wrote:
>>> The VFOV405 datasheet lists typical phase noise for 10- and 100-MHz
>>> units. (Mine are 16.384 MHz.) In comparing the two oscill
On Mon, 20 Jan 2020 14:44:01 -0500
Bob kb8tq wrote:
> > On Jan 20, 2020, at 2:38 PM, jimlux wrote:
> > On 1/20/20 10:01 AM, Mark Haun wrote:
> >> A fair question... in fact I was initially planning to use the
> >> ABLNO + a PLL. The OCXOs I found, however, are CTS VFOV405's with
> >> phase noise
On Mon, 20 Jan 2020 14:22:41 -0500
Bob kb8tq wrote:
> On Jan 20, 2020, at 1:36 PM, Mark Haun wrote:
> > The VFOV405 datasheet lists typical phase noise for 10- and 100-MHz
> > units. (Mine are 16.384 MHz.) In comparing the two oscillators, I
> > have used the 100-MHz "typical" numbers which the
Hi
> On Jan 20, 2020, at 2:38 PM, jimlux wrote:
>
> On 1/20/20 10:01 AM, Mark Haun wrote:
>
>> A fair question... in fact I was initially planning to use the ABLNO +
>> a PLL. The OCXOs I found, however, are CTS VFOV405's with phase noise
>> claimed to be just as good as the ABLNO or CVHD VCXO
On 1/20/20 10:01 AM, Mark Haun wrote:
A fair question... in fact I was initially planning to use the ABLNO +
a PLL. The OCXOs I found, however, are CTS VFOV405's with phase noise
claimed to be just as good as the ABLNO or CVHD VCXOs:
https://www.ctscorp.com/wp-content/uploads/VFOV405.pdf
They
Hi
> On Jan 20, 2020, at 1:36 PM, Mark Haun wrote:
>
> On Mon, 20 Jan 2020 13:13:00 -0500
> Bob kb8tq wrote:
>> On Jan 20, 2020, at 1:01 PM, Mark Haun wrote:
>>> A fair question... in fact I was initially planning to use the
>>> ABLNO + a PLL. The OCXOs I found, however, are CTS VFOV405's wit
On Mon, 20 Jan 2020 13:13:00 -0500
Bob kb8tq wrote:
> On Jan 20, 2020, at 1:01 PM, Mark Haun wrote:
> > A fair question... in fact I was initially planning to use the
> > ABLNO + a PLL. The OCXOs I found, however, are CTS VFOV405's with
> > phase noise claimed to be just as good as the ABLNO or
Hi
> On Jan 20, 2020, at 1:01 PM, Mark Haun wrote:
>
> Hi Attila,
>
> On Mon, 20 Jan 2020 14:29:15 +0100
> Attila Kinali wrote:
>> On Mon, 20 Jan 2020 11:13:46 +0100
>> Attila Kinali wrote:
>>
>>> With those constraints, and reading the discussion, I wonder why
>>> don't consider a VCXO+PLL
Hi Attila,
On Mon, 20 Jan 2020 14:29:15 +0100
Attila Kinali wrote:
> On Mon, 20 Jan 2020 11:13:46 +0100
> Attila Kinali wrote:
>
> > With those constraints, and reading the discussion, I wonder why
> > don't consider a VCXO+PLL solution. Using something like the
> > Abracon ABLNO and a generic
On Mon, 20 Jan 2020 11:13:46 +0100
Attila Kinali wrote:
> With those constraints, and reading the discussion, I wonder why don't
> consider a VCXO+PLL solution. Using something like the Abracon ABLNO and
> a generic PLL (e.g. ADF4001) would give you above performance. The ABLNO
> are so low noise
On Sat, 18 Jan 2020 16:28:56 -0800
Mark Haun wrote:
> Constraints in order of importance:
>
> 1. Don't degrade the nice phase noise of the OCXO (-90 @ 1, -120 @10,
> -140 @ 100, -160 @ 1k) any more than necessary; at the very least, it
> should not impact the ADC noise floor in the primary 0-40
On Mon, Jan 20, 2020 at 12:49 AM Magnus Danielson
wrote:
>
> I would be very interested to do exactly that. I've actually had issues
> getting the Prologix do things exactly as I want, and I blame that on my
> inability to focus long enough to read the manual to understand it
> properly. The lack
Try AbeBooks ...
-Original Message-
From: time-nuts [mailto:time-nuts-boun...@lists.febo.com] On Behalf Of Alex
Pummer
Sent: 20 January 2020 03:38
To: time-nuts@lists.febo.com
Subject: Re: [time-nuts] Odd-order multiplication of CMOS-output OCXO
I got my German edition of T+S [16] for $
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