Hi
A lot depends on the output frequency of your OCXO. If it puts out 900 MHz,
that’s a bit different than if it puts out 9 MHz. For “normal” OCXO’s in the sub
30 MHz region, CMOS logic will do the division just fine. If a PICDIV is a
candidate,
I’m guessing the OCXO is in this range.
You
I've read that the so-called regenerative frequency divider has
exceptionally low
phase noise. You could cascade four of them, each dividing by 3. It's not
the
simplest thing in the world, but might yield really good phase noise
performance.
Back when I worked at TEK on the 2710 (low-cost SA)
For a 10 MHz clock, 74HC would be fine. For small numbers like 81, a
couple of 74HC163s would do it, and be good to go since they're
synchronous anyway.
For large numbers, my go-to divider is the 74HC4040 12-bit ripple
counter. It can be rigged for any fixed integer divide ratio from 3 to
> I need to divide the output of an OCXO by a factor D=81 for testing purposes.
> So with minimum added phase noise. PICDIV-like approches would not work (D
> needs to be divisible by 8 or at least be even) I went through the archives
> and it seems that an Injection Locked Frequency Divider
Why don't you simply divide by 81 with a normal CMOS divider and
synchronize its output with a 7474-like flipflop to the original clock?
The phase noise would be determined only by this last flipflop.
regards, Gerhard
Am 18.06.20 um 13:58 schrieb Gilles Clement:
Hi
I need to divide the
Hi Gilles, I didn't peruse the linked paper, but I usually use a re-sync
FF MC100ep51 or 52 with the clock at the pre-divider rate, and the "D"
coming from in my case an FPGA. thai eliminates the phase noise
contributed by the FPGA. The nice thing with an FPGA, is you can use the
LVDS outputs
Depending on your needs there are many off-the-shelf programmable
frequency divider IC's.
Most of the modern ones are not programmed by strapping pins but by serial
connection to a microcontroller so this may not be your cup of tea.
If so, look at the math and note that 81 = 9*9 or 3*3*3*3.
Two
Hi
I need to divide the output of an OCXO by a factor D=81 for testing purposes.
So with minimum added phase noise.
PICDIV-like approches would not work (D needs to be divisible by 8 or at least
be even)
I went through the archives and it seems that an Injection Locked Frequency
Divider with
