Hi

A lot depends on the output frequency of your OCXO. If it puts out 900 MHz, 
that’s a bit different than if it puts out 9 MHz. For “normal” OCXO’s in the sub
30 MHz region, CMOS logic will do the division just fine. If a PICDIV is a 
candidate,
I’m guessing the OCXO is in this range. 

You will be in the vicinity of 100 KHz with the output dividing from a 5 or 10 
MHz
OCXO. That means the noise floor of the logic is the main issue. The modern LVC
(and similar) logic families seem to have pretty good noise floors.

All this is just a guess without much to base it on …..

Bob

> On Jun 18, 2020, at 7:58 AM, Gilles Clement <[email protected]> wrote:
> 
> Hi 
> I need to divide the output of an OCXO by a factor D=81 for testing purposes. 
> So with minimum added phase noise.
> PICDIV-like approches would not work (D needs to be divisible by 8 or at 
> least be even) 
> I went through the archives and it seems that an Injection Locked Frequency 
> Divider with resynchronization flip-flop could be a simple and acceptable 
> solution. 
> As described in the following Wenzel paper: Unusual Frequency 
> Dividerswww.wenzel.com › uploads › dividers 
> <https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=&cad=rja&uact=8&ved=2ahUKEwik49qGpIvqAhURahQKHTBVClAQFjABegQIARAB&url=http%3A%2F%2Fwww.wenzel.com%2Fwp-content%2Fuploads%2Fdividers.pdf&usg=AOvVaw2m-9lURROiSbG9XykiDNDU>
> Does this make sense? 
> Gilles. 
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