On 8/15/2017 4:13 PM, Haris Okanovic wrote:
ioread8() operations to TPM MMIO addresses can stall the cpu when
immediately following a sequence of iowrite*()'s to the same region.
For example, cyclitest measures ~400us latency spikes when a non-RT
usermode application communicates with an
On 8/14/2017 6:10 AM, Jarkko Sakkinen wrote:
Nuvoton, ST Micro, and Infineon confirmed that the TPM empties a byte from
the FIFO in under 1 usec. So, even with a static burst count, the entire
FIFO would empty in under 10 usec.
Does this break anything lets say in a decade time frame? If it
On Tue, 15 Aug 2017 18:02:57 -0400
Ken Goldman wrote:
> On 8/13/2017 7:53 PM, msuchanek wrote:
> > About 500 out of 700 mainboards sold today has a PS/2 port which is
> > probably due to prevalence of legacy devices and usbhid limitations.
> >
> > Similarily many