Hi Tom,
On Thu, Aug 9, 2012 at 9:31 PM, Tom Rini tr...@ti.com wrote:
Make the lowlevel_init function that these platforms have which just
sets up the stack and calls a C function available to all armv7
platforms. As part of this we change some of the macros that are used
to be more clear.
On 08/10/2012 08:08 PM, Wolfgang Denk wrote:
In message 5024cc15.8010...@keymile.com you wrote:
due to the fact that Gerlando is in his vacations and has therefore only
little
time to do updates here I propose the following. I could prepare a branch as
you
suggested based on current denx
Hello,
I'm not usually this pedantic, but about 9 years ago I ported the CoLiLo boot
loader to the ColdFire MCF5249 platform, and it appears as though some of my
code has been assimilated into U-Boot. I recently came across my comments
verbatim in the master branch! Please see lines 681-684
On 09/08/2012 18:01, Tom Rini wrote:
Hey all,
Hi Tom,
As Allen Martin noted, on tegra platforms a bug is exposed when using
certain toolchains that currently calls to lowlevel_init must be calls
to another assembly function as the stack is not explicitly setup /
saved and thus register
From: Shrinivas Sahukar shrinivas.sahu...@lntinfotech.com
*** This patch series contains the following support for Qualcomm chipsets ***
* MSM7630: USB Gadget support
* MSM 7x27a: Add support for qualcomm msm 7x27a SOC
* MSM 7x27a: Add support for qualcomm msm7x27a surf board
* MSM7x27a:
Signed-off-by: Srikanth Reddy Vintha srikanth.re...@lntinfotech.com
---
board/qcom/msm7x27a_surf/Makefile| 56 +
board/qcom/msm7x27a_surf/msm7x27a_surf.c | 126 +
board/qcom/msm7x27a_surf/msm7x27a_surf.h | 27 ++
boards.cfg
Signed-off-by: Srikanth Reddy Vintha srikanth.re...@lntinfotech.com
---
arch/arm/include/asm/arch-msm7630/irqs.h | 162 +
drivers/serial/usbtty.h |2 +
drivers/usb/gadget/Makefile |1 +
drivers/usb/gadget/msm_udc.c | 540
Signed-off-by: Srikanth Reddy Vintha srikanth.re...@lntinfotech.com
---
arch/arm/cpu/armv7/msm7x27a/acpuclock.c|6 +
arch/arm/include/asm/arch-msm7x27a/iomap.h |1 +
arch/arm/include/asm/arch-msm7x27a/irqs.h | 138
include/configs/msm7x27a_surf.h
From: Shrinivas Sahukar shrinivas.sahu...@lntinfotech.com
Signed-off-by: Shrinivas Sahukar shrinivas.sahu...@lntinfotech.com
---
drivers/mmc/qc_mmc.c | 71 +++--
1 files changed, 68 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/qc_mmc.c
Signed-off-by: Srikanth Reddy Vintha srikanth.re...@lntinfotech.com
---
arch/arm/cpu/armv7/msm7x27a/Makefile | 53
arch/arm/cpu/armv7/msm7x27a/acpuclock.c| 252 +++
arch/arm/cpu/armv7/msm7x27a/board.c| 66
Signed-off-by: Srikanth Reddy Vintha srikanth.re...@lntinfotech.com
---
board/qcom/msm7x27a_surf/Makefile| 56 +
board/qcom/msm7x27a_surf/msm7x27a_surf.c | 126 +
board/qcom/msm7x27a_surf/msm7x27a_surf.h | 27 ++
boards.cfg
From: Shrinivas Sahukar shrinivas.sahu...@lntinfotech.com
*** This patch series contains the following support for Qualcomm chipsets ***
* MSM7630: USB Gadget support
* MSM 7x27a: Add support for qualcomm msm 7x27a SOC
* MSM 7x27a: Add support for qualcomm msm7x27a surf board
* MSM7x27a:
Signed-off-by: Srikanth Reddy Vintha srikanth.re...@lntinfotech.com
---
arch/arm/include/asm/arch-msm7630/irqs.h | 162 +
drivers/serial/usbtty.h |2 +
drivers/usb/gadget/Makefile |1 +
drivers/usb/gadget/msm_udc.c | 540
From: Shrinivas Sahukar shrinivas.sahu...@lntinfotech.com
Signed-off-by: Shrinivas Sahukar shrinivas.sahu...@lntinfotech.com
---
drivers/mmc/qc_mmc.c | 71 +++--
1 files changed, 68 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/qc_mmc.c
Signed-off-by: Srikanth Reddy Vintha srikanth.re...@lntinfotech.com
---
arch/arm/cpu/armv7/msm7x27a/acpuclock.c|6 +
arch/arm/include/asm/arch-msm7x27a/iomap.h |1 +
arch/arm/include/asm/arch-msm7x27a/irqs.h | 138
include/configs/msm7x27a_surf.h
Signed-off-by: Srikanth Reddy Vintha srikanth.re...@lntinfotech.com
---
arch/arm/cpu/armv7/msm7x27a/Makefile | 53
arch/arm/cpu/armv7/msm7x27a/acpuclock.c| 252 +++
arch/arm/cpu/armv7/msm7x27a/board.c| 66
From: Andreas Bießmann biessm...@corscience.de
The avr32 architecture (and some others) require manual relocation. Due to the
previous error all avr32 boards gave warnings in MAKEALL wich makes it hard to
find new warnings.
This patch fixes following warning:
---8---
dlmalloc.c: In function
Dear Benoît Thébaudeau,
On 10.08.2012 21:55, Benoît Thébaudeau wrote:
AVR32's LD script uses a standard location that is now automatically detected
by
the main Makefile, so its definition in AVR32's config.mk is now obsolete and
redundant.
Signed-off-by: Benoît Thébaudeau
Add pci_mpc5xxx_init() prototype to the header file, so board .c files
do not need to add extern pci_mpc5xxx_init() declaration.
Signed-off-by: Anatolij Gustschin ag...@denx.de
---
include/mpc5xxx.h |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/include/mpc5xxx.h
Add posibility for board specifig GPIO configurations using
various CONFIG_SYS_ macros.
Signed-off-by: Anatolij Gustschin ag...@denx.de
---
arch/powerpc/cpu/mpc5xxx/cpu_init.c | 14 ++
1 files changed, 14 insertions(+), 0 deletions(-)
diff --git
Add common code for o2dnt and o2dnt2 based boards and add different
board configuration files for O2D, O2I, O2DNT2, O2D300, O2MNT and
O3DNT boards.
Signed-off-by: Anatolij Gustschin ag...@denx.de
---
board/ifm/o2dnt2/Makefile | 34
board/ifm/o2dnt2/o2dnt2.c | 400
Remove old o2dnt board without OF support. New support for this board
is added by the previous patch, O2D configuration.
Signed-off-by: Anatolij Gustschin ag...@denx.de
---
board/o2dnt/Makefile | 45
board/o2dnt/flash.c | 587 --
On 08/11/2012 06:20 PM, Mike Frysinger wrote:
On Tuesday 05 June 2012 02:37:55 Stefan Roese wrote:
--- /dev/null
+++ b/drivers/bootcount/Makefile
+COBJS-$(CONFIG_BFIN_CPU)+= bootcount_blackfin.o
needs to be CONFIG_BLACKFIN
Okay.
+all:$(LIB)
unused rule - delete
Okay.
Dear =?utf-8?Q?Beno=C3=AEt_Th=C3=A9baudeau?=,
In message 1012612599.2335651.1344807326593.javamail.r...@advansee.com you
wrote:
Please feel free to add this to your local code.
By local, do you mean that this new suggestion would still not be generic
enough for you to be interested in it
Dear Bud Miljkovic,
In message
fd2dbc0e1365154bb0e3e348680ba0e903430...@nzc-ap-xch-03.ap.trimblecorp.net you
wrote:
My you boot does not support if statement in it command line.
Your board is probably using the old, simple command line
interpreter.
I thought it did. Is there some
Dear Holger Brunck,
In message 5028ab80.5030...@keymile.com you wrote:
time to do updates here I propose the following. I could prepare a branch
as you
suggested based on current denx master with this changeset. But where and
how
should I push it to git.denx.de? Or will you prepare
Dear Jeremy,
In message cdeaab86-94d1-402d-b6c7-e72a337a2...@jeremya.com you wrote:
I'm not usually this pedantic, but about 9 years ago I ported the
CoLiLo boot loader to the ColdFire MCF5249 platform, and it appears
as though some of my code has been assimilated into U-Boot. I
recently
-Original Message-
From: Marek Vasut [mailto:ma...@denx.de]
Sent: Sunday, August 12, 2012 7:47 AM
To: Jim Lin
Cc: u-boot@lists.denx.de; Wolfgang Denk; Tom Warren
Subject: Re: [U-Boot] [PATCH v2 1/1] USB: EHCI: Initialize multiple USB
controllers at once
diff --git a/common/cmd_usb.c
Dear Charles,
In message 20120810224140.0f1b9204...@gemini.denx.de I wrote:
Dear Charles,
In message 20120809213931.755ad204...@gemini.denx.de I wrote:
In message 1336618517-2947-1-git-send-email-cdhmann...@gmail.com you
wrote:
This patch updates the yaffs2 in u-boot to correspond
mtest tests many types of memory accesses in many different conditions. If
dcache is enabled, memory accesses are likely bursts, and some memory accesses
are simply skipped. Hence, mtest results may change depending on dcache state.
This patch prints the dcache state at the beginning of mtest so
On Sat, Aug 11, 2012 at 08:15:43AM -0400, Jerry Van Baren wrote:
On 07/27/2012 05:16 AM, Markus Hubig wrote:
one minor Problem I often read about in this list is some crappy /
unreadable
console output at beginning of the U-Boot start procedure. Now I have the
same
visual Problem.
Hi Wolfgang,
On 08/13/2012 12:20 PM, Wolfgang Denk wrote:
I'm not usually this pedantic, but about 9 years ago I ported the
CoLiLo boot loader to the ColdFire MCF5249 platform, and it appears
as though some of my code has been assimilated into U-Boot. I
recently came across my comments
Hi,
I was planning to write a u-boot driver for UFS. Is there any method
through which a new scsi device driver can be supported with u-boot.
Is there any patch available for UFS device driver in u-boot ?
--
regards,
Shashidhar Hiremath
___
U-Boot
Dear Rob Herring,
In message 50244d5a.3080...@gmail.com you wrote:
I reported already that the prior version that ext4 has issues with
sub-directories. I don't think that has been addressed in V5. Some
directories show up fine and some don't. So it's kind of random whether
u-boot can read a
Dear Uma Shankar,
In message 20120809215050.89de2204...@gemini.denx.de I wrote:
Applied to ext4 branch, thanks.
I did some performance tests on a MPC5200 based board using the IDE
interface (no DMA):
= vers
U-Boot 2012.07-00125-ged34f34 (Aug 10 2012 - 09:36:33)
powerpc-linux-gcc (GCC) 4.6.4
This patch moves all bootcount implementations into a common
directory: drivers/bootcount. The generic bootcount driver
is now usable not only by powerpc platforms, but others as well.
Signed-off-by: Stefan Roese s...@denx.de
Cc: Heiko Schocher h...@denx.de
Cc: Valentin Longchamp
On Mon, 13 Aug 2012 11:38:12 +0200
Anatolij Gustschin ag...@denx.de wrote:
Remove old o2dnt board without OF support. New support for this board
is added by the previous patch, O2D configuration.
Signed-off-by: Anatolij Gustschin ag...@denx.de
---
board/o2dnt/Makefile | 45
Hi Wolfgang,
On Thu, 09 Aug 2012 22:36:33 +0200, Wolfgang Denk w...@denx.de wrote:
Dear Albert ARIBAUD,
In message
cajhhwatayrt3gbzhrdcqhphrp5hbx3vd2xyuyymsled8xwe...@mail.gmail.com
you wrote:
Sorry Luka (and all), been tied up pretty heavily recently, had to
adjust to find some free
On Mon, 13 Aug 2012 11:38:12 +0200
Anatolij Gustschin ag...@denx.de wrote:
...
board/o2dnt/Makefile | 45
board/o2dnt/flash.c | 587
--
board/o2dnt/o2dnt.c | 189
boards.cfg |1 -
4 files changed, 0
On 08/09/2012 10:22 AM, Holger Brunck wrote:
commit 54652991
Work around bug in Numonyx P33/P30 256-Mbit 65nm flash chips
fixes a problem for Numonyx P33/P30 flashes for 256-Mbit, but this leads
to problems for smaller versions of this chip e.g. the 32Mbit version
with deviceid 0x16 on
On 08/09/2012 08:18 AM, Anatolij Gustschin wrote:
Erasing flash sectors protected with persistent protection bit (PPB)
mechanism on Spansion flash chips doesn't work. Add sector protection
status checking and sector lock and unlock commands to fix this.
Signed-off-by: Anatolij Gustschin
Commit 155cb01 replaced the read-only property of the ver env var with an
auto-restoring behavior. Update the README file accordingly.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Cc: Wolfgang Denk w...@denx.de
---
{u-boot-4d3c95f.orig = u-boot-4d3c95f}/README |3 ++-
1
Hi Wolfgang,
please pull the following patches:
The following changes since commit b4f106be2d8a4eb34ce41c5306d5a4fcc37e60e3:
dts/Makefile: Turn off some predefined macros (2012-08-10 23:54:16 +0200)
are available in the git repository at:
git://www.denx.de/git/u-boot-cfi-flash.git master
The iomux-mx28.h include is not required on spl_mem_init.c so it has
been droped.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c |1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
The CLKCTRL registers are SoC specific so we ought to have it clear on
filename.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
arch/arm/include/asm/arch-mxs/imx-regs.h |2 +-
.../arm/include/asm/arch-mxs/{regs-clkctrl.h = regs-clkctrl-mx28.h} |0
The sys_proto.h functions (except the boot modes) are compatible with
i.MX233 and i.MX28 so we use 'mxs' prefix for its methods.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
arch/arm/cpu/arm926ejs/mxs/mxs.c | 32 ++---
Dear Stefan Roese,
On 05.06.2012 08:37, Stefan Roese wrote:
This patch moves all bootcount implementations into a common
directory: drivers/bootcount. The generic bootcount driver
is now usable not only by powerpc platforms, but others as well.
Signed-off-by: Stefan Roese s...@denx.de
Cc:
Hi Andreas,
On 08/13/2012 03:11 PM, Andreas Bießmann wrote:
+LIB := $(obj)libbootcount.o
+
+COBJS-y += bootcount.o
+COBJS-$(CONFIG_AT91SAM9XE) += bootcount_at91.o
I tend to NAK this. Before it was available to all at91 processors (keep
in mind nearly
Hi Stefan,
On 13.08.2012 15:37, Stefan Roese wrote:
Hi Andreas,
On 08/13/2012 03:11 PM, Andreas Bießmann wrote:
+LIB:= $(obj)libbootcount.o
+
+COBJS-y+= bootcount.o
+COBJS-$(CONFIG_AT91SAM9XE) += bootcount_at91.o
I tend to NAK this. Before it was
Dear Wolfgang,
We have tested this feature on Samsung Boards using mmc interface. Here is a
sample test run with exactly the same file size which you have used for
testing
[Mon Aug 13 19:05:51.824 2012] # ext4load mmc 0:6 0x40007fc0 abc.tar
[Mon Aug 13 19:05:51.846 2012] Loading file abc.tar
Define ARCH_IMX for i.MX devices. This is useful to identify features or
behaviors common to all i.MX SoCs.
The i.MX28 is omitted because its architecture is a bit different (like imx/mxc
vs. mxs in Linux).
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Cc: Stefano Babic
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so
disable it globally for this architecture. This avoids setting no_snoop for all
i.MX boards, and it prevents setting a reserved bit of a reserved register if
fsl_esdhc_mmc_init() were used for an i.MX board.
On 13/08/2012 16:18, Benoît Thébaudeau wrote:
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX,
so
disable it globally for this architecture. This avoids setting no_snoop for
all
i.MX boards, and it prevents setting a reserved bit of a reserved register if
Hi Stefano,
On 08/13/2012 16:24, Stefano Babic wrote:
On 13/08/2012 16:18, Benoît Thébaudeau wrote:
The cache snooping feature of Freescale's eSDHC IP is not available
on i.MX, so
disable it globally for this architecture. This avoids setting
no_snoop for all
i.MX boards, and it
Hi Andreas,
On 08/13/2012 03:48 PM, Andreas Bießmann wrote:
+COBJS-y += bootcount.o
+COBJS-$(CONFIG_AT91SAM9XE)+= bootcount_at91.o
I tend to NAK this. Before it was available to all at91 processors (keep
in mind nearly all at91 have this gpbr register). Now
On Monday 13 August 2012 05:02:03 Andreas Bießmann wrote:
From: Andreas Bießmann biessm...@corscience.de
The avr32 architecture (and some others) require manual relocation. Due to
the previous error all avr32 boards gave warnings in MAKEALL wich makes it
hard to find new warnings.
This
On 08/12/2012 11:28 PM, R, Sricharan wrote:
Hi Tom,
On Thu, Aug 9, 2012 at 9:31 PM, Tom Rini tr...@ti.com wrote:
Make the lowlevel_init function that these platforms have which just
sets up the stack and calls a C function available to all armv7
platforms. As part of this we change some of
On 08/13/2012 12:48 AM, Stefano Babic wrote:
On 09/08/2012 18:01, Tom Rini wrote:
Hey all,
Hi Tom,
As Allen Martin noted, on tegra platforms a bug is exposed when using
certain toolchains that currently calls to lowlevel_init must be calls
to another assembly function as the stack is
Hi Stefan,
On 13.08.2012 16:51, Stefan Roese wrote:
Hi Andreas,
On 08/13/2012 03:48 PM, Andreas Bießmann wrote:
+COBJS-y += bootcount.o
+COBJS-$(CONFIG_AT91SAM9XE) += bootcount_at91.o
I tend to NAK this. Before it was available to all at91 processors (keep
Dear Mike Frysinger,
On 13.08.2012 16:54, Mike Frysinger wrote:
On Monday 13 August 2012 05:02:03 Andreas Bießmann wrote:
From: Andreas Bießmann biessm...@corscience.de
The avr32 architecture (and some others) require manual relocation. Due to
the previous error all avr32 boards gave
On 13/08/2012 16:39, Benoît Thébaudeau wrote:
Why don't you get rid of no_snoop at all ? Using ARCH_IMX is not
needed
anymore.
Because I didn't know if disabling cache snooping could be a useful option or
not for architectures other than i.MX, so I preferred to leave it just in
case,
Dear Simon Glass,
On 06.01.2012 04:54, Simon Glass wrote:
This fixes the following warnings in dlmalloc seen with my gcc 4.6.
dlmalloc.c: In function 'malloc_bin_reloc':
dlmalloc.c:1493: warning: dereferencing pointer 'p' does break
strict-aliasing rules
dlmalloc.c:1493: warning:
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so
disable it globally for this architecture. This avoids setting no_snoop for all
i.MX boards, and it prevents setting a reserved bit of a reserved register if
fsl_esdhc_mmc_init() is used on i.MX, like in
Hi Stefan,
On Monday, August 13, 2012, Stefan Roese wrote:
This patch moves all bootcount implementations into a common
directory: drivers/bootcount. The generic bootcount driver
is now usable not only by powerpc platforms, but others as well.
Signed-off-by: Stefan Roese s...@denx.de
On 13.08.2012 17:14, Andreas Bießmann wrote:
Dear Mike Frysinger,
On 13.08.2012 16:54, Mike Frysinger wrote:
On Monday 13 August 2012 05:02:03 Andreas Bießmann wrote:
From: Andreas Bießmann biessm...@corscience.de
The avr32 architecture (and some others) require manual relocation. Due to
On 08/10/2012 05:32 PM, Scott Wood wrote:
On 07/30/2012 12:37 PM, Stephen Warren wrote:
diff --git a/board/nvidia/dts/tegra20-harmony.dts
b/board/nvidia/dts/tegra20-harmony.dts
+nand-controller@70008000 {
...
+nand@0 {
+reg = 0;
+
On Mon, Aug 13, 2012 at 11:18 AM, Benoît Thébaudeau
benoit.thebaud...@advansee.com wrote:
Define ARCH_IMX for i.MX devices. This is useful to identify features or
behaviors common to all i.MX SoCs.
The i.MX28 is omitted because its architecture is a bit different (like
imx/mxc
vs. mxs in
Define ARCH_MXC for i.MX devices. This is useful to identify features or
behaviors common to all i.MX SoCs.
The i.MX28 is omitted because its architecture is a bit different (like imx/mxc
vs. mxs in Linux).
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Cc: Stefano Babic
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so
disable it globally for this architecture. This avoids setting no_snoop for all
i.MX boards, and it prevents setting a reserved bit of a reserved register if
fsl_esdhc_mmc_init() is used on i.MX, like in
On Monday 13 August 2012 07:56:03 Stefan Roese wrote:
rename arch/blackfin/cpu/bootcount.c =
drivers/bootcount/bootcount_blackfin.c (100%) create mode 100644
hmm, file was moved, but forgot to update arch/blackfin/cpu/Makefile to no
longer
refer to bootcount.c, so it fails.
once that's
Dear Otavio Salvador,
Fix the subject, you're not removing the file ... otherwise Acked.
The iomux-mx28.h include is not required on spl_mem_init.c so it has
been droped.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c |1 -
1
Dear Otavio Salvador,
The CLKCTRL registers are SoC specific so we ought to have it clear on
filename.
Acked-by: Marek Vasut ma...@denx.de
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
arch/arm/include/asm/arch-mxs/imx-regs.h |
2 +-
We have a requirement to wait a period of time before enabling the
DDR controller
Signed-off-by: Matthew McClintock m...@freescale.com
---
nand_spl/board/freescale/p1023rds/Makefile|6 +-
nand_spl/board/freescale/p1023rds/nand_boot.c | 14 --
2 files changed, 17
Dear Otavio Salvador,
[...]
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c index 84d4a17..ddafddb 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -82,9 +82,9 @@ uint8_t mxs_get_bootmode_index(void)
On 08/13/2012 01:10 PM, Matthew McClintock wrote:
We have a requirement to wait a period of time before enabling the
DDR controller
Signed-off-by: Matthew McClintock m...@freescale.com
---
nand_spl/board/freescale/p1023rds/Makefile|6 +-
Currently, for NAND boot for the P1010/4RDB we hard code the DDR
configuration. We can still dynamically set the DDR bus width in
the nand spl so the P1010/4RDB boards can boot from the same
u-boot image
Signed-off-by: Matthew McClintock m...@freescale.com
---
We were not comparing the SVRs properly previously. This comparison
will properly shift the SVR and mask off the E bit
This fixes the boot output to show the correct DDR bus width:
512 MiB (DDR3, 16-bit, CL=5, ECC off)
instead of
512 MiB (DDR3, 32-bit, CL=5, ECC off)
Signed-off-by: Matthew
This change reduces the SPL size by removing the redundant syncs produced
by out_be32 and just replies on one final sync
Done with:
sed -r '/in_be32/b; s/(out_be32)\(([^,]*),\s+(.*)\)/__raw_writel(\3, \2)/g' -i
`git grep --name-only sdram_init nand_spl/`
Signed-off-by: Matthew McClintock
There was an extra 0 in front of the value we were using to mask,
remove it to improve the code.
Also fix the value written to ddr_sdram_cfg to set the bus width
properly to 16 bits
Signed-off-by: Matthew McClintock m...@freescale.com
---
board/freescale/p1010rdb/ddr.c |7 ---
1 file
Let's use the more appropriate udelay for the nand_spl. While we
can't make use of u-boot's full udelay we can atl east use a for
loop that won't get optimized away .Since we have the bus clock
we can use the timebase to calculate wall time.
Looked at reusing the u-boot udelay functions but it
On 08/13/2012 06:52 AM, Wolfgang Denk wrote:
Dear Rob Herring,
In message 50244d5a.3080...@gmail.com you wrote:
I reported already that the prior version that ext4 has issues with
sub-directories. I don't think that has been addressed in V5. Some
directories show up fine and some don't. So
On Mon, Aug 13, 2012 at 1:18 PM, Scott Wood scottw...@freescale.com wrote:
On 08/13/2012 01:10 PM, Matthew McClintock wrote:
We have a requirement to wait a period of time before enabling the
DDR controller
Signed-off-by: Matthew McClintock m...@freescale.com
---
On Mon, Aug 13, 2012 at 3:11 PM, Marek Vasut ma...@denx.de wrote:
Dear Otavio Salvador,
[...]
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c index 84d4a17..ddafddb 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++
Dear Otavio Salvador,
On Mon, Aug 13, 2012 at 3:11 PM, Marek Vasut ma...@denx.de wrote:
Dear Otavio Salvador,
[...]
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c index 84d4a17..ddafddb 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
On Mon, Aug 13, 2012 at 3:59 PM, Marek Vasut ma...@denx.de wrote:
- for (i = 0; i ARRAY_SIZE(mx28_boot_modes); i++) {
- masked = bootmode mx28_boot_modes[i].boot_mask;
- if (masked == mx28_boot_modes[i].boot_pads)
+ for (i = 0; i
Dear Rob Herring,
In message 50294743.5010...@gmail.com you wrote:
I do an ubuntu install to a single ext4 fs and then ext2ls gives this:
...
The problem is in the directories with sizes of 0. It does seem to be
What exactly is the problem? The listing appears pretty normal to me?
It seems
Dear Stefan Roese,
In message 5028f978.3040...@roese.nl you wrote:
Hi Wolfgang,
please pull the following patches:
The following changes since commit b4f106be2d8a4eb34ce41c5306d5a4fcc37e60e3:
dts/Makefile: Turn off some predefined macros (2012-08-10 23:54:16 +0200)
are available in
The iomux header is included on sys_proto.h so to avoid SoC specific
header inclusion.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2:
- no changes
arch/arm/cpu/arm926ejs/mxs/spl_boot.c |1 -
1 file changed, 1 deletion(-)
diff --git
The iomux-mx28.h include is not required on spl_mem_init.c so it has
been droped.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2:
- change short description to clearly describe what has been done
arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c |1 -
1 file changed, 1
The CLKCTRL registers are SoC specific so we ought to have it clear on
filename.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2:
- no changes
arch/arm/include/asm/arch-mxs/imx-regs.h |2 +-
.../arm/include/asm/arch-mxs/{regs-clkctrl.h =
The sys_proto.h functions (except the boot modes) are compatible with
i.MX233 and i.MX28 so we use 'mxs' prefix for its methods.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2:
- no changes
arch/arm/cpu/arm926ejs/mxs/mxs.c | 32 ++---
We have a requirement to wait a period of time before enabling the
DDR controller
Signed-off-by: Matthew McClintock m...@freescale.com
---
v2: change global bus_clk to use gd-bus_clk
nand_spl/board/freescale/p1023rds/Makefile|6 +-
nand_spl/board/freescale/p1023rds/nand_boot.c |
Let's use the more appropriate udelay for the nand_spl. While we
can't make use of u-boot's full udelay we can atl east use a for
loop that won't get optimized away .Since we have the bus clock
we can use the timebase to calculate wall time.
Looked at reusing the u-boot udelay functions but it
Dear Otavio Salvador,
The iomux header is included on sys_proto.h so to avoid SoC specific
header inclusion.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
Acked-by: Marek Vasut ma...@denx.de
Stefano, can you please apply?
Best regards,
Marek Vasut
When a patchset had a RFC series, a v1 might have a changelog of
changes done since the RFC. The patch changes the range checked for
changelog and allow it to start for version 1.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
tools/patman/series.py |7 ---
1 file changed, 4
All,
I'm needing to access the NAND chip on the imx28evk board with the
Linux (Freescale Kernel - FSL). I've compiled a recent version of the
mainstream u-boot with the NAND switches and U-boot works fine. The
U-boot also allows me access to the NAND chip and also boots the FSL
kernel
On 08/13/2012 02:17 PM, Wolfgang Denk wrote:
Dear Rob Herring,
In message 50294743.5010...@gmail.com you wrote:
I do an ubuntu install to a single ext4 fs and then ext2ls gives this:
...
The problem is in the directories with sizes of 0. It does seem to be
What exactly is the problem?
Hi all,
This series aims at adding support for i.MX5 to the mxc nand mtd and spl
drivers. It also fixes several issues and cleans up the code a little bit.
Best regards,
Benoît
___
U-Boot mailing list
U-Boot@lists.denx.de
This patches fixes the TODO to use same register definitions in mtd mxc_nand and
nand_spl fsl nfc drivers.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Cc: Scott Wood scottw...@freescale.com
Cc: Stefano Babic sba...@denx.de
---
.../drivers/mtd/nand/mxc_nand.c
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
Cc: Scott Wood scottw...@freescale.com
Cc: Stefano Babic sba...@denx.de
---
.../drivers/mtd/nand/mxc_nand.c|9 +++--
.../include/fsl_nfc.h |1 +
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