On Mon, 1 Jul 2013 23:11:07 -0300
Otavio Salvador ota...@ossystems.com.br wrote:
...
You didn' t put the splashpos fix.
I would prefer to wait a few days, so other people will have a chance
to review and comment. Also I didn't test the splashpos fix yet, it
was only compile-tested.
Thanks,
Dear Inder,
On 2 July 2013 10:11, Inderpal Singh inderpal.si...@linaro.org wrote:
The Arndale board is based on samsung's exynos5250 SOC.
For spl generation, it depends on the patch at [5].
First patch provides the basic arndale board support. The second patch
adds the MMC support.
Changes
Latest changes to mkimage, Makefile and added proftool broke compilation on OS
X. This series makes u-boot build clean again with some little adoptions.
Patch 'lib/rsa/rsa-sig.c: compile on OS X' supersedes
http://patchwork.ozlabs.org/patch/255283/
Changes in v2:
- remove REG_NOERROR instead
Dear Inderpal Singh,
On 02/07/13 13:41, Inderpal Singh wrote:
Arndale board is based on samsung's exynos5250 soc.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
---
MAINTAINERS |4 +
board/samsung/arndale/Makefile | 58 +++
Interfaces exposed by error.h seems not to be used in rsa-sig.c, remove it.
This also fixes an compile error on OS X:
---8---
u-boot/lib/rsa/rsa-sign.c:23:19: error: error.h: No such file or directory
---8---
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
Tested-by: Lubomir Popov
Remove non portable usage of REG_NOERROR.
BSD (like OS X) variants of regex.h do not declare REG_NOERROR, even GNU
regex(3) do mention REG_NOERROR, just remove it.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
Changes in v2:
- remove REG_NOERROR instead of defining it
Some OS (like OS X) do not provide a generic readelf. We should enforce to use
the toochain provided readelf instead, to do so use $(CROSS_COMPILE)readelf.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
Tested-by: Lubomir Popov lpo...@mm-sol.com
---
Changes in v2: None
Makefile |
Hi Jeroen,
On 01.07.13 22:12, Jeroen Hofstee wrote:
Hello Andreas,
On 07/01/2013 08:45 PM, Jeroen Hofstee wrote:
Hello Andreas,
On 06/30/2013 01:15 PM, Andreas Bießmann wrote:
BSD (like OS X) variants of regex.h do not declare REG_NOERROR, add a
simple
define for them.
Signed-off-by:
Hi Tom, Marek,
On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com wrote:
Hey all,
I've tagged and pushed v2013.07-rc2. A bit more over the place than I
should have gone, but picked up a lot of things that have been
outstanding for a while. The big thing is a refactor of the boot loop.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
doc/README.SPL | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/doc/README.SPL b/doc/README.SPL
index 4e1cb28..ac9a213 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -77,7 +77,7 @@ an SPL CPU in boards.cfg as
On 01/07/13 17:41, Rajeshwari Birje wrote:
Hi Minkyu Kang,
As per the user manual I have for EXYNOS5 it is
FOUT = MDIV * FIN / (PDIV * 2^SDIV)
What is your version of manual?
If possible, could you please send it to me?
Regards,
Rajeshwari Shinde.
On Mon, Jul 1, 2013 at 1:56 PM,
Hi Robert,
On Tue, Jul 2, 2013 at 5:44 AM, Robert Nelson robertcnel...@gmail.comwrote:
On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com wrote:
Hey all,
I've tagged and pushed v2013.07-rc2. A bit more over the place than I
should have gone, but picked up a lot of things that have
On Tue, Jul 2, 2013 at 1:17 PM, Inderpal Singh inderpal.si...@linaro.orgwrote:
Update the Makefiles so that all boards can use the same spl generation
tool
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Acked-by: Simon Glass s...@chromium.org
---
This is needed for the Arndale
Hi Graeme,
On Mon, Jul 1, 2013 at 12:54 PM, Graeme Russ graeme.r...@gmail.com wrote:
Hi Guys,
Due to personal circumstances I left the U-Boot community back in late
October 2012.
Now I find my circumstances have been completely flipped upside down (long
story) and I will soon have much
From: Mingkai Hu mingkai...@freescale.com
The Freescale C29x family is a high performance crypto co-processor.
It combines a single e500v2 core with necessary SEC engine. There're
three SoC types(C291, C292, C293) with the following features:
- 512K L2 Cache/SRAM and 512 KB platform SRAM
-
From: Mingkai Hu mingkai...@freescale.com
C29XPCIE board is a series of Freescale PCIe add-in cards to perform
as public key crypto accelerator or secure key management module. It
includes C293PCIE board, C293PCIE board and C291PCIE board.
- 512KB platform SRAM in addition to 512K L2 Cache/SRAM
On 26/06/13 19:23, Lukasz Majewski wrote:
From: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Proper adjustment for supporting DFU at GONI target has been made.
The s5p_goni.h file has been updated. Moreover the code for low level
USB initialization has been added to GONI board code.
Hi Minkyu Kang,
Thank you for comments
On Tue, Jul 2, 2013 at 11:25 AM, Minkyu Kang mk7.k...@samsung.com wrote:
Dear Rajeshwari,
On 01/07/13 19:02, Rajeshwari Shinde wrote:
This patch performs the following:
1) Convert the assembly code for memory and clock initialization to C code.
2)
Dear Wolfgang,
Hmmm... should not any boards that used to set CONFIG_TI814X in their
board config files (ti814x_evm) now also set CONFIG_TI81XX ?
ti814x_evm already has it.
No other board use CONFIG_TI814X.
Please also fix the typo in the commit message:
s/CONFIG_81XX/CONFIG_TI81XX/
Right,
Hi, Samsung Engineers:
I have a S5PC100 development board.
I tried to use latest uboot code to boot, and UART output has bugs.
It would lose many messages.
I use UART0 as the default com port.
Have you ever tried latest uboot code on S5PC100 board?
Best wishes,
Changes for v6:
- fix typo in commit message
Changes for v5:
- use wd_timer structure for WDT
- remove some magic
- remove memtest and verify from config
- fix a redefinition warning (VTP1_CTRL_ADDR)
- rebase on top of ARM: AM33xx: Cleanup clocks and hwinit
Changes for
Rename some CONFIG_TI814X to a more generic CONFIG_TI81XX
Signed-off-by: Antoine Tenart aten...@adeneo-embedded.com
---
Makefile|2 +-
arch/arm/cpu/armv7/Makefile |2 +-
arch/arm/cpu/armv7/omap-common/Makefile |2 +-
Signed-off-by: Antoine Tenart aten...@adeneo-embedded.com
---
arch/arm/cpu/armv7/am33xx/Makefile |1 +
arch/arm/cpu/armv7/am33xx/clock_ti814x.c | 95 -
arch/arm/cpu/armv7/am33xx/clock_ti816x.c | 445
Signed-off-by: Antoine Tenart aten...@adeneo-embedded.com
---
MAINTAINERS |4 +
board/ti/ti816x/Makefile | 47 +
board/ti/ti816x/evm.c| 229 ++
boards.cfg |1 +
include/configs/ti816x_evm.h |
Hi,
On 07/01/2013 10:44 PM, Robert Nelson wrote:
On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com wrote:
Hey all,
I've tagged and pushed v2013.07-rc2. A bit more over the place than I
should have gone, but picked up a lot of things that have been
outstanding for a while. The big
Hi all,
On 06/28/2013 11:41 PM, Simon Glass wrote:
Hi Tom,
On Fri, Jun 28, 2013 at 1:25 PM, Tom Rini tr...@ti.com wrote:
snip
@@ -660,34 +680,25 @@ static int do_bootm_states(cmd_tbl_t *cmdtp, int
flag, int argc,
}
#endif
/* Now run the OS! We hope this doesn't return
Also change the define name SRDS_RSTCTL_SDPD to
SRDS_RSTCTL_SDEN, which stands for SerDes enable
as mentioned in SerDes module guide
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/include/asm/immap_85xx.h |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff
It allows files not in the same path to use this function
as required by B4 board file
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.h |1 -
arch/powerpc/include/asm/fsl_serdes.h |1 +
2 files changed, 1 insertions(+), 1
1) Add support in B4860 board files for using IDT driver where
IDT8T49N222A is a low phase noise Frequency Translator / Synthesizer
that generate different refclks for SerDes modules, used this driver
for reconfiguring SerDes1 Refclks(based on SerDes1 protocols)
for CPRI to work. CPRI
Hi Kim,
On 05/22/2013 01:12 AM, Kim Phillips wrote:
On Mon, 6 May 2013 15:02:39 +0200
Holger Brunck holger.bru...@keymile.com wrote:
Errata Fix: 1.9V Output from Internal 1.8V Regulator, acc.
MV-S300889-00D.pdf , clause 4.5
Signed-off-by: Holger Brunck holger.bru...@keymile.com
---
Sorry somehow I missed this earlier. Please find my reply inline.
Regards,
Sandeep
-Original Message-
From: Wood Scott-B07421
Sent: 15 June 2013 01:09
To: Singh Sandeep-B37400
Cc: Wood Scott-B07421; u-boot@lists.denx.de; aflem...@gmail.com
Subject: Re: [U-Boot] [PATCH]
Add code for configuring IDT8T49N222A device for various output refclks
- The IDT8T49N222A is a low phase noise Frequency Translator / Synthesizer
with
alarm and monitoring functions suitable for networking and
communications applications. It is able to generate wide range of
I forgot to add the description of this patchset. Sorry for the noise.
This serie introduce the support of the TI816X EVM board.
The serie fits into the existing AM33XX SoC support and reuse some
definitions from the TI814X.
Based on the implementation in the TI-PSP-04.00.02.14 vendor tree:
On Mon 2013-07-01 08:41:15, Chin Liang See wrote:
Hi Pavel,
On Mon, 2013-07-01 at 12:42 +0200, ZY - pavel wrote:
On Fri 2013-06-28 16:20:48, Chin Liang See wrote:
socfpga: Adding System Manager driver which will
configure the pin mux for real hardware Cyclone V
development kit
Hi Andy,
If you've got changes outstanding still, please start gently poking
custodians with patchwork links. I've got a good bit of stuff I need to
deal with myself still, but please prod me all the same.
my series [PATCH v7 0/5] Add gdsys ControlCenter Digital board is
still missing.
You
On Tue, Jul 2, 2013 at 2:39 AM, Simon Glass s...@chromium.org wrote:
Hi Robert,
On Tue, Jul 2, 2013 at 5:44 AM, Robert Nelson robertcnel...@gmail.com
wrote:
On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com wrote:
Hey all,
I've tagged and pushed v2013.07-rc2. A bit more over the
Hi!
From: Dinh Nguyen dingu...@altera.com
Because the SOCFPGA platform will include support for Cyclone V and
Arria V FPGA parts, renaming socfpga_cyclone5 folder to socfpga to
be more generic.
Signed-off-by: Dinh Nguyen dingu...@altera.com
Cc: Chin Liang See cl...@altera.com
Cc:
On Tue, Jul 2, 2013 at 6:41 AM, Robert Nelson robertcnel...@gmail.com wrote:
On Tue, Jul 2, 2013 at 2:39 AM, Simon Glass s...@chromium.org wrote:
Hi Robert,
On Tue, Jul 2, 2013 at 5:44 AM, Robert Nelson robertcnel...@gmail.com
wrote:
On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com
On Mon 2013-07-01 16:05:20, Chin Liang See wrote:
socfpga: Separating the configuration file for Virtual
Target and real hardware Cyclone V development kit
Signed-off-by: Chin Liang See cl...@altera.com
Looks good.
Reviewed-by: Pavel Machek pa...@denx.de
Thanks,
Explicitly disabling unused IPs/blocks. This will lower
power consumption.
Signed-off-by: Sandeep Singh sand...@freescale.com
---
arch/powerpc/cpu/mpc85xx/Makefile|1 +
arch/powerpc/cpu/mpc85xx/b4860_cpu.c | 130 ++
arch/powerpc/include/asm/processor.h |
Hi!
@@ -21,6 +21,7 @@
void reset_cpu(ulong addr);
void reset_deassert_peripherals_handoff(void);
+#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
struct socfpga_reset_manager {
u32padding1;
u32ctrl;
@@ -31,7 +32,23 @@ struct
Commit 35fc84fa1ff51e15ecd3e464dac87eb105ffed30 broke bootm on avr32. It
requires to call do_bootm_linux() with flag set to BOOTM_STATE_OS_PREP before
calling it again with flag set to BOOTM_STATE_OS_GO.
Fix this by allowing flag set to BOOTM_STATE_OS_PREP, this however will
require a complete
On Tue, Jul 2, 2013 at 3:00 AM, Anatolij Gustschin ag...@denx.de wrote:
On Mon, 1 Jul 2013 23:11:07 -0300
Otavio Salvador ota...@ossystems.com.br wrote:
...
You didn' t put the splashpos fix.
I would prefer to wait a few days, so other people will have a chance
to review and comment. Also I
As the subject says, I'm trying to run the Hello world standalone
application example on a core other than 0, on a Freescale QorIQ P4080.
I tried through the shell and programmatically by exporting cpu_release
function... nothing. My first thought was that only core 0 has register r2
with the
Hi Minkyu Kang,
On Tue, Jul 2, 2013 at 11:25 AM, Minkyu Kang mk7.k...@samsung.com wrote:
Dear Rajeshwari,
On 01/07/13 19:02, Rajeshwari Shinde wrote:
This patch performs the following:
1) Convert the assembly code for memory and clock initialization to C code.
2) Move the memory and clock
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 07/02/2013 06:49 AM, Andreas Bießmann wrote:
Hi all,
On 06/28/2013 11:41 PM, Simon Glass wrote:
Hi Tom,
On Fri, Jun 28, 2013 at 1:25 PM, Tom Rini tr...@ti.com wrote:
snip
@@ -660,34 +680,25 @@ static int do_bootm_states(cmd_tbl_t
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 07/02/2013 06:37 AM, Andreas Bießmann wrote:
Hi,
On 07/01/2013 10:44 PM, Robert Nelson wrote:
On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com wrote:
Hey all,
I've tagged and pushed v2013.07-rc2. A bit more over the place
than I
flush cache before disable it
Signed-off-by: Bo Shen voice.s...@gmail.com
---
arch/arm/cpu/arm926ejs/cpu.c |5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/cpu.c b/arch/arm/cpu/arm926ejs/cpu.c
index 626384c..10aa165 100644
---
On 07/02/2013 02:34 PM, Tom Rini wrote:
On 07/02/2013 06:37 AM, Andreas Bießmann wrote:
Hi,
On 07/01/2013 10:44 PM, Robert Nelson wrote:
On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com wrote:
Hey all,
I've tagged and pushed v2013.07-rc2. A bit more over the place
than I should
On 07/02/2013 02:35 PM, Tom Rini wrote:
On 07/02/2013 06:49 AM, Andreas Bießmann wrote:
Hi all,
On 06/28/2013 11:41 PM, Simon Glass wrote:
Hi Tom,
On Fri, Jun 28, 2013 at 1:25 PM, Tom Rini tr...@ti.com wrote:
snip
@@ -660,34 +680,25 @@ static int do_bootm_states(cmd_tbl_t
*cmdtp,
This change adds necessary xHCI host controller stack layer.
This stack will eventually interact with SoC specific USB 3.0
controller drivers to enable USB 3.0 support on different boards.
Based on 'master' branch of u-boot-usb tree.
The series also includes patches to support xHCI on
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 07/02/2013 08:58 AM, Andreas Bießmann wrote:
On 07/02/2013 02:35 PM, Tom Rini wrote:
On 07/02/2013 06:49 AM, Andreas Bießmann wrote:
Hi all,
On 06/28/2013 11:41 PM, Simon Glass wrote:
Hi Tom,
On Fri, Jun 28, 2013 at 1:25 PM, Tom Rini
XHCI stack driver needs this to align buffers to
CacheLine boundary. So define the same to be '64'
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Julius Werner jwer...@chromium.org
Cc: Simon Glass s...@chromium.org
Cc: Marek Vasut ma...@denx.de
---
This adds driver layer for xHCI controller in Samsung's
exynos5 soc. This interacts with xHCI host controller stack.
Signed-off-by: Vikas C Sajjan vikas.saj...@samsung.com
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Julius Werner jwer...@chromium.org
Cc: Simon Glass s...@chromium.org
Adding methods to turn on/off power to USB3.0 type PHY
as and when required by the controller.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Julius Werner jwer...@chromium.org
Cc: Simon Glass s...@chromium.org
Cc: Marek Vasut ma...@denx.de
---
arch/arm/cpu/armv7/exynos/power.c
This enables support for xHCI host controller on Exynos5
and further disables EHCI support, to make sure only one
host controller is enabled at a time.
Signed-off-by: Vikas C Sajjan vikas.saj...@samsung.com
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Julius Werner
Adding required compatible string for xHCI host controller
as well as USB 3.0 PHY to enable dt support for usb 3.0 on
exynos5.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Julius Werner jwer...@chromium.org
Cc: Simon Glass s...@chromium.org
Cc: Marek Vasut ma...@denx.de
---
Adding device node for xhci host controller to enable
usb 3.0 on exynos5250.
Signed-off-by: Vivek Gautam gautam.vi...@samsung.com
Cc: Julius Werner jwer...@chromium.org
Cc: Simon Glass s...@chromium.org
Cc: Marek Vasut ma...@denx.de
---
arch/arm/dts/exynos5250.dtsi | 12
1 files
On 07/01/2013 03:09 PM, Tom Rini wrote:
With the do_bootm_states re-organization, we have the call to any
potential sub-commands in a single spot. If one fails, we can then stop
right there and return to the caller. Prior to these calls we have
already ensured that ret is zero so we will not
On Tue, Jul 02, 2013 at 01:57:44PM +0200, Andreas Bie??mann wrote:
Commit 35fc84fa1ff51e15ecd3e464dac87eb105ffed30 broke bootm on avr32. It
requires to call do_bootm_linux() with flag set to BOOTM_STATE_OS_PREP before
calling it again with flag set to BOOTM_STATE_OS_GO.
Fix this by allowing
This patch adds APIs to get power reset status and exit the wakeup condition for
both exynos5 and exynos4
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- Expanded the comments for get_reset_status function declaration.
Changes in V3:
- None
Convert the assembly code in board/samsung to c and move the same to arch/arm.
lds file made common across SMDKV310, Origen and SMDK5250.
Add the power reset and exit wakeup api for exynos.
Initialise GPIO for uart in Origen and SMDKV310 using pinmux.
Changes in V2:
- Rebased on latest
This patch configures the gpio values for UART
on Origen and SMDKV310 using pinmux
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
Changes in V3:
- None
arch/arm/cpu/armv7/exynos/pinmux.c | 40
smdk5250-uboot-spl.lds is moved to common folder, so that it can be reused.
It is renamed to exynos-uboot-spl.lds
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
Tested-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
Changes in
From: Andreas Bießmann andreas.de...@googlemail.com
Commit 35fc84fa1ff51e15ecd3e464dac87eb105ffed30 broke bootm on avr32. It
requires to call do_bootm_linux() with flag set to BOOTM_STATE_OS_PREP before
calling it again with flag set to BOOTM_STATE_OS_GO.
Fix this by allowing flag set to
On Tue, Jul 02, 2013 at 09:17:04AM -0400, Tom Rini wrote:
From: Andreas Bie??mann andreas.de...@googlemail.com
OK, forgot to update the topline commit message to:
avr32/m68k/microblaze/nds32/nios2/openrisc/sh/sparc: fix do_bootm_linux
--
Tom
signature.asc
Description: Digital signature
On 07/02/2013 03:03 PM, Tom Rini wrote:
On Tue, Jul 02, 2013 at 01:57:44PM +0200, Andreas Bießmann wrote:
Commit 35fc84fa1ff51e15ecd3e464dac87eb105ffed30 broke bootm on avr32. It
requires to call do_bootm_linux() with flag set to BOOTM_STATE_OS_PREP before
calling it again with flag set to
Some more fixes for RC2
The following changes since commit e6bf18dba2a21bebf2c421b1c2e188225f6485a1:
Prepare v2013.07-rc2 (2013-06-28 18:03:51 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-usb.git master
Hi Robert,
On Jul 2, 2013 8:41 PM, Robert Nelson robertcnel...@gmail.com wrote:
On Tue, Jul 2, 2013 at 2:39 AM, Simon Glass s...@chromium.org wrote:
Hi Robert,
On Tue, Jul 2, 2013 at 5:44 AM, Robert Nelson robertcnel...@gmail.com
wrote:
On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini
On Tue, 02 Jul 2013 17:21:28 +0800, tiger...@viatech.com.cn wrote:
Hi, Samsung Engineers:
I have a S5PC100 development board.
I tried to use latest uboot code to boot, and UART output has bugs.
It would lose many messages.
I use UART0 as the default com port.
Have you ever tried latest
On Tue, 02 Jul 2013 16:04:59 +0200, Marek Vasut wrote:
Heiko Schocher
(5): dfu: make data buffer size
The driver triggered a BUG() in nand_base.c:3214/nand_scan_tail()
because the ecc.strength was incorrectly set in case of NAND_ECC_HW
instead of NAND_ECC_HW_SYNDROME ECC mode.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Benoît Thébaudeau benoit.thebaud...@advansee.com
Cc: Fabio Estevam
Adapt the usb-compat.h to uBoot.
Use #ifndef __UBOOT__ for code that is not applicable to uBoot.
Use #ifdef __UBOOT__ to add code that is uBoot specific.
Create linux-compat.h - Linux kernel compatibility definitions that do not
exist in the uBoot. Moved the compatibility definitions from
Add and enable the USB OTG clocks.
Signed-off-by: Dan Murphy dmur...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c | 14 ++
arch/arm/cpu/armv7/omap5/prcm-regs.c|1 +
arch/arm/include/asm/arch-omap5/clock.h |4
arch/arm/include/asm/omap_common.h |1 +
This patch series has been generated in an effort to get comments on
the implementation of the dwc and xHCI code within the uBoot.
v3 series adds the xHCI back port from the linux kernel
The first patch is the one of major concern as this patch will make an
attempt to commonize the usb headers
All code not applicable to uBoot is ifdef'd out with
ifndef __UBOOT__ as it is done in the musb-new directory.
This code has not been fully debuged or excersized.
Signed-off-by: Dan Murphy dmur...@ti.com
---
Makefile |1 +
drivers/usb/dwc3/Makefile | 53 ++
Modify the xHCI Linux kernel code base with #ifdefs __UBOOT__ to
adapt the xHCI to the uBoot code.
DMA and Radix needs investigating.
Signed-off-by: Dan Murphy dmur...@ti.com
---
common/usb.c |1 +
common/usb_hub.c |1 +
drivers/usb/host/Makefile
On 07/02/2013 10:15 AM, Dan Murphy wrote:
Backport the kernel USB header file include/linux/usb.h
that contains the structures and constants for the linux kernel drivers.
Rename the usb.h to usb-compat.h so that it is not confused with the
uBoot include usb.h file.
Kernel base commit
On 07/02/2013 10:18 AM, Nishanth Menon wrote:
On 07/02/2013 10:15 AM, Dan Murphy wrote:
Backport the kernel USB header file include/linux/usb.h
that contains the structures and constants for the linux kernel drivers.
Rename the usb.h to usb-compat.h so that it is not confused with the
uBoot
Vivek
On 07/02/2013 07:59 AM, Vivek Gautam wrote:
This change adds necessary xHCI host controller stack layer.
This stack will eventually interact with SoC specific USB 3.0
controller drivers to enable USB 3.0 support on different boards.
Based on 'master' branch of u-boot-usb tree.
The
Hi
I try to boot a current 3.11 kernel on a custom iMX25 board using DT.
u-boot starts the kernel but it stops working just after the first
eralyprintk lines are out. The u-boot/kernel output:
bootm 0x8100 - 0x8080
## Booting kernel from Legacy Image at 8100 ...
Image Name:
Dear Lukasz Majewski,
On Tue, 02 Jul 2013 16:04:59 +0200, Marek Vasut wrote:
Heiko Schocher
(5): dfu: make data buffer size configurable
usb, dfu gadget: switch to dfu mode in dfu_bind
usb, g_dnl: make
Hey guys,
I'm wondering about something and looking for input. As has come up a
few times now, we have the ability for a single binary to run on a few
systems (there's both i.MX examples and AM335x examples), but what we
don't have is agreement on the best way to handle things that must
(today)
On Mon, Jul 1, 2013 at 10:11 PM, Stephen Warren swar...@wwwdotorg.org wrote:
On 07/01/2013 07:49 AM, Vivek Gautam wrote:
Hi Marek,
On Sun, Jun 30, 2013 at 10:08 PM, Marek Vasut ma...@denx.de wrote:
Dear Stephen Warren,
(Sorry to those on to/cc; I'm resending this so it goes to the correct
On 07/02/2013 10:28 AM, Tom Rini wrote:
Hey guys,
I'm wondering about something and looking for input. As has come
up a few times now, we have the ability for a single binary to run
on a few systems (there's both i.MX examples and AM335x examples),
but what we don't have is agreement on
On 07/02/2013 01:39:09 AM, Po Liu wrote:
+int board_early_init_r(void)
+{
+ const unsigned long flashbase = CONFIG_SYS_FLASH_BASE;
+ const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+
+ /*
+* Remap Boot flash region to caching-inhibited
+* so that flash
Hello Andreas,
On 07/02/2013 08:37 AM, Andreas Bießmann wrote:
Remove non portable usage of REG_NOERROR.
BSD (like OS X) variants of regex.h do not declare REG_NOERROR, even GNU
regex(3) do mention REG_NOERROR, just remove it.
^ does _not_
Perhaps Tom can amend it while
On 07/02/2013 10:11:55 AM, Marek Vasut wrote:
The driver triggered a BUG() in nand_base.c:3214/nand_scan_tail()
because the ecc.strength was incorrectly set in case of NAND_ECC_HW
instead of NAND_ECC_HW_SYNDROME ECC mode.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Benoît Thébaudeau
On 07/01/2013 12:51 PM, Wolfgang Denk wrote:
Dear Mike Dunn,
In message 51d1c455.9010...@newsguy.com you wrote:
But there's a good motivation for wanting to turn off optimization.
I disagree here. If you are hunting down a problem, you want to be as
close at the original code as
Hi Matthias,
Am 02/07/2013 17:26, schrieb Matthias Weißer:
Hi
I try to boot a current 3.11 kernel on a custom iMX25 board using DT.
u-boot starts the kernel but it stops working just after the first
eralyprintk lines are out. The u-boot/kernel output:
bootm 0x8100 - 0x8080
Never
Hello,
The following changes since commit e6c7f86f03b0ad25e9ef70df3ee1989b6b789d7c:
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' (2013-06-28
17:51:13 +0200)
are available in the git repository at:
git://git.denx.de/u-boot-ti.git master
for you to fetch changes up to
On Mon, Jun 10, 2013 at 04:23:33PM +0200, Michael Trimarchi wrote:
Fix ulpi reading and writing function.
* Both functions need to have the bit31 setted.
* Right now uboot use 0 to enumerate port 1 and 1 to
enumerate port 2 and so on. Omap code use 1 for port 1 and 2 for port 2.
Add
On Mon, Jun 17, 2013 at 04:59:27PM +0300, Ilya Ledvich wrote:
Fix the wrong mapping between the DDR I/O control registers on AM33XX
SoCs and the software representation in the SPL code.
The most recent public TRM defines the following DDR I/O control registers
offsets:
* ddr_cmd0_ioctrl :
On Mon, Jun 10, 2013 at 06:18:04PM +0200, Michael Trimarchi wrote:
This patch fix the omap access to the transceiver
configuration registers using the ulpi bus. As reported by
the documentation the bit31 is used only to check if the
transaction is done or still running and the reading and
On Fri, Jun 21, 2013 at 06:54:25PM +0800, Axel Lin wrote:
The omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs.
These SoCs have different gpio count but currently omap_gpio driver uses hard
coded 192 which is wrong.
This patch fixes this issue by:
1. Move define of
On Wed, Jun 19, 2013 at 10:50:45AM +0530, Lokesh Vutla wrote:
During SDRAM_AUTO_DETECTION MA is not configured.
For Soc's OMAP4460 MA is present. So populating
MA for the same.
Tested on OMAP4430 PANDA, OMAP4460 PANDA.
Reported-by: Dan Murphy dmur...@ti.com
Signed-off-by: Lokesh Vutla
On Tue, Jul 02, 2013 at 04:47:41PM +0200, Lukasz Majewski wrote:
On Tue, 02 Jul 2013 16:04:59 +0200, Marek Vasut wrote:
From: Dinh Nguyen dingu...@altera.com
Because the SOCFPGA platform will include support for Cyclone V and
Arria V FPGA parts, renaming socfpga_cyclone5 folder to socfpga to
be more generic.
Signed-off-by: Dinh Nguyen dingu...@altera.com
Reviewed-by: Pavel Machek pa...@denx.de
Cc: Chin Liang See
On Tue, Jul 02, 2013 at 11:58:51AM -0600, Stephen Warren wrote:
On 07/02/2013 10:28 AM, Tom Rini wrote:
Hey guys,
I'm wondering about something and looking for input. As has come
up a few times now, we have the ability for a single binary to run
on a few systems (there's both i.MX
On Tue, Jul 02, 2013 at 12:05:58PM +0200, TENART Antoine wrote:
Rename some CONFIG_TI814X to a more generic CONFIG_TI81XX
Signed-off-by: Antoine Tenart aten...@adeneo-embedded.com
---
Makefile|2 +-
arch/arm/cpu/armv7/Makefile |2 +-
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