On mx6 sabreauto board, there are two USB ports:
0: OTG
1: HOST
The EHCI driver is enabled for this board, but the IOMUX and VBUS power
control is not implemented, which cause both USB port failed to work.
This patch fix the problem by adding the BSP support.
Since the power control uses the GPIO
Hi Minkyu,
On Wed, 08 Oct 2014 20:36:34 +0900, Minkyu Kang mk7.k...@samsung.com
wrote:
Dear Albert,
The following changes since commit 6dd0e7c00bfa5ce861a72b8e4a3ef9e787306125:
git-mailrc: add me as a maintainer of UniPhier platform (2014-10-05
14:10:09 +0900)
are available in the
Hi Peng,
On Thu, 9 Oct 2014 17:08:10 +0800, Peng Fan b51...@freescale.com
wrote:
Hi,
just ping, Any comments about this patch?
Regards,
Peng.
On 09/11/2014 09:54 AM, Peng Fan wrote:
Add QSPI support for mx6solox.
Signed-off-by: Peng Fan peng@freescale.com
---
Hi Pavel,
On Fri, 10 Oct 2014 01:05:59 +0200, Pavel Machek pa...@denx.de wrote:
On Fri 2014-10-10 00:24:46, Wolfgang Denk wrote:
Dear Pavel,
In message 20141009221154.GA24774@amd you wrote:
Something like this could help..?
On Friday, October 10, 2014 at 04:35:11 AM, Simon Glass wrote:
Hi,
Hi,
On 9 October 2014 20:26, Fabio Estevam feste...@gmail.com wrote:
On Thu, Oct 9, 2014 at 11:23 PM, Marek Vasut ma...@denx.de wrote:
What about [1], this is where we can source the more exotic toolchains
from, can we
Hello Jagannadha,
On 01/21/2014 11:03 AM, Valentin Longchamp wrote:
On 09/17/2013 08:46 AM, Valentin Longchamp wrote:
Some board require spi_flash_free to be called after all the accesses,
in order, for instance, to restore the pin multiplexing configuration in
the case where the SPI pins are
On Fri, Oct 10, 2014 at 6:01 AM, Ye.Li b37...@freescale.com wrote:
On mx6 sabreauto board, there are two USB ports:
0: OTG
1: HOST
The EHCI driver is enabled for this board, but the IOMUX and VBUS power
control is not implemented, which cause both USB port failed to work.
This patch fix the
Hello Joakim,
On 10/10/2014 07:03 AM, Joakim Tjernlund wrote:
Przemyslaw Marczak p.marc...@samsung.com wrote on 2014/10/09 18:23:54:
Hello Joakim,
On 10/09/2014 08:46 AM, Joakim Tjernlund wrote:
From: Przemyslaw Marczak p.marc...@samsung.com
The functions error's numbers are standarized -
Dear Pavel,
In message 20141009230004.GA25685@amd you wrote:
[1] http://www.denx.de/wiki/U-Boot/Patches
It should really go into tree.
If you think so...
It does not mention puts() vs. printf(), if it is indeed meant to be
u-boot policy.
This is not just U-Boot philosophy, but
Dear Pavel,
In message 20141009230559.GB25685@amd you wrote:
v2: added tags to the subject
v3: added diffs to previous version
. (From memory, but IIRC something very similar to this happened before).
Yes, this happens when people repeatedly ignore to read the patch
posting rules.
I'd
This series fixes up link (Chromebook Pixel) to support more useful config
options and enables the Chrome OS EC.
There is already an EC driver but it has a small bug and needs to be enabled
in the config and device tree.
The full series is available at:
http://git.denx.de/u-boot-dm.git
in
Hi Simon,
On 10 October 2014 07:36, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On 9 October 2014 04:33, Jagan Teki jagannadh.t...@gmail.com wrote:
On 9 October 2014 02:03, Simon Glass s...@chromium.org wrote:
Hi,
On 29 September 2014 13:34, Simon Glass s...@chromium.org wrote:
Up
Hello Simon,
On 10/10/2014 05:17 AM, Simon Glass wrote:
Hi,
On 8 October 2014 14:48, Przemyslaw Marczak p.marc...@samsung.com wrote:
This is an introduction to driver-model multi class PMIC support.
It starts with UCLASS_PMIC - a common PMIC class type for I/O, which
doesn't need to implement
Hi Jagan,
On 10 October 2014 07:30, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On 10 October 2014 07:36, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On 9 October 2014 04:33, Jagan Teki jagannadh.t...@gmail.com wrote:
On 9 October 2014 02:03, Simon Glass s...@chromium.org
The dhcp option is required to get bootp to work on the Chromebook Pixel,
so enable it.
Signed-off-by: Simon Glass s...@chromium.org
---
include/configs/coreboot.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
index
Add this to the table so that it can be recognised.
Signed-off-by: Simon Glass s...@chromium.org
---
include/fdtdec.h | 1 +
lib/fdtdec.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 2590d30..3814f82 100644
--- a/include/fdtdec.h
+++
We may as well use hush. The auto-complete option was incorrect so this was
not enabled. Also expand the command line size a little and go back to the
default prompt since boot doesn't seem any more useful.
Signed-off-by: Simon Glass s...@chromium.org
---
include/configs/coreboot.h | 6 +++---
Add defines to enable the Chrome OS EC interface and set it up on init.
Signed-off-by: Simon Glass s...@chromium.org
---
board/chromebook-x86/coreboot/Makefile | 2 +-
board/chromebook-x86/coreboot/coreboot.c | 16
include/configs/coreboot.h | 5 +
3 files
Enable FIT support and the bootelf command. Also change the default load
address to somewhere other than the normal load address of the kernel,
to allow for decompression without overwriting the original file.
Signed-off-by: Simon Glass s...@chromium.org
---
include/configs/coreboot.h | 4 +++-
Add the required node describing how to find the EC on link.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/dts/link.dts | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/x86/dts/link.dts b/arch/x86/dts/link.dts
index 4a37dac..67ce52a 100644
---
There was a minor rename of one of the defines, so update the driver.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/misc/cros_ec_lpc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/cros_ec_lpc.c b/drivers/misc/cros_ec_lpc.c
index
To get a display in U-Boot on link you must either build a coreboot that
always sets it up, or use Esc-Refresh-Power to reset the machine.
When we do have a display, it is nice to display the model at the top, so
enable this option.
Signed-off-by: Simon Glass s...@chromium.org
---
If we know the file size, display it after loading the file.
Signed-off-by: Simon Glass s...@chromium.org
---
net/tftp.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/net/tftp.c b/net/tftp.c
index 966d1cf..0a2c533 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -299,6 +299,8 @@ static void
It does seem to work (tested on link), so update the docs.
Signed-off-by: Simon Glass s...@chromium.org
---
README | 4
1 file changed, 4 deletions(-)
diff --git a/README b/README
index 46def00..9d8eb92 100644
--- a/README
+++ b/README
@@ -2824,10 +2824,6 @@ CBFS (Coreboot Filesystem)
On 10/10/2014 05:10 AM, Simon Glass wrote:
Hi,
On 8 October 2014 14:48, Przemyslaw Marczak p.marc...@samsung.com wrote:
This is the implementation of driver model regulator uclass api.
To use it, the CONFIG_DM_PMIC is required with driver implementation,
since it provides pmic devices I/O API.
Hello,
On 10/10/2014 05:36 AM, Simon Glass wrote:
Hi,
On 8 October 2014 14:48, Przemyslaw Marczak p.marc...@samsung.com wrote:
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
doc/driver-model/dm-pmic-framework.txt | 450 +
1 file changed, 450
Hello,
On 10/10/2014 05:39 AM, Simon Glass wrote:
Hi,
On 8 October 2014 14:48, Przemyslaw Marczak p.marc...@samsung.com wrote:
Changes required to support dm pmic and dm regulator api:
- move call to board_init_i2c() into exynos_init() - earlier init the i2c
- remove redundant ldo setup -
This generates a warning when driver model is enabled, so fix it by adding
a cast.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/serial/ns16550.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index
This series moves x86 to use driver model and enables it for the GPIO and
serial driver on link.
The pre-relocation malloc() feature is enabled before calling
board_init_f() in the same way as on ARM. The existing ns16550 driver is
used, but this time in I/O mode. No attempt is made to remove the
To permit information to be passed from the early U-Boot code to
board_init_f() we cannot zero the global_data in board_init_f(). Instead
zero it in the start-up code.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/start.S | 6 ++
1 file changed, 6 insertions(+)
diff --git
This makes use of the existing device tree node to use driver model
for the serial console.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/dts/coreboot.dtsi | 4 ++--
arch/x86/include/asm/ibmpc.h | 10 --
drivers/serial/Makefile | 1 +
This code doesn't follow the normal approach of having its arch-specific
definitions in an arch-specific directory. Add a new arch-specific file
and make use of it.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/include/asm/arch-coreboot/gpio.h | 15 +++
Add support for this by reserving a block of memory below global_data.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/start.S | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index 71cab22..338bab1 100644
---
Convert over this driver, using device tree to pass in the required
information. The peripheral is still probed, just the number of GPIO banks
and their offsets is in the device tree (previously this was a table in
the driver).
Signed-off-by: Simon Glass s...@chromium.org
---
This code generates warnings with recent gcc versions. We really don't need
the clobber specification, so just drop it.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/lib/zimage.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index
On 10 October 2014 19:05, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On 10 October 2014 07:30, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On 10 October 2014 07:36, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On 9 October 2014 04:33, Jagan Teki jagannadh.t...@gmail.com
Hello,
On 10/10/2014 05:40 AM, Simon Glass wrote:
Hi,
On 8 October 2014 14:48, Przemyslaw Marczak p.marc...@samsung.com wrote:
This change enables the configs required to init and setup
max77686 regulator driver, using the new driver model pmic API.
Enabled configs:
- CONFIG_DM_PMIC
-
Add more information so that U-Boot can find the address of the serial port.
Also fix the reg-shift value.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/dts/coreboot.dtsi | 5 +++--
arch/x86/dts/link.dts | 18 +-
2 files changed, 20 insertions(+), 3
Hi,
On 10 October 2014 07:51, Jagan Teki jagannadh.t...@gmail.com wrote:
On 10 October 2014 19:05, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On 10 October 2014 07:30, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On 10 October 2014 07:36, Simon Glass s...@chromium.org wrote:
Hello Wolfgang,
On 10-10-14 14:22, Wolfgang Denk wrote:
It does not mention puts() vs. printf(), if it is indeed meant to be
u-boot policy.
This is not just U-Boot philosophy, but something that I would
consider a matter of course when writing code - using the appropriate
tools for the task at
Following on from the recent series to enable booting of uncompressed x86
kernel images, this adds support for booting 64-bit kernels. This involves
U-Boot jumping into 64-bit mode and then starting the kernel. A new x86_64
architecture is therefore supported.
A function is added to detect
These functions really don't belong in physmem as they relate to the
cpu. Move them.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/cpu.c | 35 +++
arch/x86/include/asm/cpu.h | 22 ++
arch/x86/lib/physmem.c | 33
This code is repeated in several places, and does not detect a common
fault where the image is too large. Move it into its own function and
provide a more helpful messages in this case, for compression schemes
which support this.
Signed-off-by: Simon Glass s...@chromium.org
---
common/bootm.c |
Display the type of CPU (x86 or x86_64) when starting up.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/cpu.c | 64 ++
arch/x86/include/asm/cpu.h | 7 +
include/configs/coreboot.h | 1 +
3 files changed, 72 insertions(+)
Detect an x86_64 kernel and boot it in 64-bit mode.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/lib/bootm.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c
index b90ca65..46a1d96 100644
---
We should use puts() instead of printf() where possible. Also clarify
the setup.bin message.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/lib/bootm.c | 2 +-
arch/x86/lib/zimage.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/lib/bootm.c
The boot_zimage() function is badly named it can also boot a raw kernel.
Rename it, and try to avoid pointers for memory addresses as it involves
lots of casting.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/include/asm/bootm.h | 16 +++
arch/x86/include/asm/zimage.h |
This is a bit odd in that we are permitted to boot images for either, even
though they are separate architectures.
Signed-off-by: Simon Glass s...@chromium.org
---
common/bootm.c | 3 ++-
common/image-fit.c | 3 ++-
common/image.c | 1 +
include/image.h| 1 +
4 files changed, 6
Update this file to include x86_64 fields.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/include/asm/msr-index.h | 108 ++-
1 file changed, 106 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/msr-index.h
Add code to jump to a 64-bit Linux kernel. We need to set up a flat page
table structure, a new GDT and then go through a few hoops in the right
order.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/Makefile | 2 +-
arch/x86/cpu/call64.S | 93
On Friday, October 10, 2014 at 04:04:40 PM, Jeroen Hofstee wrote:
Hello Wolfgang,
On 10-10-14 14:22, Wolfgang Denk wrote:
It does not mention puts() vs. printf(), if it is indeed meant to be
u-boot policy.
This is not just U-Boot philosophy, but something that I would
consider a
The code density of x86_64 is not wonderful. Increase the maximum boot
size and adjust the load address to cope.
Signed-off-by: Simon Glass s...@chromium.org
---
include/configs/coreboot.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/configs/coreboot.h
Hi Marek,
On Fri, Oct 10, 2014 at 11:26 AM, Marek Vasut ma...@denx.de wrote:
calling printf(%s\n, string) gets translated into puts by the
compiler. There should be no difference in the binary.
Is this LLVM specific or does GCC do that too ? This is interesting
information.
Just did a
On Tue, Sep 30, 2014 at 06:45:32PM +0200, Hans de Goede wrote:
In order for the gmac nic to work reliable on the Bananapi, we need to set
bits 10-12 GTXDC GMAC Transmit Clock Delay Chain of the GMAC clk register
(0x01c20164) to 3.
Without this about 9 out of 10 ethernet packets get lost,
On Fri, Oct 03, 2014 at 02:29:01PM +0100, Ian Campbell wrote:
From: Ian Campbell ian.campb...@citrix.com
On a couple of platforms I've tripped over long PXE append lines overflowing
this array, due to having CONFIG_SYS_CBSIZE == 256. When doing preseeded
Debian
installs it's pretty
On Thu, Oct 02, 2014 at 03:20:10PM -0700, York Sun wrote:
Commit 294b91a5817147d4b7f47be2ac69bac2a1f26491 moved initr_malloc
earlier than initr_unlock_ram_in_cache. This causes issue on T4240.
It may be related to locked L1 d-cache and unlocked L2 cache. D-
cache could and should be unlock
On Tue, Sep 23, 2014 at 06:07:03PM +0300, Roger Quadros wrote:
scsi_scan() must be called as part of scsi_init() and not
as part of sata_init().
Signed-off-by: Roger Quadros rog...@ti.com
Applied to u-boot/master, thanks!
--
Tom
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On Thu, Oct 09, 2014 at 08:08:30PM -0500, Scott Wood wrote:
The RNDOUT patch addresses a regression in the mtd uprev. The PARAM
change is a fix to a driver introduced in this release.
The following changes since commit dd0204e48d05f41480743a798b94d5484b664639:
Merge branch 'master' of
On Tue, Sep 23, 2014 at 06:07:01PM +0300, Roger Quadros wrote:
The DMA/FIS buffers are set in ahci_port_start() which is called
after ahci_host_init(). So don't start the DMA engine here
(i.e. don't set FIS_RX)
This fixes the following error at kernel boot on OMAP platforms (e.g. DRA7x)
On Tue, Sep 23, 2014 at 06:07:02PM +0300, Roger Quadros wrote:
On OMAP platforms, SATA controller provides the SCSI subsystem
so implement scsi_init().
Get rid of the unnecessary sata_init() call from dra7xx-evm
and omap5-uevm board files.
Signed-off-by: Roger Quadros rog...@ti.com
On Mon, Sep 29, 2014 at 01:37:57AM +0900, Masahiro Yamada wrote:
These boards have been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Sep 23, 2014 at 09:10:26PM +0300, Khoronzhuk, Ivan wrote:
The definitions for div ratio supposed to be in hex and were added
in dec by mistake.
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
Applied to u-boot/master, thanks!
--
Tom
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On Mon, Sep 29, 2014 at 01:37:58AM +0900, Masahiro Yamada wrote:
This board has been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Applied to u-boot/master, thanks!
--
Tom
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On Mon, Sep 29, 2014 at 01:38:00AM +0900, Masahiro Yamada wrote:
These boards have been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Applied to u-boot/master, thanks!
--
Tom
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On Fri, Sep 26, 2014 at 06:42:36PM +0900, Masahiro Yamada wrote:
In some cases, the last lines of SPL or TPL are not output to a file.
The entries remaining in the unmatched variable must be flushed.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Acked-by: Simon Glass
On Mon, Sep 29, 2014 at 01:37:59AM +0900, Masahiro Yamada wrote:
This board has been orphaned for more than 6 months.
It is the last board defining CONFIG_APM821XX.
The code inside #ifdef CONFIG_APM821XX should be removed too.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
On Tue, Sep 23, 2014 at 06:07:04PM +0300, Roger Quadros wrote:
At least on OMAP, init_sata() no longer performs scsi_scan()
so we must do it explicitly here.
Cc: Dan Murphy dmur...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
Applied to u-boot/master, thanks!
--
Tom
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On Mon, Sep 29, 2014 at 09:46:48PM +0400, Alexander Kochetkov wrote:
Fix typo of commit d4e53f063dd25e071444b87303573e7440deeb89.
i2c2 pullup resisters are controlled by bit 0 of CONTROL_PROG_IO1.
It's value after reset is 0x0011.
In order to clear bit 0, original code write
On Mon, Sep 29, 2014 at 01:38:01AM +0900, Masahiro Yamada wrote:
These boards have been orphaned for more than 6 months.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Sep 30, 2014 at 10:44:01AM +0200, Wolfgang Denk wrote:
A number of network related files were imported from the LiMon
project; these contain a somewhat unclear license statement:
Copyright 1994 - 2000 Neil Russell.
(See License)
I analyzed the source code of LiMon
On Tue, Sep 30, 2014 at 12:32:20PM +0200, David Müller (ELSOFT AG) wrote:
Signed-off-by: David Müller d.muel...@elsoft.ch
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Sep 30, 2014 at 12:32:21PM +0200, David Müller (ELSOFT AG) wrote:
Signed-off-by: David Müller d.muel...@elsoft.ch
Applied to u-boot/master, thanks!
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On Tue, Sep 30, 2014 at 12:32:22PM +0200, David Müller (ELSOFT AG) wrote:
Signed-off-by: David Müller d.muel...@elsoft.ch
Applied to u-boot/master, thanks!
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On Tue, Sep 30, 2014 at 01:23:54PM +0200, David Müller (ELSOFT AG) wrote:
fix broken SPI access by adding/activating BOARD_EARLY_INIT_F
functionality and calling spi_init_f() from there.
Signed-off-by: David Müller d.muel...@elsoft.ch
Applied to u-boot/master, thanks!
--
Tom
On Tue, Sep 30, 2014 at 12:32:23PM +0200, David Müller (ELSOFT AG) wrote:
Signed-off-by: David Müller d.muel...@elsoft.ch
Applied to u-boot/master, thanks!
--
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On Fri, 2014-10-10 at 10:39 -0400, Tom Rini wrote:
On Fri, Oct 03, 2014 at 02:29:01PM +0100, Ian Campbell wrote:
From: Ian Campbell ian.campb...@citrix.com
On a couple of platforms I've tripped over long PXE append lines overflowing
this array, due to having CONFIG_SYS_CBSIZE == 256.
On Tue, Sep 30, 2014 at 01:53:28PM +0200, David Müller (ELSOFT AG) wrote:
remove the seldomly used EXT2 support because the U-Boot binary will
not fit into the 512KiB flash otherwise.
Signed-off-by: David Müller d.muel...@elsoft.ch
Applied to u-boot/master, thanks!
--
Tom
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From: Hao Zhang hzh...@ti.com
This patch adds hardware definitions specific to Keystone II
Lamar (K2L) SoC.
Acked-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Hao Zhang hzh...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
On Wed, Oct 01, 2014 at 05:22:58PM +0200, Jeroen Hofstee wrote:
A SPL/TPL enabled target would was not recognized as
such by BSD sed, since it relies on a GNU extension.
Instead of or-ing just spell out both matches.
Cc: Masahiro Yamada yamad...@jp.panasonic.com
Signed-off-by: Jeroen
This patch series adds Keystone II Lamar (K2L) SoC and k2l_evm
board support.
Based on
[U-boot] [Patch v2] keystone: usb: add support of usb xhci
https://patchwork.ozlabs.org/patch/386506/
v3..v1
- keystone2: k2l-evm: add board support
Add maintainers information
Enable SPL by
From: Hao Zhang hzh...@ti.com
This patch adds clock definitions and commands to support Keystone II
K2L SOC.
Acked-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Hao Zhang hzh...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
arch/arm/cpu/armv7/keystone/Makefile
On Fri, Oct 03, 2014 at 07:30:15AM +0200, Hannes Petermaier wrote:
The lines COL (collision detect) and CRS (carrier sense) needs to be connected
and muxed to the CPSW MAC for a proper function in half-duplex Mode of the
interface.
Signed-off-by: Hannes Petermaier oe5...@oevsv.at
Cc: Tom
On Wed, Oct 01, 2014 at 08:44:55AM -0700, York Sun wrote:
Fix the spelling of configs.
Signed-off-by: York Sun york...@freescale.com
CC: Masahiro Yamada yamad...@jp.panasonic.com
Acked-by: Masahiro Yamada yamad...@jp.panasonic.com
Applied to u-boot/master, thanks!
--
Tom
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On Fri, Oct 03, 2014 at 11:16:19AM +0200, Valentin Longchamp wrote:
Since on powerpc phys_size_t can be unsigned long long, this printout
line can result in a not nice compile warning.
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
Acked-by: Simon Glass s...@chromium.org
From: Hao Zhang hzh...@ti.com
Add Keystone II Lamar (K2L) SoC support.
Acked-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Hao Zhang hzh...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
arch/arm/cpu/armv7/keystone/spl.c | 7 +++
1 file changed, 7 insertions(+)
diff
From: Hao Zhang hzh...@ti.com
This patch adds Keystone II Lamar (K2L) SoC specific definitions
to support MSMC cache coherency.
Acked-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Hao Zhang hzh...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
From: Hao Zhang hzh...@ti.com
This patches enables the On-chip Shared Ram clock domain for K2L SoC.
Signed-off-by: Hao Zhang hzh...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
arch/arm/cpu/armv7/keystone/init.c| 49 +++
From: Hao Zhang hzh...@ti.com
This patch adds Keystone II Lammar (K2L) EVM board support.
Acked-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Hao Zhang hzh...@ti.com
Signed-off-by: Ivan Khoronzhuk ivan.khoronz...@ti.com
---
arch/arm/cpu/armv7/keystone/Kconfig| 3 ++
On Fri, Oct 03, 2014 at 03:57:00PM -0400, Tom Rini wrote:
We need to set the 'BE' flag here for things to work right.
Signed-off-by: Tom Rini tr...@ti.com
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Sep 16, 2014 at 05:51:05PM +0200, Stefan Herbrechtsmeier wrote:
Commit 12cc54376768461533b55ada1b0b6d4979f40579 'omap3: overo: Select
fdtfile for expansion board' wrongly missed the operator in the fdtfile
test. Update the test to only overwrite an empty fdtfile environment
variable.
Fix Tegra GPIO driver to not crash resp. misbehave upon requesting
GPIOs with an empty aka NULL label. As the driver uses exclusively the
label to check for reservation status actually supplying one is
mandatory!
This fixes a regression introduced by commit:
Fix ASIX USB to Ethernet reset which due to the new driver model Tegra
GPIO driver changes now requires a label string to be provided
otherwise the reservation and subsequent direction/value calls will
fail.
This fixes a regression introduced by commit:
2fccd2d96badcdf6165658a99771a4c475586279
This series adds the DDR3 ECC support to enable ECC in the DDR3
EMIF controller for Keystone II devices.
Based on
[U-boot] [Patch 0/5] keystone2: add network support for K2E SoC and EVM
https://www.mail-archive.com/u-boot@lists.denx.de/msg148985.html
Hao Zhang (1):
ARM: keystone: cmd_ddr3: add
On 10 October 2014 09:04, Marcel Ziswiler mar...@ziswiler.com wrote:
Fix ASIX USB to Ethernet reset which due to the new driver model Tegra
GPIO driver changes now requires a label string to be provided
otherwise the reservation and subsequent direction/value calls will
fail.
This fixes a
The EDMA3 controller’s primary purpose is to service data transfers
that you program between two memory-mapped slave endpoints on the device.
Typical usage includes, but is not limited to the following:
- Servicing software-driven paging transfers (e.g., transfers from external
memory, such as
From: Vitaly Andrianov vita...@ti.com
Add functions to set/get SES PMAX values of Pivilege ID pair.
Also add msmc module definitions.
Acked-by: Murali Karicheri m-kariche...@ti.com
Signed-off-by: Hao Zhang hzh...@ti.com
Signed-off-by: Vitaly Andrianov vita...@ti.com
Signed-off-by: Ivan
From: Vitaly Andrianov vita...@ti.com
This patch adds the DDR3 ECC support to enable ECC in the DDR3
EMIF controller for Keystone II devices.
By default, ECC will only be enabled if RMW is supported in the
DDR EMIF controller. The entire DDR memory will be scrubbed to
zero using an EDMA channel
From: Hao Zhang hzh...@ti.com
Add ddr3 commands:
test start_addr in hex end_addr in hex - test DDR from start\n
address to end address\n
ddr compare start_addr in hex end_addr in hex size in hex -\n
compare DDR data of (size) bytes from start address to end
address\n
ddr
Hi Marcel,
On 10 October 2014 08:56, Marcel Ziswiler mar...@ziswiler.com wrote:
Fix Tegra GPIO driver to not crash resp. misbehave upon requesting
GPIOs with an empty aka NULL label. As the driver uses exclusively the
label to check for reservation status actually supplying one is
mandatory!
Signed-off-by: Marcel Ziswiler mar...@ziswiler.com
---
include/asm-generic/gpio.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index 60539d8..1ebb9c7 100644
--- a/include/asm-generic/gpio.h
+++
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