Hi Bin,
On 10 August 2015 at 22:03, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Tue, Aug 11, 2015 at 11:55 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 21:53, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Mon, Aug 10, 2015 at 8:58 PM, Simon Glass
- Re-direct stderr into the log files, so any errors U-Boot emits are
visible in the logs. This is relevant if the reset shell command
attempts to report that it's not supported on the sandbox board.
- Fix test_fs_nonfs() to name the files it created differently for each
invocation.
On Mon, Aug 10, 2015 at 9:05 PM, Simon Glass s...@chromium.org wrote:
Use savedefconfig to get this file into the correct order.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3: None
Changes in v2:
- Rebase to mainline
configs/efi-x86_defconfig | 10 +-
1 file
Hi Simon,
On Mon, Aug 10, 2015 at 9:05 PM, Simon Glass s...@chromium.org wrote:
Set up interrupts correctly so that Linux can use all devices. Use
savedefconfig to regenerate the defconfig file.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Drop unnecessary blank lines
On Mon, Aug 10, 2015 at 9:05 PM, Simon Glass s...@chromium.org wrote:
We should signal to the FSP that PCI enumeration is complete. Perform this
task in a suitable place.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Drop interrupt.h header include
Changes in v2:
-
On Tue, Aug 11, 2015 at 12:02 PM, Simon Glass s...@chromium.org wrote:
Move to driver model for USB on minnowmax.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Use savedefconfig to tidy up the ordering
Changes in v2: None
configs/minnowmax_defconfig | 9 +
Hi Simon,
On Mon, Aug 10, 2015 at 9:05 PM, Simon Glass s...@chromium.org wrote:
It is a bit tedious to figure out the interrupt configuration for a new
x86 platform. Add a script which can do this, based on the output of
'pci long'. This may be helpful in some cases.
Signed-off-by: Simon
On Tue, Aug 11, 2015 at 12:02 PM, Simon Glass s...@chromium.org wrote:
When trying to figure out where an exception has occured, the relocated
address is not a lot of help. Its value depends on various factors. Show
the un-relocated IP as well. This can be looked up in System.map directly.
On Tue, Aug 11, 2015 at 12:02 PM, Simon Glass s...@chromium.org wrote:
Move to driver model for networking on minnowmax.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Use savedefconfig to tidy up the ordering
Changes in v2: None
board/intel/minnowmax/minnowmax.c | 6
Simon,
-Original Message-
From: Simon Glass [mailto:s...@google.com] On Behalf Of Simon Glass
Sent: Monday, August 10, 2015 6:15 AM
To: U-Boot Mailing List
Cc: Simon Glass; Tom Warren; Thierry Reding; Masahiro Yamada; Stephen
Warren; Tom Rini; Albert Aribaud; Marcel Ziswiler;
Hi Bin,
On 7 August 2015 at 18:47, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Sat, Aug 8, 2015 at 3:26 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 7 August 2015 at 03:28, Bin Meng bmeng...@gmail.com wrote:
Currently the microcode-tool writes microcode into a data block as
The full pinctrl implementation added by the previous commit can
support the same DT bindings as Linux, but it typically needs about
1.5 KB footprint to include the uclass support (CONFIG_PINCTRL +
CONFIG_PINCTRL_GENERIC + CONFIG_PINMUX on ARM architecture).
We are often limited on code size for
Priyanka,
If the boards have been officially named T1040D4RDB/T1042D4RDB, we can keep the
names. How about QDS and T1024 boards?
York
Original message
From: Jain Priyanka-B32167
Date:08/09/2015 22:01 (GMT-08:00)
To: Sun York-R58495 , U-Boot Mailing List
Cc: Wood Scott-B07421
On Friday, August 07, 2015 at 10:37:54 PM, Simon Glass wrote:
Hi Marek,
Hi Simon,
On 7 August 2015 at 14:35, Marek Vasut ma...@denx.de wrote:
On Friday, August 07, 2015 at 09:13:45 PM, Simon Glass wrote:
Hi Marek,
Hi!
On 5 August 2015 at 19:49, Marek Vasut ma...@denx.de wrote:
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles
This driver actually does nothing but test pinctrl uclass, and
demonstrate how things work.
To try this driver, uncomment /* #define DEBUG */ in the
drivers/pinctrl/pinctrl-sandbox.c, and debug messages will be
displayed.
DRAM: 128 MiB
sandbox pinmux: group = 1 (serial_a), function = 1
Sorry for delay. This is RFC v2.
README.pinctrl is missing in this version (I will do it in the
next version), but the code itself is almost ready for the review.
This series depends on
Add macros to ease our life with independent CONFIGs between U-Boot and SPL,
consists of 15 patches.
Sorry for delay. This is RFC v3.
(I forgot to send a pre-requisite patch.)
README.pinctrl is missing in this version (I will do it in the
next version), but the code itself is almost ready for the review.
This series depends on
Add macros to ease our life with independent CONFIGs between
The full pinctrl implementation added by the previous commit can
support the same DT bindings as Linux, but it typically needs about
1.5 KB footprint to include the uclass support (CONFIG_PINCTRL +
CONFIG_PINCTRL_GENERIC + CONFIG_PINMUX on ARM architecture).
We are often limited on code size for
On Monday, August 10, 2015 at 05:35:25 PM, Simon Glass wrote:
Hi Marek,
On 10 August 2015 at 09:01, Marek Vasut ma...@denx.de wrote:
On Friday, August 07, 2015 at 10:37:54 PM, Simon Glass wrote:
Hi Marek,
Hi Simon,
On 7 August 2015 at 14:35, Marek Vasut ma...@denx.de wrote:
Hello Albert,
On 18.07.2015 01:46, Vladimir Zapolskiy wrote:
This changeset improves support of Timll DevKit3250 board:
* added LPC32xx MAC and SMSC RMII phy support, this dependends on
- http://patchwork.ozlabs.org/patch/489100/
- http://patchwork.ozlabs.org/patch/489190/
-
Hi Marek,
On 10 August 2015 at 09:01, Marek Vasut ma...@denx.de wrote:
On Friday, August 07, 2015 at 10:37:54 PM, Simon Glass wrote:
Hi Marek,
Hi Simon,
On 7 August 2015 at 14:35, Marek Vasut ma...@denx.de wrote:
On Friday, August 07, 2015 at 09:13:45 PM, Simon Glass wrote:
Hi
This can be simply written with list_for_each_entry(), maybe
this macro was not necessary in the first place.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
include/dm/uclass.h | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/include/dm/uclass.h
Append debug server FW in error message to make more informative.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
Reviewed-by: Bhupesh Sharma bhupesh.sha...@freescale.com
---
Changes for v2: Incorporated Bhupesh's review comments
Changes for v3: Corrected description
Add driver for the DesignWare APB GPIO IP block.
This driver is DM capable and probes from DT.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Simon Glass s...@chromium.org
---
drivers/gpio/Kconfig | 7 ++
drivers/gpio/Makefile | 1 +
drivers/gpio/dwapb_gpio.c | 167
Add bank-name property to each GPIO bank to give it unique name.
The approach here is exactly the same as with the regulator-name
property for regulators.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Simon Glass s...@chromium.org
---
arch/arm/dts/socfpga.dtsi | 3 +++
1 file changed, 3
Enable the DWAPB GPIO driver for SoCFPGA Cyclone V and Arria V.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Simon Glass s...@chromium.org
Cc: Dinh Nguyen dingu...@opensource.altera.com
---
configs/socfpga_arria5_defconfig | 2 ++
configs/socfpga_cyclone5_defconfig | 2 ++
Hi Peng,
On Mon, Jul 20, 2015 at 8:28 AM, Peng Fan peng@freescale.com wrote:
1. Add USDHC, I2C, UART, 74LV, USB, QSPI support.
2. Support SPL
3. CONFIG_MX6UL_14X14_EVK_EMMC_REWORK is introduced, this board default
supports sd for usdhc2, but can do hardware rework to make usdhc2
Hi Lukasz,
On 10 August 2015 at 11:01, Lukasz Majewski l.majew...@majess.pl wrote:
Hi Simon,
Hi Lukasz,
On 25 July 2015 at 02:11, Lukasz Majewski l.majew...@majess.pl
wrote:
This code allows using DFU defined mediums for storing data
received via TFTP protocol.
It reuses and
Hi Bin,
On 6 August 2015 at 01:16, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Mon, Aug 3, 2015 at 8:10 AM, Simon Glass s...@chromium.org wrote:
There is quite a bit of assembler code that can be removed if we use the
generic global_data setup. Less arch-specific code makes it easier to
On 10 August 2015 at 08:28, Hou Zhiqiang b48...@freescale.com wrote:
Hi Jagan,
Do you have any feedback?
-Original Message-
From: Zhiqiang Hou [mailto:b48...@freescale.com]
Sent: 2015年7月23日 17:54
To: u-boot@lists.denx.de; jt...@openedev.com
Cc: Sun York-R58495; Hu Mingkai-B21284;
On 23 July 2015 at 15:24, Zhiqiang Hou b48...@freescale.com wrote:
From: Hou Zhiqiang b48...@freescale.com
Add clear flag status register operation that was required by Micron SPI
flash chips after reading the flag status register to check if the erase
and program operations complete or an
Hi Simon,
Hi Lukasz,
On 25 July 2015 at 02:11, Lukasz Majewski l.majew...@majess.pl
wrote:
This code allows using DFU defined mediums for storing data
received via TFTP protocol.
It reuses and preserves functionality of legacy code at
common/update.c.
The update_tftp() function
-Original Message-
From: Vladimir Zapolskiy [mailto:v...@mleia.com]
Hi Sylvain,
On 10.08.2015 15:16, slemieux.t...@gmail.com wrote:
From: Sylvain Lemieux slemi...@tycoint.com
Incorporate NAND SLC hardware ECC support from legacy
LPCLinux NXP BSP.
The code taken from the
Hi York,
On 7 August 2015 at 17:12, York Sun york...@freescale.com wrote:
On 08/07/2015 03:47 PM, Simon Glass wrote:
Hi York,
On 7 August 2015 at 14:48, York Sun york...@freescale.com wrote:
Simon,
I was doing an experiment to put the load address and entry address of
Linux to
higher
Append debug server image in error message to make more informative.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
Reviewed-by: Bhupesh Sharma bhupesh.sha...@freescale.com
---
Changes for v2: Incorporated Bhuesh's review comments
drivers/misc/fsl_debug_server.c | 10 +-
1
On 10 August 2015 at 06:59, Simon Glass s...@chromium.org wrote:
On 8 August 2015 at 09:45, Hans de Goede hdego...@redhat.com wrote:
Currently the serial code assumes that there is always at least one serial
port (and panics / crashes due to null pointer dereferences when there is
none).
This is useful when we want to bind a device, but do not need the
device pointer.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
drivers/core/device.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/core/device.c b/drivers/core/device.c
index
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles
This driver actually does nothing but test pinctrl uclass, and
demonstrate how things work.
To try this driver, uncomment /* #define DEBUG */ in the
drivers/pinctrl/pinctrl-sandbox.c, and debug messages will be
displayed.
DRAM: 128 MiB
sandbox pinmux: group = 1 (serial_a), function = 1
On 08/10/2015 11:40 AM, Simon Glass wrote:
Hi York,
On 7 August 2015 at 17:12, York Sun york...@freescale.com wrote:
On 08/07/2015 03:47 PM, Simon Glass wrote:
Hi York,
On 7 August 2015 at 14:48, York Sun york...@freescale.com wrote:
Simon,
I was doing an experiment to put the load
On 08/09/2015 09:07 AM, Simon Glass wrote:
Hi Stephen,
On 7 August 2015 at 16:12, Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
The return value of query_sdram_size() is assigned directly to
gd-ram_size in dram_init(). Adjust the return type to match the
Too much top-posting.
On Mon, Aug 10, 2015 at 2:41 PM, York Sun york...@freescale.com wrote:
SPL doesn't use net/eth.c. You add a call in env_flags.c.
I think you can put it in header file and use static inline, or keep it in the
same file where it is called.
That is probably fine.
Another
On 08/10/2015 12:57 PM, Joe Hershberger wrote:
Too much top-posting.
On Mon, Aug 10, 2015 at 2:41 PM, York Sun york...@freescale.com wrote:
SPL doesn't use net/eth.c. You add a call in env_flags.c.
I think you can put it in header file and use static inline, or keep it in
the
same file
The socfpga_cyclone5.dtsi has an mmc0 node, socrates has mmc node.
This makes aliases not very usable, so make everything into mmc0.
Moreover, zap the useless mmc alias while at this.
Signed-off-by: Marek Vasut ma...@denx.de
---
arch/arm/dts/socfpga.dtsi | 3 +--
On Saturday, July 18, 2015 at 01:58:09 AM, Simon Glass wrote:
On 25 June 2015 at 16:51, Joe Hershberger joe.hershber...@gmail.com wrote:
Hi Simon,
On Tue, Jun 23, 2015 at 4:39 PM, Simon Glass s...@chromium.org wrote:
Some functions called by mkimage would like to know the output file
Hi All,
I've migrate a custom armv7 board from v2015.01 to v2015.04. One issue
I've just started seeing is an odd hang _sometimes_ when booting
automatically. The issue doesn't (seem to) happen when the boot
process is interrupted and I run the boot command. I can also make
the problem appear or
Based on observation, this udelay(20) was apparently too high and caused
subsequent failure to calibrate DDR when U-Boot was compiled with certain
toolchains. Lowering this delay fixed the problem.
Instead of permanently lowering the delay, calculate the correct delay
based on the original
This code claims it needs to wait 7us, yet it uses get_timer() function
which operates with millisecond granularity. Use timer_get_us() instead,
which operates with microsecond granularity.
Signed-off-by: Marek Vasut ma...@denx.de
---
arch/arm/mach-socfpga/clock_manager.c | 12 +---
1
The GMAC which is enabled is purely board property, so do not enable
arbitrary GMAC in DT include files. Same goes for PHY mode, which is
again a board property. The CycloneV SoCDK does this correctly, but
SoCrates doesn't. This bug never manifested itself though, since all
the boards ever used
Just remove the ArriaV specific parts from the CycloneV SoCDK board
and they are no longer needed now.
Signed-off-by: Marek Vasut ma...@denx.de
---
board/altera/cyclone5-socdk/qts/iocsr_config.c | 688 -
board/altera/cyclone5-socdk/qts/iocsr_config.h | 9 -
The board/altera/socfpga directory is not a generic SoCFPGA machine
anymore, but instead it represents the Altera SoCDK board. To make
matters more complicated, it represents both CycloneV and ArriaV
variant.
On the other hand, nowadays, the content of this board directory is
mostly comprised of
This series cleans up the QTS-generated header files and cleans up
the SoCDK support such that they fit into the framework just like
any other SoCFPGA boards.
Marek Vasut (8):
arm: socfpga: Move wrappers into platform directory
arm: socfpga: Unbind CPU type from board type
arm: socfpga:
On 10.08.2015 21:40, LEMIEUX, SYLVAIN wrote:
-Original Message-
From: Vladimir Zapolskiy [mailto:v...@mleia.com]
Hi Sylvain,
On 10.08.2015 15:16, slemieux.t...@gmail.com wrote:
From: Sylvain Lemieux slemi...@tycoint.com
Incorporate NAND SLC hardware ECC support from legacy
Fix the following problem:
drivers/ddr/altera/sequencer.c: In function 'sdram_calibration_full':
drivers/ddr/altera/sequencer.c:1943:25: warning: 'found_failing_read' may be
used uninitialized in this function [-Wmaybe-uninitialized]
if (found_passing_read found_failing_read)
This gem is really really rare, there was an actual float used in
the Altera DDR init code, which pulled in floating point ops from
the libgcc, just wow.
Since we don't support floating point operations the same way Linux
does not support them, replace this with an integer multiplication
and
Signed-off-by: Marek Vasut ma...@denx.de
---
arch/arm/mach-socfpga/wrap_iocsr_config.c | 7 +-
arch/arm/mach-socfpga/wrap_pinmux_config.c | 23 +-
arch/arm/mach-socfpga/wrap_sdram_config.c | 8 +-
board/altera/arria5-socdk/qts/iocsr_config.c | 693
Just remove the CycloneV specific parts from the ArriaV SoCDK board
and they are no longer needed now.
Signed-off-by: Marek Vasut ma...@denx.de
---
board/altera/arria5-socdk/qts/iocsr_config.c | 652 -
board/altera/arria5-socdk/qts/iocsr_config.h | 9 -
Move the wrappers for QTS-generated files into platform directory
out of the board directory. The trick here is to add -I to CFLAGS
such that it points to the board directory in source tree and thus
the qts/ directory there is still reachable.
Signed-off-by: Marek Vasut ma...@denx.de
---
Add script which loads the QTS-generated sources and headers and converts
them into sensible format which can be used with much more easy in mainline
U-Boot. The script also filters out macros which makes no sense anymore, so
they don't pollute namespace and waste space.
Signed-off-by: Marek
The CONFIG_TARGET_SOCFPGA_CYCLONE5 and CONFIG_TARGET_SOCFPGA_ARRIA5
selected both a board and a CPU. This is not correct as these macros
are supposed to select only board.
All would be good, if QTS-generated header files didn't check for
these macros exactly to determine if the platform is
Now that we're actually converting the QTS-generated header files,
we can even adjust their data types. A good candidate for this is
the pinmux table, where each entry can have value in the range of
0..3, but each element is declared as unsigned long. By changing
the type to u8, we can save over
On Mon, 2015-08-10 at 09:17 +0800, Peng Fan wrote:
Hi Scott,
Do you have plan to pick the 3 patches?
https://patchwork.ozlabs.org/patch/498050/
https://patchwork.ozlabs.org/patch/498049/
https://patchwork.ozlabs.org/patch/498048/
Yes.
-Scott
Hi Marek,
On 10 August 2015 at 20:56, Marek Vasut ma...@denx.de wrote:
On Tuesday, August 11, 2015 at 04:47:33 AM, Simon Glass wrote:
Hi Marek,
Hi Simon,
Reviewed-by: Simon Glass s...@chromium.org
Sorry for the breakage. I had an weird issue with my original patch on
the boards you
Hi Simon,
On Tue, Aug 11, 2015 at 10:51 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 20:45, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Mon, Aug 10, 2015 at 11:48 PM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 7 August 2015 at 18:47, Bin Meng
Hi Bin,
On 10 August 2015 at 20:53, Bin Meng bmeng...@gmail.com wrote:
Hi Andrew,
On Mon, Aug 10, 2015 at 7:32 PM, Andrew Bradford
and...@bradfordembedded.com wrote:
Hi Bin,
On 08/09 10:52, Bin Meng wrote:
Hi Andrew,
On Sun, Aug 9, 2015 at 9:08 AM, Andrew Bradford
On Tue, Aug 11, 2015 at 10:54 AM, Simon Glass s...@chromium.org wrote:
This reverts commit df189d9ba3f8fd1bc67e3c0c3c4ace16cd065ee1.
Unfortunately this commit breaks chromebook_link because it adds lots of PCI
devices
before relocation and there is not enough pre-reloc malloc() memory.
Hi Bin,
On 10 August 2015 at 21:05, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Tue, Aug 11, 2015 at 10:51 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 20:45, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Mon, Aug 10, 2015 at 11:48 PM, Simon Glass
Hi Simon,
On Tue, Aug 11, 2015 at 11:07 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 20:53, Bin Meng bmeng...@gmail.com wrote:
Hi Andrew,
On Mon, Aug 10, 2015 at 7:32 PM, Andrew Bradford
and...@bradfordembedded.com wrote:
Hi Bin,
On 08/09 10:52, Bin Meng wrote:
Hi Bin,
On 10 August 2015 at 21:17, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Tue, Aug 11, 2015 at 11:07 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 20:53, Bin Meng bmeng...@gmail.com wrote:
Hi Andrew,
On Mon, Aug 10, 2015 at 7:32 PM, Andrew Bradford
Hi Simon,
On Tue, Aug 11, 2015 at 11:24 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 21:17, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Tue, Aug 11, 2015 at 11:07 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 20:53, Bin Meng
On 07/17/2015 05:58 PM, Simon Glass wrote:
On 6 July 2015 at 12:54, Simon Glass s...@chromium.org wrote:
Move sandbox over to use the reset uclass for reset, instead of a direct
call to do_reset(). This allows us to add tests.
Signed-off-by: Simon Glass s...@chromium.org
---
Hi Bin,
On 10 August 2015 at 21:31, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Tue, Aug 11, 2015 at 11:24 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 21:17, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Tue, Aug 11, 2015 at 11:07 AM, Simon Glass
Hi Simon,
On Tue, Aug 11, 2015 at 11:15 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 21:05, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Tue, Aug 11, 2015 at 10:51 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 20:45, Bin Meng
Hi Stephen,
On 10 August 2015 at 21:35, Stephen Warren swar...@wwwdotorg.org wrote:
On 07/17/2015 05:58 PM, Simon Glass wrote:
On 6 July 2015 at 12:54, Simon Glass s...@chromium.org wrote:
Move sandbox over to use the reset uclass for reset, instead of a direct
call to do_reset(). This allows
On 08/07/2015 07:42 AM, Simon Glass wrote:
Enable device tree control so that we can use driver model fully and avoid
using platform data.
I'm still not convinced about this change.
Re: the commit message about: What about the driver model is not being
fully used without DT?
Overall: What
Hi Simon,
On Mon, Aug 10, 2015 at 8:58 PM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 00:18, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Sat, Aug 8, 2015 at 10:26 PM, Simon Glass s...@chromium.org wrote:
Use savedefconfig to get this file into the correct order.
Hi Bin,
On 10 August 2015 at 21:53, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Mon, Aug 10, 2015 at 8:58 PM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 00:18, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Sat, Aug 8, 2015 at 10:26 PM, Simon Glass
On 08/07/2015 07:42 AM, Simon Glass wrote:
This binding differs from that of Linux. Update it and change existing
users.
Is that meant to imply that this patch fixes the copy of the binding doc
in U-Boot so it does match the kernel's copy?
Changes in v3:
- Rename binding file to pl01x.txt
Hi Simon,
On Mon, Aug 10, 2015 at 8:58 PM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 00:19, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Sat, Aug 8, 2015 at 10:27 PM, Simon Glass s...@chromium.org wrote:
Set up interrupts correctly so that Linux can use all
On 08/07/2015 07:42 AM, Simon Glass wrote:
This shows a proper progress display and the total amount of data
transferred. Enable it for Raspberry Pi.
Acked-by: Stephen Warren swar...@wwwdotorg.org
___
U-Boot mailing list
U-Boot@lists.denx.de
On 08/07/2015 07:42 AM, Simon Glass wrote:
This updates the device tree from the kernel version to something suitable
for U-Boot:
- Add stdout-path alias for console
- Mark the /soc node to be available pre-relocation so that the early serial
console works (we need the 'ranges' property to
Hi Bin,
On 10 August 2015 at 21:45, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Tue, Aug 11, 2015 at 11:15 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 21:05, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Tue, Aug 11, 2015 at 10:51 AM, Simon Glass
Move to driver model for networking on minnowmax.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Use savedefconfig to tidy up the ordering
Changes in v2: None
board/intel/minnowmax/minnowmax.c | 6 --
configs/minnowmax_defconfig | 1 +
2 files changed, 1
Move to driver model for USB on minnowmax.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Use savedefconfig to tidy up the ordering
Changes in v2: None
configs/minnowmax_defconfig | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git
Hi Simon,
On Tue, Aug 11, 2015 at 11:55 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 21:53, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Mon, Aug 10, 2015 at 8:58 PM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 10 August 2015 at 00:18, Bin Meng
When trying to figure out where an exception has occured, the relocated
address is not a lot of help. Its value depends on various factors. Show
the un-relocated IP as well. This can be looked up in System.map directly.
Signed-off-by: Simon Glass s...@chromium.org
Reviewed-by: Tom Rini
On 08/07/2015 09:09 PM, Stephen Warren wrote:
The existing FAT filesystem implementation in U-Boot has some bugs that
are tricky to fix cleanly without significant rework of the code. For
example, see:
http://lists.denx.de/pipermail/u-boot/2015-July/221054.html
[PATCH] fat: handle paths
HI Stephen,
On 10 August 2015 at 21:57, Stephen Warren swar...@wwwdotorg.org wrote:
On 08/07/2015 07:42 AM, Simon Glass wrote:
This binding differs from that of Linux. Update it and change existing
users.
Is that meant to imply that this patch fixes the copy of the binding doc
in U-Boot so
On Mon, Aug 10, 2015 at 9:05 PM, Simon Glass s...@chromium.org wrote:
At present there are no PCI functions which allow access to PCI
configuration using a struct udevice. This is a sad situation for driver
model as it makes use of PCI harder. Add these functions.
Signed-off-by: Simon Glass
On Tue, Aug 11, 2015 at 11:56 AM, Chris Packham judge.pack...@gmail.com wrote:
Hi All,
I've migrate a custom armv7 board from v2015.01 to v2015.04. One issue
I've just started seeing is an odd hang _sometimes_ when booting
automatically. The issue doesn't (seem to) happen when the boot
On Mon, Aug 10, 2015 at 9:05 PM, Simon Glass s...@chromium.org wrote:
These functions allow iteration through all PCI devices including bridges.
The children of each PCI bus are returned in turn. This can be useful for
configuring, checking or enumerating all the devices.
Signed-off-by: Simon
Hi Stephen,
On 10 August 2015 at 22:00, Stephen Warren swar...@wwwdotorg.org wrote:
On 08/07/2015 07:42 AM, Simon Glass wrote:
This updates the device tree from the kernel version to something suitable
for U-Boot:
- Add stdout-path alias for console
- Mark the /soc node to be available
On 08/10/2015 10:17 PM, Simon Glass wrote:
Hi Stephen,
On 10 August 2015 at 22:00, Stephen Warren swar...@wwwdotorg.org wrote:
On 08/07/2015 07:42 AM, Simon Glass wrote:
This updates the device tree from the kernel version to something suitable
for U-Boot:
- Add stdout-path alias for
On 08/10/2015 10:11 PM, Simon Glass wrote:
HI Stephen,
On 10 August 2015 at 21:57, Stephen Warren swar...@wwwdotorg.org wrote:
On 08/07/2015 07:42 AM, Simon Glass wrote:
This binding differs from that of Linux. Update it and change existing
users.
Is that meant to imply that this patch
SPL doesn't use net/eth.c. You add a call in env_flags.c.
I think you can put it in header file and use static inline, or keep it in the
same file where it is called.
Another way is to undef CONFIG_CMD_NET for SPL part. It is default to 'y' in
Kconfig. Joe may have some good suggestion.
York
Hi York,
On Mon, Aug 10, 2015 at 3:03 PM, York Sun york...@freescale.com wrote:
On 08/10/2015 12:57 PM, Joe Hershberger wrote:
Too much top-posting.
On Mon, Aug 10, 2015 at 2:41 PM, York Sun york...@freescale.com wrote:
SPL doesn't use net/eth.c. You add a call in env_flags.c.
I think
On 08/10/2015 01:05 PM, Joe Hershberger wrote:
Hi York,
On Mon, Aug 10, 2015 at 3:03 PM, York Sun york...@freescale.com wrote:
On 08/10/2015 12:57 PM, Joe Hershberger wrote:
Too much top-posting.
On Mon, Aug 10, 2015 at 2:41 PM, York Sun york...@freescale.com wrote:
SPL doesn't use
Much of the early-init assembler on x86 can be removed if we use the new
board_init_f_mem() function. At present only PowerPC uses it, but we should
try to move more archs over.
This has been contemplated for a while but it is time to take the plunge.
Changes in v2:
- Correct logic to round down
This is declared but no-longer exists. Drop it.
Signed-off-by: Simon Glass s...@chromium.org
Reviewed-by: Bin Meng bmeng...@gmail.com
---
Changes in v2: None
arch/x86/include/asm/u-boot-x86.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/x86/include/asm/u-boot-x86.h
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