On Tue, Mar 29, 2016 at 02:14:34PM +0200, Paul Kocialkowski wrote:
> Le lundi 28 mars 2016 à 10:06 -0400, Tom Rini a écrit :
> > On Mon, Mar 28, 2016 at 02:07:13PM +0200, Paul Kocialkowski wrote:
> > > With the previous implementation, rebooting without registering a
> > > recognized
> > > reboot
On 04/09/2016 01:07 AM, Bakhvalov, Denis (Nokia - PL/Wroclaw) wrote:
> Hi Marek,
Hi!
>>> Just check if the mainline SPL generated from this branch works on your
>>> platform please.
>
> I tested U-boot generated from the branch you specified:
> U-Boot 2016.03-11349-g5d09125-dirty (Apr 09 2016 -
Hi Marek,
>> Just check if the mainline SPL generated from this branch works on your
>> platform please.
I tested U-boot generated from the branch you specified:
U-Boot 2016.03-11349-g5d09125-dirty (Apr 09 2016 - 00:42:24 +0200)
Works pretty well.
All needed functionality works for me. I
On 04/05/2016 06:06 AM, Mario Six wrote:
> To enable DM on MPC85xx, we need pre-relocation malloc, which is
> implemented in this patch.
>
> We also make sure that the IVORs are always 4-aligned on e500 to prevent
> alignment exceptions caused by code changes in start.S.
>
> Signed-off-by: Mario
On 04/06/2016 01:52 PM, York Sun wrote:
> CONFIG_SYS_INIT_RAM_SIZE may be used out of the board header file.
> Some boards use CONFIG_SYS_INIT_RAM_END for the same purpose. To
> unify the macros, use CONFIG_SYS_INIT_RAM_SIZE for all.
>
> Signed-off-by: York Sun
> CC: Mario Six
On 03/14/2016 04:47 AM, Codrin Ciubotariu wrote:
> The commands for the VSC9953 l2 switch from T1040 became generic in
> patch https://patchwork.ozlabs.org/patch/499748/ and the define
> was renamed.
>
> Signed-off-by: Codrin Ciubotariu
> ---
>
Tom,
The following changes since commit 46a16bd895144617575c788d9c2554aeef76ac44:
kirkwood_nand: claim MPP pins on the fly (2016-04-06 15:40:33 +0200)
are available in the git repository at:
git://git.denx.de/u-boot-mpc85xx.git master
for you to fetch changes up to
On 8 April 2016 at 05:36, Marek Vasut wrote:
> On 04/08/2016 07:16 AM, Stefan Roese wrote:
>> On 08.04.2016 01:51, George Broz wrote:
>>
>>
>>
>> Try with the attached patch (and probably with dcache off)
>
> The patch applied cleanly. The behavior is unchanged with
On 6 April 2016 at 19:04, Marek Vasut wrote:
> The code uses a lot of signed numbers, which ended up in variables
> of unsigned type, which resulted in all sorts of underflows. This
> in turn caused incorrect calibration on certain boards. Moreover,
> repair the readout of the DQ
On 6 April 2016 at 19:04, Marek Vasut wrote:
> Just staticize global variables in sequencer, since there is no
> point in having these symbols available outside of the DDR code.
>
> Signed-off-by: Marek Vasut
> Cc: Dinh Nguyen
> Cc:
On 6 April 2016 at 19:04, Marek Vasut wrote:
> Originally, the DLEVEL selects the debug level within the sequencer code,
> but only displays the messages on that particular debug level. Tweak the
> handling such that for particular debug level, debug messages on that
> level and
On 6 April 2016 at 19:04, Marek Vasut wrote:
> This one last set of delay configuration registers was not properly
> zeroed out originally, fix it and zero them out.
>
> Signed-off-by: Marek Vasut
> Cc: Dinh Nguyen
> Cc: Chin Liang
On 6 April 2016 at 19:04, Marek Vasut wrote:
> There is no point in resetting the ODT setting if the write test
> failed, since the code will always retry the calibration and thus
> reconfigure the ODT anyway OR the code will fail calibration and
> halt.
>
> Signed-off-by: Marek
On 6 April 2016 at 19:04, Marek Vasut wrote:
> Every invocation of the scc_mgr_set_dqs_en_delay_all_ranks() is
> followed by SCC manager update. Moreover, only this function
> triggers the SCC manager update internally. Thus, remove the
> internal invocation to avoid triggering the
On 6 April 2016 at 19:03, Marek Vasut wrote:
> The code should be setting registers to zero, not one register to value.
> Swap the order of arguments to correct the behavior. The behavior is now
> in-line with code generated by Quartus 15.1 .
>
> Signed-off-by: Marek Vasut
On 6 April 2016 at 19:04, Marek Vasut wrote:
> The hi address bitfield in the protection rule must be set to
> the last address in the region which the rule represents. The
> behavior is now in-line with code generated by Quartus 15.1 .
>
> Signed-off-by: Marek Vasut
On 6 April 2016 at 19:03, Marek Vasut wrote:
> In the most unlikely case the DQS tracking was to be disabled,
> make sure we do not errornously re-enable it. Note that DQS
> tracking is enabled on all systems observed thus far.
>
> Signed-off-by: Marek Vasut
> Cc:
On 6 April 2016 at 19:03, Marek Vasut wrote:
> The bit 22 is in fact DQS tracking enable bit (dqstrken) and there
> is a macro for this bit already, so use it.
>
> Signed-off-by: Marek Vasut
> Cc: Dinh Nguyen
> Cc: Chin Liang See
From: Steve Kipisz
The AM572x-IDK board (Industrial Dev Kit) is a board based on TI's AM5728x
SOC which has a dual core 1.5GHz A15 processor. This board is a development
platform for the Industrial market with:
- 2GB of DDR3L
- Dual 1Gbps Ethernet
- HDMI,
- PRU-ICSS
- uSD
-
From: Schuyler Patton
Update EMIF data based on recommendations from the now standard TI
EMIF tool version 1.1.1 based on 256MBx16 DDR3L Kingston D2516EC4BXGGB
data sheet
Update T_RRD from 5 to 6 based on AM57xx TRM -
Minimum number of DDR cycles from activate to ativate for a
On Tue, Apr 5, 2016 at 5:03 PM, Pantelis Antoniou
wrote:
> Hi Maxime,
>
>> On Apr 4, 2016, at 11:25 , Maxime Ripard
>> wrote:
>>
>> The device tree overlays are a good way to deal with user-modifyable
>> boards or boards with
On Fri, 8 Apr 2016 08:41:14 -0700
John Tobias wrote:
> Hi Lukas,
>
>
> On Fri, Apr 8, 2016 at 2:19 AM, Lukasz Majewski
> wrote:
>
> > Hi John,
> >
> > > The USB Mass Storage (ums) works in Windows, Linux and OS X (EL
> > > Capitan). But, not
On Fri, 8 Apr 2016 10:29:31 -0600
Stephen Warren wrote:
> On 04/08/2016 09:44 AM, Lukasz Majewski wrote:
> > By default (on almost all systems) the dfu env variable, which
> > defines available alt settings, is named as "dfu_alt_info".
> >
> > However on some platforms
On Fri, 8 Apr 2016 10:28:06 -0600
Stephen Warren wrote:
> On 04/08/2016 09:44 AM, Lukasz Majewski wrote:
> > By default (on almost all systems) the dfu env variable, which
> > defines available alt settings, is named as "dfu_alt_info".
> >
> > However on some platforms
By applying this patch, it will give us some flexibility to expose
a selected partition/s.
e.g:
1. To expose several partitions
ums 0 mmc 0:1,0:6
2. To expose the all partitions
ums 0 mmc 0:0
3. To expose multiple partititions on several devices
ums 0 mmc 0:1,1:6
Signed-off-by: John Tobias
On Tue, Apr 05, 2016 at 10:00:55AM +0530, Lokesh Vutla wrote:
> Detect a FIT when loading from a FAT File system and handle it using the
> new FIT SPL support.
>
> Signed-off-by: Lokesh Vutla
Reviewed-by: Tom Rini
--
Tom
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Description:
On Tue, Apr 05, 2016 at 02:07:46PM +0530, Mugunthan V N wrote:
> Scott/Tom
>
> On Saturday 02 April 2016 05:55 AM, Tom Rini wrote:
> > On Fri, Apr 01, 2016 at 06:45:03PM -0500, Scott Wood wrote:
> >> On Fri, 2016-04-01 at 19:41 -0400, Tom Rini wrote:
> >>> On Fri, Apr 01, 2016 at 06:07:18PM
On Thu, Apr 07, 2016 at 09:02:26PM +0530, Vignesh R wrote:
> In case of DT boot, don't read default speed and mode for SPI from
> CONFIG_*, instead read from DT node. This will make sure that boards
> with multiple SPI/QSPI controllers can be probed at different
> bus frequencies and modes.
>
>
On Wed, Apr 06, 2016 at 11:46:59AM -0600, Stephen Warren wrote:
> From: Stephen Warren
>
> When implementing test/py hook scripts, it's helpful to read some working
> examples. Provide a link to some. The link was mentioned in the commit
> message which first added test/py,
On Tue, Apr 05, 2016 at 10:00:54AM +0530, Lokesh Vutla wrote:
> This provides a way to load a FIT containing U-Boot and a selection of device
> tree files from a File system.
>
> Signed-off-by: Lokesh Vutla
Reviewed-by: Tom Rini
--
Tom
signature.asc
On Mon, Apr 04, 2016 at 03:22:49PM +0530, Mugunthan V N wrote:
> omap_hsmmc driver directly typecasts fdt_addr_t to a pointer.
> This is not strictly correct, as it gives a build warning when
> fdt_addr_t is u64. So, use map_physmem for a proper typecasts.
>
> This is inspired by commit
On Sun, Apr 03, 2016 at 09:52:13PM +0800, Peng Fan wrote:
> Introduce env support for sata device.
> 1. Implement write_env/read_env/env_relocate_spec/saveenv/sata_get_env_dev
> 2. If want to enable this feature, define CONFIG_ENV_IS_IN_SATA, and
>define CONFIG_SYS_SATA_ENV_DEV or implement
On Wed, Apr 06, 2016 at 09:59:34PM -0500, Daniel Allred wrote:
> - Move the CONS_INDEX selection out of CONFIG_SYS_EXTRA_OPTIONS and
> into Kconfig proper.
> - Edit the relevant am57x configs to remove the now unneeded
> CONFIG_SYS_EXTRA_OPTIONS.
>
> Signed-off-by: Daniel
On Wed, Apr 06, 2016 at 05:33:00PM +0530, Lokesh Vutla wrote:
> Detect a FIT when loading from SPI and handle it using the
> new FIT SPL support.
>
> Signed-off-by: Lokesh Vutla
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital
On Wed, Apr 06, 2016 at 05:16:02PM -0600, Simon Glass wrote:
> Hi,
>
> On 31 March 2016 at 09:24, Marek Vasut wrote:
> > On 03/31/2016 05:11 PM, Tom Rini wrote:
> >> On Thu, Mar 31, 2016 at 04:10:49PM +0200, Michal Simek wrote:
> >>> Hi Tom,
> >>>
> >>> On 15.3.2016 13:14,
On Wed, Apr 06, 2016 at 05:32:59PM +0530, Lokesh Vutla wrote:
> Peripherals like spi etc. uses DMA for transfers. So, when loading the fit
> image the destination address should be dma aligned.
>
> Signed-off-by: Lokesh Vutla
Reviewed-by: Tom Rini
--
On Wed, Apr 06, 2016 at 10:35:25AM -0700, York Sun wrote:
> Tom,
>
> The following changes since commit 4ed6ed3c27a069a00c8a557d606a05276cc4653e:
>
> Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze (2016-04-04
> 14:34:09 -0400)
>
> are available in the git repository at:
>
On Fri, Apr 08, 2016 at 02:11:48AM +0300, Sam Protsenko wrote:
[snip]
> The only actual documentation for fastboot protocol I found is [1],
> and I don't see any mention of alignment there at all. So it wouldn't
> surprise me if that patch was done just out of of empiric
> observations. Which
Hi Qianyu,
On 25 March 2016 at 03:34, Qianyu Gong wrote:
> Hi Simon,
>
>
>
> I think I’m not very clear with this code in common/cmd_sf.c:
>
> “
>
> # ifdef CONFIG_DM_SPI_FLASH
>
>/* Remove the old device, otherwise probe will just be a nop */
>
>ret =
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Yunhui
> Cui
> Sent: Friday, April 08, 2016 3:57 PM
> To: york sun
> Cc: Yunhui Cui; u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH] armv8/ls2080a: configure PMU's PCTBENR to
> enable WDT
>
> From: Yunhui Cui
Hi Marek,
On Fri, 2016-04-08 at 19:23 +0200, Marek Vasut wrote:
> On 04/08/2016 07:08 PM, Alexey Brodkin wrote:
> >
> > Hi Marek,
> >
> > On Fri, 2016-04-08 at 19:05 +0200, Marek Vasut wrote:
> > >
> > > On 04/08/2016 07:00 PM, Alexey Brodkin wrote:
> > > >
> > > >
> > > > Commit
On Fri, Apr 8, 2016 at 7:37 PM, Stephen Warren wrote:
> On 04/07/2016 09:13 AM, Semen Protsenko wrote:
>>
>> From: Sam Protsenko
>>
>> The description was borrowed from kernel. Definitions were added to
>> defconfig files in a way that "make
On 04/08/2016 07:23 PM, Sam Protsenko wrote:
> On Fri, Apr 8, 2016 at 7:37 PM, Stephen Warren wrote:
>> On 04/07/2016 09:13 AM, Semen Protsenko wrote:
>>>
>>> From: Sam Protsenko
>>>
>>> The description was borrowed from kernel. Definitions were
On 04/08/2016 07:00 PM, Alexey Brodkin wrote:
> Commit cf7c93cdd755 "usb: ehci: Implement V2P mapping"
> introduced usage of virt_to_phys() in ehci-hcd.
>
> Since there was no implementation of virt_to_phys() for ARC
> compilation of the ehci-generic driver failed.
>
> This change adds
On 04/08/2016 07:08 PM, Alexey Brodkin wrote:
> Hi Marek,
>
> On Fri, 2016-04-08 at 19:05 +0200, Marek Vasut wrote:
>> On 04/08/2016 07:00 PM, Alexey Brodkin wrote:
>>>
>>> Commit cf7c93cdd755 "usb: ehci: Implement V2P mapping"
>>> introduced usage of virt_to_phys() in ehci-hcd.
>>>
>>> Since
Hi Marek,
On Fri, 2016-04-08 at 19:05 +0200, Marek Vasut wrote:
> On 04/08/2016 07:00 PM, Alexey Brodkin wrote:
> >
> > Commit cf7c93cdd755 "usb: ehci: Implement V2P mapping"
> > introduced usage of virt_to_phys() in ehci-hcd.
> >
> > Since there was no implementation of virt_to_phys() for ARC
Commit cf7c93cdd755 "usb: ehci: Implement V2P mapping"
introduced usage of virt_to_phys() in ehci-hcd.
Since there was no implementation of virt_to_phys() for ARC
compilation of the ehci-generic driver failed.
This change adds virt_to_phys() stub for ARC so now
USB driver for AXS101 board could
On 04/08/2016 07:00 PM, Alexey Brodkin wrote:
> Commit cf7c93cdd755 "usb: ehci: Implement V2P mapping"
> introduced usage of virt_to_phys() in ehci-hcd.
>
> Since there was no implementation of virt_to_phys() for ARC
> compilation of the ehci-generic driver failed.
>
> This change adds
I'm trying to resolve a strange networking issue with the ITEAD Core EVB +
AW2041 module.
If I connect all 3 UART wires (GND, RCV & TX) between the board and a USB UART
device: I get an IP 100% of the time.
If I connect only TX & RCV: I get an IP 100%.
If I connect TX & GND, I get an IP 100%.
On 04/07/2016 09:13 AM, Semen Protsenko wrote:
From: Sam Protsenko
The description was borrowed from kernel. Definitions were added to
defconfig files in a way that "make savedefconfig" generates exactly
the same file as used defconfig.
Boards using 0 mA as
On 04/08/2016 09:44 AM, Lukasz Majewski wrote:
After concatenation of "dfu_alt_info" variable from "dfu_alt_boot" and
"dfu_alt_system" it may happen that test and dummy files alt settings
are different than default 0 and 1.
This patch provides ability to set different values for them.
It was
Hi York,
On Wed, 6 Apr 2016 13:51:57 -0700
York Sun york@nxp.com wrote:
> CONFIG_SYS_INIT_RAM_SIZE may be used out of the board header file.
> Some boards use CONFIG_SYS_INIT_RAM_END for the same purpose. To
> unify the macros, use CONFIG_SYS_INIT_RAM_SIZE for all.
>
> Signed-off-by: York
On 04/08/2016 09:44 AM, Lukasz Majewski wrote:
By default (on almost all systems) the dfu env variable, which defines
available alt settings, is named as "dfu_alt_info".
However on some platforms (i.e. Odroid XU3), the 'dfu_alt_info' is concatenated
from other variables - namely 'dfu_alt_boot'
On 04/08/2016 09:44 AM, Lukasz Majewski wrote:
By default (on almost all systems) the dfu env variable, which defines
available alt settings, is named as "dfu_alt_info".
However on some platforms (i.e. Odroid XU3), the 'dfu_alt_info' is concatenated
from other variables - namely 'dfu_alt_boot'
Not all devices use the same internal delay or fifo depth.
Add the ability to set the internal delay for rx or tx and the
fifo depth via the devicetree. If the value is not set in the
devicetree then set the delay to the default.
If devicetree is not used then use the default defines within the
Add the ability to pass the phy-handle node offset
to the phy driver. This allows the phy driver
to access the DT subnode's data and parse accordingly.
Signed-off-by: Dan Murphy
---
drivers/net/zynq_gem.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff
On 08.04.2016 18:08, York Sun wrote:
On 04/06/2016 01:52 PM, York Sun wrote:
CONFIG_SYS_INIT_RAM_SIZE may be used out of the board header file.
Some boards use CONFIG_SYS_INIT_RAM_END for the same purpose. To
unify the macros, use CONFIG_SYS_INIT_RAM_SIZE for all.
Signed-off-by: York Sun
On 04/06/2016 01:52 PM, York Sun wrote:
> CONFIG_SYS_INIT_RAM_SIZE may be used out of the board header file.
> Some boards use CONFIG_SYS_INIT_RAM_END for the same purpose. To
> unify the macros, use CONFIG_SYS_INIT_RAM_SIZE for all.
>
> Signed-off-by: York Sun
> CC: Mario Six
Add a helper to phy.h to identify whether the
phy is configured for SGMII all variables.
Signed-off-by: Dan Murphy
---
include/phy.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/phy.h b/include/phy.h
index 7b2d1ff..ef3eb51 100644
--- a/include/phy.h
The code assumed that if the interface is not RGMII configured
then it must be SGMII configured. This device has the ability
to support most of the MII interfaces. Therefore add the
helper for SGMII and only configure the device if the interface is
configured for SGMII.
Signed-off-by: Dan
Add the device tree bindings and the accompanying documentation
for the TI DP83867 Giga bit ethernet phy driver.
The original document was from:
[commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]
Signed-off-by: Dan Murphy
---
v3- Update the bindings to
Move the phy_interface_is_rgmii to the phy.h
file for all phy's to be able to use the API.
This now aligns with the Linux kernel based on
commit e463d88c36d42211aa72ed76d32fb8bf37820ef1
Signed-off-by: Dan Murphy
---
drivers/net/phy/ti.c | 11 ---
include/phy.h|
Add the ability to read the phy-handle node of the
cpsw slave. Upon reading this handle the phy-id
can be stored based on the reg node in the DT.
The phy-handle also needs to be stored and passed
to the phy to access any phy data that is available.
Signed-off-by: Dan Murphy
---
By default (on almost all systems) the dfu env variable, which defines
available alt settings, is named as "dfu_alt_info".
However on some platforms (i.e. Odroid XU3), the 'dfu_alt_info' is concatenated
from other variables - namely 'dfu_alt_boot' and 'dfu_alt_system' at run time
(when one types
This patch replaces hardcoded (i.e. 0 and 1) values passed to dfu_{read|write}
with global variables.
Signed-off-by: Lukasz Majewski
---
test/py/tests/test_dfu.py | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/test/py/tests/test_dfu.py
After concatenation of "dfu_alt_info" variable from "dfu_alt_boot" and
"dfu_alt_system" it may happen that test and dummy files alt settings
are different than default 0 and 1.
This patch provides ability to set different values for them.
It was the simplest possible solution - akin to the one
Hi Lukas,
On Fri, Apr 8, 2016 at 2:19 AM, Lukasz Majewski
wrote:
> Hi John,
>
> > The USB Mass Storage (ums) works in Windows, Linux and OS X (EL
> > Capitan). But, not in OS X (Yosemite). By applying the said patch, it
> > extends the ums support.
> >
> >
On 04/08/2016 07:29 AM, Michal Simek wrote:
> On 8.4.2016 14:05, Dan Murphy wrote:
>> On 04/08/2016 04:25 AM, Michal Simek wrote:
>>> On 7.4.2016 18:02, Dan Murphy wrote:
Mugunthan
On 04/06/2016 11:45 PM, Mugunthan V N wrote:
> On Wednesday 06 April 2016 05:07 PM, Dan Murphy
On 04/07/2016 12:41 AM, Stefan Roese wrote:
> This patch adds the missing configuration of the output value to the
> gpio_direction_output() function. Without this, calling
> gpio_direction_output() does not set the out-value at all and only
> configures the gpio as output.
>
> Signed-off-by:
On 04/08/2016 07:16 AM, Stefan Roese wrote:
> On 08.04.2016 01:51, George Broz wrote:
>
>
>
> Try with the attached patch (and probably with dcache off)
The patch applied cleanly. The behavior is unchanged with both
dcache on and off. The "good" sticks still work, and "bad"
Hi Shawn,
On 8 April 2016 at 08:36, Shawn Guo wrote:
> The firmware from link [1] only works with U-Boot image that is no
> bigger than 328KiB. Using it with the default mainline U-Boot today
> which is already around 500KiB is just not working. Correct the link
> to be
From: Yunhui Cui
The SP805-WDT module on LS2080A and LS2085A, requires configuration
of PMU's PCTBENR register to enable watchdog counter decrement and
reset signal generation. In order not to affect the sp805wdt driver
frame, we enable the watchdog clk in advance.
This line is not needed, as the board supports DT based probing. And
here the "Model:" is already printed:
Model: Marvell Armada XP theadorable
Board: theadorable
One line for the board name is enough.
Signed-off-by: Stefan Roese
---
board/theadorable/theadorable.c | 2 --
1
To make the usage of this function more flexible, lets add the CRC start
value as parameter to this function. This way it can be used by other
functions requiring different start values than 0 as well.
For non-zero CRC start values to work, I've reworked the function a bit.
The new implementation
This patch enables the 2nd I2C controller on the Armada XP theadorable
board.
Signed-off-by: Stefan Roese
---
include/configs/theadorable.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
index 20a44c9..05a248e
Add MVEBU_TWSI1_BASE define so that the 2nd I2C controller on e.g. AXP
can be used.
Signed-off-by: Stefan Roese
---
arch/arm/mach-mvebu/include/mach/soc.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h
Sometimes the PCIe link for the PEX-switch will not come-up. In this case,
the board is not in a usable state. This patch makes sure that in this
case a soft-reset is issued. If this soft-reset does not result in the
PEX-switch being detected after some soft-reset cycles, an I2C message
is sent to
On 8.4.2016 14:05, Dan Murphy wrote:
> On 04/08/2016 04:25 AM, Michal Simek wrote:
>> On 7.4.2016 18:02, Dan Murphy wrote:
>>> Mugunthan
>>>
>>> On 04/06/2016 11:45 PM, Mugunthan V N wrote:
On Wednesday 06 April 2016 05:07 PM, Dan Murphy wrote:
> Add the device tree bindings and the
On Fri, Apr 08, 2016 at 03:10:13PM +0530, Lokesh Vutla wrote:
> From: Roger Quadros
>
> Not all keystone 2 devices use Davinci NAND controller. Move the platform
> specific NAND configurations into platform specific headers.
>
> Reported-by: Nishanth Menon
>
On 04/08/2016 04:25 AM, Michal Simek wrote:
> On 7.4.2016 18:02, Dan Murphy wrote:
>> Mugunthan
>>
>> On 04/06/2016 11:45 PM, Mugunthan V N wrote:
>>> On Wednesday 06 April 2016 05:07 PM, Dan Murphy wrote:
Add the device tree bindings and the accompanying documentation
for the TI DP83867
From: Roger Quadros
Not all keystone 2 devices use Davinci NAND controller. Move the platform
specific NAND configurations into platform specific headers.
Reported-by: Nishanth Menon
Signed-off-by: Roger Quadros
Signed-off-by: Mugunthan V N
On 7.4.2016 18:02, Dan Murphy wrote:
> Mugunthan
>
> On 04/06/2016 11:45 PM, Mugunthan V N wrote:
>> On Wednesday 06 April 2016 05:07 PM, Dan Murphy wrote:
>>> Add the device tree bindings and the accompanying documentation
>>> for the TI DP83867 Giga bit ethernet phy driver.
>>>
>>> The original
Hi John,
> The USB Mass Storage (ums) works in Windows, Linux and OS X (EL
> Capitan). But, not in OS X (Yosemite). By applying the said patch, it
> extends the ums support.
>
> Signed-off-by: John Tobias
> ---
> drivers/usb/gadget/g_dnl.c | 4 ++--
> 1 file changed,
Dear Heiko,
[Nobuhiro's mail address fixed]
In message <57076c13.50...@denx.de> you wrote:
>
> > I recommend to make this restriction more visible in the code and in
> > the comment, and/or even add a compile time test to guarantee this
> > requirement is met.
>
> Maybe you try the following
Hello Nobuhiro,
Am 07.04.2016 um 22:31 schrieb Wolfgang Denk:
Dear Nobuhiro,
while tracking down a memory corruption bug in other code, I ran over
these lines in drivers/net/sh_eth.c :
...
194 /*
195 * Allocate rx descriptors. They must be aligned to size of struct
196
Hi all,
Purpose of my previous reply was to explain that other platform's psci
codes are touched several times in my patches, but they are not
changed much at last, while that reply was identified by patch work as
a patch too, reviews please ignore it:
https://patchwork.ozlabs.org/patch/607904/
This patch set touches other psci drivers, such as
arch/arm/cpu/armv7/mx7/psci.S | 7 +-
arch/arm/cpu/armv7/sunxi/psci_sun6i.S | 8 +-
arch/arm/cpu/armv7/sunxi/psci_sun7i.S | 8 +-
arch/arm/mach-tegra/psci.S | 7 +-
But the changes are quite
From: Hongbo Zhang
LS1021 offers two secure OCRAM blocks for trustzone.
This patch moves all the secure text sections into the OCRAM.
Signed-off-by: Wang Dongsheng
Signed-off-by: Hongbo Zhang
---
From: Hongbo Zhang
The input parameter CPU ID needs to be validated before furher oprations such
as CPU_ON, this patch introduces the function to do this.
Signed-off-by: Wang Dongsheng
Signed-off-by: Hongbo Zhang
---
From: Hongbo Zhang
This patch implements PSCI functions for ls102xa SoC following PSCI v1.0,
they are as the list:
psci_version,
psci_features,
psci_cpu_suspend,
psci_affinity_info,
psci_system_reset,
psci_system_off.
Tested on LS1021aQDS,
From: Hongbo Zhang
This patch adds all the PSCI v1.0 functions in to the common framework, with
all the functions returning "not sopported" by default, as a common framework
all the functions are added here, it is up to every platform developer to
decide which version of
From: Hongbo Zhang
For the robustness of codes, while powering on a CPU, it is better to check
if the target CPU is already on or in the process of power on, if yes the
power on routine shouldn't be executed further and should return with the
corresponding status
From: Hongbo Zhang
There are codes for saving target PC and target context ID in each platform
psci_cpu_on routines, these can be factored out as psci_cpu_on_common.
Signed-off-by: Hongbo Zhang
Signed-off-by: Wang Dongsheng
From: Hongbo Zhang
According to latest PSCI specification, the context ID is needed by CPU_ON.
This patch saves context ID to the second lowest address of the stack (next to
where target PC is saved), and restores it to r0 when needed while target CPU
booting up.
This
From: Wang Dongsheng
Since we are already under the directory of arch/arm/, the prefix ARM_ for
macros isn't so necessary, and with more PSCI interfaces being added later,
there will be much more redundant ARM_ prefixes, what's more, there are no
ARM_/arm_ prefixes for
From: Wang Dongsheng
According to PSCI specification v1.0, the PSCI functions should start from
0x8400 for SMC32, this patch changes this base value as well as other
function offset values.
Signed-off-by: Wang Dongsheng
Signed-off-by: Hongbo
From: Hongbo Zhang
The legacy code reserves one word in each stack for saving target PC, but it
isn't used, the target PC is still saved to where the stack top pointer points.
This patch relocates the place for saving target PC to the lowest address of
each stack,
From: Hongbo Zhang
There are issues of legacy fuction psci_get_cpu_stack_top:
First, because the stack grows in descending address order, it is better the
stack starts from page end or some similiar address, but currently the
algorithm is based on address of page start, if
From: Hongbo Zhang
This patch set contains two parts:
ARMv7 PSCI common framework: fix some issues and add v1.0 support
NXP (was Freescale) LS102XA: codes enhancement and add v1.0 implementation
Changes since v1:
- re-organize psci_cpu_on_common, this code should be called
On 04/07/2016 04:11 AM, Huan Wang wrote:
> Hi, Scott,
>
>> On 04/05/2016 09:16 PM, Huan Wang wrote:
>>> Hi, York and Scott,
>>>
On 04/05/2016 05:11 AM, Alison Wang wrote:
> For LS1021A Secure Boot, SPARE2 register is used and modified by the
> IBR. To avoid the conflict, SPARE4 is
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