On December 7, 2016 4:47:23 AM CET, Simon Glass wrote:
>Hi Oliver,
>
>On 5 December 2016 at 03:28, Olliver Schinagl
>wrote:
>> Hey Simon,
>>
>>
>>
>> On 05-12-16 07:24, Simon Glass wrote:
>>>
>>> Hi Oliver,
>>>
>>> On 2 December 2016 at 03:16, Olliver
Hi Stefan,
On Thu, Dec 1, 2016 at 10:15 AM, Stefan Roese wrote:
> On 23.11.2016 16:12, Mario Six wrote:
>> The patch implements secure booting for the mvebu architecture.
>>
>> This includes:
>> - The addition of secure headers and all needed signatures and keys in
>> mkimage
>>
LS2080A SoC family has QBMAN ver 4.0 whereas newer
SoCs like LS2088A, LS1088A has QBMAN ver 4.1
QBMAN ver 4.0 and ver 4.1 supports dqrr size as 4 and 8 respectively.
Add support of
to check QBMAN version based on SoC SVR
update dqrr_size accordingly
update code to support
This patch is to add 'fsl,esdhc' into of_match table to support
driver model for QorIQ eSDHC.
Signed-off-by: Yangbo Lu
---
drivers/mmc/fsl_esdhc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index da3a151..0ae1cfd
Enable driver model for eSDHC on ls1012a rdb and qds boards.
Signed-off-by: Yangbo Lu
---
configs/ls1012aqds_qspi_defconfig | 3 +++
configs/ls1012ardb_qspi_defconfig | 3 +++
2 files changed, 6 insertions(+)
diff --git a/configs/ls1012aqds_qspi_defconfig
This patch is to add eSDHC nodes for ls1012a.
Signed-off-by: Yangbo Lu
---
arch/arm/dts/fsl-ls1012a.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi
index 024527e..f8b341d 100644
---
There would be compiling error as below when enable driver model for esdhc.
undefined reference to `dm_gpio_get_value'
undefined reference to `gpio_request_by_name_nodev'
This patch is to make GPIO support optional with CONFIG_DM_GPIO. Because
all boards of QorIQ platform don't need it and they
Hi Andre,
[...]
>>> I wonder if there is value in moving this to device tree with of-platdata?
>
> While I kind of like the idea of using the DT for this, there are some
> issues:
>
> 1) There is no binding so far for representing the DRAM data. Given the
> lacking documentation for the DRAM
On 6 December 2016 at 00:03, Zhiqiang Hou wrote:
> From: Minghuan Lian
>
> All Layerscape SoCs have supported new PCIe driver based on DM.
> The lagecy PCIe driver code is unused and can be removed.
>
> Signed-off-by: Minghuan Lian
On 6 December 2016 at 00:03, Zhiqiang Hou wrote:
> From: Minghuan Lian
>
> There are more than five kinds of Layerscape SoCs. unfortunately,
> PCIe controller of each SoC is a little bit different. In order
> to avoid too many macro definitions, the
Hi Andrew,
On 5 December 2016 at 17:37, Andrew F. Davis wrote:
> On 11/14/2016 06:33 PM, Simon Glass wrote:
>> Hi Andrew,
>>
>> On 14 November 2016 at 15:05, Andrew F. Davis wrote:
>>> On 11/14/2016 02:44 PM, Simon Glass wrote:
Hi Andrew,
On 14 November
On 4 December 2016 at 19:52, Stefan Brüns wrote:
> From: Stefan Brüns
>
> The following checks are currently implemented:
> 1. listing a directory
> 2. verifying size of a file
> 3. veryfying md5sum for a file region
> 4. reading the
Hi Rick,
On 5 December 2016 at 19:56, Rick Bronson wrote:
> Hi Heiko,
>
> Thanks again for the help.
>
> Been testing the RK3288 Ethernet and it works pretty good. One
> thing I was wondering about was that I seemed to have to have:
>
> CONFIG_NET_RANDOM_ETHADDR=y
>
> or I
Hi Markus,
On 5 December 2016 at 11:20, Markus Valentin wrote:
> Hi Simon,
> On Sun, 2016-12-04 at 23:24 -0700, Simon Glass wrote:
>> Hi Markus,
>>
>> On 1 December 2016 at 01:58, Markus Valentin wrote:
>> >
>> > Hi Simon,
>> > Am Mittwoch, den 30.11.2016, 19:20
Hi Oliver,
On 5 December 2016 at 03:28, Olliver Schinagl wrote:
> Hey Simon,
>
>
>
> On 05-12-16 07:24, Simon Glass wrote:
>>
>> Hi Oliver,
>>
>> On 2 December 2016 at 03:16, Olliver Schinagl wrote:
>>>
>>> Hey Joe,
>>>
>>>
>>>
>>> On 30-11-16 21:40, Joe
Hi Stefan,
On 4 December 2016 at 19:52, Stefan Brüns wrote:
> The runner actually has no console dependency, only on the log provided
> by the console. Accept both u_boot_console or a multiplexed_log.
In that case I wonder if it would be better to change it to a
On 5 December 2016 at 05:16, wrote:
> From: Konstantin Porotchkin
>
> Add a DM port of Marvell pin control driver.
> The A8K SoC family contains several silicone dies interconnected
> in a single package. Every die is normally equipped with its own
> pin
Hi Mario,
On 5 December 2016 at 10:32, Mario Six wrote:
> Hi Simon,
>
> On Mon, Dec 5, 2016 at 7:24 AM, Simon Glass wrote:
>> Hi,
>>
>> On 1 December 2016 at 01:39, Stefan Roese wrote:
>>> (Adding Simon and Maxim to Cc)
>>>
>>> On
On 5 December 2016 at 02:36, Tomas Melin wrote:
> Enable support for loading a splash image from within a FIT image.
> The image is assumed to be generated with mkimage -E flag to hold
> the data external to the FIT.
>
> Signed-off-by: Tomas Melin
On 5 December 2016 at 02:36, Tomas Melin wrote:
> Sort include files in accordance to u-boot coding style.
>
> Signed-off-by: Tomas Melin
> ---
>
> Changes in v4:
> - Added missing changelog
>
> Changes in v3:
> - Change patch order so that
Hi York,
> -Original Message-
> From: york sun
> Sent: 2016年12月7日 0:23
> To: Z.Q. Hou ; u-boot@lists.denx.de;
> albert.u.b...@aribaud.net; Prabhakar Kushwaha
> ; alison.w...@freescale.com; Sumit Garg
> ; Ruchika Gupta
Hi Tom,
2016-12-06 22:03 GMT+09:00 Tom Rini :
>
>> I tried your suggestion.
>> It is true that 625 touched defconfigs were decreased to 389,
>> but do you think this is a really good idea?
>>
>> Theoretically, nothing of MMC
>> is related to ARM, PowerPC, Sandbox.
>>
>> I
On Tuesday, 6 December 2016, Jaehoon Chung wrote:
> Hi Simon,
>
> On 11/23/2016 10:34 PM, Simon Glass wrote:
> > Driver-model I2C support was added about 2 years ago. So far a little
> over
> > half of the driveres have been converted. This series sets a timeline for
> > conversion of the rest by
On 12/06/2016 11:26 PM, dinguyen wrote:
> On Tue, 6 Dec 2016, Chee Tien Fong wrote:
>
>> From: Tien Fong Chee
>>
>> The drivers is restructured such common functions, gen5 functions,
>> and arria10 functions are moved to misc.c, misc_gen5 and misc_arria10
>>
On Tue, 6 Dec 2016, Chee Tien Fong wrote:
> From: Tien Fong Chee
>
> The drivers is restructured such common functions, gen5 functions,
> and arria10 functions are moved to misc.c, misc_gen5 and misc_arria10
> respectively.
>
> Signed-off-by: Tien Fong Chee
On Wed, Nov 23, 2016 at 07:21:07PM -0700, Simon Glass wrote:
> Hi Maxime,
>
> On 22 November 2016 at 05:41, Maxime Ripard
> wrote:
> > Hi Simon,
> >
> > On Mon, Nov 14, 2016 at 01:44:45PM -0700, Simon Glass wrote:
> >> Hi Maxime,
> >>
> >> On 14 November 2016 at
On Mon, Dec 5, 2016 at 7:09 PM, Fabien Parent wrote:
> In spi_flash_scan, 'ret' is initialled to -1, but 'ret' is not always
> used to store a return value, in that case, even when the function
> succeed, an error (-1) will be returned.
> Lets just return 0 if we hit the end
On Mon, Dec 5, 2016 at 7:24 AM, Simon Glass wrote:
> Hi Jagan,
>
> On 1 December 2016 at 05:45, Jagan Teki wrote:
>> On Wed, Nov 30, 2016 at 8:30 AM, Simon Glass wrote:
>>> At present an invalid bus width prints a message but does not
On Tue, Nov 29, 2016 at 1:58 PM, Phil Edworthy
wrote:
> This series has fixes, patches to clean the code up, and add support for
> specifying the sampling edge.
>
> Main changes in v3:
> 1. Added "spi: cadence_qspi: Use spi mode at the point it is needed" to
>
UDOO Neo boards has a PFUZE300 connected to I2C1 bus.
Tested on a UDOO Neo Full with "pmic PFUZE3000 dump" command.
Signed-off-by: Breno Lima
---
board/udoo/neo/neo.c | 143 +
include/configs/udoo_neo.h | 13 +
2 files
UDOO Neo boards has one FEC port connected to KSZ8091, add support for it.
Tested on a UDOO Neo Full with "dhcp zImage" command.
Signed-off-by: Breno Lima
---
board/udoo/neo/neo.c | 95 ++
configs/udoo_neo_defconfig | 2 +-
Add pfuze3000 voltage configuration macro for SW1AB, SW3 and VLDO1/2 according
to tables 53, 57 and 62 on PF3000 datasheet.
Signed-off-by: Breno Lima
---
Note: This patch series depends on my last series submission.
include/power/pfuze3000_pmic.h | 5 +
1 file changed, 5
Hi Jagan,
On 06 December 2016 17:24 Jagan Teki wrote:
> On Tue, Dec 6, 2016 at 6:00 PM, Phil Edworthy
> wrote:
> > Hi Jagan, Marek,
> >
> > On 06 December 2016 12:39 Marek Vasut wrote:
> >> On 12/06/2016 11:25 AM, Phil Edworthy wrote:
> >> > On 05 December 2016 13:31,
On Tue, Dec 6, 2016 at 3:10 PM, Heiko Schocher wrote:
> Hello Jagan,
>
>
> Am 06.12.2016 um 00:01 schrieb Jagan Teki:
>>
>> From: Jagan Teki
>>
>> Add I2C support for Engicam i.CoreM6 qdl board.
>>
>> icorem6qdl> i2c bus
>> Bus 0: i2c@021a
>> Bus 1:
On Tue, Dec 6, 2016 at 6:00 PM, Phil Edworthy wrote:
> Hi Jagan, Marek,
>
> On 06 December 2016 12:39 Marek Vasut wrote:
>> On 12/06/2016 11:25 AM, Phil Edworthy wrote:
>> > On 05 December 2016 13:31, Marek Vasut wrote:
>> >> On 12/05/2016 11:46 AM, Phil Edworthy wrote:
Hi Jagan, Marek,
On 06 December 2016 12:39 Marek Vasut wrote:
> On 12/06/2016 11:25 AM, Phil Edworthy wrote:
> > On 05 December 2016 13:31, Marek Vasut wrote:
> >> On 12/05/2016 11:46 AM, Phil Edworthy wrote:
> >>> On 05 December 2016 10:42, Jagan Teki wrote:
> On Mon, Dec 5, 2016 at 11:31
On 12/05/2016 09:16 PM, Zhiqiang Hou wrote:
> From: Minghuan Lian
>
> for the legacy PCI driver, the function pci_bus_to_hose() returns
> the real PCIe controller. To keep consistency, this function is
> changed to return the PCIe controller pointer of the root bus
>
On Tue, Dec 06, 2016 at 05:17:01PM +0100, Michal Simek wrote:
> The patch is fixing:
> "tools: mkimage: Check if file is regular file"
> (sha1: 56c7e8015509312240b1ee15f2ff74510939a45d)
> which contains two issues reported by Coverity
> Unchecked return value from stat and incorrect calling
The patch is fixing:
"tools: mkimage: Check if file is regular file"
(sha1: 56c7e8015509312240b1ee15f2ff74510939a45d)
which contains two issues reported by Coverity
Unchecked return value from stat and incorrect calling sequence where
attack can happen between calling stat and fopen.
Using pair in
Hi Tom,
Sending again - reply all
On 12/05/2016 05:28 PM, Tom Rini wrote:
On Mon, Dec 05, 2016 at 10:27:55AM +0200, Uri Mashiach wrote:
From: Dmitry Lifshitz
Features supported :
* Serial console
* SPI Flash
* MMC/SD Card
* eMMC storage
* SATA
* PCA9555 - GPIO
On Mon, Dec 05, 2016 at 07:47:21PM +0100, Jelle van der Waa wrote:
> The nanopi already had the CONFIG_SUN8I_EMAC=y enabled in it's defconfig
> file, but was missing the the device tree entry.
>
> Signed-off-by: Jelle van der Waa
Acked-by: Maxime Ripard
On Tue, Dec 06, 2016 at 05:57:57PM +0200, Igor Grinberg wrote:
> Hi Tom,
>
> On 12/06/16 16:32, Tom Rini wrote:
> > On Tue, Dec 06, 2016 at 02:48:27PM +0100, Fabien Parent wrote:
> >
> >> Moving to CONFIG_SPL_*_LOAD options to Kconfig offers several advantage:
> >> * simpler config headers
> >>
Hi Tom,
On 12/06/16 16:32, Tom Rini wrote:
> On Tue, Dec 06, 2016 at 02:48:27PM +0100, Fabien Parent wrote:
>
>> Moving to CONFIG_SPL_*_LOAD options to Kconfig offers several advantage:
>> * simpler config headers
>> * on some boards we can easily switch to another boot media without needing
On Tue, Dec 06, 2016 at 03:45:09PM +0100, Fabien Parent wrote:
> Stop booting legacy uImage and now boot zImage.
>
> Signed-off-by: Fabien Parent
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: Digital signature
On Tue, Dec 6, 2016 at 3:06 PM, Heiko Schocher wrote:
> Hello Jagan,
>
>
> Am 06.12.2016 um 00:00 schrieb Jagan Teki:
>>
>> From: Jagan Teki
>>
>> Added kconfig for SYS_I2C_MXC driver.
>>
>> Cc: Stefano Babic
>> Cc: Heiko Schocher
On Tue, Dec 6, 2016 at 3:47 PM, Fabio Estevam wrote:
> On Mon, Dec 5, 2016 at 9:00 PM, Jagan Teki wrote:
>
>> +config SYS_I2C_MXC
>> + bool "NXP i.MX I2C driver"
>> + depends on MX6
>
> This driver is used among several i.MX SoC, so it would be
Hi Nathan,
On 4.12.2016 10:33, Nathan Rossi wrote:
> The dram_init* functions for the zynq board are not safe for use from
> the board_init_f stage due to its use of the 'tmp' static variable.
>
> This incorrect use of a static variable was causing rare issues where
> the dram_init function
On Mon, Dec 5, 2016 at 9:00 PM, Jagan Teki wrote:
> +config SYS_I2C_MXC
> + bool "NXP i.MX I2C driver"
> + depends on MX6
This driver is used among several i.MX SoC, so it would be better not
to restrict it to MX6 only.
Stop booting legacy uImage and now boot zImage.
Signed-off-by: Fabien Parent
---
v1 .. v2
* Used __stringify(CONFIG_BOOTFILE) to avoid code duplication
---
configs/omapl138_lcdk_defconfig | 1 +
include/configs/omapl138_lcdk.h | 9 +
2 files changed, 6
On Tue, Dec 06, 2016 at 02:48:27PM +0100, Fabien Parent wrote:
> Moving to CONFIG_SPL_*_LOAD options to Kconfig offers several advantage:
> * simpler config headers
> * on some boards we can easily switch to another boot media without needing
>to modify the config headers.
>
> This series
Hi,
On 06/12/16 11:20, Maxime Ripard wrote:
> On Mon, Dec 05, 2016 at 01:52:22AM +, Andre Przywara wrote:
>> From: Jens Kuske
>>
>> The A64 DRAM controller is very similar to the H3 one,
>> so the code can be reused with some small changes.
>> [Andre: fixed up typo,
Hello Jagan,
Am 06.12.2016 um 00:01 schrieb Jagan Teki:
From: Jagan Teki
Add I2C support for Engicam i.CoreM6 qdl board.
icorem6qdl> i2c bus
Bus 0: i2c@021a
Bus 1: i2c@021a4000
Bus 2: i2c@021a8000
icorem6qdl> i2c dev 2
Setting bus to 2
icorem6qdl> i2c speed
Hello Jagan,
Am 06.12.2016 um 00:00 schrieb Jagan Teki:
From: Jagan Teki
Some I2C bus devicetree nodes, doesn't require to have
gpio pinctrl so replace the dev_info to debug so the
print never comes on the console and for bus that uses
gpio pinctrl anyway have
Hello Jagan,
Am 06.12.2016 um 00:00 schrieb Jagan Teki:
From: Jagan Teki
Better to print the hex value for bus address instead of
decimal, for more readbility on bus addressing.
Before:
--
U-Boot> i2c dev 1
Setting bus to 1
i2c bus 1 at 35274752, no gpio
Hello Jagan,
Am 06.12.2016 um 00:00 schrieb Jagan Teki:
From: Jagan Teki
Added kconfig for SYS_I2C_MXC driver.
Cc: Stefano Babic
Cc: Heiko Schocher
Cc: Matteo Lisi
Cc: Michael Trimarchi
Instead of defining ourself the config options in the config header,
let's use the new Kconfig options for it.
Signed-off-by: Fabien Parent
---
configs/omapl138_lcdk_defconfig | 1 +
include/configs/omapl138_lcdk.h | 2 --
2 files changed, 1 insertion(+), 2 deletions(-)
In order to clean up the config headers and also to allow to easily
switch the boot device for some boards without having to modify the
config headers, it is better to move the options to Kconfig. This
commit move the CONFIG_SPL_*_LOAD options to Kconfig files.
Signed-off-by: Fabien Parent
The macro used to select the boot device is not the intended one. It
should be CONFIG_SPL_NAND_LOAD and not CONFIG_SPL_NAND_SIMPLE.
Using the correct config option will help move them to Kconfig option.
Every davinci board that use the SPL are defining both
CONFIG_SPL_NAND_LOAD and
Moving to CONFIG_SPL_*_LOAD options to Kconfig offers several advantage:
* simpler config headers
* on some boards we can easily switch to another boot media without needing
to modify the config headers.
This series fixes an issue in davinci where a wrong option was used in place
of a
On Tue, Dec 06, 2016 at 03:25:46PM +0900, Masahiro Yamada wrote:
> Hi Tom,
>
> 2016-12-06 1:02 GMT+09:00 Tom Rini :
> > On Sun, Dec 04, 2016 at 10:23:10PM +0900, Masahiro Yamada wrote:
> >
> >> Commit 7a777f6d6f35 ("mmc: Add generic Kconfig option") created
> >> a Kconfig
On 12/06/2016 09:08 AM, Chee Tien Fong wrote:
> From: Tien Fong Chee
>
> Drivers for reset manager is restructured such that common functions,
> gen5 drivers and Arria10 drivers are moved to reset_manager.c,
> reset_manager_gen5.c and reset_manager_arria10.c
On 12/06/2016 08:52 AM, Chee Tien Fong wrote:
> From: Tien Fong Chee
>
> Enhanced defconfig file for Arria10 to enable SPL build and supporting
> device tree build for SDMMC.
>
> Signed-off-by: Tien Fong Chee
> Cc: Marek Vasut
On 12/06/2016 09:07 AM, Chee Tien Fong wrote:
> From: Tien Fong Chee
>
> Signed-off-by: Tien Fong Chee
> Cc: Marek Vasut
> Cc: Dinh Nguyen
> Cc: Chin Liang See
> Cc: Tien Fong
On 12/06/2016 08:52 AM, Chee Tien Fong wrote:
> From: Tien Fong Chee
>
> These compat macros would be used by clock manager and pin mux drivers
> to look the required HW info from DTS for hardware initialization.
>
> Signed-off-by: Tien Fong Chee
On 12/06/2016 08:50 AM, Chee Tien Fong wrote:
> From: Tien Fong Chee
>
> This is initial version of device tree for the Intel socfpga arria10
> development kit with sdmmc.
>
> Signed-off-by: Tien Fong Chee
> Cc: Marek Vasut
>
On 12/06/2016 11:25 AM, Phil Edworthy wrote:
> Hi Marek,
>
> On 05 December 2016 13:31, Marek Vasut wrote:
>> On 12/05/2016 11:46 AM, Phil Edworthy wrote:
>>> On 05 December 2016 10:42, Jagan Teki wrote:
On Mon, Dec 5, 2016 at 11:31 AM, Phil Edworthy
wrote:
On 12/06/2016 08:52 AM, Chee Tien Fong wrote:
> From: Tien Fong Chee
>
> These changes to ensure Arria10 SPL build success.
Please reword the commit message, mention you're removing the Arria10
bits. Still, this does not even apply on mainline, on top of what does
this
On 5.12.2016 23:22, Jaehoon Chung wrote:
> On 12/02/2016 10:24 PM, stefan.herbrechtsme...@weidmueller.de wrote:
>> From: Stefan Herbrechtsmeier
>>
>> The zynq_sdhci controller driver use CONFIG_ZYNQ_SDHCI_MAX_FREQ as base
>> clock frequency but this clock is
Hi,
On 06/12/16 11:28, Maxime Ripard wrote:
> On Mon, Dec 05, 2016 at 01:52:30AM +, Andre Przywara wrote:
>> When compiling the SPL for the Allwinner A64 in AArch64 mode, we can't
>> use the more compact Thumb2 encoding, which only exists for AArch32
>> code. This makes the SPL rather big, up
On Tue, Dec 06, 2016 at 08:04:24AM +, André Przywara wrote:
> On 05/12/16 21:56, Tom Rini wrote:
> > On Mon, Dec 05, 2016 at 01:52:10AM +, Andre Przywara wrote:
> >
> >> For boards that call s_init() when the SPL runs, we are expected to
> >> setup an early stack before calling this C
From: Tien Fong Chee
This patch adding the Arria10 critical hardware initialization before
enabling console print out in spl.
Signed-off-by: Tien Fong Chee
Cc: Marek Vasut
Cc: Dinh Nguyen
Cc: Chin Liang
From: Tien Fong Chee
Signed-off-by: Tien Fong Chee
Cc: Marek Vasut
Cc: Dinh Nguyen
Cc: Chin Liang See
Cc: Tien Fong
---
arch/arm/mach-socfpga/Makefile
From: Tien Fong Chee
The drivers is restructured such common functions, gen5 functions,
and arria10 functions are moved to clock_manager.c, cock_manager_gen5
and clock_manager_arria10 respectively.
Signed-off-by: Tien Fong Chee
Cc: Marek
From: Tien Fong Chee
The drivers is restructured such common functions, gen5 functions,
and arria10 functions are moved to misc.c, misc_gen5 and misc_arria10
respectively.
Signed-off-by: Tien Fong Chee
Cc: Marek Vasut
Cc: Dinh
From: Tien Fong Chee
These compat macros would be used by clock manager and pin mux drivers
to look the required HW info from DTS for hardware initialization.
Signed-off-by: Tien Fong Chee
Cc: Marek Vasut
Cc: Dinh Nguyen
From: Tien Fong Chee
Drivers for reset manager is restructured such that common functions,
gen5 drivers and Arria10 drivers are moved to reset_manager.c,
reset_manager_gen5.c and reset_manager_arria10.c respectively.
Signed-off-by: Tien Fong Chee
From: Tien Fong Chee
Signed-off-by: Tien Fong Chee
Cc: Marek Vasut
Cc: Dinh Nguyen
Cc: Chin Liang See
Cc: Tien Fong
---
From: Tien Fong Chee
These changes to ensure Arria10 SPL build success.
Signed-off-by: Tien Fong Chee
Cc: Marek Vasut
Cc: Dinh Nguyen
Cc: Chin Liang See
Cc: Tien Fong
From: Tien Fong Chee
Enhanced defconfig file for Arria10 to enable SPL build and supporting
device tree build for SDMMC.
Signed-off-by: Tien Fong Chee
Cc: Marek Vasut
Cc: Dinh Nguyen
Cc: Chin Liang See
From: Tien Fong Chee
This is initial version of device tree for the Intel socfpga arria10
development kit with sdmmc.
Signed-off-by: Tien Fong Chee
Cc: Marek Vasut
Cc: Dinh Nguyen
Cc: Chin Liang See
On Mon, Dec 05, 2016 at 01:52:30AM +, Andre Przywara wrote:
> When compiling the SPL for the Allwinner A64 in AArch64 mode, we can't
> use the more compact Thumb2 encoding, which only exists for AArch32
> code. This makes the SPL rather big, up to a point where any code
> additions or even a
Hi,
On 06/12/16 10:56, Maxime Ripard wrote:
> On Mon, Dec 05, 2016 at 01:52:19AM +, Andre Przywara wrote:
>> To avoid enumerating the very same DRAM values in defconfig files
>> for each and every Allwinner A64 board out there, let's put some sane
>> default values in the Kconfig file.
>>
On Mon, Dec 05, 2016 at 01:52:22AM +, Andre Przywara wrote:
> From: Jens Kuske
>
> The A64 DRAM controller is very similar to the H3 one,
> so the code can be reused with some small changes.
> [Andre: fixed up typo, merged in fixes from Jens]
>
> Signed-off-by: Jens
On Mon, Dec 05, 2016 at 01:52:21AM +, Andre Przywara wrote:
> From: Jens Kuske
>
> Instead of setting the delay for whole bytes allow setting
> it for each individual bit. Also add support for
> address/command lane delays.
>
> Signed-off-by: Jens Kuske
On Mon, Dec 05, 2016 at 01:52:20AM +, Andre Przywara wrote:
> From: Jens Kuske
>
> The IOCR registers got renamed to BDLR to match the public
> documentation of similar controllers.
It looks like there's a lot more to it.
>
> Signed-off-by: Jens Kuske
On Mon, Dec 05, 2016 at 01:52:19AM +, Andre Przywara wrote:
> To avoid enumerating the very same DRAM values in defconfig files
> for each and every Allwinner A64 board out there, let's put some sane
> default values in the Kconfig file.
> Boards with different needs can override them at any
On Mon, Dec 05, 2016 at 10:41:27AM +, Andre Przywara wrote:
> Hi Simon,
>
> thanks a lot for looking at this!
>
> On 05/12/16 06:25, Simon Glass wrote:
> > Hi Andre,
> >
> > On 4 December 2016 at 18:52, Andre Przywara wrote:
> >> The Allwinner A64 SoC starts
On Mon, Dec 05, 2016 at 01:52:17AM +, Andre Przywara wrote:
> The ENABLE_ARM_SOC_BOOT0_HOOK option is a generic option shared with
> other boards. To allow alternative code to be inserted, we create
> another, now function specific config symbol on top of it to simplify
> later additions. No
On Mon, Dec 05, 2016 at 01:52:13AM +, Andre Przywara wrote:
> Since entry_point and load_addr are addresses, they should be
> represented as longs to cover the whole address space and to avoid
> warning when compiling the SPL in 64-bit.
> Also adjust debug prints to add the 'l' specifier,
Hi Marek,
On 05 December 2016 13:31, Marek Vasut wrote:
> On 12/05/2016 11:46 AM, Phil Edworthy wrote:
> > On 05 December 2016 10:42, Jagan Teki wrote:
> >> On Mon, Dec 5, 2016 at 11:31 AM, Phil Edworthy
> >> wrote:
> >>> On 05 December 2016 10:26, Jagan Teki wrote:
>
Hi Kosta,
On 06.12.2016 10:06, Kostya Porotchkin wrote:
+int is_mmc_active(void)
+{
+ return 1;
+}
+#else /* CONFIG_DM_MMC */
+#define mmc_burn_image 0
+#define mmc_read_file 0
+#define is_mmc_active 0
+#endif /* CONFIG_DM_MMC */
Please use empty functions instead.
[Konstantin
Hi, Stefan,
> -Original Message-
> From: Stefan Roese [mailto:s...@denx.de]
> Sent: Tuesday, December 06, 2016 08:22
> To: Kostya Porotchkin; u-boot@lists.denx.de
> Cc: Nadav Haklai; Neta Zur Hershkovits; Omri Itach; Igal Liberman; Haim
> Boot; Hanna Hawa
> Subject: Re: [PATCH v2 2/6]
Hi Kosta,
On 06.12.2016 09:26, Kostya Porotchkin wrote:
-Original Message-
From: Stefan Roese [mailto:s...@denx.de]
Sent: Tuesday, December 06, 2016 08:13
To: Kostya Porotchkin; u-boot@lists.denx.de
Cc: Nadav Haklai; Neta Zur Hershkovits; Omri Itach; Igal Liberman; Haim
Boot; Hanna Hawa
Hi, Stefan,
> -Original Message-
> From: Stefan Roese [mailto:s...@denx.de]
> Sent: Tuesday, December 06, 2016 08:13
> To: Kostya Porotchkin; u-boot@lists.denx.de
> Cc: Nadav Haklai; Neta Zur Hershkovits; Omri Itach; Igal Liberman; Haim
> Boot; Hanna Hawa
> Subject: Re: [PATCH v2 1/6]
On 05/12/16 21:56, Tom Rini wrote:
> On Mon, Dec 05, 2016 at 01:52:10AM +, Andre Przywara wrote:
>
>> For boards that call s_init() when the SPL runs, we are expected to
>> setup an early stack before calling this C function.
>> Implement the proper AArch64 version of this based on the ARMv7
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