[U-Boot] [PATCH] serial, ns16550: bugfix: ns16550 fifo not enabled

commit: 65f83802b7a5b "serial: 16550: Add getfcr accessor" breaks u-boot commandline working with long commands sending to the board. Since the above patch, you have to setup the fcr register. For board/archs which enable OF_PLATDATA, the new field fcr in struct ns16550_platdata is not filled

[U-Boot] [PATCH][v2] driver: net: fsl-mc: Use aligned address for MC FW load

Firmware of Management Complex (MC) should be loaded at 512MB aligned address. So, -mc_ram_addr address calculation in mc_get_dram_addr() is updated to fetch aligned address -calculate_mc_private_ram_params() is removed as it is no longer required -num_256mb_blocks calculation is moved to

Re: [U-Boot] [PATCH v2 0/7] mmc: more Kconfig conversion, MMC related clean-up

Hi Masahiro, On 01/10/2017 01:32 PM, Masahiro Yamada wrote: > This series is based on commit 3d3a74cc8c. > Each git-log describes how to re-generate it. > Buildman test passed. > > > Changes in v2: > - Re-generate based on v2017.01 > > Masahiro Yamada (7): > ARM: socfpga: remove unused

[U-Boot] [GIT PULL] Please pull u-boot-mmc master

Dear Tom, Could you pull these patches on your master branch? If there is an issue, let me know, plz.(Buildman was passed.) The following changes since commit a705ebc81b7f91bbd0ef7c634284208342901149: Prepare v2017.01 (2017-01-09 11:57:05 -0500) are available in the git repository at:

[U-Boot] [PATCH v4 25/28] arm: socfpga: arria10: Added drivers for Arria10 clock manager

From: Tien Fong Chee The drivers is restructured such common functions, gen5 functions, and arria10 functions are moved to clock_manager.c, clock_manager_gen5 and clock_manager_arria10 respectively. Signed-off-by: Tien Fong Chee Cc: Marek

[U-Boot] [PATCH v4 25/28] arm: socfpga: arria10: Added drivers for Arria10 clock manager

From: Tien Fong Chee The drivers is restructured such common functions, gen5 functions, and arria10 functions are moved to clock_manager.c, clock_manager_gen5 and clock_manager_arria10 respectively. Signed-off-by: Tien Fong Chee Cc: Marek

[U-Boot] [PATCH v4 27/28] arm: socfpga: arria10: Added Arria10 critical HW initialization to spl

From: Tien Fong Chee This patch adding the Arria10 critical hardware initialization before enabling console print out in spl. Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang

[U-Boot] [PATCH v4 28/28] arm: socfpga: arria10: Enable fpga driver build for SPL.

From: Tien Fong Chee Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang See Cc: Tien Fong --- drivers/Makefile | 2 +- 1 file

[U-Boot] [PATCH v4 26/28] arm: socfpga: arria10: Added drivers for Arria10 pinmux/pins configuration

From: Tien Fong Chee Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang See Cc: Tien Fong ---

[U-Boot] [PATCH v4 22/28] arm: socfpga: arria10: Added support for Arria 10 socdk

From: Tien Fong Chee Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang See Cc: Tien Fong ---

[U-Boot] [PATCH v4 25/28] arm: socfpga: arria10: Added drivers for Arria10 clock manager

From: Tien Fong Chee The drivers is restructured such common functions, gen5 functions, and arria10 functions are moved to clock_manager.c, clock_manager_gen5 and clock_manager_arria10 respectively. Signed-off-by: Tien Fong Chee Cc: Marek

[U-Boot] [PATCH v4 24/28] arm: socfpga: arria10: Added miscellaneous drivers for Arria 10

From: Tien Fong Chee The drivers is restructured such common functions, gen5 functions. and arria10 functions are moved to misc.c, misc_gen5 and misc_arria10 respectively. Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh

[U-Boot] [PATCH v4 23/28] arm: socfpga: arria10: Added drivers for Arria10 Reset Manager

From: Tien Fong Chee Drivers for reset manager is restructured such that common functions, gen5 drivers and Arria10 drivers are moved to reset_manager.c, reset_manager_gen5.c and reset_manager_arria10.c respectively. Signed-off-by: Tien Fong Chee

[U-Boot] [PATCH v4 19/28] arm: socfpga: arria10: Enable SPL for Arria 10

From: Tien Fong Chee This patch enables SPL build and implementation for Arria 10. Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang See Cc: Tien Fong

[U-Boot] [PATCH v4 18/28] ARM:dts: Added device tree for socfpga arria10 development kit sdmmc

From: Tien Fong Chee This is initial version of device tree for the Intel socfpga arria10 development kit with sdmmc. Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang See

[U-Boot] [PATCH v4 21/28] arm: socfpga: arria10: Added some hardware base address for Arria 10

From: Tien Fong Chee Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang See Cc: Tien Fong ---

[U-Boot] [PATCH v4 20/28] arm: socfpga: arria10: Added clock manager and pin mux compat macro

From: Tien Fong Chee These compat macros would be used by clock manager and pin mux drivers to look the required HW info from DTS for hardware initialization. Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen

[U-Boot] [PATCH v4 17/28] arm: socfpga: arria10: update dwmac reset function to support Arria10

From: Tien Fong Chee On the Arria10, the EMAC phy mode configuration for each EMACs is located in separate registers versus being in 1 register for the GEN5 devices. The Arria10 also has 3 EMACs compared to 2 for the GEN5 devices. Update the dwmac_deassert_reset

[U-Boot] [PATCH v4 16/28] arm: socfpga: add reset manager defines for Arria10

From: Tien Fong Chee Add the Arria10 reset manager defines that is used in Linux. Change the license to SPDX. [commit 007bb689b3dbad83cdab0ad192bc6ed0162451e0 from the Linux kernel] Signed-off-by: Dinh Nguyen Signed-off-by: Tien Fong

[U-Boot] [PATCH v4 14/28] arm: socfpga: arria10: remove board_init and s_init

From: Tien Fong Chee These functions are already in arch/arm/mach-socfpga/board.c Signed-off-by: Dinh Nguyen Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen

[U-Boot] [PATCH v4 15/28] arm: socfpga: combine clrbits/setbits into a single clrsetbits

From: Tien Fong Chee There is no dependency on doing a separate clrbits first in the dwmac_deassert_reset function. Combine them into a single clrsetbits call. Signed-off-by: Dinh Nguyen Signed-off-by: Tien Fong Chee

[U-Boot] [PATCH v4 13/28] arm: socfpga: arria10 fpga does not have bridges mapped

From: Tien Fong Chee On the Arria10 device, the bridges are not mapped through the interconnect. Signed-off-by: Dinh Nguyen Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen

[U-Boot] [PATCH v4 12/28] arm: socfpga: arria10: don't build GEN5 sdram for arria10

From: Tien Fong Chee The Arria10 device will not be able to re-use the GEN5 SDRAM controller, so we shouldn't build the driver. Move CONFIG_ALTERA_SDRAM to Kconfig option in drivers/ddr/altera/Kconfig. Signed-off-by: Dinh Nguyen

[U-Boot] [PATCH v4 09/28] arm: socfpga: add define for bootinfo bsel bit shift

From: Tien Fong Chee On arria5/cyclone5 parts, the bsel bits are at shift 0, while for arria10, the bsel bits are at shift 12. Add SYSMGR_BOOTINFO_BSEL_SHIFT define so that the reading the bsel can generic. Suggested-by: Marek Vasut Signed-off-by: Dinh

[U-Boot] [PATCH v4 11/28] arm: socfpga: wrap system manager functions for A5/C5 devices

From: Tien Fong Chee The system manager on Arria10 is not used for pin muxing duties, so wrap these functions for GEN5 devices only. Signed-off-by: Dinh Nguyen Signed-off-by: Tien Fong Chee Cc: Marek Vasut

[U-Boot] [PATCH v4 08/28] arm: socfpga: arria10: add config option build for arria10

From: Tien Fong Chee Signed-off-by: Dinh Nguyen Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang See Cc: Tien Fong

[U-Boot] [PATCH v4 10/28] arm: socfpga: arria10: add reset manager for Arria10

From: Tien Fong Chee Add the defines for the reset manager and some basic reset functionality. Signed-off-by: Dinh Nguyen Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen

[U-Boot] [PATCH v4 06/28] arm: socfpga: arria10: add socfpga_arria10_socdk config

From: Tien Fong Chee Add config for the Arria10 SoC Development Kit. Signed-off-by: Dinh Nguyen Signed-off-by: Tien Fong Chee Acked-by: Marek Vasut Cc: Marek Vasut Cc: Dinh

[U-Boot] [PATCH v4 07/28] arm: socfpga: arria10: add socfpga_arria10_defconfig

From: Tien Fong Chee Add a defconfig file for Arria10, which does not include enabling SPL. Signed-off-by: Dinh Nguyen Signed-off-by: Tien Fong Chee Acked-by: Marek Vasut Cc: Marek Vasut

[U-Boot] [PATCH v4 04/28] arm: socfpga: arria10: add system manager defines

From: Tien Fong Chee Add system manager defines for Arria10. Signed-off-by: Dinh Nguyen Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang See

[U-Boot] [PATCH v4 03/28] arm: socfpga: arria10: add board files for the Arria10 SoCDK

From: Tien Fong Chee Add minimal support for the Arria10 SoCDK. Signed-off-by: Dinh Nguyen Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang See

[U-Boot] [PATCH v4 02/28] arm: socfpga: arria10: add sdram defines for Arria10

From: Tien Fong Chee Add the structures for the SDRAM controller on Arria10. Signed-off-by: Dinh Nguyen Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc:

[U-Boot] [PATCH v4 05/28] arm: socfpga: arria10: add misc functions for Arria10

From: Tien Fong Chee Add arch_early_init_r function. The Arria10 has a firewall protection around the SDRAM and OCRAM. These firewalls are to be disabled in order for U-Boot to function. Signed-off-by: Dinh Nguyen Signed-off-by: Tien

[U-Boot] [PATCH v4 01/28] arm: socfpga: arria10: add additional i2c nodes for Arria10

From: Tien Fong Chee Add remaining 3 I2C base addresses for the Arria10. Signed-off-by: Dinh Nguyen Signed-off-by: Tien Fong Chee Reviewed-by: Stefan Roese Cc: Marek Vasut Cc:

[U-Boot] [PATCH v4 00/28] *** SUBJECT HERE ***

From: Tien Fong Chee *** BLURB HERE *** Tien Fong Chee (28): arm: socfpga: arria10: add additional i2c nodes for Arria10 arm: socfpga: arria10: add sdram defines for Arria10 arm: socfpga: arria10: add board files for the Arria10 SoCDK arm: socfpga: arria10: add

Re: [U-Boot] [PATCH 7/7] sunxi: remove bare default for CONFIG_MMC

Hi Jaehoon, 2017-01-10 10:41 GMT+09:00 Jaehoon Chung : > Hi Masahiro, > > On 01/10/2017 10:32 AM, Masahiro Yamada wrote: >> Hi Jaehoon, >> >> >> 2017-01-10 9:55 GMT+09:00 Jaehoon Chung : >>> Hi Jagan, >>> >>> On 01/01/2017 09:11 PM, Masahiro Yamada

[U-Boot] [PATCH v2 5/7] ARM: davinci: remove unused CONFIG_DAVINCI_MMC_SD1

This CONFIG is not referenced from anywhere. Signed-off-by: Masahiro Yamada Reviewed-by: Marek Vasut --- Changes in v2: None include/configs/da850evm.h | 1 - include/configs/legoev3.h | 1 - 2 files changed, 2 deletions(-) diff --git

[U-Boot] [PATCH v2 1/7] ARM: socfpga: remove unused CONFIG option and cleanup README.socfpga

CONFIG_SOCFPGA_DWMMC_FIFO_DEPTH is defined in the socfpga_common.h, but not referenced at all. Remove. Also, clean-up the README.socfpga. CONFIG_MMC should not be defined in the header since it was moved to Kconfig by commit c27269953b94 ("mmc: complete unfinished move of CONFIG_MMC"). I see

[U-Boot] [PATCH v2 0/7] mmc: more Kconfig conversion, MMC related clean-up

This series is based on commit 3d3a74cc8c. Each git-log describes how to re-generate it. Buildman test passed. Changes in v2: - Re-generate based on v2017.01 Masahiro Yamada (7): ARM: socfpga: remove unused CONFIG option and cleanup README.socfpga mmc: rename CONFIG_ROCKCHIP_DWMMC to

[U-Boot] [PATCH v2 3/7] mmc: move CONFIG_DWMMC to Kconfig, renaming to CONFIG_MMC_DW

This commit was created as follows: [1] Rename the option with the following command: find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \ -type f -print | xargs sed -i -e 's/CONFIG_DWMMC/CONFIG_MMC_DW/g' [2] create the entry for MMC_DW in drivers/mmc/Kconfig (the prompt and

[U-Boot] [PATCH v2 7/7] ARM: sunxi: remove bare default for CONFIG_MMC

The bare default entry is wrong. Just remove it since the (real) entry in drivers/mmc/Kconfig has "default ARM || PPC || SANDBOX". Signed-off-by: Masahiro Yamada Reviewed-by: Marek Vasut --- Changes in v2: None board/sunxi/Kconfig | 4 1

[U-Boot] [PATCH v2 6/7] mmc: move more driver config options to Kconfig

Move (and rename) the following CONFIG options to Kconfig: CONFIG_DAVINCI_MMC (renamed to CONFIG_MMC_DAVINCI) CONFIG_OMAP_HSMMC (renamed to CONFIG_MMC_OMAP_HS) CONFIG_MXC_MMC (renamed to CONFIG_MMC_MXC) CONFIG_MXS_MMC (renamed to CONFIG_MMC_MXS) CONFIG_TEGRA_MMC(renamed

[U-Boot] [PATCH v2 2/7] mmc: rename CONFIG_ROCKCHIP_DWMMC to CONFIG_MMC_DW_ROCKCHIP

I am trying to make all DesignWare-based driver options prefixed with CONFIG_MMC_DW_. This commit was generated as follows: find . -name .git -prune -o -type f -print | \ xargs sed -i -e 's/ROCKCHIP_DWMMC/MMC_DW_ROCKCHIP/g' Signed-off-by: Masahiro Yamada

[U-Boot] [PATCH v2 4/7] mmc: move DesignWare-based drivers to Kconfig

Move (and rename) the following CONFIG options to Kconfig: CONFIG_EXYNOS_DWMMC (renamed to CONFIG_MMC_DW_EXYNOS) CONFIG_HIKEY_DWMMC (renamed to CONFIG_MMC_DW_K3) CONFIG_SOCFPGA_DWMMC (renamed to CONFIG_MMC_DW_SOCFPGA) The "HIKEY" is a board name, so it is not suitable for the MMC

Re: [U-Boot] U-Boot merge window is open

Sorry for spamming the list. I meant to sent to our internal teams. My apologies. On 01/09/2017 08:02 PM, york sun wrote: > Guys, > > U-Boot 2017.01 has been released. The merge window is open. If you need > to update your patches, please do so ASAP. I will start to test and > merge existing

[U-Boot] U-Boot merge window is open

Guys, U-Boot 2017.01 has been released. The merge window is open. If you need to update your patches, please do so ASAP. I will start to test and merge existing patches soon. York ___ U-Boot mailing list U-Boot@lists.denx.de

Re: [U-Boot] [v4 18/29] arm: socfpga: stratix10: Add SOCFPGA Stratix10 base address

On Isn, 2017-01-09 at 08:47 -0600, Dinh Nguyen wrote: > > On 01/09/2017 05:31 AM, Chee Tien Fong wrote: > > > > From: Tien Fong Chee > > > > Add base address header file for Stratix10 SoC > > > > Signed-off-by: Chin Liang See > > Signed-off-by:

Re: [U-Boot] [v4 01/29] arm: socfpga: arria10: add additional i2c nodes for Arria10

On Isn, 2017-01-09 at 13:43 +0100, Marek Vasut wrote: > On 01/09/2017 12:25 PM, Chee Tien Fong wrote: > > > > From: Tien Fong Chee > > > > Add remaining 3 I2C base addresses for the Arria10. > > > > Signed-off-by: Dinh Nguyen > >

Re: [U-Boot] [PATCH v1 0/2] ARM: dts: at91: add dts files for the boards of SAMA5D3

Hi Andreas, There are several patches I sent two months ago using the your older mail address, I am not sure if you received them successfully. If not, I will resent them. Sorry for the inconvenience caused. Best Regards, Wenyou Yang > -Original Message- > From: Wenyou Yang

Re: [U-Boot] [v4 01/29] arm: socfpga: arria10: add additional i2c nodes for Arria10

On Isn, 2017-01-09 at 10:54 -0600, Dinh Nguyen wrote: > On Mon, Jan 9, 2017 at 6:43 AM, Marek Vasut wrote: > > > > On 01/09/2017 12:25 PM, Chee Tien Fong wrote: > > > > > > From: Tien Fong Chee > > > > > > Add remaining 3 I2C base addresses for the

Re: [U-Boot] [PATCH] rpi: Fix device tree path on ARM64

On 01/09/2017 06:34 AM, Tuomas Tynkkynen wrote: On Thu, 5 Jan 2017 16:44:43 -0700 Stephen Warren wrote: On 01/03/2017 03:39 AM, Tuomas Tynkkynen wrote: The directory structure of device tree files produced by the kernel's 'make dtbs_install' is different on ARM64, the

[U-Boot] [PATCH v2 1/4] aspeed: Add drivers common to all Aspeed SoCs

Add support for Watchdog Timer, which is compatible with AST2400 and AST2500 watchdogs. There is no uclass for Watchdog yet, so the driver does not follow the driver model. It also uses fixed clock, so no clock driver is needed. Add support for timer for Aspeed ast2400/ast2500 devices. The driver

[U-Boot] [PATCH v2 3/4] aspeed: Board init functions and common configs for ast2500 based boards

--- Changes in v2: None Changes in v1: - Merge together all patches related to ast2500 boards common functions/configs - Add copyright statement to ast2500-board.c Signed-off-by: Maxim Sloyko --- arch/arm/mach-aspeed/Makefile| 2 +-

Re: [U-Boot] [PATCH 7/7] sunxi: remove bare default for CONFIG_MMC

Hi Masahiro, On 01/10/2017 10:32 AM, Masahiro Yamada wrote: > Hi Jaehoon, > > > 2017-01-10 9:55 GMT+09:00 Jaehoon Chung : >> Hi Jagan, >> >> On 01/01/2017 09:11 PM, Masahiro Yamada wrote: >>> The bare default entry is wrong. Just remove it since the (real) >>> entry in

Re: [U-Boot] [PATCH 7/7] sunxi: remove bare default for CONFIG_MMC

Hi Jaehoon, 2017-01-10 9:55 GMT+09:00 Jaehoon Chung : > Hi Jagan, > > On 01/01/2017 09:11 PM, Masahiro Yamada wrote: >> The bare default entry is wrong. Just remove it since the (real) >> entry in drivers/mmc/Kconfig has "default ARM || PPC || SANDBOX". > > Do you have

Re: [U-Boot] [PATCH] build-whitelist.sh: Ignore mach-types.h

On Mon, Jan 09, 2017 at 07:59:29PM -0500, Tom Rini wrote: > On Tue, Jan 10, 2017 at 09:50:42AM +0900, Masahiro Yamada wrote: > > Hi Tom, > > > > > > 2017-01-10 9:46 GMT+09:00 Tom Rini : > > > The file arch/arm/include/asm/mach-types.h comes from the Linux kernel > > > and

Re: [U-Boot] [PATCH] build-whitelist.sh: Ignore mach-types.h

On Tue, Jan 10, 2017 at 09:50:42AM +0900, Masahiro Yamada wrote: > Hi Tom, > > > 2017-01-10 9:46 GMT+09:00 Tom Rini : > > The file arch/arm/include/asm/mach-types.h comes from the Linux kernel > > and contains a number of CONFIG_ symbols that we have no control over > > nor

Re: [U-Boot] [PATCH 7/7] sunxi: remove bare default for CONFIG_MMC

Hi Jagan, On 01/01/2017 09:11 PM, Masahiro Yamada wrote: > The bare default entry is wrong. Just remove it since the (real) > entry in drivers/mmc/Kconfig has "default ARM || PPC || SANDBOX". Do you have any opinion about this patch? I want to know your ack or review. If there is no objection,

Re: [U-Boot] [PATCH] build-whitelist.sh: Ignore mach-types.h

Hi Tom, 2017-01-10 9:46 GMT+09:00 Tom Rini : > The file arch/arm/include/asm/mach-types.h comes from the Linux kernel > and contains a number of CONFIG_ symbols that we have no control over > nor do we wish to do anything with. Ignore that file and re-generate > the

[U-Boot] [PATCH] build-whitelist.sh: Ignore mach-types.h

The file arch/arm/include/asm/mach-types.h comes from the Linux kernel and contains a number of CONFIG_ symbols that we have no control over nor do we wish to do anything with. Ignore that file and re-generate the whitelist. Cc: Masahiro Yamada Signed-off-by: Tom

Re: [U-Boot] travis-ci: Trigger build with multiple commits in one push

On Tue, Jan 10, 2017 at 12:34:47AM +0100, Jagan Teki wrote: > Hi Tom or Any, > > Any idea how to trigger travis-ci with multiple commit (build all of > them) at same push, say for example when I push 10 commits in one push > and if the middle commit is an error commit but travis-ci doesn't show

[U-Boot] travis-ci: Trigger build with multiple commits in one push

Hi Tom or Any, Any idea how to trigger travis-ci with multiple commit (build all of them) at same push, say for example when I push 10 commits in one push and if the middle commit is an error commit but travis-ci doesn't show the build issue. Do I need to do any specific setting on travis-ci

Re: [U-Boot] [PATCH v3 09/10] am335x_evm: enable usb ether gadget as it supports DM_ETH

On Mon, Jan 09, 2017 at 09:58:03PM +0100, Marek Vasut wrote: > On 01/09/2017 09:45 PM, Simon Glass wrote: > > On 17 November 2016 at 02:08, Mugunthan V N wrote: > >> Since usb ether gadget have support for driver model, so enable > >> usb ether gadget. > >> > >>

Re: [U-Boot] [PATCH v3 09/10] am335x_evm: enable usb ether gadget as it supports DM_ETH

On 01/09/2017 09:45 PM, Simon Glass wrote: > On 17 November 2016 at 02:08, Mugunthan V N wrote: >> Since usb ether gadget have support for driver model, so enable >> usb ether gadget. >> >> Signed-off-by: Mugunthan V N >> Reviewed-by: Tom Rini

[U-Boot] Please pull u-boot-dm

Hi Tom, The following changes since commit a705ebc81b7f91bbd0ef7c634284208342901149: Prepare v2017.01 (2017-01-09 11:57:05 -0500) are available in the git repository at: git://git.denx.de/u-boot-dm.git for you to fetch changes up to f8f41ae668040d58271e03bc85b58e13becb14af: scsi: dm:

Re: [U-Boot] [PATCH] scsi: dm: Unbind all scsi based block devices before new scan

On 9 January 2017 at 11:13, Simon Glass wrote: > On 2 January 2017 at 01:40, Michal Simek wrote: >> >> New scan should unbind all block devices not to be listed again. >> Without this patch if scsi reset or scan is called new block devices are >>

Re: [U-Boot] [PATCH v3 10/10] defconfig: am335x_evm: enable usb driver model

On 21 November 2016 at 07:06, Tom Rini wrote: > On Thu, Nov 17, 2016 at 02:38:15PM +0530, Mugunthan V N wrote: > >> enable usb driver model for am335x bbb as musb supports >> driver model >> >> Signed-off-by: Mugunthan V N > > Reviewed-by: Tom Rini

Re: [U-Boot] [PATCH v3 08/10] am33xx: board: init usb ether gadget for rndis support

On 17 November 2016 at 02:08, Mugunthan V N wrote: > Add usb ether gadget device with usb_ether_init() when > CONFIG_DM_ETH and CONFIG_USB_ETHER are defined. > > Signed-off-by: Mugunthan V N > Reviewed-by: Tom Rini > --- >

Re: [U-Boot] [PATCH v3 09/10] am335x_evm: enable usb ether gadget as it supports DM_ETH

On 17 November 2016 at 02:08, Mugunthan V N wrote: > Since usb ether gadget have support for driver model, so enable > usb ether gadget. > > Signed-off-by: Mugunthan V N > Reviewed-by: Tom Rini > --- > include/configs/am335x_evm.h |

Re: [U-Boot] [PATCH] mx6sx: Add initial support for UDOO Neo Board

Hi, Am 25.11.2016 um 19:56 schrieb Breno Lima: > diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h > new file mode 100644 > index 000..81e0481 > --- /dev/null > +++ b/include/configs/udoo_neo.h [...] > +#define CONFIG_EXTRA_ENV_SETTINGS \ > + "console=ttymxc0,115200\0"

[U-Boot] [PATCH] rtc: pcf2127: Update Kconfig and code style

From: Meng Yi Unfortunately version 2 of this patch was applied which was missing some changes. Fix this. Signed-off-by: Meng Yi Acked-by: Simon Glass Signed-off-by: Simon Glass --- drivers/rtc/Kconfig | 6 +-

Re: [U-Boot] [PATCH] scsi: dm: Unbind all scsi based block devices before new scan

On 2 January 2017 at 01:40, Michal Simek wrote: > > New scan should unbind all block devices not to be listed again. > Without this patch if scsi reset or scan is called new block devices are > created which point to the same id and lun. > > For example: > ZynqMP> scsi

[U-Boot] [RFC Patch] drivers: mmc: omap_hsmmc: Fix IO Buffer on OMAP36XX

From: Adam Ford On the OMAP36xx (and 37xx) the CONTROL_WKUP_CTRL register has a field (bit 6) named GPIO_IO_PWRDNZ. If 0, the IO buffers which are related to the MMC are disabled. After the PBIAS is configured, this bit should be set high to enable the MMC port.

[U-Boot] [ANN] U-Boot v2017.01 is released

Hey all, I've released v2017.01 and it's now live on git and FTP and ACD (along with PGP sig file). This release I think is a good way to start out a new year. There's the usual level of forward progress on the things that've been in progress for a while. I'll leave pointing out big changes to

Re: [U-Boot] [PATCH] lib: gitignore *.elf and *.so generated by efi_loader

On Mon, Jan 09, 2017 at 11:33:28AM +0100, Ladislav Michl wrote: > Signed-off-by: Ladislav Michl Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list

Re: [U-Boot] [v4 01/29] arm: socfpga: arria10: add additional i2c nodes for Arria10

On Mon, Jan 9, 2017 at 6:43 AM, Marek Vasut wrote: > On 01/09/2017 12:25 PM, Chee Tien Fong wrote: >> From: Tien Fong Chee >> >> Add remaining 3 I2C base addresses for the Arria10. >> >> Signed-off-by: Dinh Nguyen >>

[U-Boot] [PATCH v2] cmd/fdt: Make fdt get value endian-safe for single-cell properties

On a Raspberry Pi 2 disagreements on cell endianness can be observed: U-Boot> fdt print /soc/gpio@7e20 phandle phandle = <0x000d> U-Boot> fdt get value myvar /soc/gpio@7e20 phandle; printenv myvar myvar=0x0D00 Fix this by always treating the pointer as BE and converting

Re: [U-Boot] [v4 18/29] arm: socfpga: stratix10: Add SOCFPGA Stratix10 base address

On 01/09/2017 05:31 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > Add base address header file for Stratix10 SoC > > Signed-off-by: Chin Liang See > Signed-off-by: Tien Fong Chee > Cc: Marek Vasut >

Re: [U-Boot] [PATCH v1 1/1] x86: Synchronize list of x86 subarchitectures (update bootparam.h)

(adding Simon and Bin to cc) On 08.01.2017 21:51, Andy Shevchenko wrote: Basically rename X86_SUBARCH_MRST to X86_SUBARCH_INTEL_MID to be more specific. Signed-off-by: Andy Shevchenko --- arch/x86/include/asm/bootparam.h | 3 ++- 1 file changed, 2

Re: [U-Boot] [PATCH] rpi: Fix device tree path on ARM64

On Thu, 5 Jan 2017 16:44:43 -0700 Stephen Warren wrote: > On 01/03/2017 03:39 AM, Tuomas Tynkkynen wrote: > > The directory structure of device tree files produced by the kernel's > > 'make dtbs_install' is different on ARM64, the RPi3 device tree file is > > in a

Re: [U-Boot] [PATCH 1/1] arm: mach-omap2: Fix secure file generation

On Fri, Jan 06, 2017 at 04:20:02PM -0600, Andrew F. Davis wrote: > When TI_SECURE_DEV_PKG is not defined we warn that the file '*_HS' was > not generated but generate an unsigned one anyway, first fix this > warning to say that it was generated but not secured. > > When the user then exports

Re: [U-Boot] [PATCH] mx6ullevk: Add missing MAINTAINERS for mx6ull_14x14_evk_plugin_defconfig

On Thu, Jan 05, 2017 at 03:32:50PM +0100, Jagan Teki wrote: > Add 'Peng Fan' as MAINTAINERS of configs/mx6ull_14x14_evk_plugin_defconfig > which is missing in below commit > "imx: mx6ull_14x14_evk: add plugin defconfig" > (sha1: b90ebf49bb8f74afe68f696f59a0e24cc79f2031) > > Cc: Stefano Babic

Re: [U-Boot] [PATCH] am335x: configs: Use ISW_ENTRY_ADDR to set SPL_TEXT_BASE

On Fri, Jan 06, 2017 at 04:32:12PM -0600, Andrew F. Davis wrote: > The SPL load address changes based on boot type in HS devices, > ISW_ENTRY_ADDR is used to set this address for AM43xx based SoCs > for similar reasons. Add this same logic for AM33xx devices. > > Also make the default value for

Re: [U-Boot] rockchip: rk3288: Possible regression in sdram setup

Hi, Le 09/01/2017 à 08:20, Kever Yang a écrit : On 01/06/2017 06:52 PM, Romain Perier wrote: Add Rockchip Engineers to Cc: Le 06/01/2017 à 11:28, Romain Perier a écrit : Hello, I have a strange behaviour with the SPL on rk3288. When I build u-boot-rockchip master for the rock2

[U-Boot] [PATCH v1 1/1] x86: Synchronize list of x86 subarchitectures (update bootparam.h)

Basically rename X86_SUBARCH_MRST to X86_SUBARCH_INTEL_MID to be more specific. Signed-off-by: Andy Shevchenko --- arch/x86/include/asm/bootparam.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/bootparam.h

[U-Boot] [PATCH] sunxi: Add defconfig for the Sinovoip BPI-M2+ board

The Sinovoip BPI-M2+ is a SBC board based on the H3 SoC. It has 1G of RAM, 8G eMMC, a microSD slot, USB, gigabit Ethernet, AP6212 WiFi, HDMI, etc. --- configs/Sinovoip_BPI_M2_plus_defconfig | 18 ++ 1 file changed, 18 insertions(+) create mode 100644

[U-Boot] [PATCH] Avoid non-portable sed construct

Using \n in a substitution is a GNU extension. Use the 'G" command instead to insert the desired line. Signed-off-by: Mark Kettenis --- scripts/Makefile.lib | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib

[U-Boot] [PATCH v1 1/1] gitignore: Append *.so and *.efi

EFI loader generates two types of binaries that usually are not a part of source tree. Ignore them globally based on extension. Signed-off-by: Andy Shevchenko --- .gitignore | 2 ++ 1 file changed, 2 insertions(+) diff --git a/.gitignore b/.gitignore index

Re: [U-Boot] [PATCH] sunxi: makes an invisible option for H3-like DRAM controllers

2017年1月9日 下午7:06于 Maxime Ripard 写道： > > On Fri, Jan 06, 2017 at 07:13:17AM +0800, Icenowy Zheng wrote: > > > > > > 06.01.2017, 06:16, "Maxime Ripard" : > > > On Thu, Dec 29, 2016 at 02:50:48AM +0800, Icenowy Zheng wrote: > >

Re: [U-Boot] [linux-sunxi] Re: [RFC PATCH 1/4] sunxi: add DDR2 support to H3-like DRAM controller

2017年1月9日 下午6:30于 Andre Przywara 写道： > > Hi, > > On 05/01/17 22:55, Icenowy Zheng wrote: > > > > 2017年1月6日 06:37于 Maxime Ripard 写道： > >> > >> On Thu, Dec 29, 2016 at 03:00:58AM +0800, Icenowy Zheng wrote: > >>> H3-like DRAM

[U-Boot] spl export fdt crashes

Hi! I tried to useing falcom mode from nand flash: ti-u-boot, am335x based board using modified am335x_evm. include/configs/am335x_evm.h falcon mode variables untouched. I ran manually commands presented in: https://git.ti.com/ti-u-boot/ti-u-boot/blobs/ti-u-boot-2016.05/board/ti/am335x/README

Re: [U-Boot] [v4 01/29] arm: socfpga: arria10: add additional i2c nodes for Arria10

On 01/09/2017 12:25 PM, Chee Tien Fong wrote: > From: Tien Fong Chee > > Add remaining 3 I2C base addresses for the Arria10. > > Signed-off-by: Dinh Nguyen > Signed-off-by: Tien Fong Chee > Reviewed-by: Stefan

[U-Boot] [v4 29/29] arm: socfpga: arria10: Enable fpga driver build for SPL.

From: Tien Fong Chee Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang See Cc: Tien Fong --- drivers/Makefile |2 +- 1

[U-Boot] [v4 28/29] arm: socfpga: arria10: Added Arria10 critical HW initialization to spl

From: Tien Fong Chee This patch adding the Arria10 critical hardware initialization before enabling console print out in spl. Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang

[U-Boot] [v4 27/29] arm: socfpga: arria10: Added drivers for Arria10 pinmux/pins configuration

From: Tien Fong Chee Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang See Cc: Tien Fong ---

[U-Boot] [v4 26/29] arm: socfpga: arria10: Added drivers for Arria10 clock manager

From: Tien Fong Chee The drivers is restructured such common functions, gen5 functions, and arria10 functions are moved to clock_manager.c, clock_manager_gen5 and clock_manager_arria10 respectively. Signed-off-by: Tien Fong Chee Cc: Marek

[U-Boot] [v4 25/29] arm: socfpga: arria10: Added miscellaneous drivers for Arria 10

From: Tien Fong Chee The drivers is restructured such common functions, gen5 functions. and arria10 functions are moved to misc.c, misc_gen5 and misc_arria10 respectively. Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh

[U-Boot] [v4 24/29] arm: socfpga: arria10: Added drivers for Arria10 Reset Manager

From: Tien Fong Chee Drivers for reset manager is restructured such that common functions, gen5 drivers and Arria10 drivers are moved to reset_manager.c, reset_manager_gen5.c and reset_manager_arria10.c respectively. Signed-off-by: Tien Fong Chee

[U-Boot] [v4 23/29] arm: socfpga: arria10: Added support for Arria 10 socdk

From: Tien Fong Chee Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang See Cc: Tien Fong ---

[U-Boot] [v4 22/29] arm: socfpga: arria10: Added some hardware base address for Arria 10

From: Tien Fong Chee Signed-off-by: Tien Fong Chee Cc: Marek Vasut Cc: Dinh Nguyen Cc: Chin Liang See Cc: Tien Fong ---

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