Upstream Linux has received a few device tree updates to the RPi
which we should propagate into the builtin U-Boot one as well to
gain hardware support.
This patch bumps the dts files to their 4.14 Linux counterparts.
Signed-off-by: Alexander Graf
---
On 10/04/2017 01:46 AM, Nobuhiro Iwamatsu wrote:
> Hi!
>
> This patch breaks the compiling of board/renesas/ulcb/cpld.c
>
> board/renesas/ulcb/cpld.c: In function 'ulcb_softspi_sda':
> board/renesas/ulcb/cpld.c:17:16: error: 'GPIO_GP_6_7' undeclared
> (first use in this function)
> #define
The ULCB CPLD support was not updated during the PFC table rework,
fix up the GPIO numbers until the CPLD support is rewritten to a
proper DM capable and DT probing driver.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
On Tue, Oct 03, 2017 at 11:34:36PM +0100, Peter Robinson wrote:
> Hi Tom,
>
> > So it's release day and I've put up v2017.11-rc1. The merge window is
> > now closed and I've updated git and the tarballs are also up now.
>
> I don't see the tarballs on ftp.denx.de/pub/u-boot/
Wolfgang? Thanks!
Hi Tom,
> So it's release day and I've put up v2017.11-rc1. The merge window is
> now closed and I've updated git and the tarballs are also up now.
I don't see the tarballs on ftp.denx.de/pub/u-boot/
> I think my patch queue is in OK shape currently, but I need to
> pick up a number of series
From: "Marty E. Plummer"
I realize this patch is not up to standards for the sake of mainlining
right now, but I'm mostly interested in getting some feedback on how
to make it work before getting into the nicities of mainline inclusion.
As of right now the bulk of this
On Tue, Oct 03, 2017 at 01:30:22PM -0500, Rob Herring wrote:
> On Tue, Oct 3, 2017 at 1:28 PM, Tom Rini wrote:
> > On Tue, Oct 03, 2017 at 01:24:13PM -0500, Rob Herring wrote:
> >> On Sun, Sep 24, 2017 at 9:26 AM, Tom Rini wrote:
> >> > Using the
On Tue, Oct 3, 2017 at 1:28 PM, Tom Rini wrote:
> On Tue, Oct 03, 2017 at 01:24:13PM -0500, Rob Herring wrote:
>> On Sun, Sep 24, 2017 at 9:26 AM, Tom Rini wrote:
>> > Using the update-dtc-source.sh script from Linux v4.14-rc1 import the
>> > portions of
On Tue, Oct 03, 2017 at 01:24:13PM -0500, Rob Herring wrote:
> On Sun, Sep 24, 2017 at 9:26 AM, Tom Rini wrote:
> > Using the update-dtc-source.sh script from Linux v4.14-rc1 import the
> > portions of dtc that we require. We bring in update-dtc-source.sh and
> >
On Sun, Sep 24, 2017 at 9:26 AM, Tom Rini wrote:
> Using the update-dtc-source.sh script from Linux v4.14-rc1 import the
> portions of dtc that we require. We bring in update-dtc-source.sh and
> scripts/dtc/Makefile from Linux v4.14-rc1. Rework DTC_FLAGS handling to
> not
If probe fails, we should unregister the stdio device, else we leave
dangling pointers to the parent 'struct usb_device'.
Signed-off-by: Rob Clark
---
I finally got around to debugging why things explode so badly without
fixing usb_kbd vs. iomux[1] (which this patch applies
On Tue, Oct 3, 2017 at 12:04 PM, Fabio Estevam wrote:
> On Tue, Oct 3, 2017 at 12:30 PM, Rob Clark wrote:
>> On some devices, this does not appear to be a valid assumption. So
>> figure out the number of blocks we actually need to read.
>>
>>
> -Original Message-
> From: Bo Shen [mailto:voice.s...@gmail.com]
> Sent: Monday, October 02, 2017 10:48 PM
> To: albert.u.b...@aribaud.net; Vikas MANOCHA
> Cc: u-boot@lists.denx.de; Bo Shen
> Subject: [PATCH] ARM: stm32f7: fix prescaler
On Tue, Oct 03, 2017 at 08:44:31AM -0400, Rob Clark wrote:
> On Tue, Oct 3, 2017 at 7:04 AM, Fabio Estevam wrote:
> > On Tue, Oct 3, 2017 at 7:57 AM, Rob Clark wrote:
> >
> >> btw, if I had to take a guess, I'd say that perhaps blksz is smaller
> >> than
From: André Draszik
TPM_NV_PER_PPREAD: physical presence needed for reading
TPM_NV_PER_WRITEDEFINE: persistent write lock by writing size 0
TPM_NV_PER_WRITEALL: write in one go
Signed-off-by: André Draszik
---
include/tpm.h | 3 +++
1 file changed,
From: André Draszik
While commit 36d35345b1f6 ("tpm: add missing va_end") added
some missing calls to va_end(), it missed a few places.
Signed-off-by: André Draszik
---
lib/tpm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
Hi all,
For my graduation project my company asked to use U-Boot as bare metal
boot-loader on one of their product. The product in an embedded board with a
Xeon Broadwell-DE D-1527 Quad Core. The current boot-loader consist of Coreboot
+ U-Boot, but of course they want to get rid of Coreboot.
From: André Draszik
The maximum length of the name of the image is
obviously not sizeof(), which is just the
length of a pointer, but IH_NMLEN.
fixes: 62cf11c0921a90c6bd62344f4bc069668e6c698c
("SPL: Limit image name print length")
Signed-off-by: André Draszik
From: André Draszik
Signed-off-by: André Draszik
---
include/tpm.h | 12
lib/tpm.c | 43 +++
2 files changed, 55 insertions(+)
diff --git a/include/tpm.h b/include/tpm.h
index
From: André Draszik
The offset of the permanent flags structure is in a different
place in the response compared to what the code is doing,
which gives us a completely useless result.
Fix by replacing hand-crafted code with generic parser
infrastructure.
Signed-off-by:
From: André Draszik
Signed-off-by: André Draszik
---
include/tpm.h | 12
lib/tpm.c | 43 +++
2 files changed, 55 insertions(+)
diff --git a/include/tpm.h b/include/tpm.h
index
From: André Draszik
While commit 36d35345b1f6 ("tpm: add missing va_end") added
some missing calls to va_end(), it missed a few places.
Signed-off-by: André Draszik
---
lib/tpm.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
From: André Draszik
TPM_NV_PER_PPREAD: physical presence needed for reading
TPM_NV_PER_WRITEDEFINE: persistent write lock by writing size 0
TPM_NV_PER_WRITEALL: write in one go
Signed-off-by: André Draszik
---
include/tpm.h | 3 +++
1 file changed,
From: André Draszik
The offset of the permanent flags structure is in a different
place in the response compared to what the code is doing,
which gives us a completely result.
Fix by replacing hand-crafted code with generic parser
infrastructure.
Signed-off-by: André
From: André Draszik
The maximum length of the name of the image is
obviously not sizeof(), which is just the
ength of a pointer, but IH_NMLEN.
fixes: 62cf11c0921a90c6bd62344f4bc069668e6c698c
("SPL: Limit image name print length")
Signed-off-by: André Draszik
On Tue, Oct 03, 2017 at 04:43:26PM +0200, Stefan Agner wrote:
> From: Stefan Agner
>
> The changes required to use U-Boot's Serial Download Protocol
> implementation are now available in upstream imx_usb_loader
> repository. Update the URL accordingly.
>
>
On Tue, Oct 3, 2017 at 12:30 PM, Rob Clark wrote:
> On some devices, this does not appear to be a valid assumption. So
> figure out the number of blocks we actually need to read.
>
> Signed-off-by: Rob Clark
This version does not solve the mx6 spl boot
On 09/07/2017 02:54 AM, Rajesh Bhagat wrote:
> Include common config_distro_defaults.h and config_distro_bootcmd.h
> for u-boot enviroments to support automatical distro boot which
> scan boot.scr from external storage devices(e.g. SD and USB)
> and execute autoboot script.
>
> Signed-off-by:
On 09/07/2017 10:10 PM, Rajesh Bhagat wrote:
> Include common config_distro_defaults.h and config_distro_bootcmd.h
> for u-boot enviroments to support automatical distro boot which
> scan boot.scr from external storage devices(e.g. SD and USB)
> and execute autoboot script.
>
> Signed-off-by:
On 09/24/2017 08:44 PM, Bao Xiaowei wrote:
> For some special reset times for longer pcie devices, in this case, the
> pcie device may on polling compliance state, the RC considers the pcie
> device is link up, but the pcie device is not link up, only the L0 state
> is link up state. So add the
On some devices, this does not appear to be a valid assumption. So
figure out the number of blocks we actually need to read.
Signed-off-by: Rob Clark
---
Sorry, took a bit longer to get to a point of testing this.. somehow
himport_r() of the default_environment is
On 09/28/2017 08:42 AM, York Sun wrote:
> Commit 15eb1d43bf47 ("spl: reorder the assignment of board info to
> global data") intended to move assignment of board info earlier,
> into board_init_r(). However, function preload_console_init() is
> called either from spl_board_init() or from
From: Stefan Agner
The changes required to use U-Boot's Serial Download Protocol
implementation are now available in upstream imx_usb_loader
repository. Update the URL accordingly.
Signed-off-by: Stefan Agner
---
doc/README.sdp | 2 +-
1
On Fri, Sep 15, 2017 at 06:53:39PM +, Heinrich Schuchardt wrote:
> On 09/14/2017 12:05 AM, Rob Clark wrote:
> > All of the device-path related structures should be packed. UEFI
> > defines the device-path as a byte-aligned data structure.
> >
> > Signed-off-by: Rob Clark
From: Patrice Chotard
Enable CMD_GPT/EXT2/EXT4/EXT4_WRITE/FAT_FS_GENERIC flags
Signed-off-by: Patrice Chotard
---
configs/stm32h743-eval_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/configs/stm32h743-eval_defconfig
From: Patrice Chotard
Add pinctrl and sdmmc nodes to add MMC support for
STM32H743 evaluation board.
Evaluation board needs a second pinctrl node
"pinctrl_sdmmc1_level_shifter" to drive a level shifter
on MMC bus.
Signed-off-by: Patrice Chotard
From: Patrice Chotard
Enable CMD_MMC, DM_MMC and STM32_SDMMC2 flags
Signed-off-by: Patrice Chotard
---
configs/stm32h743-disco_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/stm32h743-disco_defconfig
From: Patrice Chotard
Enable CMD_GPT/EXT2/EXT4/EXT4_WRITE/FAT_FS_GENERIC flags
Signed-off-by: Patrice Chotard
---
configs/stm32h743-disco_defconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/configs/stm32h743-disco_defconfig
From: Patrice Chotard
Enable CMD_MMC, DM_MMC and STM32_SDMMC2 flags
Signed-off-by: Patrice Chotard
---
configs/stm32h743-eval_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/stm32h743-eval_defconfig
From: Patrice Chotard
Since e7881d85 "dm: mmc: Drop CONFIG_DM_MMC_OPS" DM_MMC_OPS
is no more used, remove it from STM32_SDMMC2 dependencies
Signed-off-by: Patrice Chotard
---
drivers/mmc/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1
From: Patrice Chotard
Add pinctrl and sdmmc nodes to add MMC support for
STM32H743 discovery board.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32h743-pinctrl.dtsi | 15 +++
arch/arm/dts/stm32h743.dtsi | 13
From: Patrice Chotard
Add pinctrl and MMC nodes for both disco and eval boards
Enable filesystem related flags to read different type of SD/MMC partition
Fix drivers/mmc/Kconfig to remove obsolete DM_MMC_OPS flag
Patrice Chotard (7):
ARM: DTS: stm32: add SDMMC support
From: Patrice Chotard
As suggested by Vikas Manocha, update embedded SRAM address
to use AXI SRAM available on D1 domain instead of using
AHB SRAM (D2 domain).
On some STM32H743 SoCs, D2 domain SRAM is accessible even if
SRAMxEN bit in AHB2ENR bits are not set whereas on
While this goes somewhat against normal coding style we should ensure
that dev_desc is not NULL before we dereference it in allocation of
legacy_mbr.
Reported-by: Coverity (CID: 167292)
Signed-off-by: Tom Rini
---
disk/part_efi.c | 5 +++--
1 file changed, 3 insertions(+), 2
On 10/03/2017 03:17 PM, Faiz Abbas wrote:
> Hi,
>
> On Tuesday 03 October 2017 05:34 PM, Marek Vasut wrote:
>> On 09/19/2017 01:15 PM, Faiz Abbas wrote:
>>> A flush of the cache is required before any DMA access can take place.
>>
>> You mean invalidation for inbound DMA, flush for outbound DMA,
Hi,
On Tuesday 03 October 2017 05:34 PM, Marek Vasut wrote:
> On 09/19/2017 01:15 PM, Faiz Abbas wrote:
>> A flush of the cache is required before any DMA access can take place.
>
> You mean invalidation for inbound DMA, flush for outbound DMA, right ?
yes thats what i meant.
>>
>> -
On 09/19/2017 01:15 PM, Faiz Abbas wrote:
> A flush of the cache is required before any DMA access can take place.
> The minimum size that can be flushed from the cache is one cache line
> size. Therefore, any buffer allocated for DMA should be in multiples
> of cache line size.
>
> Thus,
On 10/03/2017 02:18 PM, Dr. Philipp Tomsich wrote:
> Marek,
>
>> On 3 Oct 2017, at 14:04, Marek Vasut wrote:
>>
>> On 09/19/2017 01:15 PM, Faiz Abbas wrote:
>>> A flush of the cache is required before any DMA access can take place.
>>
>> You mean invalidation for inbound DMA,
On Thu, Sep 14, 2017 at 03:05:12PM -0700, Paul Burton wrote:
> Convert the powerpc architecture to make use of the new asm-generic/io.h
> to provide address mapping functions. As powerpc can actually perform
> non-identity mapping between physical & virtual addresses we can't
> simply make use of
On Thu, Sep 14, 2017 at 03:05:11PM -0700, Paul Burton wrote:
> Convert the nios2 architecture to make use of the new asm-generic/io.h to
> provide address mapping functions. As nios2 actually performs
> non-identity mapping between physical & virtual addresses we can't
> simply make use of the
On Thu, Sep 14, 2017 at 03:05:08PM -0700, Paul Burton wrote:
> Convert the x86 architecture to make use of the new asm-generic/io.h to
> provide address mapping functions. As the generic implementations are
> suitable for x86 this is primarily a matter of moving code.
>
> This has only been
On Sun, Sep 03, 2017 at 05:00:29PM +0200, Marek Behún wrote:
> Signed-off-by: Marek Behun
>
> create mode 100644 fs/btrfs/Kconfig
> create mode 100644 fs/btrfs/Makefile
> create mode 100644 fs/btrfs/btrfs.c
> create mode 100644 include/btrfs.h
>
> diff --git
On Thu, Sep 14, 2017 at 03:05:10PM -0700, Paul Burton wrote:
> Convert the mips architecture to make use of the new asm-generic/io.h to
> provide address mapping functions. As mips actually performs
> non-identity mapping between physical & virtual addresses we can't
> simply make use of the
On Sun, Sep 03, 2017 at 05:00:30PM +0200, Marek Behún wrote:
> Signed-off-by: Marek Behun
>
> create mode 100644 cmd/btrfs.c
>
> diff --git a/cmd/Kconfig b/cmd/Kconfig
> index d6d130edfa..77623052c4 100644
Applied to u-boot/master, thanks!
--
Tom
signature.asc
On Thu, Sep 14, 2017 at 03:05:04PM -0700, Paul Burton wrote:
> Convert the m68k architecture to make use of the new asm-generic/io.h to
> provide address mapping functions. As the generic implementations are
> suitable for m68k this is primarily a matter of emoving code.
>
> Feedback from
On Sun, Sep 03, 2017 at 05:00:28PM +0200, Marek Behún wrote:
> This adds the proper implementation for the BTRFS filesystem.
> The implementation currently supports only read-only mode and
> the filesystem can be only on a single device.
>
> Checksums of data chunks is unimplemented.
>
>
On Thu, Sep 14, 2017 at 03:05:02PM -0700, Paul Burton wrote:
> Convert the arc architecture to make use of the new asm-generic/io.h to
> provide address mapping functions. As the generic implementations are
> suitable for arc this is primarily a matter of removing code.
>
> Feedback from
On Thu, Sep 14, 2017 at 03:05:09PM -0700, Paul Burton wrote:
> Convert the xtensa architecture to make use of the new asm-generic/io.h
> to provide address mapping functions. As the generic implementations are
> suitable for xtensa this is primarily a matter of moving code.
>
> This has only
On Sun, Sep 03, 2017 at 05:00:31PM +0200, Marek Behún wrote:
> Signed-off-by: Marek Behun
>
> diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
> index a3834acb96..9a456e67aa 100644
Applied to u-boot/master, thanks!
--
Tom
signature.asc
On Thu, Sep 14, 2017 at 03:05:07PM -0700, Paul Burton wrote:
> Convert the sh architecture to make use of the new asm-generic/io.h to
> provide address mapping functions. As the generic implementations are
> suitable for sh this is primarily a matter of moving code.
>
> Feedback from
On Thu, Sep 14, 2017 at 03:05:13PM -0700, Paul Burton wrote:
> Convert the sandbox architecture to make use of the new asm-generic/io.h
> to provide address mapping functions. As sandbox actually performs
> non-identity mapping between physical & virtual addresses we can't
> simply make use of
On Thu, Sep 14, 2017 at 03:05:01PM -0700, Paul Burton wrote:
> Most architectures currently supported by U-Boot use trivial
> implementations of map_to_physmem & virt_to_phys which simply cast a
> physical address to a pointer for use a virtual address & vice-versa.
> This results in a lot of
On Thu, Sep 14, 2017 at 03:05:05PM -0700, Paul Burton wrote:
> Convert the microblaze architecture to make use of the new
> asm-generic/io.h to provide address mapping functions. As the generic
> implementations are suitable for microblaze this is primarily a matter
> of removing code.
>
>
On Thu, Sep 14, 2017 at 03:05:06PM -0700, Paul Burton wrote:
> Convert the nds32 architecture to make use of the new asm-generic/io.h
> to provide address mapping functions. As the generic implementations are
> suitable for nds32 this is primarily a matter of removing code.
>
> Feedback from
On Thu, Sep 14, 2017 at 03:05:03PM -0700, Paul Burton wrote:
> Convert the arm architecture to make use of the new asm-generic/io.h to
> provide address mapping functions. As the generic implementations are
> suitable for arm this is primarily a matter of removing code.
>
> This has only been
On Sun, Sep 03, 2017 at 05:00:27PM +0200, Marek Behún wrote:
> BTRFS on disk structures are stored in Little Endian. Add functions
> to convert this structures to cpu and to disk format.
>
> On Little Endian hosts, these functions do nothing.
>
> On Big Endian the CALL_MACRO_FROM_EACH from
On Sun, Sep 03, 2017 at 05:00:25PM +0200, Marek Behún wrote:
> Add a header variadic-macro.h which defines the CALL_MACRO_FOR_EACH marco.
>
> This macro can be used as follows:
> #define TEST(x)
> CALL_MACRO_FOR_EACH(TEST, a, b, c, d)
>
> This will expand to
> TEST(a) TEST(b) TEST(c)
On Sun, Sep 03, 2017 at 05:00:24PM +0200, Marek Behún wrote:
> The ext4, reiserfs and zfs filesystems all have their own implementation
> of the same function, *_devread. Generalize this function into fs_devread
> and put the code into fs/fs_internal.c.
>
> Signed-off-by: Marek Behun
On Sun, Sep 03, 2017 at 05:00:23PM +0200, Marek Behún wrote:
> This is needed for BTRFS.
>
> Signed-off-by: Marek Behun
>
> create mode 100644 lib/crc32c.c
>
> diff --git a/include/u-boot/crc.h b/include/u-boot/crc.h
> index 6764d58bab..6d08f5df98 100644
Note that in the
On Sun, Sep 03, 2017 at 05:00:26PM +0200, Marek Behún wrote:
> Add btrfs_tree.h and ctree.h from Linux which contains constants
> and structures for the BTRFS filesystem.
>
> Signed-off-by: Marek Behun
>
> create mode 100644 fs/btrfs/btrfs_tree.h
> create mode 100644
We specifically say that the last arg is u32, so use %lu.
Signed-off-by: Tom Rini
---
fs/btrfs/super.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c
index 706286ee2d85..2529c2b3b6a6 100644
--- a/fs/btrfs/super.c
+++
For better test coverage, enable btrfs.
Signed-off-by: Tom Rini
---
configs/sandbox_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 632e0aa0ee35..891322b65cb4 100644
--- a/configs/sandbox_defconfig
+++
On Tue, Oct 3, 2017 at 7:04 AM, Fabio Estevam wrote:
> On Tue, Oct 3, 2017 at 7:57 AM, Rob Clark wrote:
>
>> btw, if I had to take a guess, I'd say that perhaps blksz is smaller
>> than 'legacy_mbr', so maybe rather than allocating blksize, it should
>>
Marek,
> On 3 Oct 2017, at 14:04, Marek Vasut wrote:
>
> On 09/19/2017 01:15 PM, Faiz Abbas wrote:
>> A flush of the cache is required before any DMA access can take place.
>
> You mean invalidation for inbound DMA, flush for outbound DMA, right ?
>
>> The minimum size that can
On 09/19/2017 01:15 PM, Faiz Abbas wrote:
> A flush of the cache is required before any DMA access can take place.
You mean invalidation for inbound DMA, flush for outbound DMA, right ?
> The minimum size that can be flushed from the cache is one cache line
> size. Therefore, any buffer
This brings initial support for Intel Merrifield platform (based on
Intel Tangier SoC) along with minimum support of Intel Edison board
(based on Merrifield).
This RFC series based on discussion [1] to show how we may unleash
the powerfulness of ACPI on the board, which initially didn't support
This board is based on Intel Tangier SoC (Intel Merrifield platform)
and may utilize ACPI powerfulness.
Bring minimum support by appending initial DSDT table for it.
Note, the addresses for generated tables are carefully chosen to avoid
any conflicts with existing shadowed BIOS data. The user
On Tue, Oct 3, 2017 at 7:57 AM, Rob Clark wrote:
> btw, if I had to take a guess, I'd say that perhaps blksz is smaller
> than 'legacy_mbr', so maybe rather than allocating blksize, it should
> be DIV_ROUND_UP(sizeof(legacy_mbr), dev_desc->blksz).. or I guess that
> could be
On Tue, Oct 3, 2017 at 6:47 AM, Rob Clark wrote:
> personally I think we should try to figure out what is wrong on imx6
> rather than blindly reverting.. without this change MBR partitioned
> disks might not generate unique device-paths for EFI boot.
>
> If you can't get any
> -Original Message-
> From: York Sun
> Sent: Friday, September 15, 2017 2:08 AM
> To: Sumit Garg ; u-boot@lists.denx.de
> Cc: Ruchika Gupta ; Prabhakar Kushwaha
>
> Subject: Re: [PATCH 1/3] armv8: fsl-layerscape: SPL
On 10/03/2017 11:08 AM, Andy Shevchenko wrote:
> On Tue, 2017-10-03 at 13:05 +0530, Faiz Abbas wrote:
>> Hi,
>>
>> On Tuesday 19 September 2017 04:45 PM, Faiz Abbas wrote:
>>> A flush of the cache is required before any DMA access can take
>>> place.
>>> The minimum size that can be flushed from
On 03/10/2017 11:16, Lukasz Majewski wrote:
> It may happen that the MXC serial IP block is performing some ongoing
> transmission (started at e.g. board_init()) when the "initr_serial" is
> called.
>
> As a result the serial port IP block is reset, so transmitted data is
> corrupted:
>
> I2C:
It may happen that the MXC serial IP block is performing some ongoing
transmission (started at e.g. board_init()) when the "initr_serial" is
called.
As a result the serial port IP block is reset, so transmitted data is
corrupted:
I2C: ready
DRAM: 1 GiB
jSS('HH��SL_SDHC: 04 rev 0x0
This patch
On Tue, 2017-10-03 at 13:05 +0530, Faiz Abbas wrote:
> Hi,
>
> On Tuesday 19 September 2017 04:45 PM, Faiz Abbas wrote:
> > A flush of the cache is required before any DMA access can take
> > place.
> > The minimum size that can be flushed from the cache is one cache
> > line
> > size. Therefore,
Hi,
On Tuesday 19 September 2017 04:45 PM, Faiz Abbas wrote:
> A flush of the cache is required before any DMA access can take place.
> The minimum size that can be flushed from the cache is one cache line
> size. Therefore, any buffer allocated for DMA should be in multiples
> of cache line
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