Hello list,
this is the first version of this patch that boots properly the linux kernel
on my i.MX8QM Board. It's still based on v2019.07. Please skip v1 because its
not working.
Best Regards,
Oliver
Oliver Graute (1):
imx: support i.MX8QM ROM 7720 a1 board
arch/arm/dts/Makefile
Hello all,
I'd like to get U-Boot >= 2019.07 booting on a Wandboard Quad with HAB
support enabled, but appear to be running into either some regressions
(or matters of PEBKAC). For the scope of this discussion, I'm only
concerned with booting an "insecure" HAB-enabled U-Boot image (ideally
FIT),
Hi Sherry,
On 21/08/19 8:05 PM, Sherry Sun wrote:
> These patches introduce new Cadence driver to U-Boot.
> The first patch is to add the Cadence USB3 IP(CDNS3) core and driver for
> the usb gadget.
> The second patch introduce the xhci-imx8 usb host driver separately.
> The third patch
On 8/28/19 10:13 AM, Ley Foon Tan wrote:
[...]
>> If want to use address from DT, we need get address every time need to
>> use the address.
>> For non-DM, it is easier to use constant address. Let me know if you
>> still prefer to use address from DT.
Surely you can
On 28.08.19 14:26, Stefan Roese wrote:
On 28.08.19 08:37, Weijie Gao wrote:
This patch adds pinctrl support for mt7628, with a file for common pinmux
functions and a file for mt7628 which has additional support for pinconf.
Signed-off-by: Weijie Gao
---
drivers/pinctrl/Kconfig
On 28.08.19 08:37, Weijie Gao wrote:
This patch adds pinctrl support for mt7628, with a file for common pinmux
functions and a file for mt7628 which has additional support for pinconf.
Signed-off-by: Weijie Gao
---
drivers/pinctrl/Kconfig | 1 +
Hi Jean,
>
> +Kishon who worked on this PHY under linux
>
>
> Hi Sherry,
>
>
> On 28/08/2019 10:05, Sherry Sun wrote:
> > Hi Jean,
> >
> >> Hi Sherry,
> >>
> >> On 21/08/2019 16:36, Sherry Sun wrote:
> >>> The cdns3-usb-phy driver supports both host and peripheral mode of
> >>> usb driver
Hi Jean,
>
> Hi Jean,
>
> >
> > Hi Marek, Sherry,
> >
> >
> > we keep the cdns3 node for usb gadget driver, then add a usb host
> > node for
> > xhci-imx8 driver in *-uboot.dtsi. so here is no need to change
> > the host driver
> > >>> compatible.
> > But the compatible
Hi Simon,
> > > > > > With the EOL of python2 soon I've been looking at the Fedora U-Boot
> > > > > > builds to see what it would take to move over to python3. There's a
> > > > > > couple of issues building the bundled pylibfdt, the first is the
> > > > > > Makefile hard codes python2, the
BCM63268 uses 4.0 HW nand controller, which is currently supported by
brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes
arch/mips/dts/brcm,bcm63268.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm63268.dtsi
BCM6362 uses old 2.2 HW nand controller, which isn't currently supported by
brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes
arch/mips/dts/brcm,bcm6362.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6362.dtsi
BCM6328 uses old 2.2 HW nand controller, which isn't currently supported by
brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes
arch/mips/dts/brcm,bcm6328.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6328.dtsi
Signed-off-by: Álvaro Fernández Rojas
---
v2: Drop CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
arch/mips/dts/comtrend,vr-3032u.dts| 13 +
configs/comtrend_vr3032u_ram_defconfig | 5 +
include/configs/comtrend_vr3032u.h | 5 +
3 files changed, 23 insertions(+)
diff --git
BCM6368 uses old 2.1 HW nand controller, which isn't currently supported by
brcmnand driver.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes
arch/mips/dts/brcm,bcm6368.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm6368.dtsi
This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes
drivers/mtd/nand/raw/Kconfig | 6 +
drivers/mtd/nand/raw/brcmnand/Makefile | 1 +
drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c | 122
These patches add support for brcmnand on bmips.
The current brcmnand driver only supports controller >= 4.0,
which means that only BCM63268 works right now.
v2: Drop CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
Álvaro Fernández Rojas (6):
nand: brcm: add BCM6368 support
bmips: bcm6368: add support for
I wanted this to be compatible with mkenvimage, including the ability
to embed newlines in variables by escaping them. But I failed to check
that it works more than once.
Fixes: f3d8f7dd73a (Allow providing default environment from file)
Signed-off-by: Rasmus Villemoes
---
Makefile | 2 +-
1
From: Rick Chen
Use CCTL command to do d-cache write back
and invalidate instead of fence.
Signed-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng
---
arch/riscv/cpu/ax25/cache.c | 22 +-
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git
From: Rick Chen
Find the UCLASS_CACHE driver to configure the cache controller's
settings.
Signed-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng
---
board/AndesTech/ax25-ae350/ax25-ae350.c | 9 +
1 file changed, 9 insertions(+)
diff --git
From: Rick Chen
When L2 node exists inside cpus node, uclass_get_device
can not parse L2 node successfully. So move it outside
from cpus node.
Also add tag-ram-ctl and data-ram-ctl attributes for
v5l2 cache controller driver. This can adjust timing
by requirement from dtb to improve
From: Rick Chen
Select the v5l2 UCLASS_CACHE driver for ax25.
Signed-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng
---
arch/riscv/cpu/ax25/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/cpu/ax25/Kconfig b/arch/riscv/cpu/ax25/Kconfig
index 6b4b92e..49be775 100644
From: Rick Chen
Flush and disable L2 cache in dcache_disable()
which will be called in cleanup_before_linux()
before jump to linux.
The sequence will be preferred as below:
L1 flush -> L1 disable -> L2 flush -> L2 disable
Signed-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng
---
From: Rick Chen
Add cache enable and disable ops for test coverage.
Signed-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng
---
drivers/cache/sandbox_cache.c | 13 +
test/dm/cache.c | 2 ++
2 files changed, 15 insertions(+)
diff --git
From: Rick Chen
Add a v5l2 cache controller driver that is usually found on
Andes RISC-V ae350 platform. It will parse the cache settings
from the dtb.
In this version tag and data ram control timing can be adjusted
by the requirement from the dtb.
Signed-off-by: Rick Chen
Cc: KC Lin
---
From: Rick Chen
Add a v5l2 cache controller driver that is usually found on
Andes RISC-V ae350 platform. It will parse and configure the
cache settings (data & instruction prefetch, data & tag latency)
from the device tree blob.
Also implement L2 cache flush and disable before jump to linux.
From: Rick Chen
Add cache enable/disable ops to the DM cache uclass driver
Signed-off-by: Rick Chen
Cc: KC Lin
Reviewed-by: Bin Meng
---
drivers/cache/cache-uclass.c | 20
include/cache.h | 31 +++
2 files changed, 51
Hi Thomas,
On Wed, Aug 28, 2019 at 6:31 AM Thomas Fitzsimmons wrote:
>
> Hi Bin,
>
> Bin Meng writes:
>
> > Hi Thomas,
> >
> > On Sat, Jun 9, 2018 at 6:06 AM Thomas Fitzsimmons
> > wrote:
> >>
> >> Add support for loading U-Boot on the Broadcom 7445 SoC. This port
> >> assumes Broadcom's
Hi,
I have a (legacy) multi-image uImage with several embedded dtbs, but no
initrd. I.e. one created by something like "mkimage -T multi -d
zImage:dtb1:dtb2:dtb3". I thought I could boot that using the bootm
command like this
bootm $loadaddr:0 - $loadaddr:3 # choose dtb3
but that fails with
Allow 64-bit DMA on AHCI. If not supported by the host controller, at
least print a message and fail.
Signed-off-by: Roman Kapl
---
Please disregard the previous patch, I've send a wrong version that does not
even compile.
drivers/ata/ahci.c | 14 +++---
1 file changed, 11
+Kishon who worked on this PHY under linux
Hi Sherry,
On 28/08/2019 10:05, Sherry Sun wrote:
Hi Jean,
Hi Sherry,
On 21/08/2019 16:36, Sherry Sun wrote:
The cdns3-usb-phy driver supports both host and peripheral mode of usb
driver which use cadence usb3 IP.
Signed-off-by: Sherry Sun
---
Any comments on this series?
just a friendly reminder :)
regards Frank
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Allow 64-bit DMA on AHCI. If not supported by the host controller, at
least print a message and fail.
Signed-off-by: Roman Kapl
---
drivers/ata/ahci.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index
Hi Kever
On 8/28/19 10:23 AM, Kever Yang wrote:
> Some clock driver do not have a clk_enable() call back, and we should not
> treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
> do not return fail if ret value is '-ENOSYS'
>
> Signed-off-by: Kever Yang
> ---
>
>
Hi Kever
On 8/28/19 10:23 AM, Kever Yang wrote:
> Some clock driver do not have a clk_enable() call back, and we should not
> treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
> do not return fail if ret value is '-ENOSYS'
>
> Signed-off-by: Kever Yang
> ---
>
>
From: Eugen Hristev
Remove 2017 from being printed at boot video console.
This is outdated.
To avoid this situation, remove the year completely.
Signed-off-by: Eugen Hristev
---
board/atmel/common/video_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang
---
drivers/clk/rockchip/clk_rk3399.c | 37 ---
1 file changed, 37 deletions(-)
diff --git
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang
---
drivers/clk/rockchip/clk_rk3368.c | 19 ---
1 file changed, 19 deletions(-)
diff --git
Some clock driver do not have a clk_enable() call back, and we should not
treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
do not return fail if ret value is '-ENOSYS'
Signed-off-by: Kever Yang
---
drivers/usb/host/ohci-generic.c | 2 +-
1 file changed, 1 insertion(+),
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang
---
drivers/clk/rockchip/clk_rk3288.c | 23 ---
1 file changed, 23 deletions(-)
diff --git
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang
---
drivers/clk/rockchip/clk_rk3328.c | 12
1 file changed, 12 deletions(-)
diff --git
There are some clk_enable() callback add to rockchip clock drivers but
with out any real operation driver code, it's waste of CPU cycles at
runtime and waste of code size. The callback are add because some
peripheral REQUIRE it, eg. ehci/ohci generic driver, and other driver
also need it if the
Some clock driver do not have a clk_enable() call back, and we should not
treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
do not return fail if ret value is '-ENOSYS'
Signed-off-by: Kever Yang
---
drivers/usb/host/ehci-generic.c | 2 +-
1 file changed, 1 insertion(+),
Hi,
On 06/08/2019 10:10, Daniel Drake wrote:
> As already documented in this README, several binaries must be
> glued together in order to boot the device.
>
> Extend the documentation to cover the prebuilt binaries
> (saving you the hassle of installing ancient cross-compilers),
> and also
On 18/08/2019 15:42, Beniamino Galvani wrote:
> Hi,
>
> these two patches enable the USB host controller on Odroid-C2. The
> first patch adds a PHY driver; the second one enables the necessary
> configuration options and updates the device tree.
>
> Note that the DWC2 driver currently does not
On Fri, Aug 23, 2019 at 5:56 PM Marek Vasut wrote:
>
> On 8/23/19 11:52 AM, Ley Foon Tan wrote:
> > On Fri, Aug 23, 2019 at 5:23 PM Marek Vasut wrote:
> >>
> >> On 8/23/19 10:57 AM, Ley Foon Tan wrote:
> >>> On Wed, Aug 21, 2019 at 9:50 AM Ley Foon Tan
> >>> wrote:
>
> On Tue, Aug
Hi Jean,
>
> Hi Sherry,
>
> On 21/08/2019 16:36, Sherry Sun wrote:
> > The cdns3-usb-phy driver supports both host and peripheral mode of usb
> > driver which use cadence usb3 IP.
> >
> > Signed-off-by: Sherry Sun
> > ---
> > drivers/phy/Kconfig | 8 ++
> > drivers/phy/Makefile
On 28.08.19 08:37, Weijie Gao wrote:
Currently this driver uses a different way to implement the spi xfer,
by modifying some fields of two registers, which is incompatible with the
MTK's original SDK linux driver. This will cause the flash data being
damaged by the SDK driver.
This patch lets
On 28.08.19 08:37, Weijie Gao wrote:
The mt7621 spi controller supports continuous generic half-duplex spi
transaction. There is no need to cache xfer data at all.
To achieve this goal, the OPADDR register must be used as the first data
to be sent. And follows the eight generic DIDO registers.
Hi Mark,
On 27/08/2019 23:06, Mark Kettenis wrote:
> The G12B clock controller is almost identical to the G12A and
> so far the differences don't matter. Adding the G12B compatible
> makes USB work on the Odroid-N2.
Indeed I forgot this when syncing with linux DTB,
Applying and sending right
On 28.08.19 08:37, Weijie Gao wrote:
All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which
support baudrate up to 921600.
The high-speed UART is compatible with ns16550 when baudrate <= 115200.
Add compatible string to dtsi file so u-boot can use it when serial_mtk
driver is
On 28.08.19 08:37, Weijie Gao wrote:
The UART of MT7628 has fixed 40MHz input clock so there is no need to put
clock-frequency in every dts files. Just put it into the common dtsi file.
Signed-off-by: Weijie Gao
Reviewed-by: Stefan Roese
Thanks,
Stefan
This patch adds pinctrl driver, clock gate driver and reset controller
support for defconfig files of mtmips boards.
Signed-off-by: Weijie Gao
---
configs/gardena-smart-gateway-mt7688_defconfig | 6 ++
configs/linkit-smart-7688_defconfig| 6 ++
2 files changed, 12
This patch adds a dts property cd-active-high for builtin-cd mode to make
it configurable instead of using hardcoded active-low.
Signed-off-by: Weijie Gao
---
drivers/mmc/mtk-sd.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/mtk-sd.c
This patch removes hardcoded gpio settings as they have been replaced by
pinctrl in dts, and also replaces regmap-based phy reset with a more
generic reset controller.
Signed-off-by: Weijie Gao
---
drivers/net/mt7628-eth.c | 45 +++-
1 file changed, 8
This patch adds clock gating driver for MediaTek MIPS platform
Signed-off-by: Weijie Gao
---
drivers/clk/Kconfig | 8
drivers/clk/Makefile | 1 +
drivers/clk/clk-mtmips-cg.c | 63
include/dt-bindings/clk/mt7628-clk.h
This adds default pinctrl (dual SPI chip select) for gardena smart gateway
Signed-off-by: Weijie Gao
---
arch/mips/dts/gardena-smart-gateway-mt7688.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/dts/gardena-smart-gateway-mt7688.dts
This patch changes all defconfig files of mtmips to use mtk high-speed
uart driver.
This driver is compatible with ns16550a when baudrate <= 115200.
Signed-off-by: Weijie Gao
---
configs/gardena-smart-gateway-mt7688-ram_defconfig | 2 +-
configs/gardena-smart-gateway-mt7688_defconfig | 2
This patch adds a referenceable name to eth node, and adds default pinctrl
for all boards.
There are two pinctrl nodes used for two scenarios:
ephy_iot_mode- for IOT boards which have only one port (PHY0)
ephy_router_mode - For routers which have more than one ports
Signed-off-by: Weijie Gao
This patch add support for mt7628-eth to isolate LAN/WAN ports mainly to
prevent LAN devices from getting IP address from WAN.
Signed-off-by: Weijie Gao
---
drivers/net/mt7628-eth.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/net/mt7628-eth.c
When received a packet with an invalid length recorded in rx descriptor,
we should free this rx descriptor to allow us to continue to receive
following packets.
Without doing so, u-boot will stuck in a dead loop trying to process this
invalid rx descriptor.
This patch adds a call to
The mt7628 has an embedded ethernet switch (5 phy ports + 1 cpu port).
Although in IOT mode only port0 is usable, the phy0 is still connected
to the switch, not the ethernet gmac directly.
This patch removes these codes as we should not check only the status of
phy0 because phy0 may not be linked
This patch adds non-DM version for mtk hsuart driver and makes it
compatible with ns16550a driver in configuration.
This is needed in SPL with CONFIG_SPL_DM disabled for reducing size.
Signed-off-by: Weijie Gao
---
drivers/serial/serial.c | 2 +
drivers/serial/serial_mtk.c | 202
This patch adds default p0led status for all boards.
Signed-off-by: Weijie Gao
---
arch/mips/dts/gardena-smart-gateway-mt7688.dts | 9 +
arch/mips/dts/linkit-smart-7688.dts| 9 +
2 files changed, 18 insertions(+)
diff --git
This patch adds slew rate calibration for mt76x8-usb-phy, removes code
which belongs to mt7620, and gets rid of using syscon and regmap by using
clock driver and reset controller.
Signed-off-by: Weijie Gao
---
drivers/phy/Kconfig | 2 +
drivers/phy/mt76x8-usb-phy.c | 225
This patch adds reset controller driver for MediaTek MIPS platform and
header file for mt7628.
Signed-off-by: Weijie Gao
---
drivers/reset/Kconfig| 7 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-mtmips.c | 82
This patch adds pinctrl node with default pin state for mt7628an.dtsi.
Signed-off-by: Weijie Gao
---
arch/mips/dts/mt7628a.dtsi | 150 +
1 file changed, 150 insertions(+)
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index
Currently this driver uses a different way to implement the spi xfer,
by modifying some fields of two registers, which is incompatible with the
MTK's original SDK linux driver. This will cause the flash data being
damaged by the SDK driver.
This patch lets the mt7621_spi_set_cs() restore the
This patch adds mmc support for MediaTek MT7620/MT7628 SoCs.
Signed-off-by: Weijie Gao
---
drivers/mmc/Kconfig | 2 +-
drivers/mmc/mtk-sd.c | 23 ---
2 files changed, 21 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index
This patch adds pinctrl support for mt7628, with a file for common pinmux
functions and a file for mt7628 which has additional support for pinconf.
Signed-off-by: Weijie Gao
---
drivers/pinctrl/Kconfig | 1 +
drivers/pinctrl/Makefile | 1 +
This patch series have the following changes:
- Add pinctrl(both pinmux and pinconf) driver, reset controller driver and
clock gating driver for mt7628.
- Add mt7628 platform to mtk-sd driver.
- Modify mt7628's ethernet & usb phy driver to take advantages from the new
drivers.
- Update
This patch adds mmc related nodes for mt7628an.dtsi
Signed-off-by: Weijie Gao
---
arch/mips/dts/mt7628a.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index dd11cac28c..929397c729 100644
---
This patch updates reset controller node for mt7628
Signed-off-by: Weijie Gao
---
arch/mips/dts/mt7628a.dtsi | 36
1 file changed, 24 insertions(+), 12 deletions(-)
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index
The mt7621 spi controller supports continuous generic half-duplex spi
transaction. There is no need to cache xfer data at all.
To achieve this goal, the OPADDR register must be used as the first data
to be sent. And follows the eight generic DIDO registers. But one thing
different between OPADDR
The UART of MT7628 has fixed 40MHz input clock so there is no need to put
clock-frequency in every dts files. Just put it into the common dtsi file.
Signed-off-by: Weijie Gao
---
arch/mips/dts/gardena-smart-gateway-mt7688.dts | 1 -
arch/mips/dts/linkit-smart-7688.dts| 1 -
This patch adds default pinctrl for uart nodes
Signed-off-by: Weijie Gao
---
arch/mips/dts/mt7628a.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index be9ab50931..f07de1b611 100644
--- a/arch/mips/dts/mt7628a.dtsi
+++
This patch adds clkgate node for mt7628 and adds clock gate property for
usb phy node.
Signed-off-by: Weijie Gao
---
arch/mips/dts/mt7628a.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index 0e2b6598ea..dd11cac28c
All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which
support baudrate up to 921600.
The high-speed UART is compatible with ns16550 when baudrate <= 115200.
Add compatible string to dtsi file so u-boot can use it when serial_mtk
driver is built in.
Signed-off-by: Weijie Gao
This patch adds codes to enable FIFO and disable flow control taken from
ns16550 driver.
Signed-off-by: Weijie Gao
---
drivers/serial/serial_mtk.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/serial/serial_mtk.c b/drivers/serial/serial_mtk.c
index
Hi Jean,
>
> Hi Marek, Sherry,
>
>
> we keep the cdns3 node for usb gadget driver, then add a usb host
> node for
> xhci-imx8 driver in *-uboot.dtsi. so here is no need to change the
> host driver
> >>> compatible.
> But the compatible in gadget driver should be changed
Hi Sagar,
On Wed, Aug 28, 2019 at 1:46 PM Sagar Kadam wrote:
>
> Hello Bin,
>
> On Tue, Aug 27, 2019 at 3:48 AM Bin Meng wrote:
> >
> > On Wed, Aug 14, 2019 at 1:08 AM Sagar Shrikant Kadam
> > wrote:
> > >
> > > This patch series adds support for 32MiB SPI-NOR flash (is25wp256 from
> > >
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