Hi Bin
>
> Hi Rick,
>
> On Fri, Oct 25, 2019 at 2:18 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > It will work fine due to hart 0 always will be main
> > hart coincidentally. When develop SPL flow, I try to
> > force other harts to be main hart. And it will go
> > wrong in sending IPI flow.
Hi Bin
Bin Meng 於 2019年10月29日 週二 下午10:42寫道：
>
> Hi Rick,
>
> On Fri, Oct 25, 2019 at 2:17 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > To get memory size from device tree instead of
> > get_ram_size(). This can avoid memory access fault
>
> Could you please explain a little more about why
Hi Bin
> Hi Rick,
>
> On Fri, Oct 25, 2019 at 2:17 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > This patch provides four configurations
> > which can support U-Boot SPL to boot from
> > RAM or FLASH and then boot FIT image
> > including OpenSBI FW_DYNAMIC firmware
> > and U-Boot proper
Hi Robert,
On Wed, 23 Oct 2019 at 12:22, Robert Beckett wrote:
>
> Some devices (2 wire eeproms for example) use some bits from the chip
> address to represent the high bits of the offset instead of or as well
> as using multiple bytes for the offset, effectively stealing chip
> addresses on the
On Wed, 2 Oct 2019 at 06:47, Jean-Jacques Hiblot wrote:
>
> This adds a driver for mmio-based syscon multiplexers controlled by
> bitfields in a syscon register range.
> This is heavily based on the linux mmio-mux driver.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
>
> drivers/mux/Kconfig |
On Tue, 29 Oct 2019 at 11:29, Philippe Reynes
wrote:
>
> Until now, we only support aes128. This commit add the support
> of aes192 and aes256.
>
> Signed-off-by: Philippe Reynes
> ---
> cmd/aes.c | 38 +-
> include/uboot_aes.h | 34 +++
>
Hi Rayees,
On Wed, 23 Oct 2019 at 18:51, Rayees Shamsuddin
wrote:
>
> Hi Simon,
>
> I got the ramdisk loading problem sorted out by modifying values of
> initrd_high and fdt_high
> setenv initrd_high 82F4EFFF; setenv fdt_high 824F
>
> This resulted in:
>ramdisk load start = 0x82a0,
Hi Jean-Jacques,
On Wed, 2 Oct 2019 at 06:47, Jean-Jacques Hiblot wrote:
>
> This will probe the multiplexer devices that have a "u-boot,mux-autoprobe"
> property. As a consequence they will be put in their idle state.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
>
> common/board_r.c | 2 ++
>
On Mon, 30 Sep 2019 at 06:29, Jean-Jacques Hiblot wrote:
>
> Make sure that the clock self-assignment works by having a clock of
> clk-sbox be configured automatically when clk-sbox is probed.
>
> Signed-off-by: Jean-Jacques Hiblot
>
> ---
>
> arch/sandbox/dts/test.dts | 2 ++
>
Hi Jean-Jacques,
On Mon, 30 Sep 2019 at 06:29, Jean-Jacques Hiblot wrote:
>
> This fixes the case where assigned-clocks is used to define a clock
> defaults inside this same clock's node. This is used sometimes to setup a
> default parents and/or rate for a clock.
>
> example:
> muxed_clock:
Hi Jean-Jacques,
On Mon, 30 Sep 2019 at 08:31, Jean-Jacques Hiblot wrote:
>
> Prepare the way for a managed reset API by handling NULL pointers without
> crashing nor failing.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
>
> drivers/reset/reset-uclass.c | 30 +-
> 1
On Sat, 26 Oct 2019 at 15:17, Heinrich Schuchardt wrote:
>
> Compiling arch/sandbox/cpu/os.c results in an error
>
> ../arch/sandbox/cpu/os.c: In function ‘os_find_text_base’:
> ../arch/sandbox/cpu/os.c:823:12: error: cast to pointer from
> integer of different size [-Werror=int-to-pointer-cast]
Hi Jean-Jacques,
On Wed, 2 Oct 2019 at 06:47, Jean-Jacques Hiblot wrote:
>
> Add a new subsystem that handles multiplexer controllers. The API is the
> same as in Linux.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
>
> drivers/Kconfig | 2 +
> drivers/Makefile |
Hi Kever,
On Tue, 22 Oct 2019 at 03:45, Kever Yang wrote:
>
> Add Jagan.
>
> Hi Simon,
>
>
> On 2019/10/22 上午7:46, Simon Glass wrote:
> > Hi,
> >
> > On Mon, 14 Oct 2019 at 03:07, Kever Yang wrote:
> >>
> >> On 2019/10/7 上午2:10, Heiko Stuebner wrote:
> >>> A trusted execution environment should
Hi Stuart,
On Mon, 28 Oct 2019 at 17:27, Stuart Yoder wrote:
>
> I saw Simon's write-up here: https://lwn.net/Articles/571031/, which
> references TPM
> and trusted boot support using the TPM.
>
> I've started looking at the TPM support code in u-boot, and am trying
> to understand
> it. Before
On Tue, 29 Oct 2019 at 11:29, Philippe Reynes
wrote:
>
> This commit update tge driver crypto for tegra20
> to use the new aes api.
>
> Signed-off-by: Philippe Reynes
> ---
> arch/arm/mach-tegra/tegra20/crypto.c | 41
> +++-
> 1 file changed, 22 insertions(+),
Hi Philippe,
On Tue, 29 Oct 2019 at 11:29, Philippe Reynes
wrote:
>
> This commit update the aes tests to check the
> aes192 and aes256.
>
> Signed-off-by: Philippe Reynes
> ---
> test/py/tests/test_aes.py | 118
> +++---
> 1 file changed, 91
Hi Fabien,
On Tue, 22 Oct 2019 at 03:08, Fabien DESSENNE wrote:
>
> Hi Simon,
>
>
> On 22/10/2019 1:47 AM, Simon Glass wrote:
> > Hi Fabien,
> >
> > On Wed, 9 Oct 2019 at 09:36, Fabien Dessenne wrote:
> >> Add rproc_elf_load_rsc_table(), which searches for a resource table in
> >> an
Hi Michal,
On Thu, 24 Oct 2019 at 00:51, Michal Simek wrote:
>
> On 22. 10. 19 17:54, Stephen Warren wrote:
> > On 10/21/19 5:46 PM, Simon Glass wrote:
> >> Hi Stephen,
> >>
> >> On Mon, 21 Oct 2019 at 17:04, Stephen Warren
> >> wrote:
> >>>
> >>> On 10/21/19 4:53 PM, Simon Glass wrote:
>
On Fri, 27 Sep 2019 at 07:22, Jean-Jacques Hiblot wrote:
>
> Mask the value to write so that it cannot affect the bits outside of the
> mask
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
>
> drivers/core/regmap.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass
On Sun, 27 Oct 2019 at 10:55, Anatolij Gustschin wrote:
>
> s/Subprocress/Subprocess/
> s/easiler/easier/
> s/repositiory/repository/
> s/rangem/range/
> s/Retruns/Returns/
>
> Signed-off-by: Anatolij Gustschin
> ---
> tools/patman/cros_subprocess.py | 4 ++--
> tools/patman/gitutil.py
On Mon, 30 Sep 2019 at 10:15, Jean-Jacques Hiblot wrote:
>
> Add managed functions to get a reset_ctl from the device-tree, based on a
> name or an index.
> Also add a managed functions to get a reset_ctl_bulk (array of reset_ctl)
> from the device-tree.
>
> When the device is unbound, the reset
On Mon, 30 Sep 2019 at 06:29, Jean-Jacques Hiblot wrote:
>
> Add a few more clocks the clk_sandbox clock provider and get them using
> the managed API.
> Make sure they are released when the device is removed.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
>
> arch/sandbox/dts/test.dts | 6
On Tue, 22 Oct 2019 at 13:04, Heiko Stuebner wrote:
>
> From: Heiko Stuebner
>
> The phandlep pointer returning the phandle to the caller is optional
> and if it is not set when calling fdtdec_add_reserved_memory() it is
> highly likely that the caller is not interested in a phandle to the
>
On Fri, 27 Sep 2019 at 07:22, Jean-Jacques Hiblot wrote:
>
> The tests rely on a dummy driver to allocate and initialize the regmap
> and the regmap fields using the managed API.
> The first test checks that the read/write callbacks are used.
> The second test checks if regmap fields behave
On Mon, 30 Sep 2019 at 06:29, Jean-Jacques Hiblot wrote:
>
> Add devm_clk_get(), devm_clk_get_optional() to get clocks from the
> device-tree. The clocks is automatically released and the data structure
> freed when the device is unbound.
> Also add devm_clk_put() to release the clock and free
On Wed, 23 Oct 2019 at 07:45, Patrick Delaunay wrote:
>
> Add functions to iterate on all property with livetree
> - ofnode_get_first_property
> - ofnode_get_next_property
> - ofnode_get_property_by_prop
>
> For example:
> for (prop = ofnode_get_first_property(dev_ofnode(dev));
> prop;
>
Hi Jean-Jacques,
On Fri, 27 Sep 2019 at 07:22, Jean-Jacques Hiblot wrote:
>
> Most of new linux drivers are using managed-API to allocate resources. To
> ease porting drivers from linux to u-boot, introduce devm_regmap_init() as
U-Boot
Please always spell it that way.
> a managed API to get a
Hi AKASHI,
> > > >
> > > > There is precedent for this. It's just that I'm not sure the code is
> > > > complicated enough to worry about keeping the comment-free
> > > > single-char-variable style?
> > > >
> > > > +Tom Rini I assume you are OK with this?
> > >
> > > When we import code from
On Tue, 22 Oct 2019 at 13:04, Heiko Stuebner wrote:
>
> From: Heiko Stuebner
>
> OP-TEE can get supplied with a devicetree and will then insert
> its firmware node and reserved-memory sections into it.
> As this devicetree often is not the one supplied to a later
> loaded kernel, a previous
Hi Patrick,
On Wed, 23 Oct 2019 at 07:45, Patrick Delaunay wrote:
>
> Convert 'pinctrl-single' using livetree functions
> - ofnode_get_property
> - ofnode_read_u32_default
> - ofnode_read_u32_array
> - ofnode_read_bool
> - dev_read_addr
> and get rid of DECLARE_GLOBAL_DATA_PTR.
>
>
Hi Patrick,
On Wed, 23 Oct 2019 at 07:45, Patrick Delaunay wrote:
>
> Migrate pinctrl-generic to livetree:
> - ofnode_get_first_property
> - ofnode_get_next_property
> - ofnode_get_property_by_prop
> - ofnode_read_string_count
> - ofnode_read_string_index
> and get rid of
On Tue, 22 Oct 2019 at 08:50, Walter Lozano wrote:
>
> As initially this feature was implemented as a negative CONFIG and
> later it was redesigned to be positive the help text should be
> updated to reflect this change.
>
> This commit updates the help text to match the current implementation.
>
On Tue, 29 Oct 2019 at 11:29, Philippe Reynes
wrote:
>
> In the code, we use the size of the key for the
> size of the block. It's true when the key is 128 bits,
> but it become false for key of 192 bits and 256 bits.
> So to prepare the support of aes192 and 256,
> we introduce a constant for
Hi Heinrich,
On Fri, 25 Oct 2019 at 04:15, Heinrich Schuchardt wrote:
>
> The ext4 file system requires log2blksz to be set. So when setting the
> block size on the block descriptor we should fill this field too.
>
> This fixes a problem with EFI block devices providing ext4 partitions, cf.
>
On Wed, 23 Oct 2019 at 07:45, Patrick Delaunay wrote:
>
> Add test for "pins" configuration in gpio uclass with set_state() ops
> and test for generic parsing of pinconf_param array).
>
> set_state() is called by:
> - pinctrl_generic_set_state
> |- pinctrl_generic_set_state_subnode
>
>
On Fri, 27 Sep 2019 at 07:22, Jean-Jacques Hiblot wrote:
>
> A regmap field is an abstraction available in Linux. It provides to access
> bitfields in a regmap without having to worry about shifts and masks.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
>
> drivers/core/regmap.c | 77
Hi Lang,
On Tue, 22 Oct 2019 at 20:23, Lang Yu wrote:
>
> Hi, sjg,
>
>
>
> I'm YuLang, a software engineer in Hesai Tech. I really appreciate your
> contribution to secure boot. But I'm confused with your explanation about
> signature with FIT image in
Hi Jean-Jacques,
On Fri, 27 Sep 2019 at 07:22, Jean-Jacques Hiblot wrote:
>
> Some linux drivers provide their own read/write functions to access data
> from/of the regmap. Adding support for it.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
>
> drivers/core/regmap.c | 12
>
On Wed, 23 Oct 2019 at 07:45, Patrick Delaunay wrote:
>
> Add param information in pin information output.
> This update prepare unitary test for pin configuration
> in pinctrl node.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> drivers/pinctrl/pinctrl-sandbox.c | 30
On Tue, 22 Oct 2019 at 13:04, Heiko Stuebner wrote:
>
> From: Heiko Stuebner
>
> The change adding fdtdec_add_reserved_memory() already protected the added
> phandle against the phandlep being NULL - making the phandlep var optional.
>
> But in the early code checking for an already existing
On Wed, 23 Oct 2019 at 07:45, Patrick Delaunay wrote:
>
> Cleanup binding support, use the generic binding by default
> (test u-class gpio_xlate_offs_flags function) and add
> specific binding for added value.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/sandbox/dts/test.dts
Hi Jean-Jacques,
On Mon, 30 Sep 2019 at 06:29, Jean-Jacques Hiblot wrote:
>
> Prepare the way for a managed CLK API by handling NULL pointers without
> crashing nor failing.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
>
> drivers/clk/clk-uclass.c | 43 +---
Hi Patrick,
On Wed, 23 Oct 2019 at 07:45, Patrick Delaunay wrote:
>
> This commit manages the flags that can be used in GPIO specifiers to
> indicate if a pull-up resistor or pull-down resistor should be
> enabled for output GPIO and the Open Drain/Open Source configuration
> for input GPIO.
>
>
On Wed, 23 Oct 2019 at 07:45, Patrick Delaunay wrote:
>
> Add a simple pincontrol associated to the sandbox gpio driver,
> that allow to check pin configuration check with the
> command pinmux.
>
> The pinux test is also updated to test behavior with 2 pincontrols.
>
> Example to check LED pin
On Wed, 23 Oct 2019 at 07:45, Patrick Delaunay wrote:
>
> Replace the GPIOF_ defines of gpio UCLASS (they are not bitfields but
> enum gpio_func_t = State of a GPIO, as reported by get_function())
> by GPIO_FLAG to access to the bitfield 'flags' of struct gpio_state.
>
> This patch avoid
On Wed, 23 Oct 2019 at 07:44, Patrick Delaunay wrote:
>
> Remove the pinctrl_decode_pin_config() API, because this
> function is unused and not compatible with livetree
> (it uses fdtdec_get_bool instead of ofnode API).
>
> Signed-off-by: Patrick Delaunay
> ---
>
>
Hi Sam,
On Wed, 23 Oct 2019 at 08:34, Sam Protsenko wrote:
>
> This command can be used to extract fields and image payloads from
> Android Boot Image. It can be used for example to implement boot flow
> where dtb is taken from boot.img (as v2 incorporated dtb inside of
> boot.img). Using this
Hi Tom,
On Thu, 24 Oct 2019 at 19:04, Simon Glass wrote:
>
> Convert buildman to Python 3 and make it use that, to meet the 2020
> deadline.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> tools/buildman/board.py | 7 +--
> tools/buildman/bsettings.py | 20 +++
Hi Bin
>
> Hi Rick,
>
> On Fri, Oct 25, 2019 at 2:17 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > The U-Boot SPL will boot in M mode and load the
> > FIT image which include OpenSbi and U-Boot proper
>
> nits: OpenSBI
OK
>
> > images. After loading progress, it will jump to
> > OpenSbi
Hi Bin,
On Tue, 29 Oct 2019 at 07:56, Bin Meng wrote:
>
> Hi Simon,
>
> On Tue, Oct 29, 2019 at 11:37 AM Simon Glass wrote:
> >
> > Hi Bin,
> >
> > On Mon, 28 Oct 2019 at 08:25, Bin Meng wrote:
> > >
> > > In the 'Make' function, the codes tries to create a directory
> > > if current stage is
Hi Tom,
Test results here:
https://gitlab.denx.de/u-boot/custodians/u-boot-dm/pipelines/1131
The following changes since commit ffc379b42c85466e1dd4c8fee8268801f26d2ab8:
Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mips
(2019-10-25 20:07:24 -0400)
are available in the Git
On 12/10/2019 00:16, Simon Glass wrote:
> This function assumes that the 'val' parameter has no masked bits set.
> This is not defined by the function prototype though. Fix the function to
> mask the value and update the documentation.
>
> Signed-off-by: Simon Glass
> ---
>
>
On Sat, Oct 12, 2019 at 6:28 AM Simon Glass wrote:
>
> Quite a few tests use addresses or hex values for comparisons. Add hex
> output for test failures, e.g.:
>
>0x55ca22fa == reg: Expected 0x55ca22fa (1439310586),
> got 0x55ea22fb (1441407739)
>
> Signed-off-by: Simon Glass
> ---
>
With a bit of code reordering we can support %p using the existing code
for ulong.
Move the %p code up and adjust the logic accordingly.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add a new patch to support %p without DEBUG
lib/tiny-printf.c | 30 +-
1 file
At present bootstage in TPL and SPL use the same ID so it is not possible
to see the timing of each. Separate out the IDs and use the correct one
depending on which phase we are at.
Example output:
Timer summary in microseconds (14 records):
MarkElapsed Stage
0 0
On Sat, Oct 12, 2019 at 6:22 AM Simon Glass wrote:
>
> This function needs a prototype so that tests can use it. Add one.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/sandbox/include/asm/test.h | 11 +++
> 1 file changed, 11 insertions(+)
>
Reviewed-by: Bin Meng
Applied to
On Sat, Oct 12, 2019 at 6:28 AM Simon Glass wrote:
>
> From: Jean-Jacques Hiblot
>
> The test did reads after writes but didn't check the value.
> It probably was because the sandbox didn't implement the writeX/readX
> functions.
>
> Signed-off-by: Jean-Jacques Hiblot
> Updated to use
The current code searches for empty records but these not existing with
bootstage now. This used to be needed when bootstage records were stored
in a spare array.
Drop the unnecessary code and fix a code-style nit at the same time.
Signed-off-by: Simon Glass
---
Changes in v2: None
It is possible to enable bootstage in TPL. TPL can stash the info for SPL.
But at present this information is then lost because SPL does not read
from the stash.
Add support for SPL not being the first phase to enable bootstage.
Signed-off-by: Simon Glass
---
Changes in v2:
- Adjust SPL logic
Make sure that the bloblist starts on an aligned boundary. This protects
against one of the early allocating causing the alignment to be lost.
Signed-off-by: Simon Glass
---
Changes in v2: None
common/board_f.c | 1 +
1 file changed, 1 insertion(+)
Applied to u-boot-dm, thanks!
Hi Simon,
On Sat, Oct 12, 2019 at 6:22 AM Simon Glass wrote:
>
> This function writes to its address so the address should not be declared
> as const. Fix it.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/sandbox/cpu/cpu.c| 3 +--
> arch/sandbox/include/asm/io.h | 11 +--
> 2
At present there is a single shared address for bootstage data in both
TPL and SPL. If SPL unstashs TPL bootstage info and then stashes it again
to pass it to U-Boot, the new stash overwrites the strings of the old
stash.
Fix this by duplicating the strings into the malloc() region. This should
When stashing bootstage info, store the next ID so that it can be used
when the stash is restored. This avoids the ID starting at zero and
potentially overwriting existing entries.
Signed-off-by: Simon Glass
---
Changes in v2: None
common/bootstage.c | 11 +++
1 file changed, 7
At present bootstage relocation assumes that it is possible to point back
to memory available before relocation, so it does not relocate the
strings. However this is not the case on some platforms, such as x86 which
uses the cache as RAM and loses access to this when the cache is enabled.
Move
The ctype array is brought into the image, adding 256 bytes, when it is
unlikely to be needed. The extra code for %p is only present when DEBUG
is defined, so let's drop ctype as well unless DEBUG is defined.
Signed-off-by: Simon Glass
---
Changes in v2: None
lib/tiny-printf.c | 7 +++
1
On 22.10.19 01:26, Simon Glass wrote:
> This function is used in the bootstage report which may be trigged in TPL
> or TPL. Add a very basic implication of this function so that it builds.
> There is no attempt to get the formatting right, since this would add too
> much code size.
>
>
On Mon, 21 Oct 2019 at 21:10, Dmitry Torokhov wrote:
>
> There is a contributor in Linux kernel with a comma in their name, which
> confuses patman and results in invalid to- or cc- addresses on some
> patches. To avoid this, let's use \0 as a separator when generating cc
> file.
>
>
On Tue, 22 Oct 2019 at 02:05, Jean-Jacques Hiblot wrote:
>
> The FDT specification [0] gives a requirement of aligning properties on
> 32-bits. Make sure that the compiler is aware of this constraint when
> accessing 64-bits properties.
>
> [0]:
>
On Tue, 22 Oct 2019 at 01:40, Kever Yang wrote:
>
> Use log() insted of debug() for uclass_find_device_by_seq function,
> since this print is very much and we can filter it out with log()
> interface.
>
> Signed-off-by: Kever Yang
> ---
>
> Changes in v2:
> - use log_debug() instead of log()
>
>
From: Suneel Garapati
Adds support for MMC controllers found on OcteonTX or
OcteonTX2 SoC platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Suneel Garapati
---
drivers/mmc/Kconfig |9 +
drivers/mmc/Makefile |1 +
drivers/mmc/octeontx_hsmmc.c | 3233
From: Suneel Garapati
Adds support for Core 0 poke on OcteonTX and OcteonTX2
platforms.
Signed-off-by: Suneel Garapati
---
drivers/watchdog/Kconfig| 10 +
drivers/watchdog/Makefile | 1 +
drivers/watchdog/octeontx_wdt.c | 76 +
3 files
Thanks Tim, sent the series.
Regards,
Suneel
On Tue, Oct 29, 2019 at 12:11 PM Tim Harvey wrote:
>
> On Sun, Oct 27, 2019 at 10:34 PM Suneel Garapati
> wrote:
> >
> > Hi Matthias,
> >
> > Thanks for your patience. Sorry for the delay.
> >
> > I will post the patch-set tomorrow.
> >
>
> Suneel,
From: Suneel Garapati
Adds support for I2C controllers found on OcteonTX or
OcteonTX2 SoC platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Suneel Garapati
---
drivers/i2c/Kconfig| 7 +
drivers/i2c/Makefile | 1 +
drivers/i2c/octeontx_i2c.c | 968
From: Suneel Garapati
This patch adds support for all OcteonTX 81xx/83xx
boards from Marvell.
For 81xx boards, use octeontx_81xx_defconfig and
for 83xx boards, use octeontx_83xx_defconfig.
Signed-off-by: Suneel Garapati
---
arch/arm/Kconfig | 9 +
arch/arm/Makefile
From: Suneel Garapati
For SATA controller found on OcteonTX SoC's, use
non-standard PCI BAR0 instead of BAR5.
Signed-off-by: Suneel Garapati
---
drivers/ata/ahci.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 5f929700c0..f8fd2043e3
From: Suneel Garapati
After check for maximum between max id and available ports, also check
if available port count is less than max id and update.
Signed-off-by: Suneel Garapati
---
drivers/ata/ahci.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/ata/ahci.c
From: Suneel Garapati
For platforms that support 64bit physical address, fill upper 32bit
of buffer address in scatter-gather descriptor. This is needed for
platforms with more than 4GB DRAM.
Signed-off-by: Suneel Garapati
---
drivers/ata/ahci.c | 5 +
1 file changed, 5 insertions(+)
From: Suneel Garapati
This patch adds support for all OcteonTX2 96xx/95xx
boards from Marvell.
For 96xx boards, use octeontx_96xx_defconfig and
for 95xx boards, use octeontx_95xx_defconfig.
Signed-off-by: Suneel Garapati
---
arch/arm/Kconfig| 13 ++
arch/arm/Makefile
From: Suneel Garapati
Makes dm_pci_map_bar API available for Virtual function PCI devices
based on SR-IOV capability which support Enhanced Allocation.
Signed-off-by: Suneel Garapati
---
drivers/pci/pci-uclass.c | 46 +++-
include/pci.h| 3 +++
From: Suneel Garapati
Adds support for NAND controllers found on OcteonTX or
OcteonTX2 SoC platforms. Also includes driver to support
Hardware ECC using BCH HW engine found on these platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Suneel Garapati
---
drivers/mtd/nand/raw/Kconfig
From: Suneel Garapati
For platforms with multiple slot support like OcteonTX,
this is invoked per slot.
Signed-off-by: Suneel Garapati
---
drivers/mmc/mmc.c | 2 +-
include/mmc.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
From: Suneel Garapati
Adds support for SPI controllers found on OcteonTX or
OcteonTX2 SoC platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Suneel Garapati
---
drivers/spi/Kconfig| 6 +
drivers/spi/Makefile | 1 +
drivers/spi/octeontx_spi.c | 750
From: Suneel Garapati
Adds support for PCI ECAM/PEM controllers found on OcteonTX
or OcteonTX2 SoC platforms.
Signed-off-by: Suneel Garapati
---
drivers/pci/Kconfig| 8 +
drivers/pci/Makefile | 1 +
drivers/pci/pci_octeontx.c | 538 +
3
From: Suneel Garapati
Adds support for GPIO controllers found on OcteonTX or
OcteonTX2 SoC platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Suneel Garapati
---
drivers/gpio/Kconfig | 7 ++
drivers/gpio/Makefile| 1 +
drivers/gpio/octeontx_gpio.c | 218
From: Suneel Garapati
Signed-off-by: Suneel Garapati
---
arch/arm/include/asm/arch-octeontx/board.h| 121 ++
arch/arm/include/asm/arch-octeontx/clock.h| 25 +
.../asm/arch-octeontx/csrs/csrs-mio_emm.h | 1193 +
.../include/asm/arch-octeontx/csrs/csrs-xcv.h | 428
From: Suneel Garapati
If ARI capability is found on device, use it to update next function
number in bus scan and also helps to skip unnecessary bdf scans.
Signed-off-by: Suneel Garapati
---
drivers/pci/pci-uclass.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
From: Suneel Garapati
Signed-off-by: Suneel Garapati
---
arch/arm/include/asm/io.h | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 723f3cf497..e87887c631 100644
--- a/arch/arm/include/asm/io.h
+++
From: Suneel Garapati
If Enhanced Allocation capability is present in bridges, use it
to read the fixed sub-ordinate bus number.
Signed-off-by: Suneel Garapati
---
drivers/pci/pci-uclass.c | 25 +++--
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git
From: Suneel Garapati
Enable PCI memory regions to be of multiple entry. This helps to
add support for SoC's like OcteonTX/TX2 where every peripheral is
on PCI bus.
Signed-off-by: Suneel Garapati
---
drivers/pci/Kconfig | 9 +
drivers/pci/pci-uclass.c | 2 ++
2 files changed, 11
From: Suneel Garapati
Add DM support to dallas 1337 RTC driver.
Signed-off-by: Suneel Garapati
---
drivers/rtc/Kconfig | 7 ++
drivers/rtc/ds1337.c | 170 +++
2 files changed, 177 insertions(+)
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
From: Suneel Garapati
If SR-IOV capability is present, use it to initialize Virtual function
(VF) PCI device instances. pci_sriov_init function will read SR-IOV
registers to create VF devices under the PF PCI device and also bind
driver if available. This function needs to be invoked from
From: Suneel Garapati
Add fdtdec_get_pci_bus_range to read bus-range property
values.
Signed-off-by: Suneel Garapati
---
include/fdtdec.h | 12
lib/fdtdec.c | 16
2 files changed, 28 insertions(+)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index
From: Suneel Garapati
Increase MAX_PCI_REGIONS limit from 7 to 10. For some SoC's
like OcteonTX/TX2 where everything is on PCI bus there is
need for extra entries to support required peripherals.
Signed-off-by: Suneel Garapati
---
include/pci.h | 2 +-
1 file changed, 1 insertion(+), 1
From: Suneel Garapati
Minor spelling correction.
Signed-off-by: Suneel Garapati
---
drivers/pci/pci-uclass.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 896cb6b23a..848ac5a65e 100644
---
From: Suneel Garapati
Parse subnode DT properties only if parent node is valid.
Otherwise, assert is triggered on ofnode_valid in ofnode_first_subnode
from dev_for_each_subnode.
Signed-off-by: Suneel Garapati
---
drivers/pci/pci-uclass.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
From: Suneel Garapati
Signed-off-by: Suneel Garapati
---
include/pci_ids.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/pci_ids.h b/include/pci_ids.h
index bd59578ccb..f8b4f28996 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -2360,6 +2360,8 @@
#define
This series will add support for OcteonTX and OcteonTX2 processsor based
platforms. The Marvell/Cavium Octeon-TX 64-bit ARM based SoCs include
the CN80XX, CN81XX and CN83XX while Octeon-TX2 64-bit ARM based SoCs include
support for CN96XX and CN95XX.
These SoC's have peripheral drivers based on
On Sun, Oct 27, 2019 at 10:34 PM Suneel Garapati wrote:
>
> Hi Matthias,
>
> Thanks for your patience. Sorry for the delay.
>
> I will post the patch-set tomorrow.
>
Suneel,
I haven't seen anything yet but I'm happy to test this on our Newport
boards running on CN8020/CN8030. We've been waiting
Add compatible string used by Linux.
Allows for simpler syncing of device trees.
Signed-off-by: Robert Beckett
---
drivers/rtc/rx8010sj.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/rtc/rx8010sj.c b/drivers/rtc/rx8010sj.c
index 2876692a37..82c5185e2e 100644
---
1 - 100 of 147 matches
Mail list logo
