Hi Bin > Hi Rick, > > On Fri, Oct 25, 2019 at 2:17 PM Andes <[email protected]> wrote: > > > > From: Rick Chen <[email protected]> > > > > This patch provides four configurations > > which can support U-Boot SPL to boot from > > RAM or FLASH and then boot FIT image > > including OpenSBI FW_DYNAMIC firmware > > and U-Boot proper images from RAM or > > MMC boot devices. > > > > With ae350_rv[32|64]_spl_defconfigs: > > > > U-Boot SPL will be loaded by gdb or FSBL > > and runs in RAM in machine mode and then > > load FIT image from RAM device on AE350. > > > > With ae350_rv[32|64]_spl_xip_defconfigs: > > > > U-Boot SPL can be burned into SPI flash > > and run in flash in machine mode and then > > load FIT image from SPI flash or MMC device > > on AE350. > > > > Could you please rewrite the commit message so that every line has > about 70 characters?
OK. I will rewrite it. > > > Signed-off-by: Rick Chen <[email protected]> > > Cc: KC Lin <[email protected]> > > Cc: Alan Kao <[email protected]> > > --- > > board/AndesTech/ax25-ae350/Kconfig | 10 +++++++++ > > board/AndesTech/ax25-ae350/MAINTAINERS | 4 ++++ > > board/AndesTech/ax25-ae350/ax25-ae350.c | 27 ++++++++++++++++++++++ > > configs/ae350_rv32_spl_defconfig | 37 ++++++++++++++++++++++++++++++ > > configs/ae350_rv32_spl_xip_defconfig | 39 > > ++++++++++++++++++++++++++++++++ > > configs/ae350_rv64_spl_defconfig | 38 > > +++++++++++++++++++++++++++++++ > > configs/ae350_rv64_spl_xip_defconfig | 40 > > +++++++++++++++++++++++++++++++++ > > include/configs/ax25-ae350.h | 17 ++++++++++++++ > > 8 files changed, 212 insertions(+) > > create mode 100644 configs/ae350_rv32_spl_defconfig > > create mode 100644 configs/ae350_rv32_spl_xip_defconfig > > create mode 100644 configs/ae350_rv64_spl_defconfig > > create mode 100644 configs/ae350_rv64_spl_xip_defconfig > > > > diff --git a/board/AndesTech/ax25-ae350/Kconfig > > b/board/AndesTech/ax25-ae350/Kconfig > > index 5e682b6..2e1e2bb 100644 > > --- a/board/AndesTech/ax25-ae350/Kconfig > > +++ b/board/AndesTech/ax25-ae350/Kconfig > > @@ -21,9 +21,19 @@ config ENV_SIZE > > config ENV_OFFSET > > default 0x140000 if ENV_IS_IN_SPI_FLASH > > > > +config SPL_TEXT_BASE > > + default 0x00000000 > > + > > +config SPL_OPENSBI_LOAD_ADDR > > + default 0x01000000 > > + > > config BOARD_SPECIFIC_OPTIONS # dummy > > def_bool y > > select RISCV_NDS > > + select SUPPORT_SPL > > + imply SYS_NS16550 > > Is there any 16550 on the AX25 boards? If not, please remove. If yes, > this should be a separate patch with DTS changes. Yes, it needs SYS_NS16550, but it has been declared in ae350_XXX_defconfig. It is duplicate declaration here. I will remove it. > > > imply SMP > > + imply SPL_RAM_SUPPORT > > + imply SPL_RAM_DEVICE > > > > endif > > diff --git a/board/AndesTech/ax25-ae350/MAINTAINERS > > b/board/AndesTech/ax25-ae350/MAINTAINERS > > index feed5d1..eebee16 100644 > > --- a/board/AndesTech/ax25-ae350/MAINTAINERS > > +++ b/board/AndesTech/ax25-ae350/MAINTAINERS > > @@ -7,3 +7,7 @@ F: configs/ae350_rv32_defconfig > > F: configs/ae350_rv64_defconfig > > F: configs/ae350_rv32_xip_defconfig > > F: configs/ae350_rv64_xip_defconfig > > +F: configs/ae350_rv32_spl_defconfig > > +F: configs/ae350_rv64_spl_defconfig > > +F: configs/ae350_rv32_spl_xip_defconfig > > +F: configs/ae350_rv64_spl_xip_defconfig > > Could you please update the doc/board/AndesTech/ax25-ae350.rst to add > descriptions about all these different configurations of the same > board? OK. I will update doc/board/AndesTech/ax25-ae350.rst. Thanks Rick > > > diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c > > b/board/AndesTech/ax25-ae350/ax25-ae350.c > > index b43eebb..b0164a9 100644 > > --- a/board/AndesTech/ax25-ae350/ax25-ae350.c > > +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c > > @@ -12,6 +12,7 @@ > > #include <faraday/ftsmc020.h> > > #include <fdtdec.h> > > #include <dm.h> > > +#include <spl.h> > > > > DECLARE_GLOBAL_DATA_PTR; > > > > @@ -110,3 +111,29 @@ int board_early_init_f(void) > > return 0; > > } > > #endif > > + > > +#ifdef CONFIG_SPL > > +void board_boot_order(u32 *spl_boot_list) > > +{ > > + u8 i; > > + u32 boot_devices[] = { > > +#ifdef CONFIG_SPL_RAM_SUPPORT > > + BOOT_DEVICE_RAM, > > +#endif > > +#ifdef CONFIG_SPL_MMC_SUPPORT > > + BOOT_DEVICE_MMC1, > > +#endif > > + }; > > + > > + for (i = 0; i < ARRAY_SIZE(boot_devices); i++) > > + spl_boot_list[i] = boot_devices[i]; > > +} > > +#endif > > + > > +#ifdef CONFIG_SPL_LOAD_FIT > > +int board_fit_config_name_match(const char *name) > > +{ > > + /* boot using first FIT config */ > > + return 0; > > +} > > +#endif > > diff --git a/configs/ae350_rv32_spl_defconfig > > b/configs/ae350_rv32_spl_defconfig > > new file mode 100644 > > index 0000000..53055b7 > > --- /dev/null > > +++ b/configs/ae350_rv32_spl_defconfig > > @@ -0,0 +1,37 @@ > > +CONFIG_RISCV=y > > +CONFIG_SPL=y > > +CONFIG_RISCV_SMODE=y > > +CONFIG_SYS_TEXT_BASE=0x01200000 > > +CONFIG_NR_DRAM_BANKS=2 > > +CONFIG_TARGET_AX25_AE350=y > > +CONFIG_DISTRO_DEFAULTS=y > > +CONFIG_FIT=y > > +CONFIG_BOOTDELAY=3 > > +CONFIG_BOARD_EARLY_INIT_F=y > > +CONFIG_SYS_PROMPT="RISC-V # " > > +CONFIG_CMD_IMLS=y > > +CONFIG_CMD_MMC=y > > +CONFIG_CMD_SF=y > > +CONFIG_CMD_SF_TEST=y > > +# CONFIG_CMD_SETEXPR is not set > > +CONFIG_BOOTP_PREFER_SERVERIP=y > > +CONFIG_CMD_CACHE=y > > +CONFIG_OF_PRIOR_STAGE=y > > +CONFIG_ENV_IS_IN_SPI_FLASH=y > > +CONFIG_NET_RANDOM_ETHADDR=y > > +CONFIG_MMC=y > > +CONFIG_FTSDC010=y > > +CONFIG_FTSDC010_SDIO=y > > +CONFIG_MTD_NOR_FLASH=y > > +CONFIG_FLASH_CFI_DRIVER=y > > +CONFIG_CFI_FLASH=y > > +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y > > +CONFIG_SYS_FLASH_CFI=y > > +CONFIG_SPI_FLASH=y > > +CONFIG_SF_DEFAULT_MODE=0x0 > > +CONFIG_SPI_FLASH_MACRONIX=y > > +CONFIG_FTMAC100=y > > +CONFIG_BAUDRATE=38400 > > +CONFIG_SYS_NS16550=y > > +CONFIG_SPI=y > > +CONFIG_ATCSPI200_SPI=y > > diff --git a/configs/ae350_rv32_spl_xip_defconfig > > b/configs/ae350_rv32_spl_xip_defconfig > > new file mode 100644 > > index 0000000..fdbab43 > > --- /dev/null > > +++ b/configs/ae350_rv32_spl_xip_defconfig > > @@ -0,0 +1,39 @@ > > +CONFIG_RISCV=y > > +CONFIG_SPL=y > > +CONFIG_RISCV_SMODE=y > > +CONFIG_SPL_TEXT_BASE=0x80000000 > > +CONFIG_SYS_TEXT_BASE=0x01200000 > > +CONFIG_NR_DRAM_BANKS=2 > > +CONFIG_TARGET_AX25_AE350=y > > +CONFIG_XIP=y > > +CONFIG_DISTRO_DEFAULTS=y > > +CONFIG_FIT=y > > +CONFIG_BOOTDELAY=3 > > +CONFIG_BOARD_EARLY_INIT_F=y > > +CONFIG_SYS_PROMPT="RISC-V # " > > +CONFIG_CMD_IMLS=y > > +CONFIG_CMD_MMC=y > > +CONFIG_CMD_SF=y > > +CONFIG_CMD_SF_TEST=y > > +# CONFIG_CMD_SETEXPR is not set > > +CONFIG_BOOTP_PREFER_SERVERIP=y > > +CONFIG_CMD_CACHE=y > > +CONFIG_OF_BOARD=y > > +CONFIG_ENV_IS_IN_SPI_FLASH=y > > +CONFIG_NET_RANDOM_ETHADDR=y > > +CONFIG_MMC=y > > +CONFIG_FTSDC010=y > > +CONFIG_FTSDC010_SDIO=y > > +CONFIG_MTD_NOR_FLASH=y > > +CONFIG_FLASH_CFI_DRIVER=y > > +CONFIG_CFI_FLASH=y > > +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y > > +CONFIG_SYS_FLASH_CFI=y > > +CONFIG_SPI_FLASH=y > > +CONFIG_SF_DEFAULT_MODE=0x0 > > +CONFIG_SPI_FLASH_MACRONIX=y > > +CONFIG_FTMAC100=y > > +CONFIG_BAUDRATE=38400 > > +CONFIG_SYS_NS16550=y > > +CONFIG_SPI=y > > +CONFIG_ATCSPI200_SPI=y > > diff --git a/configs/ae350_rv64_spl_defconfig > > b/configs/ae350_rv64_spl_defconfig > > new file mode 100644 > > index 0000000..866b9b4 > > --- /dev/null > > +++ b/configs/ae350_rv64_spl_defconfig > > @@ -0,0 +1,38 @@ > > +CONFIG_RISCV=y > > +CONFIG_SPL=y > > +CONFIG_RISCV_SMODE=y > > +CONFIG_SYS_TEXT_BASE=0x01200000 > > +CONFIG_NR_DRAM_BANKS=2 > > +CONFIG_TARGET_AX25_AE350=y > > +CONFIG_ARCH_RV64I=y > > +CONFIG_DISTRO_DEFAULTS=y > > +CONFIG_FIT=y > > +CONFIG_BOOTDELAY=3 > > +CONFIG_BOARD_EARLY_INIT_F=y > > +CONFIG_SYS_PROMPT="RISC-V # " > > +CONFIG_CMD_IMLS=y > > +CONFIG_CMD_MMC=y > > +CONFIG_CMD_SF=y > > +CONFIG_CMD_SF_TEST=y > > +# CONFIG_CMD_SETEXPR is not set > > +CONFIG_BOOTP_PREFER_SERVERIP=y > > +CONFIG_CMD_CACHE=y > > +CONFIG_OF_PRIOR_STAGE=y > > +CONFIG_ENV_IS_IN_SPI_FLASH=y > > +CONFIG_NET_RANDOM_ETHADDR=y > > +CONFIG_MMC=y > > +CONFIG_FTSDC010=y > > +CONFIG_FTSDC010_SDIO=y > > +CONFIG_MTD_NOR_FLASH=y > > +CONFIG_FLASH_CFI_DRIVER=y > > +CONFIG_CFI_FLASH=y > > +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y > > +CONFIG_SYS_FLASH_CFI=y > > +CONFIG_SPI_FLASH=y > > +CONFIG_SF_DEFAULT_MODE=0x0 > > +CONFIG_SPI_FLASH_MACRONIX=y > > +CONFIG_FTMAC100=y > > +CONFIG_BAUDRATE=38400 > > +CONFIG_SYS_NS16550=y > > +CONFIG_SPI=y > > +CONFIG_ATCSPI200_SPI=y > > diff --git a/configs/ae350_rv64_spl_xip_defconfig > > b/configs/ae350_rv64_spl_xip_defconfig > > new file mode 100644 > > index 0000000..271ec21 > > --- /dev/null > > +++ b/configs/ae350_rv64_spl_xip_defconfig > > @@ -0,0 +1,40 @@ > > +CONFIG_RISCV=y > > +CONFIG_SPL=y > > +CONFIG_RISCV_SMODE=y > > +CONFIG_SPL_TEXT_BASE=0x80000000 > > +CONFIG_SYS_TEXT_BASE=0x01200000 > > +CONFIG_NR_DRAM_BANKS=2 > > +CONFIG_TARGET_AX25_AE350=y > > +CONFIG_ARCH_RV64I=y > > +CONFIG_XIP=y > > +CONFIG_DISTRO_DEFAULTS=y > > +CONFIG_FIT=y > > +CONFIG_BOOTDELAY=3 > > +CONFIG_BOARD_EARLY_INIT_F=y > > +CONFIG_SYS_PROMPT="RISC-V # " > > +CONFIG_CMD_IMLS=y > > +CONFIG_CMD_MMC=y > > +CONFIG_CMD_SF=y > > +CONFIG_CMD_SF_TEST=y > > +# CONFIG_CMD_SETEXPR is not set > > +CONFIG_BOOTP_PREFER_SERVERIP=y > > +CONFIG_CMD_CACHE=y > > +CONFIG_OF_BOARD=y > > +CONFIG_ENV_IS_IN_SPI_FLASH=y > > +CONFIG_NET_RANDOM_ETHADDR=y > > +CONFIG_MMC=y > > +CONFIG_FTSDC010=y > > +CONFIG_FTSDC010_SDIO=y > > +CONFIG_MTD_NOR_FLASH=y > > +CONFIG_FLASH_CFI_DRIVER=y > > +CONFIG_CFI_FLASH=y > > +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y > > +CONFIG_SYS_FLASH_CFI=y > > +CONFIG_SPI_FLASH=y > > +CONFIG_SF_DEFAULT_MODE=0x0 > > +CONFIG_SPI_FLASH_MACRONIX=y > > +CONFIG_FTMAC100=y > > +CONFIG_BAUDRATE=38400 > > +CONFIG_SYS_NS16550=y > > +CONFIG_SPI=y > > +CONFIG_ATCSPI200_SPI=y > > diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h > > index a4037f3..ef3864a 100644 > > --- a/include/configs/ax25-ae350.h > > +++ b/include/configs/ax25-ae350.h > > @@ -7,6 +7,23 @@ > > #ifndef __CONFIG_H > > #define __CONFIG_H > > > > +#ifdef CONFIG_SPL > > +#define CONFIG_SPL_MAX_SIZE 0x00100000 > > +#define CONFIG_SPL_BSS_START_ADDR 0x04000000 > > +#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 > > + > > +#ifndef CONFIG_XIP > > +#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x00200000 > > +#else > > +#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80010000 > > +#endif > > + > > +#ifdef CONFIG_SPL_MMC_SUPPORT > > +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 > > +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.itb" > > +#endif > > +#endif > > + > > /* > > * CPU and Board Configuration Options > > */ > > -- > > Regards, > Bin _______________________________________________ U-Boot mailing list [email protected] https://lists.denx.de/listinfo/u-boot
