On Tue, Mar 31, 2020 at 11:15 PM Tom Rini wrote:
>
> On Sat, Mar 28, 2020 at 07:55:37AM +0800, Bin Meng wrote:
> > Hi Tom,
> >
> > On Fri, Mar 27, 2020 at 11:25 PM Tom Rini wrote:
> > >
> > > On Fri, Mar 27, 2020 at 02:05:55PM +0800, Bin Meng wrote:
> > > > Hi Tom,
> > > >
> > > > On Fri, Mar
Hi,
On 3/30/20 2:24 PM, Heinrich Schuchardt wrote:
> Boot partitions of eMMC devices can be power on or permanently write
> protected. Let the 'mmc info' command display the protection state.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> cmd/mmc.c | 24
> 1 file
This adds the PCA9546 4-channel i2c bus switch.
Signed-off-by: Chris Packham
---
U-boot already supports the PCA9646 which is a pin-compatible (and
mostly register compatible) replacement. I still think it's worth making
the distinction and Linux actually supports the 9546 instead of the 9646
so
> Hi Marek,
>
> On Wed, 11 Mar 2020 at 05:55, Marek Vasut wrote:
> >
> > On 3/11/20 12:50 PM, Simon Glass wrote:
> > > Hi,
> >
> > Hi,
> >
> > > On Mon, 9 Mar 2020 at 02:22, wrote:
> > >>
> > >> From: Chee Hong Ang
> > >>
> > >> This commit (82de42fa14682d408da935adfb0f935354c5008f) calls
> >
On Tue, Mar 31, 2020 at 08:05:40AM +0200, Heinrich Schuchardt wrote:
> Enable UEFI variables at runtime.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> lib/efi_loader/efi_runtime.c | 6 +-
> lib/efi_loader/efi_variable.c | 23 +--
> 2 files changed, 22 insertions(+), 7
On Wed, Apr 01, 2020 at 08:57:33AM +0900, AKASHI Takahiro wrote:
> On Tue, Mar 31, 2020 at 03:08:06PM +0200, Heinrich Schuchardt wrote:
> > On 2020-03-31 09:44, AKASHI Takahiro wrote:
> > > On Tue, Mar 31, 2020 at 08:44:02AM +0200, Heinrich Schuchardt wrote:
> > >> On March 31, 2020, 5:28 a.m.
Hi Peter,
On 2020/3/31 下午10:37, Peter Robinson wrote:
On Tue, Mar 31, 2020 at 12:36 PM Lin Jinhan wrote:
CONFIG_RNG_ROCKCHIP/CONFIG_DM_RNG is enabled.
This should be universally available by default on all rk3399 devices
shouldn't it or does it need external regulators or something that is
> Subject: [PATCH 1/1] mmc: adjust Kconfig for mmc sub-commands
>
> All sub-commands of the mmc command should be shown in the Kconfig menu
> next to the mmc command. This includes:
>
> * mmc bkops
> * mmc rpmb
> * mmc swrite
>
> The mmc rpmb sub-command is not usable without
>
On Tue, Mar 31, 2020 at 08:07:39AM +0200, Heinrich Schuchardt wrote:
> As variable services are available at runtime we have to expect EFI_SUCCESS
> when calling the services.
Why not run variables test *after* ExitBootServices as well as
*before* that event?
Then we should have more test cases.
On Tue, Mar 31, 2020 at 10:20:17AM +0200, Mark Kettenis wrote:
> > Date: Tue, 31 Mar 2020 16:44:34 +0900
> > From: AKASHI Takahiro
> >
> > On Tue, Mar 31, 2020 at 08:44:02AM +0200, Heinrich Schuchardt wrote:
> > > On March 31, 2020, 5:28 a.m. UTC Takahiro Akashi wrote:
> > > > On Fri, Mar 27,
-Original Message-
From: Peter Robinson
Sent: Tuesday, March 31, 2020 3:54 AM
To: tomcwarren3...@gmail.com
Cc: u-boot@lists.denx.de; Stephen Warren ; Thierry Reding
; Jonathan Hunter ; Tom Warren
; Vishruth Jain
Subject: Re: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT
-Original Message-
From: Peter Robinson
Sent: Tuesday, March 31, 2020 3:00 AM
To: tomcwarren3...@gmail.com
Cc: u-boot@lists.denx.de; Stephen Warren ; Thierry Reding
; Jonathan Hunter ; Tom Warren
; ja...@amarulasolutions.com
Subject: Re: [PATCH] mtd: spi: Add Macronix MX25U3235F device
On Tue, Mar 31, 2020 at 03:08:06PM +0200, Heinrich Schuchardt wrote:
> On 2020-03-31 09:44, AKASHI Takahiro wrote:
> > On Tue, Mar 31, 2020 at 08:44:02AM +0200, Heinrich Schuchardt wrote:
> >> On March 31, 2020, 5:28 a.m. UTC Takahiro Akashi wrote:
> >>> On Fri, Mar 27, 2020 at 06:27:53AM +0100,
Adjust the DDR configuration dtsi such that they only generate the
DRAM configuration node, the DDR controller node is moved into the
stm32mp157-u-boot.dtsi itself. This permits including multiple DDR
configuration dtsi files in board DT.
Signed-off-by: Marek Vasut
Cc: Manivannan Sadhasivam
Cc:
The AV96 board does exist in multiple variants. To cater for all of
them, implement board code handling. There are two GPIOs which code
the type of the board, read them out and use the value to pick the
correct device tree from an fitImage.
Signed-off-by: Marek Vasut
Cc: Manivannan Sadhasivam
The DHCOR board does exist in multiple variants with different DDR3
DRAM sizes. To cater for all of them, implement DDR3 code handling.
There are two GPIOs which code the DRAM size populated on the SoM,
read them out and use the value to pick the correct DDR3 config.
Signed-off-by: Marek Vasut
Add support for multiple DRAM configuration subnodes, while retaining
the support for a single flat DRAM configuration node. This is useful
on systems which can be manufactured in multiple configurations and
where the DRAM configuration can be determined at runtime.
The code is augmented by a
On Wednesday 01 April 2020 00:35:07 Pali Rohár wrote:
> This patch series contain fixes for Nokia RX-51 board (aka N900).
> After these changes it is possible to run U-Boot in qemu emulator again.
> And U-Boot can boot kernel image from RAM, eMMC or OneNAND memory without
> problem.
But on real
Fix some typos, add information about setup_omap_atag, remove old suff
about ONENAND_SUPPORT and update guide for UBIFS.
Signed-off-by: Pali Rohár
---
doc/README.nokia_rx51 | 32 +++-
1 file changed, 15 insertions(+), 17 deletions(-)
diff --git
This patch contains a script which automatically download and compile all
needed tools to build a simple MTD images for booting Maemo kernel image by
U-Boot from RAM, eMMC and OneNAND. MTD images are then run in virtual n900
machine provided by qemu-linaro project.
It can be used to check that
I'm using a new email address, so reflect this state also in U-Boot.
Signed-off-by: Pali Rohár
---
board/nokia/rx51/MAINTAINERS | 2 +-
board/nokia/rx51/lowlevel_init.S | 2 +-
board/nokia/rx51/rx51.c | 2 +-
board/nokia/rx51/rx51.h | 2 +-
board/nokia/rx51/tag_omap.h
Maximal allowed size of U-Boot binary for Nokia N900 is just 262144 bytes.
Signed-off-by: Pali Rohár
---
configs/nokia_rx51_defconfig | 16
1 file changed, 16 insertions(+)
diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig
index fc92c3affc..41722725e6
Now when code for defining partitions is duplicated at two locations
(option CONFIG_MTDPARTS_DEFAULT in nokia_rx51_defconfig file and macro
OMAP_TAG_PARTITION_CONFIG in rx51.c file) there is no need to have common
macros. Lets inline PART* macros to rx51.c file.
Signed-off-by: Pali Rohár
---
After this change both device display and serial console would contain
U-Boto output automatically without any future configuration. This would
allow easier debugging on real device as access to serial console is hard
and also in qemu emulator where it is easier to copy+paste from serial
console
In commit commit 43ede0bca7fc ("Kconfig: Migrate MTDIDS_DEFAULT /
MTDPARTS_DEFAULT") were removed definitions for onenand partitions.
Revert them back and enable needed options for onenand support.
Signed-off-by: Pali Rohár
---
configs/nokia_rx51_defconfig | 7 +++
In commit commit 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and
CONFIG_PREBOOT to Kconfig") was moved complicated multiline script code
from C header to oneliner in defconfig. After this change multiline to wide
oneliner it is hard to read this code and even harder to debug. Moreover
this script
In commit commit 278b90ce786f ("configs: Migrate CONFIG_SYS_TEXT_BASE") was
moved definition for CONFIG_SYS_TEXT_BASE option but author probably forgot
to move also comment for lines which are moving. So do it now!
Signed-off-by: Pali Rohár
---
board/nokia/rx51/lowlevel_init.S | 9 -
When variable setup_console_atag is unset then read default value from OMAP
atags which passed NOLO bootloader to U-Boot.
This would allow to boot Maemo Linux kernel from U-Boot with serial console
settings configured in NOLO bootloader (which loads U-Boot).
So serial console needs to be enabled
This entry was missing in MAINTAINERS file.
Signed-off-by: Pali Rohár
---
board/nokia/rx51/MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/nokia/rx51/MAINTAINERS b/board/nokia/rx51/MAINTAINERS
index 4cf3dcce2e..f2a712620b 100644
--- a/board/nokia/rx51/MAINTAINERS
+++
This patch series contain fixes for Nokia RX-51 board (aka N900).
After these changes it is possible to run U-Boot in qemu emulator again.
And U-Boot can boot kernel image from RAM, eMMC or OneNAND memory without
problem.
Pali Rohár (11):
Nokia RX-51: Update my email address
Nokia RX-51: Add
I start off with the following build:
$ buildman -o arm926ejs
and it tells me that there are 137 boards to build. At the end I can see:
23 1140 /137
Now I want a summary:
$ buildman -o arm926ejs -s
but all it prints out are the 114 boards that had warnings.
Hi Simon,
-"Simon Glass" schrieb: -
>Betreff: [PATCH v3 20/29] acpi: Add support for DMAR
>
>The DMA Remapping Reporting (DMAR) table contains information about
>DMA
>remapping.
>
>Add a version simple version of this table with only the minimum
>fields
>filled out. i.e. no entries.
>
Hi Simon,
-"Simon Glass" schrieb: -
>Betreff: [PATCH v3 19/29] acpi: Add a central location for table
>version numbers
>
>Each ACPI table has its own version number. Add the version numbers
>in a
>single function so we can keep them consistent and easily see what
>versions are
Hi Simon,
-"Simon Glass" schrieb: -
>An: u-boot@lists.denx.de
>Von: "Simon Glass"
>Datum: 31.03.2020 01:14
>Kopie: "Andy Shevchenko" ,
>"Wolfgang Wallner" , "Leif
>Lindholm" , "Simon Glass"
>Betreff: [PATCH v3 14/29] acpi: Add a binding for ACPI settings in
>the device tree
>
>
On Tue, Mar 31, 2020 at 04:08:59PM +, Alexey Brodkin wrote:
> Hi Tom,
>
> The following changes since commit 93330d4ce416208fe202e304e5a18166c57ac569:
>
> Prepare v2020.04-rc4 (2020-03-30 19:29:27 -0400)
>
> are available in the Git repository at:
>
>
On Wed, Mar 18, 2020 at 07:32:07AM -0700, Bin Meng wrote:
> From: Lihua Zhao
>
> This adds the check against IH_OS_VXWORKS during FIT image load,
> to allow loading FIT image for VxWorks.
>
> Signed-off-by: Lihua Zhao
> Signed-off-by: Bin Meng
> Reviewed-by: Bin Meng
Applied to
On Tue, Feb 11, 2020 at 03:20:25PM +, Rasmus Villemoes wrote:
> Not all boards have the same CSB frequency, nor do every SPI slave
> necessarily support running at 16.7 MHz. So implement ->set_speed;
> that also allows using a smaller PM (i.e., 0) for slaves that do
> support a higher speed.
On Sun, Mar 29, 2020 at 07:26:57PM +, Heinrich Schuchardt wrote:
> %s/a EMMC/an eMMC/g
>
> Signed-off-by: Heinrich Schuchardt
> Reviewed-by: Jaehoon Chung
Applied to u-boot/master, thanks!
--
Tom
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Description: PGP signature
On Tue, Feb 11, 2020 at 03:20:25PM +, Rasmus Villemoes wrote:
> There are a few problems with the current driver.
>
> First, it unconditionally reads from dout/writes to din whether or not
> those pointers are NULL. So for example a simple "sf probe" ends up
> writing four bytes at address
On Thu, Mar 26, 2020 at 03:01:29PM +0100, Michal Simek wrote:
> When MACB_ZYNQ is enabled there is compilation warnings
> drivers/net/macb.c: In function ‘_macb_init’:
> drivers/net/macb.h:675:33: error: ‘MACB_DMACFG’ undeclared (first use in this
> function);
> did you mean ‘MACB_MCF’?
>
On Tue, Feb 11, 2020 at 03:20:22PM +, Rasmus Villemoes wrote:
> From: "Klaus H. Sorensen"
>
> Some SoCs in the mpc83xx family, e.g. mpc8309, have a dedicated spi
> chip select, SPISEL_BOOT, that is used by the boot code to boot from
> flash.
>
> This chip select will typically be used to
On Tue, Feb 11, 2020 at 03:20:24PM +, Rasmus Villemoes wrote:
> Currently, max_cs is write-only; it's just set in
> mpc8xxx_spi_ofdata_to_platdata and not otherwise used.
>
> My mpc8309 was always resetting during an "sf probe 0". It turns out
> dm_gpio_set_dir_flags() was being called with
On Tue, Mar 31, 2020 at 05:24:57AM +0200, Marek Vasut wrote:
> The following changes since commit 93330d4ce416208fe202e304e5a18166c57ac569:
>
> Prepare v2020.04-rc4 (2020-03-30 19:29:27 -0400)
>
> are available in the Git repository at:
>
> git://git.denx.de/u-boot-socfpga.git master
>
>
On Tue, Feb 11, 2020 at 03:20:23PM +, Rasmus Villemoes wrote:
> Prepare for supporting setting different speeds in mpc8xxx_spi.c.
>
> Signed-off-by: Rasmus Villemoes
Applied to u-boot/master, thanks!
--
Tom
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On Tue, Jan 28, 2020 at 12:04:34PM +, Rasmus Villemoes wrote:
> The driver correctly handles reading back the value of an output gpio
> by reading from the shadow register for output, and from gpdat for
> inputs.
>
> Unfortunately, when setting the value of some gpio, we do a RMW cycle
> on
On Mon, Mar 30, 2020 at 04:59:55PM +0200, Marek Vasut wrote:
> The following changes since commit 350c44dfb99017e9147ee07d37a40626bde62250:
>
> Merge branch '2020-03-27-master-imports' (2020-03-27 17:54:38 -0400)
>
> are available in the Git repository at:
>
>
On Tue, Jan 28, 2020 at 12:04:33PM +, Rasmus Villemoes wrote:
> Since some chips don't support reading back the value of output gpios
> from the gpdat register, we should not do a RMW cycle (i.e., the
> clrbits_be32) on the gpdat register when setting a gpio as input, as
> that might
On Tue, Mar 31, 2020 at 08:20:16AM +0200, Heinrich Schuchardt wrote:
> Hello Tom,
>
> this replaces the efi-2020-04-rc4-6 pull request.
>
> I have added another patch for checking OF_CONTROL as a prerequisite for
> a Python test.
>
> Gitlab CI and Travis CI showed no problems:
>
>
On Mon, Mar 30, 2020 at 17:13:05 -0600, Simon Glass wrote:
> It is useful to dump ACPI tables in U-Boot to see what has been generated.
> Add a command to handle this.
>
> To allow the command to find the tables, add a position into the global
> data.
>
> Support subcommands to list and dump the
The PLL4 is supplying SDMMC12, SDMMC3 and SPDIF with 120 MHz and
FDCAN with 96 MHz. This isn't good for the SDMMC interfaces, which
can not easily divide the clock down to e.g. 50 MHz for high speed
SD and eMMC devices, so those devices end up running at 30 MHz as
that is 120 MHz / 4. Adjust the
The AV96 is in fact an assembly of DH Electronics DHCOR SoM on top
of an AV96 reference board. Split the DTs to reflect that and make
sure to DHCOR SoM can be reused on other boards easily.
It is also highly recommended to configure the board for the DHCOM
make stm32mp15_dhcom_basic_defconfig
The core and vdd PMIC buck regulators were misconfigured, which caused
instability of the board and malfunction of high-speed interfaces, like
the RGMII. Configure the PMIC correctly to repair these problems. Also,
model the missing Enpirion EP53A8LQI on the DHCOR SoM as a fixed regulator.
Add PHY reset GPIO on AV96 ethernet PHY.
Signed-off-by: Marek Vasut
Cc: Manivannan Sadhasivam
Cc: Patrick Delaunay
Cc: Patrice Chotard
---
V2: No change
V3: No change
---
arch/arm/dts/stm32mp157a-avenger96.dts | 1 +
1 file changed, 1 insertion(+)
diff --git
The AV96 RGMII uses different pinmux for ETH_RGMII_TXD0, ETH_RGMII_RXD2
and ETH_RGMII_TX_CTL. Use the correct pinmux to make ethernet operational.
Reviewed-by: Patrice Chotard
Reviewed-by: Patrick Delaunay
Signed-off-by: Marek Vasut
Cc: Manivannan Sadhasivam
Cc: Patrick Delaunay
Cc: Patrice
Use DT /aliases node to establish a stable phandle to the configuration
EEPROM. This permits the configuration EEPROM to be moved e.g. to a
different address or a different bus. Adjust the board code to handle
new phandle lookup.
Reviewed-by: Patrice Chotard
Reviewed-by: Patrick Delaunay
The DH Electronics DHCOR SOM has QSPI NOR on the SoM itself, add it
into the DT.
Signed-off-by: Marek Vasut
Cc: Manivannan Sadhasivam
Cc: Patrick Delaunay
Cc: Patrice Chotard
---
V2: Drop the explicit flash type in DT node, use spi-flash
V3: Reduce the SPI NOR window to 2 MiB
---
The board has an EEPROM on the same I2C bus as PMIC, at address 0x53.
The EEPROM contains the board MAC address.
Reviewed-by: Patrice Chotard
Reviewed-by: Patrick Delaunay
Signed-off-by: Marek Vasut
Cc: Manivannan Sadhasivam
Cc: Patrick Delaunay
Cc: Patrice Chotard
---
V2: No change
V3: No
The eMMC uses different pinmux for the top four data lines, use such
a pinmux, otherwise it takes a very long time until the test for 8bit
operation times out. And this is the correct pinmux per schematic too.
Reviewed-by: Patrice Chotard
Reviewed-by: Patrick Delaunay
Signed-off-by: Marek Vasut
Add another mux option for SDMMC2 pins 4..7, this is used on AV96 board.
Reviewed-by: Patrice Chotard
Reviewed-by: Patrick Delaunay
Signed-off-by: Marek Vasut
Cc: Manivannan Sadhasivam
Cc: Patrick Delaunay
Cc: Patrice Chotard
---
V2: Use correct pin AFs
V3: No change
---
Add another mux option for DWMAC RGMII, this is used on AV96 board.
Reviewed-by: Patrice Chotard
Reviewed-by: Patrick Delaunay
Signed-off-by: Marek Vasut
Cc: Manivannan Sadhasivam
Cc: Patrick Delaunay
Cc: Patrice Chotard
---
V2: No change
V3: No change
---
The SD uses different pinmux for the D123DIRline, use such a pinmux,
otherwise there is a pinmux collision on the AV96. Add missing SD
voltage regulator switch and enable SDR104 operation.
Reviewed-by: Patrice Chotard
Reviewed-by: Patrick Delaunay
Signed-off-by: Marek Vasut
Cc: Manivannan
Add another mux option for SDMMC1 direction pins, in particular
SDMMC1_D123DIR, this is used on AV96 board.
Reviewed-by: Patrice Chotard
Reviewed-by: Patrick Delaunay
Signed-off-by: Marek Vasut
Cc: Manivannan Sadhasivam
Cc: Patrick Delaunay
Cc: Patrice Chotard
---
V2: New patch
V3: No
This series fixes the Avenger96 board. Since there are way too many patches
floating around on the ML and because I found various other details that
needed fixing, I decided to bundle the whole set of fixes into this series.
This should go into current release, otherwise the board doesn't even
The sdmmc1_dir_pins_a: sdmmc1-dir-0 layout changed in commit 35a54d41d9d4
("ARM: dts: stm32mp1: sync device tree with v5.2-rc4") such that pins{};
became pins1{};pins2{};, however the SPL extras were not updated to reflect
that change. Fix this.
This fixes booting from SD1 X9 slot on the AV96
If OP-TEE is configured, it makes sense to use CONFIG_OPTEE_TZDRAM_BASE
and CONFIG_OPTEE_TZDRAM_SIZE to declare the boundaries of the TrustZone
memory reserved for OP-TEE instead of assuming that a 32MB reservation is
always in place.
In this case, the following calculations may be used to
All sub-commands of the mmc command should be shown in the Kconfig menu
next to the mmc command. This includes:
* mmc bkops
* mmc rpmb
* mmc swrite
The mmc rpmb sub-command is not usable without CONFIG_SUPPORT_EMMC_RPMB.
Add the missing dependency.
Signed-off-by: Heinrich Schuchardt
---
On 3/31/20 4:06 PM, Patrick DELAUNAY wrote:
> Hi Marek,
>
>> From: Marek Vasut
>> Sent: mardi 31 mars 2020 02:49
>>
>> Add PHY reset GPIO on AV96 ethernet PHY.
>>
>> Signed-off-by: Marek Vasut
>> Cc: Patrick Delaunay
>> Cc: Patrice Chotard
>> ---
>> V2: No change
>> ---
>>
On 3/31/20 5:22 PM, Patrick DELAUNAY wrote:
> Hi Marek,
Hi,
>> From: Marek Vasut
>> Sent: mardi 31 mars 2020 02:49
>>
>> This series fixes the Avenger96 board. Since there are way too many patches
>> floating around on the ML and because I found various other details that
>> needed
>> fixing,
On 3/31/20 4:59 PM, Patrick DELAUNAY wrote:
> Hi,
Hi,
>> It is also highly recommended to configure the board for the DHCOM make
>> stm32mp15_dhcom_basic_defconfig make DEVICE_TREE=stm32mp15xx-dhcor-
>> avenger96
>> as that permits reusing the board code for the DH components, like accessing
>>
On 3/31/20 3:39 PM, Patrick DELAUNAY wrote:
> Hi Marek,
>
>> From: Marek Vasut
>> Sent: mardi 31 mars 2020 02:49
>>
>> The DH Electronics DHCOR SOM has QSPI NOR on the SoM itself, add it into the
>> DT.
>>
>> Signed-off-by: Marek Vasut
>> Cc: Patrick Delaunay
>> Cc: Patrice Chotard
>> ---
>>
Hi Simon and Marek,
> From: Simon Glass
> Sent: mardi 31 mars 2020 18:08
>
> Hi,
>
> On Mon, 30 Mar 2020 at 20:51, Marek Vasut wrote:
> >
> > On 1/4/19 10:55 AM, Patrice Chotard wrote:
> >
> > Hi,
> >
> > > @@ -215,7 +220,9 @@ U_BOOT_DRIVER(gpio_stm32) = {
> > > .id = UCLASS_GPIO,
>
On 3/31/20 4:10 PM, Patrice CHOTARD wrote:
>
> On 3/31/20 1:22 PM, Marek Vasut wrote:
>> On 3/31/20 10:12 AM, Patrice CHOTARD wrote:
>>> Hi Marek
>> Hi,
>>
>>> On 3/31/20 4:51 AM, Marek Vasut wrote:
On 1/4/19 10:55 AM, Patrice Chotard wrote:
Hi,
> @@ -215,7 +220,9 @@
Hi Tom,
The following changes since commit 93330d4ce416208fe202e304e5a18166c57ac569:
Prepare v2020.04-rc4 (2020-03-30 19:29:27 -0400)
are available in the Git repository at:
g...@gitlab.denx.de:u-boot/custodians/u-boot-arc.git
tags/arc-last-minute-fixes-for-2020.04
for you to fetch
Hi,
On Mon, 30 Mar 2020 at 20:51, Marek Vasut wrote:
>
> On 1/4/19 10:55 AM, Patrice Chotard wrote:
>
> Hi,
>
> > @@ -215,7 +220,9 @@ U_BOOT_DRIVER(gpio_stm32) = {
> > .id = UCLASS_GPIO,
> > .of_match = stm32_gpio_ids,
> > .probe = gpio_stm32_probe,
> > +#ifndef
The GPIO support is needed in SPL to managed the SD cart detect
used on stm32mp157c-ev1 and dk2 board.
So this patch activates the associated code in stm32_gpio.c.
Signed-off-by: Patrick Delaunay
---
drivers/gpio/stm32_gpio.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff
From: Christophe Roullier
Need Realtek driver to manage in RTL8211F the configuration of the LED.
Initialize LCR (LED Control Register) to configure green LED for Link,
yellow LED for Active
Signed-off-by: Christophe Roullier
Signed-off-by: Patrick Delaunay
---
Use the DDR3 dtsi files generated by STM32CubeMX 5.6.0
Speed Bin Grade = using DDR3-1066G / 8-8-8 and all others
parameters at default value.
Signed-off-by: Patrick Delaunay
---
.../dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi | 49 +--
.../dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi
On 3/31/20 4:16 PM, Simon Glass wrote:
> HI Marek,
Hi,
[...]
> OK I have updated the coding style page with all of this.
Which page ?
>>>
>>> https://www.denx.de/wiki/U-Boot/CodingStyle
>>
>> " U-Boot typically uses a C structure to map out the registers in an I/O
>> region,
This patch avoids infinite loop when I/O compensation failed,
it adds a 1s timeout to detect error.
Signed-off-by: Patrick Delaunay
---
board/st/stm32mp1/stm32mp1.c | 16
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/board/st/stm32mp1/stm32mp1.c
Add support of errno_str, used in command pmic and regulator.
Signed-off-by: Patrick Delaunay
---
configs/stm32mp15_basic_defconfig | 1 +
configs/stm32mp15_trusted_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/configs/stm32mp15_basic_defconfig
For booting Linux in the generic distro mechanism and support of
FDTDIR in extlinux.conf , cmd/pxe.c retrieves the FDT file name
from "fdtfile" environment variable.
Dynamically build this variable with compatible of STMicroelectronics
boards.
Signed-off-by: Patrick Delaunay
---
Software workaround for I2C issue on EV1 board,
configure the IRQ line for touchscreen before LCD reset
to fix the used I2C address.
Signed-off-by: Patrick Delaunay
---
board/st/stm32mp1/stm32mp1.c | 41
1 file changed, 41 insertions(+)
diff --git
This patch avoids crash in strcmp when the boot_device is not
present in environment (this case should be never occur)
Signed-off-by: Patrick Delaunay
---
board/st/stm32mp1/stm32mp1.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/board/st/stm32mp1/stm32mp1.c
Force boot-led ON and no more rely on default-state.
This patch avoid device-tree modification for U-Boot.
Signed-off-by: Patrick Delaunay
---
arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi | 4
arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 4
board/st/stm32mp1/stm32mp1.c | 10
Add the bsec driver in SPL, as it is needed by SOC part number detection.
Signed-off-by: Patrick Delaunay
---
arch/arm/dts/stm32mp15-u-boot.dtsi | 2 +-
arch/arm/mach-stm32mp/Makefile | 2 +-
arch/arm/mach-stm32mp/bsec.c | 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
Update board_init_f and try to display error message
when console is available.
This patch adds trace to debug a spl boot issue when DEBUG
and DEBUG_UART is not activated, after uart probe.
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/spl.c | 33 -
From: Patrice Chotard
Since commit commit dd2810851eb1 ("stm32mp1: board: support of
error led on ed1/ev1 board") the attended behavior was no more
respected in case of low power source detection on DK2.
The expected behavior is either the error LED keeps blinking for ever,
or blinks 2 or 3
Imply CONFIG_VERSION_VARIABLE for stm32mp1 target
and test U-Boot version ($env_ver) when the environment was
saved for the last time and to display warning trace.
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/Kconfig | 1 +
include/configs/stm32mp1.h| 11 ---
2 files
Correct the dependency for STM32 ETZPC protection, linked to SOC
STM32MP identified by CONFIG_STM32MP15x and not linked to
CONFIG_TARGET_STM32MP1 (no more existing).
This patch fix an issue introduced by commit 846254888e2e ("stm32mp1:
split board and SOC support for STM32MP15x family").
Serial number is first checked and, in case of mismatch, all
environment variables are reset to their default value.
This patch allows to detect that environment is saved in a removable
device, as a SD card, and reused on a other board, potentially with
incompatible variables.
Signed-off-by:
This command is not more depending on fuse command, but have
direct access to BSEC misc driver, so the dependency wuth
can be removed CMD_FUSE
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/Kconfig | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-stm32mp/Kconfig
Hi Marek,
> From: Marek Vasut
> Sent: mardi 31 mars 2020 02:49
>
> This series fixes the Avenger96 board. Since there are way too many patches
> floating around on the ML and because I found various other details that
> needed
> fixing, I decided to bundle the whole set of fixes into this
On Sat, Mar 28, 2020 at 07:55:37AM +0800, Bin Meng wrote:
> Hi Tom,
>
> On Fri, Mar 27, 2020 at 11:25 PM Tom Rini wrote:
> >
> > On Fri, Mar 27, 2020 at 02:05:55PM +0800, Bin Meng wrote:
> > > Hi Tom,
> > >
> > > On Fri, Mar 27, 2020 at 10:00 AM Tom Rini wrote:
> > > >
> > > > On Fri, Mar 27,
Hi,
> From: Marek Vasut
> Sent: mardi 31 mars 2020 02:49
>
> The AV96 is in fact an assembly of DH Electronics DHCOR SoM on top of an
> AV96 reference board. Split the DTs to reflect that and make sure to DHCOR SoM
> can be reused on other boards easily.
>
> It is also highly recommended to
On Mon, Mar 23, 2020 at 04:24:15PM +0100, Petr Štetiar wrote:
> Michal Simek [2020-03-23 14:58:55]:
>
> Hi,
>
> > Plan is to merge all of these to one shell script because most of the
> > content in that script is very similar.
>
> to me it all just seems as values and templates hidden inside
On Tue, Mar 31, 2020 at 12:36 PM Lin Jinhan wrote:
>
> CONFIG_RNG_ROCKCHIP/CONFIG_DM_RNG is enabled.
This should be universally available by default on all rk3399 devices
shouldn't it or does it need external regulators or something that is
per device? If so shouldn't we just enable it by
Hi Marek,
> From: Marek Vasut
> Sent: mardi 31 mars 2020 02:49
>
> The PLL4 is supplying SDMMC12, SDMMC3 and SPDIF with 120 MHz and
> FDCAN with 96 MHz. This isn't good for the SDMMC interfaces, which can not
> easily divide the clock down to e.g. 50 MHz for high speed SD and eMMC
> devices, so
On Mon, Mar 30, 2020 at 09:30:37PM +, Alexey Brodkin wrote:
> Hi Tom,
>
> > -Original Message-
> > From: Eugeniy Paltsev
> > Sent: Monday, March 30, 2020 10:45 PM
> > To: uboot-snps-...@synopsys.com; Alexey Brodkin
> > Cc: u-boot@lists.denx.de; Eugeniy Paltsev
> > Subject: [PATCH
HI Marek,
On Tue, 31 Mar 2020 at 07:29, Marek Vasut wrote:
>
> On 3/31/20 3:24 PM, Simon Glass wrote:
> > Hi Marek,
> >
> > On Mon, 30 Mar 2020 at 18:39, Marek Vasut wrote:
> >>
> >> On 3/31/20 1:31 AM, Simon Glass wrote:
> >>> Hi Marek,
> >>
> >> Hi,
> >>
> >>> On Sun, 22 Mar 2020 at 09:34,
On 3/31/20 1:22 PM, Marek Vasut wrote:
> On 3/31/20 10:12 AM, Patrice CHOTARD wrote:
>> Hi Marek
> Hi,
>
>> On 3/31/20 4:51 AM, Marek Vasut wrote:
>>> On 1/4/19 10:55 AM, Patrice Chotard wrote:
>>>
>>> Hi,
>>>
@@ -215,7 +220,9 @@ U_BOOT_DRIVER(gpio_stm32) = {
.id = UCLASS_GPIO,
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