On Thu, Jun 18, 2020 at 11:15 PM Jagan Teki wrote:
>
> Enable DM_SPI, DM_SPI_FLASH for db-88f6281-bp-nand board.
>
> Cc: Chris Packham
> Signed-off-by: Jagan Teki
> ---
Applied to u-boot-spi/master
On Sun, Jun 28, 2020 at 10:30 PM Simon Guinot wrote:
>
> The spi0 alias is needed by the environment code to retrieve the SPI
> flash. This patch adds some -u-boot.dtsi files, providing the spi0
> aliases, for all the following Kirkwood-based LaCie boards:
>
> - d2 Network v2
> - Internet Space v2
On Sun, Jun 28, 2020 at 10:31 PM Simon Guinot wrote:
>
> This patch converts the following Kirkwood-based LaCie boards to DM,
> DM_SPI and DM_SPI_FLASH:
>
> - d2 Network v2
> - Internet Space v2
> - 2Big Network v2
> - Network Space v2
> - Network Space Lite v2
> - Network Space Max v2
> - Network
From: Bin Meng
This reverts commit 23da3c682a84a2ad67a67287979dd4f5259ff607.
Now the build failure of sifive_fu540_defconfig board has been fixed,
revert this "revert patch".
Signed-off-by: Bin Meng
---
board/sifive/fu540/Kconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/si
From: Bin Meng
This reverts commit 958a3f464c7f8ef7e10db9feb663e9e80445ce2f.
A more appropriate change below is already in mainline.
Commit fd31e4fd184f ("riscv: Do not build reset.c if SYSRESET is on")
Revert this patch, so that U-Boot can be built successfully for
SiFive Fu540 board.
Signed-
On Tue, Jul 7, 2020 at 9:30 PM Tom Rini wrote:
>
> On Tue, Jul 07, 2020 at 09:18:52PM +0530, Jagan Teki wrote:
> > On Sat, Jun 13, 2020 at 11:51 PM Jagan Teki
> > wrote:
> > >
> > > On Wed, May 27, 2020 at 6:27 PM Jagan Teki
> > > wrote:
> > > >
> > > > DM, DM_SPI and other driver model migrat
On Tue, Jul 07, 2020 at 12:42:35PM +0200, Heinrich Schuchardt wrote:
> On 16.06.20 07:26, AKASHI Takahiro wrote:
> > In this test case, an image may have a signature with additional
> > intermediate certificates. A chain of trust will be followed and all
> > the certificates in the middle of chain
Heinrich,
On Tue, Jul 07, 2020 at 12:32:02PM +0200, Heinrich Schuchardt wrote:
> On 16.06.20 07:26, AKASHI Takahiro wrote:
> > The function, pkcs7_verify_one(), will be utilized to rework signature
> > verification logic aiming to support intermediate certificates in
> > "chain of trust."
>
> Is
Hi Tom,
Am 07.07.2020 um 15:38 schrieb Tom Rini:
Hey all,
I have now merged the next branch back in to master and pushed that out.
Unfortunately you changed patch:
"gpio: search for gpio label if gpio is not found through bank name"
[trini: Don't enable by default]
and now travis/azure bui
Heinrich,
On Tue, Jul 07, 2020 at 12:27:49PM +0200, Heinrich Schuchardt wrote:
> On 16.06.20 07:26, AKASHI Takahiro wrote:
> > The file, pkcs7_verify.c, will now be imported from linux code and
> > modified to fit into U-Boot environment.
> >
> > In particular, pkcs7_verify_one() function will be
Heinrich,
On Tue, Jul 07, 2020 at 12:02:51PM +0200, Heinrich Schuchardt wrote:
> On 16.06.20 07:26, AKASHI Takahiro wrote:
> > When the file, x509_public_key.c, was imported from linux code in
> > commit b4adf627d5b7 ("lib: crypto: add x509 parser"),
> > x509_check_for_self_signed() was commen
Heinrich,
On Tue, Jul 07, 2020 at 12:04:29PM +0200, Heinrich Schuchardt wrote:
> On 16.06.20 07:26, AKASHI Takahiro wrote:
> > This function will be called from x509_check_for_self_signed() and
> > pkcs7_verify_one(), which will be imported from linux in a later patch.
> >
> > While it does exist
as patch
gpio: search for gpio label if gpio is not found through bank name
is now in mainline, but functionality is disabled, we
need to enable
CONFIG_DM_GPIO_LOOKUP_LABEL
for the aristainetos boards.
Signed-off-by: Heiko Schocher
---
I did not trigger a travis build as this patch only chang
On Mon, Jun 29, 2020 at 5:48 PM Pragnesh Patel
wrote:
>
> As per the SD physical layer specification version 7.10, erase
> command (CMD38) and stop transmission command (CMD12) will generate
> R1b response.
>
> R1b = R1 + busy signal
>
> A non-zero value after the R1 response indicates card is rea
On Mon, Jun 29, 2020 at 5:48 PM Pragnesh Patel
wrote:
>
> Erase block start address (CMD32) and erase block end address (CMD33)
> command will generate R1 response for mmc SPI mode.
>
> R1 response is 1 byte long for mmc SPI, so assign 1 byte as a response
> for this commands.
>
> Signed-off-by: P
On Mon, Jun 29, 2020 at 5:48 PM Pragnesh Patel
wrote:
>
> R1 response is 1 byte long for mmc SPI commands as per the updated
> physical layer specification version 7.10.
>
> So correct the resp and resp_size for existing commands
>
> Signed-off-by: Pragnesh Patel
> ---
> drivers/mmc/mmc_spi.c |
On Mon, Jun 29, 2020 at 5:48 PM Pragnesh Patel
wrote:
>
> When variable i will become 0, while(i--) loop breaks but variable i will
> again decrement to -1 because of i-- and that's why below condition
> "if (!i && (r != resp_match_value)" will never execute, So doing "i--"
> inside of while() loo
On Mon, Jun 29, 2020 at 5:48 PM Pragnesh Patel
wrote:
>
> Send status command (CMD13) will send R1 response under SD mode
> but R2 response under SPI mode.
>
> R2 response is 2 bytes long, so read 2 bytes for mmc SPI mode
>
> Signed-off-by: Pragnesh Patel
> ---
> drivers/mmc/mmc_spi.c | 11 +
On Mon, Jun 29, 2020 at 5:48 PM Pragnesh Patel
wrote:
>
> The content of ssr is useful only for erase operations.
> This saves erase time.
>
> Signed-off-by: Pragnesh Patel
> Reviewed-by: Bin Meng
> ---
> drivers/mmc/mmc.c | 5 +
> drivers/mmc/mmc_spi.c | 1 +
> 2 files changed, 6 inser
Ok with us. Thanks
> On Jul 7, 2020, at 9:21 PM, Heiko Schocher wrote:
>
> Hello Alex, Arthur,
>
>> Am 06.07.2020 um 11:22 schrieb Heiko Schocher:
>> Hello Alex, Arthur,
>>> Am 01.06.2020 um 21:56 schrieb Alex Nemirovsky:
>>> From: Arthur Li
>>>
>>> Add I2C controller support for Cortina Ac
Signature database (db or dbx) may have not only certificates that contain
a public key for RSA decryption, but also digests of signed images.
In this test case, if database has an image's digest (EFI_CERT_SHA256_GUID)
and if the value matches to a hash value calculated from image's binary,
authen
From: Bin Meng
This reverts commit 40686c394e533fec765fe237936e353c84e73fff.
Commit 40686c394e53 ("riscv: Clean up IPI initialization code")
caused U-Boot failed to boot on SiFive HiFive Unleashed board.
The codes inside arch_cpu_init_dm() may call U-Boot timer APIs
before the call to riscv_ini
More fixes against pylint warnings that autopep8 didn't handle
in the previous commit.
Signed-off-by: AKASHI Takahiro
---
test/py/tests/test_efi_secboot/conftest.py| 11 +--
.../py/tests/test_efi_secboot/test_authvar.py | 91 +--
test/py/tests/test_efi_secboot/test_signed.py
Python's autopep8 can automatically correct some of warnings from pylint
and rewrite the code in a pretty print format. So just do it.
Signed-off-by: AKASHI Takahiro
Suggested-by: Heinrich Schuchardt
---
test/py/tests/test_efi_secboot/conftest.py| 74 ++-
test/py/tests/test_
Split the existing test case-1 into case1 and a new case-2:
case-1 for non-SecureBoot mode; case-2 for SecureBoot mode.
In addition, one corner case is added to case-2; a image is signed
but a corresponding certificate is not yet installed in "db."
Signed-off-by: AKASHI Takahiro
---
test/py/tes
In this test case, an image is signed multiple times with different
keys. If any of signatures contained is not verified, the whole
authentication check should fail.
Signed-off-by: AKASHI Takahiro
---
test/py/tests/test_efi_secboot/conftest.py| 9 +++-
test/py/tests/test_efi_secboot/test_si
Revocation database (dbx) may have not only certificates, but also
message digests of certificates with revocation time
(EFI_CERT_X509_SHA256_GUILD).
In this test case, if the database has such a digest and if the value
matches to a certificate that created a given image's signature,
authenticatio
In case that a type of certificate in "db" or "dbx" is
EFI_CERT_X509_SHA256_GUID, it is actually not a certificate which contains
a public key for RSA decryption, but a digest of image to be loaded.
If the value matches to a value calculated from a given binary image, it is
granted for loading.
Wi
Since the size check against an entry in efi_search_siglist() is
incorrect, this function will never find out a to-be-matched certificate
and its associated revocation time in the signature list.
Signed-off-by: AKASHI Takahiro
---
lib/efi_loader/efi_signature.c | 5 +++--
1 file changed, 3 inser
Since the certificate table, which is indexed by
IMAGE_DIRECTORY_ENTRY_SECURITY and contains authenticode in PE image,
doesn't always exist, we should make sure that we will retrieve its pointer
only if it exists.
Signed-off-by: AKASHI Takahiro
---
lib/efi_loader/efi_image_loader.c | 29
There are a couple of occurrences of hash calculations in which a new
efi_hash_regions will be commonly used.
Signed-off-by: AKASHI Takahiro
---
lib/efi_loader/efi_signature.c | 46 +-
1 file changed, 17 insertions(+), 29 deletions(-)
diff --git a/lib/efi_loader/
A signed image may have multiple signatures in
- each WIN_CERTIFICATE in authenticode, and/or
- each SignerInfo in pkcs7 SignedData (of WIN_CERTIFICATE)
In the initial implementation of efi_image_authenticate(), the criteria
of verification check for multiple signatures case is a bit ambiguous
UEFI specification requires that we shall support three type of
certificates of authenticode in PE image:
WIN_CERT_TYPE_EFI_GUID with the guid, EFI_CERT_TYPE_PCKS7_GUID
WIN_CERT_TYPE_PKCS_SIGNED_DATA
WIN_CERT_TYPE_EFI_PKCS1_15
As EDK2 does, we will support the first two that are pkcs7 Signed
Summary
===
I'm currently working on reworking UEFI secure boot, aiming to add
"intermediate certificates" support. In this effort, I found a couple
of issues that should immediately be fixed or useful improvements even
without intermediate certificates support.
Each commit in this patch serie
By adding extra symbols, we can now avoid including x509_parser and
pkcs7_parser.h files multiple times.
Signed-off-by: AKASHI Takahiro
Suggested-by: Heinrich Schuchardt
---
lib/efi_loader/efi_image_loader.c | 1 +
lib/efi_loader/efi_signature.c| 1 +
2 files changed, 2 insertions(+)
diff
On 6/24/20 4:37 AM, Yakov Shmulevich wrote:
> Hello,
>
> We develop the system that based on MIPS that includes Synopsys SPI with
> NACRONIX SPI flash connected to it.
> For U-boot we are using version 2019.04-rc4.
> I want to save environment on SPI flash. For this I enabled the DesignWare
> SP
CC Xiaobo, Jiafei
> -Original Message-
> From: Y.b. Lu
> Sent: Monday, July 6, 2020 10:47 AM
> To: u-boot@lists.denx.de; Priyanka Jain ; Peng Fan
>
> Subject: RE: [PATCH 0/4] Move eSDHC adapter card code to board files
>
> Hi Priyanka,
>
> Any comments on this patch-set?
> Thanks a lot.
Hello Yash,
Am 23.04.2020 um 13:27 schrieb Yash Shah:
Adds a PWM driver for PWM chip present in SiFive's HiFive Unleashed SoC
This driver is simple port of Linux pwm sifive driver from Linux v5.6
commit: 9e37a53eb051 ("pwm: sifive: Add a driver for SiFive SoC PWM")
Signed-off-by: Yash Shah
--
Hello Yash,
Am 23.04.2020 um 13:27 schrieb Yash Shah:
DT documentation for PWM controller added from Linux v5.6
commit: daa78cc3408e
("pwm: sifive: Add DT documentation for SiFive PWM Controller")
Signed-off-by: Yash Shah
---
doc/device-tree-bindings/pwm/pwm-sifive.txt | 31
On Mon, Jul 06, 2020 at 12:45:54PM +0200, Heinrich Schuchardt wrote:
> On 16.06.20 01:16, AKASHI Takahiro wrote:
> > Python's autopep8 can automatically correct some of warnings from pylint
> > and rewrite the code in a pretty print format. So just do it.
> >
> > Signed-off-by: AKASHI Takahiro
> >
Hello Alex, Arthur,
Am 06.07.2020 um 11:22 schrieb Heiko Schocher:
Hello Alex, Arthur,
Am 01.06.2020 um 21:56 schrieb Alex Nemirovsky:
From: Arthur Li
Add I2C controller support for Cortina Access CA SoCs
Signed-off-by: Arthur Li
Signed-off-by: Alex Nemirovsky
CC: Heiko Schocher
Revi
On Mon, Jul 06, 2020 at 12:59:16PM +0200, Heinrich Schuchardt wrote:
> On 16.06.20 01:16, AKASHI Takahiro wrote:
> > More fixes against pylint warnings that autopep8 didn't handle
> > in the previous commit.
> >
> > Signed-off-by: AKASHI Takahiro
>
> This patch has to be rebased:
This patch will
+Tom,
On Wed, Jul 8, 2020 at 10:23 AM Simon Glass wrote:
>
> Hi Bin,
>
> On Mon, 29 Jun 2020 at 20:33, Bin Meng wrote:
> >
> > Hi Simon,
> >
> > On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
> > >
> > > At present we can only read from a top-level binman node entry. Refactor
> > > this fu
Currently U-Boot implements version 2 but reports version 4. Correct it.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
Changes in v2:
- Use ACPI_MADT_REV_ACPI_3_0 instead of the open-coded value
arch/x86/lib/acpi_table.c | 2 +-
1 file changed, 1 insertio
This function sounds like something that is called when U-Boot is about to
jump to Linux. In fact it is an init function.
Rename it to reduce confusion.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/cpu/coreboot/coreboot.c
The comment here applies only to FSP1, so update it.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/cpu/start.S | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index 01524635e9.
This should ideally be used by all x86 boards in U-Boot. Enable it by
default. If some boards don't use it, the cost is small.
Signed-off-by: Simon Glass
---
Changes in v2:
- Don't enable this for qemu
arch/Kconfig | 1 +
drivers/core/Kconfig | 2 +-
2 files changed, 2 insertions(+), 1
This function does not exist anymore. Drop it from the header file.
Signed-off-by: Simon Glass
---
Changes in v2:
- Remove the function from zimage.c also
arch/x86/include/asm/u-boot-x86.h | 2 --
arch/x86/lib/zimage.c | 10 --
2 files changed, 12 deletions(-)
diff --git
At present if MP is not enabled (e.g. booting from coreboot) the 'mtrr'
command does not work correctly. It is not easy to make it work for all
CPUs, since coreboot has halted them and we would need to start them up
again, but it is easy enough to make them work on the boot CPU.
Update the code to
At present this information is used to locate and parse the tables but is
not stored. Store it so that we can display it to the user, e.g. with the
'bdinfo' command.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
(no changes since v1)
arch/x86/cpu/coreboot/tables.c | 8 +++-
arc
Writing tables is currently pretty opaque. Add a bit of debugging to the
process so we can see what tables are written and where they start/end in
memory.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/lib/tables.c | 38 +
If there is MRC information we should run FSP-M with a different
boot_mode flag since it is supposed to do a 'fast path' through the
memory init. Fix this.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v2:
- Add a new commit to handle the boot_mode fix
arch/x86/cpu/a
Update this code to calculate the address to use, rather than hard-coding
it. Obtain the requested stack size from the FSP.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v2:
- Split out the boot_mode change into a separate patch
arch/x86/cpu/apollolake/fsp_m.c | 3 ++
Hi Bin,
On Tue, 30 Jun 2020 at 02:27, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
> >
> > The FSP-S changes the ITSS priorities. The code that tries to save it
> > before running FSP-S and restore it afterwards does not work as U-Boot
> > relocates in be
This binding currently has a flags cell but it is not used. Make use of it
to create ACPI tables for interrupts.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/cpu/acpi_gpe.c | 26 +++
..
Update the PCI driver to generate ACPI information so that Linux has the
full information about each I2C bus.
Signed-off-by: Simon Glass
Reviewed-by: Heiko Schocher
---
Changes in v2:
- Add a few blank lines
- Drop dead code behind if (0)
Changes in v1:
- Capitalise ACPI_OPS_PTR
drivers/i2c
This confuses Linux's PCI probing so needs to be hidden when booting
Linux. Add a remove() method to handle this.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
Tested-by: Wolfgang Wallner
---
(no changes since v1)
arch/x86/cpu/intel_common/p2sb.c | 13 ++
These registers need to be accesses from ACPI code, so move them to the
header file.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
drivers/power/acpi_pmc/acpi-pmc-uclass.c | 9 -
include/power/acpi_pmc.h | 14 ++
2 file
The FSP-S changes the ITSS priorities. The code that tries to save it
before running FSP-S and restore it afterwards does not work as U-Boot
relocates in between the save and restore. This means that the driver
data saved before relocation is lost and the new driver just sees zeroes.
Fix this by a
Add a few of these calls to make it easier to see where an error occurs,
if CONFIG_LOG_ERROR_RETURN is enabled.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
Reviewed-by: Heiko Schocher
---
(no changes since v1)
drivers/i2c/i2c-uclass.c | 4 ++--
1 file chan
Add support for this new method in the driver and in the fsp-s setup.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
Tested-by: Wolfgang Wallner
---
Changes in v2:
- Move .ops change from the next patch
arch/x86/cpu/apollolake/fsp_s.c | 26 +++---
Hi Bin,
On Tue, 30 Jun 2020 at 00:06, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
> >
> > This chip is used on coral and we need to generate ACPI tables for sound
> > to make it work. Add a driver that does just this (i.e. at present does
> > not actuall
The P2SB bus needs to be hidden in some cases so that it does not get
auto-configured by Linux. Add a method for this.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
Tested-by: Wolfgang Wallner
---
(no changes since v1)
drivers/misc/p2sb-uclass.c | 10 +++
Add debugging for a few more values and also use log to show return values
when something goes wrong. This makes it easier to see the root cause.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
Reviewed-by: Heiko Schocher
---
(no changes since v1)
Changes in v1
Implement the method that converts a GPIO into the form used by ACPI, so
that GPIOs can be added to ACPI tables.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Use acpi_get_path() to get device path
drivers/gpio/intel_gpio.c | 34 ++
1 fi
Use the new binman memory-mapping function to access the VBT, to simplify
the code.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
(no changes since v1)
arch/x86/cpu/apollolake/fsp_s.c | 19 +--
arch/x86/lib/fsp2/fsp_silicon_init.c | 1 +
2 files changed, 6 inserti
At present the itss is probed in the ofdata_to_platdata() method. This is
incorrect since itss is a child of p2sb which itself needs to probe the
pinctrl device. This means that p2sb is effectively not probed when the
itss is probed, so we get the wrong register address from p2sb.
Fix this by movi
Generation of this table can fail, so update the function to return an
error code.
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Add new patch to add error checking for csrt table generation
arch/x86/lib/acpi_table.
This is in the device tree now, so drop the unnecessary field here.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v2:
- Fix the commit subject to mention dropping acpi_path, not acpi_name
arch/x86/include/asm/intel_pinctrl.h | 2 --
drivers/pinctrl/intel/pinctrl_apl.
This chip is used on coral and we need to generate ACPI tables for sound
to make it work. Add a driver that does just this (i.e. at present does
not actually support playing sound).
Signed-off-by: Simon Glass
---
Changes in v2:
Add a comment about only x86 boards supporting NHLT
Changes in v1:
At present we can query the offset of a pinctrl register within the p2sb.
For ACPI we need to get the actual address of the register. Add a function
to handle this and rename the old one to more accurately reflect its
purpose.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgan
Add information about what is returned on error.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/x86/include/asm/intel_pinctrl.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/include/asm/intel_pinctrl.h
b/arch/x86/include/asm/intel_pinctrl.h
index b5564b9ee1..a6a9edd0
This chip is used on coral and we need to generate ACPI tables for sound
to make it work. Add a driver that does just this (i.e. at present does
not actually support playing sound).
Signed-off-by: Simon Glass
---
Changes in v2:
Add a comment about only x86 boards supporting NHLT
Changes in v1:
Add a Kconfig to control whether pinctrl is represented as a single ACPI
device or as multiple devices. In the latter case (the default) we should
return the pin number relative to the pinctrl device.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
Changes in
Write required information into the SSDT to describe the SD card
card-detect pin. Since the required GPIO properties are not present in
the device-tree binding, set them manually for now.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
Changes in v1:
- Capita
The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the
audio codecs and connections in a system. Various devices can contribute
information to produce the table.
Add functions to allow adding to the structure that is eventually written
to the ACPI tables. Also add the device-tre
Allow writing an ACPI device to the generated ACPI code.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
include/acpi/acpigen.h | 9 +
lib/acpi/acpigen.c | 7 +++
test/dm/acpigen.c | 27 ++
Add devicetree bindings for the Intel Non-High-Definition-Audio Link Table
(NHLT).
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v2:
- Add a comment pointing to the PCI spec
include/dt-bindings/sound/nhlt.h | 24
1 file changed, 24 insertions
Allow writing named integers and strings to the generated ACPI code.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
include/acpi/acpigen.h | 72 ++
lib/acpi/acpigen.c | 49 ++
Allow writing out a generic register.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
include/acpi/acpi_device.h | 1 +
include/acpi/acpigen.h | 28 +++
lib/acpi/acpigen.c | 71 +
The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the
audio codecs and connections in a system. Various devices can contribute
information to produce the table.
Add core support for this, based on a structure which is built up through
calls to the driver.
Signed-off-by: Simon
At present only acpigen_write_integer() is exported for use by other code.
But in some cases it is useful to call the specific function depending on
the size of the value.
Export these functions and add a test.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
Add a function to write a scope to the generated ACPI code.
Signed-off-by: Simon Glass
Reviewed-by: Wolfgang Wallner
---
Changes in v2:
- Rename parameter from 'name' to 'scope'
include/acpi/acpigen.h | 9 +
lib/acpi/acpigen.c | 7 +++
test/dm/acpi.c | 3 +--
test/d
Some devices such as GPIO need to override the normal path that would be
generated by driver model. Add a device-tree property for this.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Reviewed-by: Wolfgang Wallner
---
(no changes since v1)
doc/device-tree-bindings/device.txt | 23 +
The start of an ACPI path typically has backslashes in it. These are not
preserved during the translation from device tree to C code, since dtc
(correctly) uses the first backslash as an escape character, and dtoc
therefore leaves it out of the C string.
Fix this with special-case handling.
Signe
In some cases an internal error may prevent this from working. Update the
function return value and report the error. At present the API for writing
tables does not easily support reporting errors, but once it is fully
updated to use a context pointer, this will be easier.
Signed-off-by: Simon Gla
At present we can only read from a top-level binman node entry. Refactor
this function to produce a second local function which supports reading
from any node.
Signed-off-by: Simon Glass
---
Changes in v2:
- Rename binman_entry_find_()
lib/binman.c | 19 +--
1 file changed, 13
Add support for accessing an entry's contents in memory-mapped SPI flash.
Signed-off-by: Simon Glass
---
(no changes since v1)
include/binman.h | 22 ++
lib/binman.c | 23 +++
2 files changed, 45 insertions(+)
diff --git a/include/binman.h b/include
Hi Bin,
On Tue, 30 Jun 2020 at 02:40, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
> >
> > At present if MP is not enabled (e.g. booting from coreboot) the 'mtrr'
> > command does not work correctly. It is not easy to make it work for all
> > CPUs, since
On x86 the SPI ROM can be memory-mapped, at least most of it. Add a way
to tell binman the offset from a ROM address to a RAM address.
Signed-off-by: Simon Glass
---
(no changes since v1)
Changes in v1:
- Add a way to set the binman ROM offset
include/binman.h | 8
lib/binman.c
Hi Bin,
On Tue, 30 Jun 2020 at 02:40, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
> >
> > This function does not exist anymore. Drop it from the header file.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/x86/include/asm/u-boot-x86.h | 2 --
>
This series is split off from the original ACPI series and renumbered to
version 1.
It includes functions for generating more ACPI constructs as well as I2C,
GPIO and sound support. There are also quite a few patches related to
getting coral to work correctly with ACPI.
Changes in v2:
- Rename bi
Hi Wolfgang,
On Thu, 25 Jun 2020 at 06:46, Wolfgang Wallner
wrote:
>
> Hi Simon,
>
> -"Simon Glass" schrieb: -
> > Betreff: [PATCH v1 28/43] i2c: designware_i2c: Support ACPI table generation
> >
> > Update the PCI driver to generate ACPI information so that Linux has the
> > full inform
Hi Wolfgang,
On Thu, 2 Jul 2020 at 02:11, Wolfgang Wallner
wrote:
>
> Hi Simon,
>
> I dont know NHLT well enough to actually review the code, but I did compare
> the files in this patch to the version in coreboot. Most of the changes are
> obvious (coding style, spelling, ...), but some things ar
Hi Wolfgang,
On Wed, 1 Jul 2020 at 09:16, Wolfgang Wallner
wrote:
>
> Hi Simon,
>
> -"Simon Glass" schrieb: -
> > Betreff: [PATCH v1 37/43] x86: Store the coreboot table address in
> > global_data
> >
> > At present this information is used to locate and parse the tables but is
> > not
Hi Wolfgang,
On Wed, 1 Jul 2020 at 09:15, Wolfgang Wallner
wrote:
>
> Hi Simon,
>
> -"Simon Glass" schrieb: -
>
> > Betreff: [PATCH v1 33/43] x86: irq: Support flags for acpi_gpe
> >
> > This binding currently has a flags cell but it is not used. Make use of it
> > to create ACPI tables
Hi Bin,
On Tue, 30 Jun 2020 at 01:47, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
> >
> > Implement the method that converts a GPIO into the form used by ACPI, so
> > that GPIOs can be added to ACPI tables.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
Hi Bin,
On Tue, 30 Jun 2020 at 02:27, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
> >
> > These registers need to be accesses from ACPI code, so move them to the
> > header file.
> >
>
> I don't think these are common offset to every platform.
That's ri
Hi Bin,
On Mon, 29 Jun 2020 at 23:58, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
> >
> > Add devicetree bindings for the Intel Non-High-Definition-Audio Link Table
> > (NHLT).
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > include/dt-bindings/soun
Hi Bin,
On Mon, 6 Jul 2020 at 18:22, Bin Meng wrote:
>
> Hi Simon,
>
> On Tue, Jul 7, 2020 at 3:22 AM Simon Glass wrote:
> >
> > Hi Bin,
> >
> > On Thu, 2 Jul 2020 at 22:33, Bin Meng wrote:
> > >
> > > Hi Simon,
> > >
> > > On Fri, Jul 3, 2020 at 11:50 AM Simon Glass wrote:
> > > >
> > > > Hi
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