Re: [PATCH] tools: termios_linux.h: Fix tcsendbreak() implementation

On 06.10.21 14:30, Pali Rohár wrote: There are two Linux ioctls which implements tcsendbreak() functionality: TCSBRK and TCSBRKP TCSBRK with non-zero parameter implements tcdrain() and with zero parameter implements tcsendbreak() for duration of 0.25s. TCSBRKP with zero parameter is same as

Re: [PATCH] cmd: tlv_eeprom

On 12.09.21 09:25, sven.auha...@voleatech.de wrote: From: Sven Auhagen The function show_eeprom is missing int i if debug is enabled. Signed-off-by: Sven Auhagen Reviewed-by: Stefan Roese Thanks, Stefan --- cmd/tlv_eeprom.c | 3 +++ 1 file changed, 3 insertions(+) diff --git

Re: [PATCH u-boot-marvell 12/12] arm: mvebu: turris_omnia: Move CONFIG_SPL_DRIVERS_MISC to Kconfig

On 09.10.21 19:33, Marek Behún wrote: From: Marek Behún Instead of declaring CONFIG_SPL_DRIVERS_MISC in board config header, select it in Kconfig. Signed-off-by: Marek Behún Reviewed-by: Stefan Roese Thanks, Stefan --- arch/arm/mach-mvebu/Kconfig| 1 +

Re: [PATCH u-boot-marvell 11/12] arm: mvebu: turris_omnia: Move SPL's SYS_MALLOC_SIMPLE to Kconfig

On 09.10.21 19:33, Marek Behún wrote: From: Marek Behún Instead of declaring CONFIG_SYS_MALLOC_SIMPLE dependant on CONFIG_SPL_BUILD in board config header, select CONFIG_SPL_SYS_MALLOC_SIMPLE in Kconfig. Signed-off-by: Marek Behún Reviewed-by: Stefan Roese Thanks, Stefan ---

Re: [PATCH u-boot-marvell 10/12] arm: mvebu: turris_omnia: Use show_board_info()

On 09.10.21 19:33, Marek Behún wrote: From: Marek Behún We are printing board information in checkboard() function, which is called from the default weak implementation of show_board_info(). Rename checkboard() to show_board_info(). This throws away the weak implementation of

Re: [PATCH u-boot-marvell 09/12] arm: mvebu: turris_omnia: Overwrite ethaddr only if invalid

On 09.10.21 19:33, Marek Behún wrote: From: Marek Behún Currently we always overwrite ethaddrs with those from EEPROM. In order to allow user to use a cloned MAC address in U-Boot, change the code so that it sets ethaddr variables only if they aren't set or are invalid. Signed-off-by: Marek

Re: [PATCH u-boot-marvell 08/12] arm: mvebu: turris_mox: Better check for valid ethernet addresses in env

On 09.10.21 19:33, Marek Behún wrote: From: Marek Behún Currently we overwrite ethaddr and eth1addr only if these variables don't exist. Better overwrite them even if the env variable exists, but is invalid - eth_env_get_enetaddr_by_index() checks for validity. Refactor the code to use a for

[RESEND PATCH] usb: mtu3: flush cache for the first GPD when allocate GPD ring

When allocate the GPD ring, and tell its address to the controller, then the driver starts or resumes the QMU, the controller will try to access the first GPD, so need flush the first one to avoid wrong GPD status. Reported-by: Xin Lin Signed-off-by: Chunfeng Yun ---

Re: [PATCH u-boot-marvell 07/12] arm: mvebu: turris_mox: Always handle reset button

On 09.10.21 19:33, Marek Behún wrote: From: Marek Behún Handle reset button even if we can't configure modules. This happens if we fail retrieving reset GPIO with which we can reset the modules. (Note that this GPIO is different from reset button GPIO.) Signed-off-by: Marek Behún

Re: [PATCH u-boot-marvell 06/12] arm: mvebu: turris_mox: Use show_board_info()

On 09.10.21 19:33, Marek Behún wrote: From: Marek Behún We are printing board information in last_stage_init(), but U-Boot has dedicated function, show_board_info(), for this. Move code which prints board information (board version, serial number, module topology, ...) to show_board_info().

Re: [PATCH u-boot-marvell 05/12] arm: mvebu: turris_mox: Cosmetic update for board config header

On 09.10.21 19:33, Marek Behún wrote: From: Marek Behún Reorder the definitions in Turris MOX' board config header, drop the comment relics from when this file was copied, fix indentation. Signed-off-by: Marek Behún Reviewed-by: Stefan Roese Thanks, Stefan ---

Re: [PATCH u-boot-marvell 04/12] arm: kirkwood, mvebu: Remove CONFIG_SYS_RESET_ADDRESS option

On 09.10.21 19:33, Marek Behún wrote: From: Marek Behún This option is not used anywhere. Signed-off-by: Marek Behún Reviewed-by: Stefan Roese Thanks, Stefan --- include/configs/SBx81LIFKW.h| 5 - include/configs/SBx81LIFXCAT.h | 5 - include/configs/edminiv2.h

Re: [PATCH u-boot-marvell 03/12] arm: mvebu: a3720: Create Kconfig option for I2C_MV

On 09.10.21 19:33, Marek Behún wrote: From: Marek Behún Move the config option CONFIG_I2C_MV to a Kconfig option CONFIG_SYS_I2C_MV and move the default definition from config header files into defconfigs. Signed-off-by: Marek Behún Reviewed-by: Stefan Roese Thanks, Stefan ---

Re: [PATCH u-boot-marvell 02/12] arm: mvebu: turris_mox: Move options to defconfig

On 09.10.21 19:33, Marek Behún wrote: From: Marek Behún Move config options CONFIG_LAST_STAGE_INIT and CONFIG_DISPLAY_BOARDINFO_LATE to turris_mox_defconfig. Signed-off-by: Marek Behún Reviewed-by: Stefan Roese Thanks, Stefan --- configs/turris_mox_defconfig | 2 ++

Re: [PATCH u-boot-marvell 01/12] arm: mvebu: turris_mox: Drop SF_DEFAULT_MODE from defconfig

On 09.10.21 19:33, Marek Behún wrote: From: Marek Behún This config option defaults to 0, so it is redundant in defconfig. Signed-off-by: Marek Behún Already removed by Tom's recent sync. Thanks, Stefan --- configs/turris_mox_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git

[PATCH] doc: Remove obsolete doc/README.nand-boot-ppc440

The PPC440 support has been removed in commit 98f705c9ce ("powerpc: remove 4xx support"). This patch removes this obsolete file as well. Signed-off-by: Stefan Roese Cc: Heinrich Schuchardt Cc: Thomas Huth --- doc/README.nand-boot-ppc440 | 60 - 1 file

Re: [PATCH] doc: Remove obsolete README.440-DDR-performance file

On 21.10.21 00:32, Heinrich Schuchardt wrote: On 10/19/21 9:25 AM, Thomas Huth wrote: The PPC 440 support has been removed in commit 98f705c9ce ("powerpc: remove 4xx support") already, so this file is certainly not required anymore. Signed-off-by: Thomas Huth Reviewed-by: Stefan Roese ---  

Re: [RFC PATCH 01/23] sunxi: pinctrl: Create the driver skeleton

On 10/21/21 12:55 AM, Samuel Holland wrote: Create a do-nothing driver for each sunxi pin controller variant. Since only one driver can automatically bind to a DT node, since the GPIO driver already requires a manual binding process, and since the pinctrl driver needs access to some of the

[RFC PATCH 23/23] spi: sun4i_spi: Remove non-DM pin setup

This is now handled automatically by the pinctrl driver. Signed-off-by: Samuel Holland --- drivers/spi/spi-sunxi.c | 83 - 1 file changed, 83 deletions(-) diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c index bc2f544e86..b6cd7ddafa 100644

[RFC PATCH 21/23] pwm: sunxi: Remove non-DM pin setup

This is now handled automatically by the pinctrl driver. Signed-off-by: Samuel Holland --- arch/arm/include/asm/arch-sunxi/gpio.h | 1 - drivers/pwm/sunxi_pwm.c| 11 --- 2 files changed, 12 deletions(-) diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h

[RFC PATCH 22/23] pinctrl: sunxi: Add SPI0 pinmuxes

Pin lists and mux values were taken from the Linux drivers. Signed-off-by: Samuel Holland --- drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 1 + drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 1 + drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 1 + drivers/pinctrl/sunxi/pinctrl-sun50i-h6.c | 1

[RFC PATCH 09/23] pinctrl: sunxi: Add sunxi GMAC pinmuxes

Pin lists and mux values were taken from the Linux drivers. Signed-off-by: Samuel Holland --- drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c | 1 + drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c | 1 + drivers/pinctrl/sunxi/pinctrl-sun9i-a80.c | 1 + 3 files changed, 3 insertions(+) diff --git

[RFC PATCH 19/23] sunxi: Remove non-DM MMC pin setup

This is now handled automatically by the pinctrl driver. Signed-off-by: Samuel Holland --- board/sunxi/board.c | 11 --- 1 file changed, 11 deletions(-) diff --git a/board/sunxi/board.c b/board/sunxi/board.c index d1fc95dfb2..88f01484bd 100644 --- a/board/sunxi/board.c +++

[RFC PATCH 18/23] pinctrl: sunxi: Add MMC pinmuxes

Pin lists and mux values were taken from the Linux drivers. Signed-off-by: Samuel Holland --- drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 8 drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 3 +++ drivers/pinctrl/sunxi/pinctrl-sun50i-h5.c | 3 +++

[RFC PATCH 08/23] net: sunxi_emac: Remove non-DM pin setup

This is now handled automatically by the pinctrl driver. Signed-off-by: Samuel Holland --- arch/arm/include/asm/arch-sunxi/gpio.h | 1 - drivers/net/sunxi_emac.c | 5 - 2 files changed, 6 deletions(-) diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h

[RFC PATCH 20/23] pinctrl: sunxi: a64: Add the PWM pinmux

This is the only possible mux setting for the PWM peripheral. Signed-off-by: Samuel Holland --- drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c index

[RFC PATCH 17/23] i2c: sun8i_rsb: Only do non-DM pin setup for non-DM I2C

When the DM_I2C driver is loaded, the pin setup is done automatically from the device tree by the pinctrl driver. Clean up the code in the process: remove #ifdefs and recognize that the pin configuration is the same for all sun8i/sun50i SoCs, not just those which select CONFIG_MACH_SUN8I.

[RFC PATCH 14/23] sunxi: Remove options and setup code for I2C2-I2C4

These options are not currently enabled anywhere. Any new users should use DM clocks and pinctrl. Signed-off-by: Samuel Holland --- arch/arm/include/asm/arch-sunxi/gpio.h | 9 - arch/arm/include/asm/arch-sunxi/i2c.h | 11 +- arch/arm/mach-sunxi/Kconfig| 22

[RFC PATCH 13/23] pinctrl: sunxi: Add I2C pinmuxes

Where multiple options were available, the one matching board.c and the device trees was chosen. Pin lists and mux values were taken from the Linux drivers. Signed-off-by: Samuel Holland --- drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 2 ++ drivers/pinctrl/sunxi/pinctrl-sun50i-a64-r.c |

[RFC PATCH 16/23] i2c: sun6i_p2wi: Only do non-DM pin setup for non-DM I2C

When the DM_I2C driver is loaded, the pin setup is done automatically from the device tree by the pinctrl driver. Signed-off-by: Samuel Holland --- drivers/i2c/sun6i_p2wi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/sun6i_p2wi.c

[RFC PATCH 15/23] sunxi: Remove non-DM I2C clock/pin setup from U-Boot

This is now handled automatically by the clock and pinctrl drivers. SPL still calls this function because it needes the non-DM code. Signed-off-by: Samuel Holland --- board/sunxi/board.c | 8 1 file changed, 8 deletions(-) diff --git a/board/sunxi/board.c b/board/sunxi/board.c index

[RFC PATCH 12/23] net: sun8i_emac: Remove non-DM pin setup

This is now handled automatically by the pinctrl driver. Signed-off-by: Samuel Holland --- drivers/net/sun8i_emac.c | 90 1 file changed, 90 deletions(-) diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index 2e24d12214..b23faa228e

[RFC PATCH 06/23] sunxi: Skip non-DM UART pin setup when PINCTRL=y

When a pinctrl driver is available, it will take care of setting up these pins. However, for now this code is still needed in SPL. Signed-off-by: Samuel Holland --- arch/arm/mach-sunxi/board.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-sunxi/board.c

[RFC PATCH 07/23] pinctrl: sunxi: Add sun4i EMAC pinmuxes

Pin lists and mux values were taken from the Linux drivers. Signed-off-by: Samuel Holland --- drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 1 + drivers/pinctrl/sunxi/pinctrl-sun5i-a13.c | 1 + drivers/pinctrl/sunxi/pinctrl-sun7i-a20.c | 1 + 3 files changed, 3 insertions(+) diff --git

[RFC PATCH 05/23] pinctrl: sunxi: Add UART pinmuxes

This includes UART0 and R_UART (s_uart) on all supported platforms, plus the additional UART configurations from arch/arm/mach-sunxi/board.c. Pin lists and mux values were taken from the Linux drivers. Signed-off-by: Samuel Holland --- drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c | 5 +

[RFC PATCH 04/23] sunxi: pinctrl: Implement pin configuration

The sunxi pinctrl hardware has bias and drive control. Add driver support for configuring those options. Signed-off-by: Samuel Holland --- drivers/pinctrl/sunxi/Kconfig | 1 + drivers/pinctrl/sunxi/pinctrl-sunxi.c | 53 +++ 2 files changed, 54 insertions(+)

[RFC PATCH 02/23] sunxi: pinctrl: Implement pin muxing functions

Implement the operations to get pin and function names, and to set the mux for a pin. The pin count and pin names are calculated as if each bank has the maximum number of pins. Function names are simply the index into a list of { function name, mux value } pairs. We assume all pins associated

[RFC PATCH 01/23] sunxi: pinctrl: Create the driver skeleton

Create a do-nothing driver for each sunxi pin controller variant. Since only one driver can automatically bind to a DT node, since the GPIO driver already requires a manual binding process, and since the pinctrl driver needs access to some of the same information, refactor the GPIO driver to be

[RFC PATCH 03/23] sunxi: pinctrl: Implement get_pin_muxing function

The pinmux command uses this function to display pinmux status. Since the driver cannot map pin numbers to a list of supported functions, only functions which are common across all pins can be reported by name. Signed-off-by: Samuel Holland --- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 27

[RFC PATCH 00/23] sunxi: Add and use a pinctrl driver

This series resolves some longstanding TODOs by implementing a pinctrl driver for sunxi platforms and converting DM drivers to use it. I am sending this as RFC because I have only tested this on a limited amount of hardware, and there are quite a few magic numbers involved, so it is likely I

[PATCH 4/4] mmc: sunxi: Use DM_GPIO flags to set pull-up

Now that the sunxi_gpio driver handles pull-up/down via the driver model, pin configuration does not need a platform-specific function. Signed-off-by: Samuel Holland --- drivers/mmc/sunxi_mmc.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/sunxi_mmc.c

[PATCH 2/4] sunxi: gpio: Add per-bank drive and pull setters

The GPIO and pinctrl drivers need these setters for pin configuration. Since they are DM drivers, they should not be using hardcoded base addresses. Factor out variants of the setter functions which take a pointer to the GPIO bank's MMIO registers. Signed-off-by: Samuel Holland ---

[PATCH 3/4] gpio: sunxi: Implement .set_flags

This, along with gpio_flags_xlate(), allows the GPIO driver to handle pull-up/down flags provided by consumer drivers or in the device tree. Signed-off-by: Samuel Holland --- drivers/gpio/sunxi_gpio.c | 62 +-- 1 file changed, 27 insertions(+), 35

[PATCH 0/4] gpio: sunxi: Handle pin configuration flags

This series updates the sunxi GPIO driver to handle pin pull-up/down, so consumer drivers do not need to call the non-DM sunxi_gpio_set_* functions. As an example, the last patch updates the MMC driver to use this functionality. The helpers added here will also be used for the upcoming DM_PINCTRL

[PATCH 1/4] sunxi: gpio: Return void from setter functions

The return values of these functions are always zero, and they are never checked. Since they are not needed, remove them. Signed-off-by: Samuel Holland --- arch/arm/include/asm/arch-sunxi/gpio.h | 4 ++-- arch/arm/mach-sunxi/pinmux.c | 8 ++-- 2 files changed, 4 insertions(+), 8

RE: [PATCH next v7 01/12] image: fit: Fix parameter name for hash algorithm

> From: Joel Stanley > Sent: Thursday, October 21, 2021 8:08 AM > > On Wed, 20 Oct 2021 at 02:49, Chia-Wei Wang > wrote: > > > > Fix inconsistent function parameter name of the hash algorithm. > > > > Signed-off-by: Chia-Wei Wang > > Fixes: 92055e138f2 ("image: Drop if/elseif hash selection in

questions about mkimage and a good tutorial

Hello all, I'm learning about u-boot these days and have a basic question about mkimage. I saw in a pdf document (opdenacker ) this command. mkimage -A arm -O linux -C none -T kernel \ -a 0x20008000 -e 0x20008000 \ -n "Linux-5.12.6" \ -d arch/arm/boot/zImage arch/arm/boot/uImage 1. It

RE: [PATCH next v7 04/12] crypto: aspeed: Add AST2600 HACE support

> From: Joel Stanley > Sent: Thursday, October 21, 2021 8:08 AM > > On Wed, 20 Oct 2021 at 02:50, Chia-Wei Wang > wrote: > > > > From: Johnny Huang > > > > Hash and Crypto Engine (HACE) is designed to accelerate the throughput > > of hash data digest, and symmetric-key encryption. > > > >

RE: [PATCH next v7 07/12] crypto: aspeed: Add AST2600 ACRY support

> From: Joel Stanley > Sent: Thursday, October 21, 2021 8:25 AM > > On Wed, 20 Oct 2021 at 02:50, Chia-Wei Wang > wrote: > > > > ACRY is deisnged to accerlerate ECC/RSA digital signature > > designed > accelerate Thanks for pointing out the typo. It will be fixed in the next revision

RE: [PATCH next v7 11/12] configs: aspeed: Make EXTRA_ENV_SETTINGS board specific

> From: Joel Stanley > Sent: Thursday, October 21, 2021 8:31 AM > > On Wed, 20 Oct 2021 at 02:50, Chia-Wei Wang > wrote: > > > > Move CONFIG_EXTRA_ENV_SETTINGS to board-specific configuration > > headers. > > > > Signed-off-by: Chia-Wei Wang > > --- > > include/configs/aspeed-common.h | 9

RE: [PATCH next v7 04/12] crypto: aspeed: Add AST2600 HACE support

> From: Dhananjay Phadke > Sent: Thursday, October 21, 2021 9:33 AM > > On Wed, 20 Oct 2021, Chia-Wei Wang wrote: > > > +static const struct hash_ops aspeed_hace_ops = { > > + .hash_init = aspeed_hace_init, > > + .hash_update = aspeed_hace_update, > > + .hash_finish = aspeed_hace_finish,

Re: [PATCH next v7 04/12] crypto: aspeed: Add AST2600 HACE support

On Wed, 20 Oct 2021, Chia-Wei Wang wrote: > +static const struct hash_ops aspeed_hace_ops = { > + .hash_init = aspeed_hace_init, > + .hash_update = aspeed_hace_update, > + .hash_finish = aspeed_hace_finish, > + .hash_digest_wd = aspeed_hace_digest_wd, > + .hash_digest =

[PATCH 1/1] doc: require Sphinx 3.4.3

For enums documented according to the requirements in chapter "Structure, union, and enumeration documentation" of https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.html errors occur with Sphinx 2.4.4 which disappear with Sphinx 3.4.3, e.g.

Re: i.MX LPDDR4 Firmware

On 2021/10/20 14:27, Marcel Ziswiler wrote: On Tue, 2021-10-19 at 15:04 +0200, Heiko Thiery wrote:  Hi Marcel, Am Di., 19. Okt. 2021 um 11:47 Uhr schrieb Marcel Ziswiler : Hi Heiko On Mon, 2021-10-18 at 11:23 +0200, Heiko Thiery wrote: Hi all, I see that in the NXP firmware-imx

Re: [PATCH next v7 11/12] configs: aspeed: Make EXTRA_ENV_SETTINGS board specific

On Wed, 20 Oct 2021 at 02:50, Chia-Wei Wang wrote: > > Move CONFIG_EXTRA_ENV_SETTINGS to board-specific > configuration headers. > > Signed-off-by: Chia-Wei Wang > --- > include/configs/aspeed-common.h | 9 - > include/configs/evb_ast2500.h | 9 + >

Re: [PATCH next v7 10/12] configs: ast2600-evb: Enable SPL FIT support

On Wed, 20 Oct 2021 at 02:50, Chia-Wei Wang wrote: > > Enable SPL FIT image load and verification support. > The HW accelerated SHA is also available with the > newly added support of the HACE HW hash engine. > > The SPL thumb build is also enabled to keep the binary > less than 64KB to fit into

Re: [PATCH next v7 09/12] ast2600: spl: Locate load buffer in DRAM space

On Wed, 20 Oct 2021 at 02:50, Chia-Wei Wang wrote: > > Return CONFIG_SYS_LOAD_ADDR pointing to DRAM space for > spl_get_load_buffer() to allow generic SPL image loading > code (e.g. FIT and Ymodem) to store data in DRAM. > > Signed-off-by: Chia-Wei Wang Reviewed-by: Joel Stanley > --- >

Re: [PATCH next v7 08/12] ARM: dts: ast2600: Add ACRY to device tree

On Wed, 20 Oct 2021 at 02:50, Chia-Wei Wang wrote: > > Add ACRY DTS node and enable it for AST2600 EVB. > > Signed-off-by: Chia-Wei Wang Reviewed-by: Joel Stanley > --- > arch/arm/dts/ast2600-evb.dts | 5 + > arch/arm/dts/ast2600.dtsi| 9 + > 2 files changed, 14 insertions(+)

Re: [PATCH next v7 07/12] crypto: aspeed: Add AST2600 ACRY support

On Wed, 20 Oct 2021 at 02:50, Chia-Wei Wang wrote: > > ACRY is deisnged to accerlerate ECC/RSA digital signature designed accelerate > generation and verification. > > Signed-off-by: Chia-Wei Wang > --- > drivers/crypto/aspeed/Kconfig | 10 ++ > drivers/crypto/aspeed/Makefile |

Re: [PATCH v3 1/3] efi_loader: add SMBIOS table measurement

On 10/1/21 1:18 PM, Masahisa Kojima wrote: TCG PC Client spec requires to measure the SMBIOS I guess you mean the "TCG PC Client Platform Firmware Profile Specification"? Please, provide the full name in the commit message. table that contain static configuration information (e.g. Platform

Re: [PATCH next v7 04/12] crypto: aspeed: Add AST2600 HACE support

On Wed, 20 Oct 2021 at 02:50, Chia-Wei Wang wrote: > > From: Johnny Huang > > Hash and Crypto Engine (HACE) is designed to accelerate the > throughput of hash data digest, and symmetric-key encryption. > > Signed-off-by: Johnny Huang > Signed-off-by: Chia-Wei Wang I see you've re-written the

Re: [PATCH next v7 02/12] aspeed: ast2600: Enlarge SRAM size

On Wed, 20 Oct 2021 at 02:49, Chia-Wei Wang wrote: > > The AST2600 SRAM has been extended to 88KB since A1 > chip revision. This patch updates the SRAM size to > offer more space for early stack/heap use. > > Signed-off-by: Chia-Wei Wang Reviewed-by: Joel Stanley > --- >

Re: [PATCH next v7 01/12] image: fit: Fix parameter name for hash algorithm

On Wed, 20 Oct 2021 at 02:49, Chia-Wei Wang wrote: > > Fix inconsistent function parameter name of the hash algorithm. > > Signed-off-by: Chia-Wei Wang > Fixes: 92055e138f2 ("image: Drop if/elseif hash selection in > calculate_hash()") Reviewed-by: Joel Stanley This fix should go in

Re: [PATCH next v7 06/12] clk: ast2600: Add RSACLK control for ACRY

On Wed, 20 Oct 2021 at 02:50, Chia-Wei Wang wrote: > > Add RSACLK enable for ACRY, the HW RSA/ECC crypto engine > of ASPEED AST2600 SoCs. > > As ACRY and HACE share the same reset control bit, we do not > perform the reset-hold-n-release operation during their clock > ungating process. Instead,

Re: [PATCH v4 4/4] sunxi: Support building a SPL as a TOC0 image

On Tue, 19 Oct 2021 21:44:54 -0500 Samuel Holland wrote: Hi, > Now that mkimage can generate TOC0 images, and the SPL can interpret > them, hook up the build infrastructure so the user can choose which > image type to build. Since the absolute load address is stored in the > TOC0 header, that

Re: [PATCH v4 3/4] sunxi: Support SPL in both eGON and TOC0 images

On Tue, 19 Oct 2021 21:44:53 -0500 Samuel Holland wrote: > SPL uses the image header to detect the boot device and to find the > offset of the next U-Boot stage. Since this information is stored > differently in the eGON and TOC0 image headers, add code to find the > correct value based on the

Re: [PATCH v4 2/4] tools: mkimage: Add Allwinner TOC0 support

On Tue, 19 Oct 2021 21:44:52 -0500 Samuel Holland wrote: > Most Allwinner sunxi SoCs have separate boot ROMs in non-secure and > secure mode. The "non-secure" or "normal" boot ROM (NBROM) uses the > existing sunxi_egon image type. The secure boot ROM (SBROM) uses a > completely different image

Re: IMX8M OP-TEE

On Wed, Oct 20, 2021 at 9:47 AM Igor Opaniuk wrote: > > Hi Tim, > > On Thu, Oct 14, 2021 at 10:03 PM Tim Harvey wrote: > > > > On Mon, Oct 11, 2021 at 3:15 PM Tim Harvey wrote: > > > > > > Greetings, > > > > > > Is anyone successfully booting U-Boot with OP-TEE support on the IMX8M? > > > > >

Re: [PATCH v2 01/39] RFC: efi: Drop code that doesn't work with driver model

On 9/25/21 2:30 AM, Simon Glass wrote: This code should never have been added as it builds a new feature on top of legacy code. This has already been improved with the dependency on BLK. Add a dependency on DM_ETH also, to avoid needing to deal with this old code. Boards which want EFI_LOADER

Re: [PATCH 2/2] dt-bindings: u-boot: Add an initial binding for config

Hi Rob, On Mon, 18 Oct 2021 at 16:26, Rob Herring wrote: > > On Wed, Oct 13, 2021 at 11:33 AM Simon Glass wrote: > > > > " > > Hi Rob, > > > > On Tue, 12 Oct 2021 at 09:05, Rob Herring wrote: > > > > > > On Tue, Oct 12, 2021 at 8:41 AM Simon Glass wrote: > > > > > > > > Hi Rob, > > > > > > >

Re: [PATCH] doc: Remove obsolete README.440-DDR-performance file

On 10/19/21 9:25 AM, Thomas Huth wrote: The PPC 440 support has been removed in commit 98f705c9ce ("powerpc: remove 4xx support") already, so this file is certainly not required anymore. Signed-off-by: Thomas Huth Reviewed-by: Stefan Roese --- doc/README.440-DDR-performance | 90

[PATCH v3] driver: spi: add bcm iproc qspi support.

From: Rayagonda Kokatanur IPROC qspi driver supports both BSPI and MSPI modes. Signed-off-by: Rayagonda Kokatanur Signed-off-by: Bharat Gooty Acked-by: Rayagonda Kokatanur Signed-off-by: Roman Bacik --- Changes in v3: - fix warning by including linux/delay.h - change ofdata_to_platdata to

Re: [PATCH] efi_loader: Fix link of EFI apps with ld.lld

On 10/20/21 11:31 PM, Alistair Delva wrote: When compiling U-Boot with ld.lld as the linker, the helloworld EFI app example fails to link: LD lib/efi_loader/helloworld_efi.so ld.lld: error: section: .dynamic is not contiguous with other relro sections LLD will

Re: [PATCH v1 2/2] x86: edison: Don't take SD card detect pin into consideration

Hi, Op 15-10-2021 om 19:11 schreef Andy Shevchenko: There are two PCB designs in the wild which use the opposite signaling for SD card detect. This makes U-Boot working in one case and failing in the other. Quirk this out by disconnecting SD card detect pin from the PCB by switching to mode 3.

[PATCH] arm64: relocate-rela: Add support for ld.lld

Cap end of relocations by the binary size. Linkers like to insert some auxiliary sections between .rela.dyn and .bss_start. These sections don't make their way to the final binary, but reloc_rela still tries to relocate them, resulting in attempted read past the end of file. When linking U-Boot

CRC32 endianess

Dear U-boot maintainers, I'm working on an Xilinx Zynqmp project ( Checkout tag xilinx-v2019.1 ) (ARM Cortex A53 ) and I'm facing an endianess mix-up. I'm no C-code guru, so I hope you'll stick here with me for a while. In this

[PATCH] ARM: imx8m: support env in fat and ext4

Change boot device logic to also allow environment stored in fat and in ext4 when booting from SD or from eMMC. As the boot device check for SD and for eMMC was depending on ENV_IS_IN_MMC being defined, change the ifdef blocks at env_get_location to use IS_ENABLED instead for all modes, returning

Re: [PATCH] arm: dts: sun50i-h6-orangepi-3: disable aldo2 regulator

Hi. Thanks for explanation, I'm new to mailing lists, so I appreciate this. Also I'm happy to hear that any work is done to address that issue. >I was thinking about adding a TF-A build option that would skip regulator >setup altogether, which would then become standard in some happy feature

[PATCH v2 3/5] toradex: tdx-cfg-block: add new i.mx 6ull and 8m plus skus

> From: Marcel Ziswiler > Add new i.MX 6ULL and 8M Plus SKUs to ConfigBlock handling: > 0062: Colibri iMX6ULL 1GB IT (eMMC) > 0063: Verdin iMX8M Plus Quad 4GB IT > 0064: Verdin iMX8M Plus Quad 2GB Wi-Fi / BT IT > 0065: Verdin iMX8M Plus QuadLite 1GB IT > 0066: Verdin iMX8M Plus Quad 8GB Wi-Fi /

[PATCH v2 5/5] colibri-imx6ull: add emmc variant

> From: Max Krummenacher > Add code to build the eMMC variant of the Colibri iMX6ULL, i.e. the > 'Colibri iMX6ULL 1GB' which has a eMMC instead of the raw NAND used > on other SKUs. > Related-to: ELB-4056, ELB-4057 > Signed-off-by: Max Krummenacher > Signed-off-by: Marcel Ziswiler Applied to

[PATCH v2 4/5] colibri-imx6ull: imximage.cfg: integrate new 1GiB RAM variant

> From: Philippe Schenker > Integrate new Toradex SKU 0062 Colibri iMX6ULL 1GB IT. This commit > basically adjusts three parameters of the RAM settings: > Increase density from 4Gb to 8Gb > Increase ROW address from 15 to 16 > Increase tRFC (refresh command time) from 260 to 350 > This timing is

[PATCH v5] imx8mm-evk: Generate a single bootable flash.bin again

> After the conversion to binman in commit 8996e6b7c6a1 ("imx8mm_evk: switch > to use binman to pack images"), it is necessary to flash both flash.bin and > u-boot.itb to get a bootable system. Prior to this commit, only flash.bin > was needed. > Such new requirement breaks existing distro

[PATCH] colibri-imx6ull: fix setup of nand gpmi clock

> NXP used to setup the gpmi clock root from gpmi_clk in early versions > in their downstream BSP. [1] > However on mainline the gpmi clock root was always setup from enfc > since the beginning of the i.MX 6 series SoCs, which is still the same > today. [2] > NXP followed the mainline approach at

[PATCH v2 1/5] toradex: take over maintainership

> From: Marcel Ziswiler > Also take over maintainership of remaining Toradex SoMs as Oleksandr > has left our company. > Signed-off-by: Marcel Ziswiler > CC: Oleksandr Suvorov Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic --

[PATCH v2 2/5] toradex: configblock: fix interactive mode it handling

> From: Denys Drozdov > Restore "Is the module an IT version? [y/N]" for "cfgblock create" > interactive mode command, which was leading to invalid detection > of 0051 Colibri iMX8DX 1GB WB module; > Fixes: a5b5ad4d859b ("toradex: tdx-cfg-clock: add new i.mx 8m mini/plus skus") > Related-to:

[PATCH 2/2] doc: imx: psb: Add documentation for MX8MM behavior with Fast Boot fuse blown

> On iMX8MM with Fast Boot fuse blown, the SIT and A-copy image are > placed at different offset than on iMX8MM with Fast Boot fuse NOT > blown. List both options and both offsets to avoid confusion. > Signed-off-by: Marek Vasut > Cc: Marcel Ziswiler > Cc: Peng Fan > Cc: Stefano Babic > Cc: Ye

[PATCH 1/2] doc: imx: psb: Fix PERSIST_SECONDARY_BOOT bit location in GPR10

> The PERSIST_SECONDARY_BOOT is in GPR10 address 0x30390098, adjust the > text which currently says it is in GPR0 while using the correct address > of GPR10. > Signed-off-by: Marek Vasut > Cc: Marcel Ziswiler > Cc: Peng Fan > Cc: Stefano Babic > Cc: Ye Li > Cc: uboot-imx > Reviewed-by:

Re: IMX8M OP-TEE

Hi Tim, On Thu, Oct 14, 2021 at 10:03 PM Tim Harvey wrote: > > On Mon, Oct 11, 2021 at 3:15 PM Tim Harvey wrote: > > > > Greetings, > > > > Is anyone successfully booting U-Boot with OP-TEE support on the IMX8M? > > > > My understanding is that you need to add tee.bin to the images in the > >

[PATCH 0/2] AM64: Add support for USB

Add support for USB 3.0 TYPE A port on AM642 SK board The following series of patches are dependent on, - https://patchwork.ozlabs.org/project/uboot/list/?series=268093 - https://patchwork.ozlabs.org/project/uboot/list/?series=268092 Aswath Govindraju (1): configs: am64x_evm_*_defconfig: Add

[PATCH 2/2] configs: am64x_evm_*_defconfig: Add configs to enable serdes for USB 3.0 support

Add configs to enable serdes for USB 3.0 support. Signed-off-by: Aswath Govindraju --- configs/am64x_evm_a53_defconfig | 15 +++ configs/am64x_evm_r5_defconfig | 13 + 2 files changed, 28 insertions(+) diff --git a/configs/am64x_evm_a53_defconfig

[PATCH 1/2] arm: dts: am642-sk: Add and Enable USB SuperSpeed Host Port in SPL

From: Kishon Vijay Abraham I Add and Enable USB SuperSpeed Host Port in SPL. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Aswath Govindraju --- arch/arm/dts/k3-am642-r5-sk.dts | 40 arch/arm/dts/k3-am642-sk-u-boot.dtsi | 33 +++ 2

[PATCH] usb: cdns3: cdns3-ti: Add compatible for AM64 SoC

Add new compatible for AM64 SoC. Signed-off-by: Aswath Govindraju --- drivers/usb/cdns3/cdns3-ti.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/usb/cdns3/cdns3-ti.c b/drivers/usb/cdns3/cdns3-ti.c index 43171678ee17..8958f0166bd5 100644 --- a/drivers/usb/cdns3/cdns3-ti.c +++

[PATCH] phy: cadence: phy-cadence-torrent: Change the name of subnode searched

Search for "phy" in the subnode names, to syncup with kernel. Signed-off-by: Aswath Govindraju --- drivers/phy/cadence/phy-cadence-torrent.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/phy/cadence/phy-cadence-torrent.c

[PATCH 1/1] arm64: zynqmp: allow overriding board name

There is no need to use zynqmp name as SYS_BOARD for all boards. The patch is adding an option to change it. Signed-off-by: Liam Beguin --- arch/arm/mach-zynqmp/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig index

[PATCH 5/9] arm: dts: phycore-imx8mm-u-boot: Add wdog pinctrl entry

> Add missing pinctrl entry in spl. > Signed-off-by: Teresa Remmet Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235

[PATCH v6 10/11] verdin-imx8mm: use preboot for fdtfile evaluation

> From: Igor Opaniuk > Enable and set preboot var with fdtfile evaluation. > It will be checked and run immediately before starting the > CONFIG_BOOTDELAY countdown and/or running the auto-boot command resp. > entering interactive mode. > This provides possibility to use different boot cmds in

[PATCH v6 06/11] verdin-imx8mm: enable sleep_moci output

> From: Max Krummenacher > This powers some peripherals on the carrier board e.g. the USB hub. > Related-to: ELB-3206 > Signed-off-by: Max Krummenacher > Signed-off-by: Marcel Ziswiler > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic --

[PATCH v6 08/11] verdin-imx8mm: drop support for v1.0 hardware

> From: Max Krummenacher > We drop support for Verdin iMX8M Mini V1.0B. > Related-to: ELB-3551 > Signed-off-by: Max Krummenacher > Signed-off-by: Marcel Ziswiler > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic --

[PATCH v6 02/11] verdin-imx8mm: fix ethernet

> From: Marcel Ziswiler > Turns out Microship (formerly Micrel) meanwhile integrated proper > support for the DLL setup on their KSZ9131. Unfortunately, this > conflicts with our previous board code doing that. > Fix this by getting rid of our board code and just relying on the > generic

[PATCH 3/9] include: configs: phycore-imx8mm: Remove not needed defines

> Remove obsolet defines in phycore_imx8mm.h. > Signed-off-by: Teresa Remmet Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB

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