Hi Pali,
Follow up on the topic of slow/fast SPL SPI loading.
common/spl/spl_spi.c
/*
* Load U-Boot image from SPI flash into RAM
* In DM mode: defaults speed and mode will be
* taken from DT when available
*/
flash = spi_flash_probe(sf_bus,
Am 4. August 2022 21:23:01 MESZ schrieb Simon Glass :
>Hi Heinrich,
>
>On Wed, 3 Aug 2022 at 23:53, Heinrich Schuchardt wrote:
>>
>>
>>
>> On 8/3/22 20:13, Simon Glass wrote:
>> > Hi Heinrich,
>> >
>> > I am seeing this:
>> >
>> >
On Fri, Jul 22, 2022 at 07:55:53PM +0200, Michal Vasilek wrote:
> RSA_get0_* functions are not available in LibreSSL
>
> Signed-off-by: Michal Vasilek
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Jul 20, 2022 at 12:31:35PM +0200, Heiko Thiery wrote:
> Instead of hardcoding -ltinfo as the flags needed to build
> kwboot, use pkg-config when available.
>
> We gracefully fallback on the previous behavior of hardcoding -ltinfo
> if pkg-config is not available or fails with an error.
>
On Thu, Jul 14, 2022 at 08:53:46AM +0200, Heinrich Schuchardt wrote:
> No board uses lcd_clear() anymore. So we can remove support for it.
>
> Signed-off-by: Heinrich Schuchardt
Applied to u-boot/master, thanks!
--
Tom
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On Wed, Jul 20, 2022 at 12:31:33PM +0200, Heiko Thiery wrote:
> Instead of hardcoding -luuid -lgnutls as the flags needed to build
> mkeficapsule, use pkg-config when available.
>
> We gracefully fallback on the previous behavior of hardcoding -luuid
> -lgnutls if pkg-config is not available or
On Tue, Jul 12, 2022 at 05:44:22PM +0200, Quentin Schulz wrote:
> From: Quentin Schulz
>
> Since commit 2a7360666871 ("serial: Rename SERIAL_SUPPORT to SERIAL")
> SPL_SERIAL_SUPPORT is named SPL_SERIAL. So let's update the comment to
> point to the correct Kconfig option in the comment of
On Tue, Jul 12, 2022 at 05:44:21PM +0200, Quentin Schulz wrote:
> From: Quentin Schulz
>
> Since commit 103c5f180694 ("mmc: Rename MMC_SUPPORT to MMC"),
> SPL_MMC_SUPPORT is named SPL_MMC, so let's fix the ifdef.
>
> Fixes: fbc6b1414342 ("imx: imx8mp_rsb3720a1: convert to DM_SERIAL")
> Cc:
On Tue, Jul 12, 2022 at 05:44:19PM +0200, Quentin Schulz wrote:
> From: Quentin Schulz
>
> Since commit 83061dbd1c89 ("Rename GPIO_SUPPORT to GPIO"),
> SPL_GPIO_SUPPORT has been renamed to SPL_GPIO, meaning that SPL_GPIO_HOG
> can never be enabled.
>
> Let's fix this by using the proper name
On Tue, Jul 12, 2022 at 05:44:20PM +0200, Quentin Schulz wrote:
> From: Quentin Schulz
>
> SPL_GPIO_SUPPORT is named SPL_GPIO since commit 83061dbd1c89 ("Rename
> GPIO_SUPPORT to GPIO"), SPL_MMC_SUPPORT is named SPL_MMC since commit
> 103c5f180694 ("mmc: Rename MMC_SUPPORT to MMC"),
On Mon, Jul 11, 2022 at 08:01:12PM +0200, Heinrich Schuchardt wrote:
> If 'extension apply all' is executed and no extension is found, the return
> value of do_extension_apply() is undefined. Return CMD_RET_FAILURE in this
> case.
>
> Fixes: 2f84e9cf06d3 ("cmd: add support for a new "extension"
On Mon, Jul 11, 2022 at 02:35:32PM +0200, Harald Seiler wrote:
> When attempting to load images from multiple MMC devices in sequence,
> spl_mmc_load() chooses the wrong device from the second attempt onwards.
>
> The reason is that MMC initialization is only done on its first call and
>
On Sun, Jul 03, 2022 at 03:49:09PM +0300, Vyacheslav Bocharov wrote:
> The source code contains an error:
> - argv[2] contains arg, variable for env_set is in argv[3]
> - number of args is 4
>
> Revert 54d24d72601321f4470c4edf31c6b29adae424a7
> cmd: simplify do_adc_single()
>
> Fixes
On Fri, Jul 15, 2022 at 11:34:35AM -0500, Andrew Davis wrote:
> If the device is a GP and we detect a signing certificate then remove it.
> It would fail to authenticate otherwise as the device is GP and has no
> secure authentication services in SYSFW.
>
> This shouldn't happen often as trying
On Fri, Jul 15, 2022 at 11:34:34AM -0500, Andrew Davis wrote:
> We can skip the image authentication check at runtime if the device is GP.
> This reduces the delta between GP and HS U-Boot builds. End goal is
> to re-unify the two build types into one build that can run on all
> device types.
>
On Fri, Jul 15, 2022 at 11:34:33AM -0500, Andrew Davis wrote:
> On HS-FS devices signing boot images is optional. To ease use
> we check if we are HS-FS and if no certificate is attached
> to the image we skip the authentication step with a warning
> that this will fail when the device is set to
On Fri, Jul 15, 2022 at 11:34:32AM -0500, Andrew Davis wrote:
> K3 SoCs are available in a number of device types such as
> GP, HS-FS, EMU, etc. Like OMAP SoCs we can detect this at runtime
> and should print this out as part of the SoC information line.
> We add this as part of the common.c file
On Tue, Jul 12, 2022 at 05:24:07PM +0800, Jim Liu wrote:
> add npcm750 BMC full function node
>
> Signed-off-by: Jim Liu
Applied to u-boot/master, thanks!
--
Tom
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On Mon, Jul 04, 2022 at 12:05:38PM +, Dmytro Firsov wrote:
> Some setups do not use Xen hypervisor console for logging, e.g. they
> use emulated PL011 hardware or shared peripherals (real UART). In such
> cases Xen HVC will be disabled on a build time and will cause issues in
> current driver
On Fri, Apr 29, 2022 at 11:50:48AM +0800, Billy Tsai wrote:
> To work correctly, this driver depends on SYSCON to get the base address
> from the parent dts node.
>
> Signed-off-by: Billy Tsai
> Reviewed-by: Chia-Wei Wang
Applied to u-boot/master, thanks!
--
Tom
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Description:
Hi Michal,
On Thu, 4 Aug 2022 at 13:36, Michal Suchánek wrote:
>
> Hello,
>
> On Thu, Aug 04, 2022 at 01:22:57PM -0600, Simon Glass wrote:
> > Hi Michal,
> >
> > On Thu, 4 Aug 2022 at 11:59, Michal Suchanek wrote:
> > >
> > > When probing a device fails NULL pointer is returned, and other
Hi Michal,
On Thu, 4 Aug 2022 at 13:42, Michal Suchánek wrote:
>
> On Thu, Aug 04, 2022 at 01:22:53PM -0600, Simon Glass wrote:
> > Hi Michal,
> >
> > On Thu, 4 Aug 2022 at 11:58, Michal Suchanek wrote:
> > >
> > > Explain when devices should get activated.
> > >
> > > Signed-off-by: Michal
Hi Florian,
On 08/03/2022 08:21 PM, Florian Fainelli wrote:
On 8/2/2022 5:07 PM, William Zhang wrote:
Hi Rafal,
On 08/01/2022 10:26 PM, Rafał Miłecki wrote:
On 2.08.2022 00:03, William Zhang wrote:
This driver supports the peripheral block timer found on the Broadcom
BCA SoCs. It is
On Thu, Aug 04, 2022 at 01:22:53PM -0600, Simon Glass wrote:
> Hi Michal,
>
> On Thu, 4 Aug 2022 at 11:58, Michal Suchanek wrote:
> >
> > Explain when devices should get activated.
> >
> > Signed-off-by: Michal Suchanek
> > ---
> > doc/develop/driver-model/design.rst | 22
Hello,
On Thu, Aug 04, 2022 at 01:22:57PM -0600, Simon Glass wrote:
> Hi Michal,
>
> On Thu, 4 Aug 2022 at 11:59, Michal Suchanek wrote:
> >
> > When probing a device fails NULL pointer is returned, and other devices
> > cannot be iterated. Skip to next device on error instead.
> >
> > Fixes:
Hi Heinrich,
On Wed, 3 Aug 2022 at 23:53, Heinrich Schuchardt wrote:
>
>
>
> On 8/3/22 20:13, Simon Glass wrote:
> > Hi Heinrich,
> >
> > I am seeing this:
> >
> > https://source.denx.de/u-boot/custodians/u-boot-dm/-/jobs/477636
>
> The EFI sub-system recorded successful execution of the test.
>
Hi Michal,
On Thu, 4 Aug 2022 at 11:59, Michal Suchanek wrote:
>
> When probing a device fails NULL pointer is returned, and other devices
> cannot be iterated. Skip to next device on error instead.
>
> Fixes: 6494d708bf ("dm: Add base driver model support")
> Signed-off-by: Michal Suchanek
>
Hi Michal,
On Thu, 4 Aug 2022 at 11:58, Michal Suchanek wrote:
>
> Explain when devices should get activated.
>
> Signed-off-by: Michal Suchanek
> ---
> doc/develop/driver-model/design.rst | 22 --
> 1 file changed, 20 insertions(+), 2 deletions(-)
Reviewed-by: Simon Glass
After adding the poweroff support there are some incorrectly nested
ifdefs. Move the poweroff code outside of ifdef and convert it to if.
Fixes: ad607512f5 ("power: pmic: rk8xx: Support sysreset shutdown method")
Signed-off-by: Michal Suchanek
---
drivers/power/pmic/rk8xx.c | 41
SPL_MMC_SUPPORT is renamed to SPL_MMC in the
commit 103c5f18069 ("mmc: Rename MMC_SUPPORT to MMC")
Fix the name of the option used in TARGET_MX7ULP_COM.
Fixes: ddb56f371a7 ("arm: imx8m: add support for Advantech RSB-3720")
Signed-off-by: Oleksandr Suvorov
---
SPL_MMC_SUPPORT is renamed to SPL_MMC in the
commit 103c5f18069 ("mmc: Rename MMC_SUPPORT to MMC")
Fix the name of that option used in TARGET_MX7ULP_COM.
Fixes: 8b71576f384 ("mx7ulp_com: add support for SPL")
Signed-off-by: Oleksandr Suvorov
---
arch/arm/mach-imx/mx7ulp/Kconfig | 2 +-
1 file
SPL_MMC_SUPPORT option is still used in few places in spite of
renaming in the commit 103c5f18069 ("mmc: Rename MMC_SUPPORT to MMC").
This patch set fixes the rest of SPL_MMC_SUPPORT options.
Oleksandr Suvorov (2):
mx7ulp_com: fix obsolete option SPL_MMC_SUPPORT
arm: imx8m:
On Thu, Jul 21, 2022 at 07:11:47PM +0200, Michal Vasilek wrote:
> RSA_get0_* functions are not available in LibreSSL and deprecated in
> OpenSSL. This fixes build with LibreSSL and removes deprecation warnings
> with OpenSSL 3
>
> Signed-off-by: Michal Vasilek
> Reviewed-by: Simon Glass
This
When probing a device fails NULL pointer is returned, and other devices
cannot be iterated. Skip to next device on error instead.
Fixes: 6494d708bf ("dm: Add base driver model support")
Signed-off-by: Michal Suchanek
---
drivers/core/uclass.c | 30 +-
1 file changed,
Explain when devices should get activated.
Signed-off-by: Michal Suchanek
---
doc/develop/driver-model/design.rst | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/doc/develop/driver-model/design.rst
b/doc/develop/driver-model/design.rst
index
On Sun, Jul 31, 2022 at 4:46 PM Adam Ford wrote:
>
> Every imx8mn board has a bunch of similar entries on their
> respective board-u-boot.dtsi file to make the board bootable.
> Instead of maintaining multiple files with duplicate code,
> have them all point to a new, common file. This file
Makes it easier to add readable GPIO definitions in DTS files
for Aspeed SOC based boards.
Ported with small edits to add IBM copyright statement and fix
for checkpatch warning.
Signed-off-by: Dhananjay Phadke
Reviewed-by: Billy Tsai
Acked-by: Chia-Wei Wang
---
On 8/3/2022 7:35 PM, Joel Stanley wrote:
On Thu, 4 Aug 2022 at 01:02, Dhananjay Phadke
wrote:
Ported as is, makes it easier to add readable GPIO definitions
in DTS files.
Signed-off-by: Dhananjay Phadke
---
include/dt-bindings/gpio/aspeed-gpio.h | 49 ++
1 file
On Thursday 04 August 2022 16:51:47 Stefan Roese wrote:
> On 03.08.22 13:00, Pali Rohár wrote:
> > For future changes it is needed for have spi0 device tree reference in
> > every mvebu soc dts file even when it is unused.
> >
> > Signed-off-by: Pali Rohár
> > ---
> >
On 03.08.22 13:00, Pali Rohár wrote:
Move U-Boot specific device tree property u-boot,dm-pre-reloc into U-Boot
specific device tree include file armada-38x-controlcenterdc-u-boot.dtsi.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
On 03.08.22 13:00, Pali Rohár wrote:
Replace it by including of mvebu-u-boot.dtsi file. When board does not use
-u-boot.dtsi then mvebu-u-boot.dtsi is included automatically by makefile
scripts/Makefile.lib.
Signed-off-by: Pali Rohár
---
arch/arm/dts/armada-370-xp.dtsi | 1 -
On 03.08.22 13:00, Pali Rohár wrote:
Set u-boot,dm-pre-reloc for /soc/, /soc/internal-regs/ and nodes as
it is required on every 32-bit Armada SoCs. And set also u-boot,dm-pre-reloc
for when going to boot from SPI because otherwise SPL SPI drivers do
not load.
Signed-off-by: Pali Rohár
On 03.08.22 13:00, Pali Rohár wrote:
For future changes it is needed for have spi0 device tree reference in
every mvebu soc dts file even when it is unused.
Signed-off-by: Pali Rohár
---
arch/arm/dts/armada-7040.dtsi | 3 +++
arch/arm/dts/armada-8040.dtsi | 3 +++
arch/arm/dts/cn9130.dtsi
On 03.08.22 13:00, Pali Rohár wrote:
Move U-Boot specific device tree property u-boot,dm-pre-reloc into U-Boot
specific device tree include file armada-xp-theadorable-u-boot.dtsi.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Tested-by: Stefan Roese
Thanks,
Stefan
---
All `sm efuseread/efusewrite` commands exit with an error, even if the fuse
have actually been dealt with correctly.
This is because the smc call return the size it actually processed but this
result is checked against 0.
Return failure in do_efuse_read/write if the return value of
Hi,
On Wed, 27 Jul 2022 at 13:52, Sumit Garg wrote:
>
> This is an initial step towards achieving complete Linux DT sync on Qcom
> SoCs/boards. It syncs up DT compatibles for pinctrl and GPIO drivers.
>
> Changes in v2:
> - Separate patch for CONFIG_SDM845 check removal.
> - Fix pinctrl DT
Enable USB config options along with its dependencies like PHY, RESET,
PMIC GPIO etc. config options.
Signed-off-by: Sumit Garg
---
configs/qcs404evb_defconfig | 18 ++
1 file changed, 18 insertions(+)
diff --git a/configs/qcs404evb_defconfig b/configs/qcs404evb_defconfig
index
For USB3 host controller to detect devices on the bus it is required to
enable a PMIC GPIO: usb_vbus_boost_pin. So enable that during board
specific initialization.
And since this PMIC GPIO parsing is quite u-boot specific, so add a
DT override to qcs404-evb-uboot.dtsi to represent
PMIC GPIOs are special GPIOs which are accessible through SPMI bus. So
add corresponding DT nodes.
Signed-off-by: Sumit Garg
---
arch/arm/dts/qcs404-evb.dts | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts
GPIO LV (low voltage)/MV (medium voltage) subtypes have different
features and register mappings than 4CH/8CH subtypes. Add support
for LV and MV subtypes.
With GPIO LV/MV subtype available, add "qcom,pms405-gpio" compatible
which requires support for GPIO MV subtype.
Signed-off-by: Sumit Garg
Since both pm8916.c and pm8916_gpio.c are already supporting multiple
Qcom SoCs, it makes sense to rename these drivers to pmic_qcom.c and
qcom_pmic_gpio.c respectively. Also, these driver can be extended to
support additional functionality if required for other Qcom SoCs.
Along with this import
QCS404 SoC provides support for two USB controllers: one USB3 and the
other one being USB2. The USB3 controller supports further 2 PHY: one high
speed PHY and the other super speed PHY. The USB2 controller supports a
single high speed PHY. So add corresponding DT nodes.
Signed-off-by: Sumit Garg
Add support for USB controller and PHY clocks for QCS404 SoC.
Signed-off-by: Sumit Garg
---
arch/arm/mach-snapdragon/clock-qcs404.c | 35 +++
.../include/mach/sysmap-qcs404.h | 17 +
2 files changed, 52 insertions(+)
diff --git
Drivers like USB, ethernet etc. uses ".enable" hook to enable clocks.
So add corresponding support for Qcom clock drivers.
Signed-off-by: Sumit Garg
---
arch/arm/mach-snapdragon/clock-apq8016.c| 5 +
arch/arm/mach-snapdragon/clock-apq8096.c| 5 +
Signed-off-by: Sumit Garg
---
arch/arm/dts/qcs404-evb.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts
index 09687e1fd3..1b280efff6 100644
--- a/arch/arm/dts/qcs404-evb.dts
+++ b/arch/arm/dts/qcs404-evb.dts
@@ -54,6 +54,12 @@
Signed-off-by: Sumit Garg
---
drivers/reset/reset-qcom.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/reset/reset-qcom.c b/drivers/reset/reset-qcom.c
index 40f436ede4..94315e76d5 100644
--- a/drivers/reset/reset-qcom.c
+++
Since the base functionality remains the same for a reset driver on Qcom
SoCs, so leverage that to convert ipq4019 specific reset driver to a
generic Qcom reset driver. With that one just need to provide SoC specific
reset table.
Signed-off-by: Sumit Garg
---
drivers/reset/Kconfig
QCS404 SoC supports two types of PHY, one supports high speed mode or
USB2 PHY and the other supports super speed mode or USB3 PHY. So add
corresponding PHY drivers.
Signed-off-by: Sumit Garg
---
drivers/phy/qcom/Kconfig| 16 ++
drivers/phy/qcom/Makefile | 2 +
This series add support for USB on QCS404 SoC. USB support have
dependencies on PHY, reset and PMIC GPIO drivers, so corresponding
support has been added. There are also some renaming/reorganising
patches (#1, #3 and #9) which tries to generalize drivers support
for Qcom SoCs.
- Patch #1 moves all
Signed-off-by: Sumit Garg
---
drivers/phy/Kconfig | 15 +--
drivers/phy/Makefile | 3 +--
drivers/phy/qcom/Kconfig | 13 +
drivers/phy/qcom/Makefile | 2 ++
drivers/phy/{ =>
Hi Weijie,
On Wed, 3 Aug 2022 at 21:35, Weijie Gao wrote:
>
> This patch adds eMMC and SDXC support for MediaTek MT7981/MT7986 SoCs
Add eMMC and SDXC support for MediaTek MT7981/MT7986 SoCs.
(describe your changes in imperative mood)
>
> Signed-off-by: Weijie Gao
> ---
>
+Tom Rini
Hi Martin,
On Thu, 4 Aug 2022 at 00:22, Martin Bonner wrote:
>
> On Wed, 3 Aug 2022 at 19:14, Simon Glass wrote:
>>
>> Hi Martin,
>>
>> On Wed, 3 Aug 2022 at 04:05, Martin Bonner wrote:
>> >
>> > I and my colleagues have a number of patches we would like to
>> > contribute back to
On Wed, 3 Aug 2022 at 21:41, Weijie Gao wrote:
>
> Add new filed for MediaTek ARM platform
files
>
> Signed-off-by: Weijie Gao
> ---
> MAINTAINERS | 5 +
> 1 file changed, 5 insertions(+)
Reviewed-by: Simon Glass
On Wed, 3 Aug 2022 at 21:39, Weijie Gao wrote:
>
> This patch adds infrasys clock mux support for mediatek clock drivers.
>
> Signed-off-by: Weijie Gao
> ---
> drivers/clk/mediatek/clk-mtk.c | 72 ++
> drivers/clk/mediatek/clk-mtk.h | 4 +-
> 2 files changed, 75
Hi Weijie,
On Wed, 3 Aug 2022 at 21:39, Weijie Gao wrote:
>
> The mtk clock framework in u-boot uses array index for searching clock
> parent (kernel uses strings for search), so we need to specify a special
> clock with ID=0 for CLK_XTAL in u-boot.
>
> In the mt7622/mt7629 clock tree, the
On Wed, 3 Aug 2022 at 21:38, Weijie Gao wrote:
>
> This patch adds a pinctrl header for common pinconf parameters such as
> pull-up/pull-down resistors and drive strengths.
>
> Signed-off-by: Weijie Gao
> ---
> include/dt-bindings/pinctrl/mt65xx.h | 41
> 1 file
Hi Weijie,
On Wed, 3 Aug 2022 at 21:40, Weijie Gao wrote:
>
> This patch adds clock driver support for MediaTek MT7981 SoC
>
> Signed-off-by: Weijie Gao
> ---
> drivers/clk/mediatek/Makefile | 1 +
> drivers/clk/mediatek/clk-mt7981.c | 682 +
>
Hi Stefan,
On Thu, 4 Aug 2022 at 01:50, Stefan Herbrechtsmeier
wrote:
>
> Hi Simon,
>
> Am 03.08.2022 um 20:14 schrieb Simon Glass:
> > Hi Stefan,
> >
> > On Tue, 2 Aug 2022 at 07:45, Stefan Herbrechtsmeier
> > wrote:
> >>
> >> Hi Simon,
> >>
> >> Am 02.08.2022 um 14:41 schrieb Simon Glass:
>
Hi Weijie,
On Wed, 3 Aug 2022 at 21:41, Weijie Gao wrote:
>
> This patch adds more nand headers in two new types:
> 1. HSM header, used for spi-nand thru SNFI interface
> 2. SPIM header, used for spi-nand thru spi-mem interface
>
> The original nand header is renamed to AP header.
>
>
Hi Weijie,
On Wed, 3 Aug 2022 at 21:37, Weijie Gao wrote:
>
> The predefined NAND headers take too much spaces in the mtk_image.c.
> Moving them into a new file can significantly improve the readability of
> both mtk_image.c and the new mtk_nand_headers.c.
>
> This is a preparation for adding
Hi Weijie,
On Wed, 3 Aug 2022 at 21:36, Weijie Gao wrote:
>
> Using a single soc id to control different initialization and TX/RX flow
> for all SoCs is not extensible if more hardware variations are added in
> the future.
>
> This patch introduces a struct to replace the original mtk_soc to
Hi Weijie,
On Wed, 3 Aug 2022 at 21:40, Weijie Gao wrote:
>
> This patch adds clock driver support for MediaTek MT7986 SoC
>
> Signed-off-by: Weijie Gao
> ---
> drivers/clk/mediatek/Makefile | 1 +
> drivers/clk/mediatek/clk-mt7986.c | 671 +
>
On Wed, 3 Aug 2022 at 21:40, Weijie Gao wrote:
>
> The verification code of gfh header for NAND and non-NAND are identical.
> It's better to define a individual function to reduce redundancy.
>
> Signed-off-by: Weijie Gao
> ---
> tools/mtk_image.c | 51
On Wed, 3 Aug 2022 at 21:37, Weijie Gao wrote:
>
> The input clock for uart is too slow (25MHz) which introduces frequent data
> error on both receiving and transmitting even if the baudrate is 115200.
>
> Using high-speed can significantly solve this issue.
>
> Signed-off-by: Weijie Gao
> ---
>
Hi Weijie,
On Wed, 3 Aug 2022 at 21:40, Weijie Gao wrote:
>
> This add CLK_XTAL macro and flag to mediatek clock driver common part,
> to make thi SoC that has clock directlly connect to XTAL working.
>
> Signed-off-by: Weijie Gao
> ---
> drivers/clk/mediatek/clk-mtk.c | 3 +++
>
On Wed, 3 Aug 2022 at 21:39, Weijie Gao wrote:
>
> This patch adds support for a clock node to configure its parent clock
> where possible.
>
> Signed-off-by: Weijie Gao
> ---
> drivers/clk/mediatek/clk-mtk.c | 79 --
> drivers/clk/mediatek/clk-mtk.h | 2 +
> 2
On Wed, 3 Aug 2022 at 21:39, Weijie Gao wrote:
>
> This patch adds pinctrl and gpio support for MT7986 SoC
>
> Signed-off-by: Weijie Gao
> ---
> drivers/pinctrl/mediatek/Kconfig | 4 +
> drivers/pinctrl/mediatek/Makefile | 1 +
> drivers/pinctrl/mediatek/pinctrl-mt7986.c |
On Wed, 3 Aug 2022 at 21:39, Weijie Gao wrote:
>
> This patch adds pinctrl and gpio support for MT7981 SoC
>
> Signed-off-by: Weijie Gao
> ---
> drivers/pinctrl/mediatek/Kconfig |4 +
> drivers/pinctrl/mediatek/Makefile |1 +
> drivers/pinctrl/mediatek/pinctrl-mt7981.c
Hi Weijie,
On Wed, 3 Aug 2022 at 21:38, Weijie Gao wrote:
>
> This patch adds support for MediaTek I2C interface
>
> Signed-off-by: Weijie Gao
> ---
> drivers/i2c/Kconfig | 9 +
> drivers/i2c/Makefile | 1 +
> drivers/i2c/mtk_i2c.c | 822 ++
> 3
On Wed, 3 Aug 2022 at 21:36, Weijie Gao wrote:
>
> This patch is a preparation for adding a new version of PDMA of which the
> DMA descriptor fields has changed. Using bitfields will result in a complex
> modification. Convert bitfields to u32 units can solve this problem easily.
>
>
Hi Weijie,
On Wed, 3 Aug 2022 at 21:38, Weijie Gao wrote:
>
> This patch adds support for spi-mem controller found on newer MediaTek SoCs
> This controller supports Single/Dual/Quad SPI mode.
>
> Signed-off-by: SkyLake.Huang
> ---
> drivers/spi/Kconfig| 8 +
> drivers/spi/Makefile |
On Wed, 3 Aug 2022 at 21:38, Weijie Gao wrote:
>
> Add both hardware and software i2c support for mt7622.
>
> Signed-off-by: Weijie Gao
> ---
> arch/arm/dts/mt7622-rfb.dts | 18 ++
> arch/arm/dts/mt7622.dtsi| 24
> 2 files changed, 42 insertions(+)
On Wed, 3 Aug 2022 at 21:37, Weijie Gao wrote:
>
> This patch adds watchdog support for MediaTek MT7986 SoC
>
> Signed-off-by: Weijie Gao
> ---
> drivers/watchdog/mtk_wdt.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Simon Glass
On Wed, 3 Aug 2022 at 21:37, Weijie Gao wrote:
>
> This patch add general-purpose timer support for MediaTek MT7981/MT7986.
> These two SoCs uses a newer version of timer with its register definition
> slightly changed.
>
> Signed-off-by: Weijie Gao
> ---
> drivers/timer/mtk_timer.c | 59
On Wed, 3 Aug 2022 at 21:37, Weijie Gao wrote:
>
> This patch adds PWM support for MediaTek MT7981 SoC.
> MT7981 uses a different register offset so we have to add a version field
> to indicate the IP core version.
>
> Signed-off-by: Weijie Gao
> ---
> drivers/pwm/pwm-mtk.c | 34
On Wed, 3 Aug 2022 at 21:37, Weijie Gao wrote:
>
> This patch adds PWM support for MediaTek MT7986 SoC.
>
> Signed-off-by: Weijie Gao
> ---
> drivers/pwm/pwm-mtk.c | 6 ++
> 1 file changed, 6 insertions(+)
Reviewed-by: Simon Glass
Hi Weijie,
On Wed, 3 Aug 2022 at 21:35, Weijie Gao wrote:
>
> This patch adds basic support for MediaTek MT7981 SoC.
> This include the file that will initialize the SoC after boot and its
> device tree.
>
> Signed-off-by: Weijie Gao
> ---
> arch/arm/dts/mt7981.dtsi | 288
On Wed, 3 Aug 2022 at 21:35, Weijie Gao wrote:
>
> This patch adds general board files based on MT7986 SoCs.
>
> The SD/eMMC controller on MT7986A and MT7986B have different pin
> configurations so that four different reference board configs has to be
> added.
>
> Signed-off-by: Weijie Gao
> ---
Hi Weijie,
On Wed, 3 Aug 2022 at 21:35, Weijie Gao wrote:
>
> This patch adds general board files based on MT7981 SoCs.
"Add general board files..." - same for other patches.
Are the dts files from a particular Linux version?
>
> Signed-off-by: Weijie Gao
> ---
> arch/arm/dts/Makefile
On Wed, 3 Aug 2022 at 21:36, Weijie Gao wrote:
>
> This patch adds support for PDMA v2 hardware. The PDMA v2 has extended the
> DMA descriptor to 8-words, and some of its fields have changed comparing
> to the v1 hardware.
>
> Signed-off-by: Weijie Gao
> ---
> drivers/net/mtk_eth.c | 51
Hi Weijie,
On Wed, 3 Aug 2022 at 21:36, Weijie Gao wrote:
>
> The baud clock on some platform may change due to assigned-clock-parent
> set in DT. In current flow the baud clock is only retrieved during probe
> stage. If the parent of the source clock changes after probe stage, the
> setbrg will
On 16/05/2022 02.27, Ramon Fried wrote:
> On Wed, May 11, 2022 at 5:58 PM Rasmus Villemoes
> wrote:
>>
>> I have an iMX8MP with a ti,dp83867 phy in front of the eqos
>> interface. The phy is Gbit capable - however, the C and D differential
>> pairs are not physically routed to the RJ45 connector.
On 16/05/2022 02.26, Ramon Fried wrote:
> On Wed, May 11, 2022 at 5:13 PM Rasmus Villemoes
> wrote:
>>
>> Not only does eqos_remove() fail to free the buffers that have been
>> allocated by eqos_probe_resources_core(), it repeats those allocations
>> and thus drops twice as much memory on the
On 12/05/2022 09.33, Rasmus Villemoes wrote:
> I need the dwc_eth_qos to gain a fix similar to what fec_mxc got in
> 89b5bd54c1a4.
>
> The first patch provides a simplification around the logic for
> fetching the phy's address, so there's one less case to worry about.
>
> The second introduces a
On 8/4/22 11:19, Philip Oberfichtner wrote:
[...]
@@ -46,6 +45,7 @@ else
obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset.o
obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o
endif
+obj-$(CONFIG_SYS_L2_PL310) += cache-pl310.o
Doesn't this need SPL/TPL Kconfig symbols and
On Thu, Aug 04, 2022 at 12:56:45PM +0200, Philip Oberfichtner wrote:
> Before this commit, the SPL could enable the PL310 L2 cache [1], but the
> cache maintenance functions from cache-pl310.c were only useable for
> non-SPL builds.
>
> After enabling the cache one must be able to flush it, too.
The device ignores any levels or transitions on the SCL pin when the device
is idle, asleep or during waking up.
Linux kernel driver for atsha204a (atmel-sha204a.ko) also ignores return
value from i2c wakeup send command, see:
From: Marek Vasut
Enable d-cache early in SPL right after DRAM is started up.
This reduces U-Boot proper load time by 650ms when loaded
from SPI NOR.
Signed-off-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
Changes in v2:
- Add comment to explain the relevance of
Before this commit, the SPL could enable the PL310 L2 cache [1], but the
cache maintenance functions from cache-pl310.c were only useable for
non-SPL builds.
After enabling the cache one must be able to flush it, too. Thus this
commit allows cache-pl310.c to be included in the SPL build.
[1] See
Macro PIN_GRP() is not used, remove it.
Signed-off-by: Pali Rohár
---
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index
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