Hi Akashi-san,
On Wed, 10 May 2023 at 09:28, Takahiro Akashi
wrote:
>
> On Tue, May 09, 2023 at 06:57:19PM +0900, Masahisa Kojima wrote:
> > On Mon, 8 May 2023 at 18:44, Heinrich Schuchardt wrote:
> > >
> > > On 5/8/23 10:15, Masahisa Kojima wrote:
> > > > Hi Heinrich,
> > > >
> > > > On Thu,
The "Message not acknowledged" error message is missing a line feed,
leading to the console log getting garbled and joined together with
whatever the next output is in case this error happens:
"ti_sci system-controller@44043000: Message not acknowledgedAuthentication
failed!"
Fix ths by adding
The nand_spl_load_image function was guaranteed to read an entire block
into RAM, regardless of how many bytes were to be read. This is
particularly problematic when spl_load_legacy_image is called, as this
function attempts to load a struct image_header but gets surprised with
a full flash
SPL configurations that read from NAND need a page of RAM as a buffer.
Initially this memory was statically allocated.
Move this to the heap, so it can benefit from initialized DDR.
Signed-off-by: Colin Foster
---
v2:
New patch.
Note: This patch gives an SPDX warning due to the comment
NAND reads are done on a per-page basis. Scenarios that attempt to read
less than a page will find their memory has been clobbered by the NAND
read.
Allocate a buffer for the NAND page, and only overwrite the memory that
the user requested.
This is a continuation of [1], since there is now a
On Tue, May 09, 2023 at 06:57:19PM +0900, Masahisa Kojima wrote:
> On Mon, 8 May 2023 at 18:44, Heinrich Schuchardt wrote:
> >
> > On 5/8/23 10:15, Masahisa Kojima wrote:
> > > Hi Heinrich,
> > >
> > > On Thu, 27 Apr 2023 at 15:09, Heinrich Schuchardt
> > > wrote:
> > >>
> > >> On 4/10/23
Hi Bin,
On Mon, 8 May 2023 at 22:17, Bin Meng wrote:
>
> Hi Simon,
>
> On Tue, May 9, 2023 at 5:23 AM Simon Glass wrote:
> >
> > Hi Bin,
> >
> > On Sat, 6 May 2023 at 00:05, Bin Meng wrote:
> > >
> > > Hi Simon,
> > >
> > > On Fri, Mar 24, 2023 at 1:55 AM Simon Glass wrote:
> > > >
> > > > Hi
Hi Pali,
On Sun, 7 May 2023 at 15:21, Pali Rohár wrote:
>
> On Sunday 07 May 2023 23:19:22 Pali Rohár wrote:
> > On Sunday 07 May 2023 23:08:45 Pali Rohár wrote:
> > > If you run bootmenu in U-Boot it will print following output:
> > >
> > > *** U-Boot Boot Menu ***
> > >
> > > Attached
This reverts commit a034ec06ff1d558bbe11d5ee05edbb4de3ee2215.
Commit 4a3ea75de4c5 ("Revert "mmc: sdhci: set to INT_DATA_END when
there are data"") reverted the alternative fix that was added for
Exynos 4 devices, causing an error when trying to boot from an sdcard:
<...>
Loading
Otherwise non-ChromeOS samsung devices, like the odroid boards, are
stuck in a bootloop if CONFIG_CROS_EC is not enabled:
<...>
MMC: SAMSUNG SDHCI: 2, EXYNOS DWMMC: 0
Loading Environment from MMC... *** Warning - bad CRC, using default
environment
cros-ec communications failure
Hi,
Patch 1 fixes issue reported in [1], which happens on odroid-u2 and
probably other devices in that family. Re-adding this quirk was
discussed already by Jaehoon and Andy in the patch that
(re-)introduced this issue [2], but no patch was sent.
Patch 2 fixes issue reported in [3], which
/custodians/u-boot-video (2023-05-05 09:36:08
-0400)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-rockchip.git
tags/u-boot-rockchip-20230509
for you to fetch changes up to 716ed2a8c0bba085372df0eb7edb580b11e8d94c:
clk: rockchip: rk3588: add
Hi Vignesh!
On May 8, 2023 thus sayeth Vignesh Raghavendra:
> This is required for UART boot flow where u-boot.img needs to be
> downloaded via YMODEM.
>
> Signed-off-by: Vignesh Raghavendra
> ---
> configs/am62ax_evm_a53_defconfig | 1 +
> 1 file changed, 1 insertion(+)
Oops I thought I had
On 5/9/23 17:04, Lukasz Majewski wrote:
Hi Marek,
On 5/9/23 16:46, Lukasz Majewski wrote:
Hi Marek,
Hi,
On 5/9/23 16:32, Lukasz Majewski wrote:
This option sets the current limit for 5V source to zero, so all
the PMU outputs are primarily powered from battery source
(DCDC_BAT).
This
On Tue, May 09, 2023 at 04:52:45PM +0200, Marek Vasut wrote:
Do we have some sort of global (?) state structure which exists during
the whole work cycle of the tool ? If so, add a link list into there.
There is struct image_tool_params which is passed to the callbacks and
holds most of the
Hi Roger,
I was looking to test my system against U-Boot 2023.04. I'm running an
OMAP 4460 SOM (I've been waiting to get kernel acceptance before U-Boot,
but that has slipped) and it boots from NAND.
When I jumped from 2023.01 to 2023.04, I noticed I get spammed in the
SPL by "omap-elm:
On Tue, May 09, 2023 at 04:01:36PM +0530, Nikhil M Jain wrote:
> This patch series aims at eanbling SPL splash screen on AM62x.
>
> Changes in V3:
> - Update stackpointer after relocation.
> - Return a pointer after page table setup.
> - Enable dcache at SPL.
> - Add method to reserve video
Hi Marek,
> On 5/9/23 16:46, Lukasz Majewski wrote:
> > Hi Marek,
>
> Hi,
>
> >> On 5/9/23 16:32, Lukasz Majewski wrote:
> >>> This option sets the current limit for 5V source to zero, so all
> >>> the PMU outputs are primarily powered from battery source
> >>> (DCDC_BAT).
> >>>
> >>> This
On 5/9/23 15:07, Ralph Siemsen wrote:
On Tue, May 09, 2023 at 04:25:06AM +0200, Marek Vasut wrote:
The usual fail path handling like:
"
if (there is an error)
goto exit;
...
exit:
free(data);
return ret;
"
does not work here ?
Yes, this would handle de-allocation in the failing case.
On 5/9/23 16:46, Lukasz Majewski wrote:
Hi Marek,
Hi,
On 5/9/23 16:32, Lukasz Majewski wrote:
This option sets the current limit for 5V source to zero, so all
the PMU outputs are primarily powered from battery source
(DCDC_BAT).
This option may be set on systems, where the 5V is NOT
On 5/9/23 06:11, Venkatesh Yadav Abbarapu wrote:
Currently the parent node(dwc3) ref_clk is updated to the
dwc3->ref_clk, but we need to update the child node(dwc3)
"ref" clock to the dwc3->ref_clk.
For versal SOC, the parent node(usb) ref_clk is updated to dwc3->ref_clk
which is USB3_DUAL_REF,
Hi Marek,
> On 5/9/23 16:32, Lukasz Majewski wrote:
> > This option sets the current limit for 5V source to zero, so all
> > the PMU outputs are primarily powered from battery source
> > (DCDC_BAT).
> >
> > This option may be set on systems, where the 5V is NOT supposed to
> > be in any scenario
Hi Eugen,
On 2023-05-09 15:24, Kever Yang wrote:
> Hi Jonas and Eugen,
>
> On 2023/4/22 09:23, Jonas Karlman wrote:
>> This series sync some defconfig options across the different rk35xx
>> boards and enables boot from SPI NOR flash on rk3568-rock-3a and
>> rk3588-rock-5b.
>>
>> Patch 1 fixes use
On 5/9/23 16:32, Lukasz Majewski wrote:
This option sets the current limit for 5V source to zero, so all
the PMU outputs are primarily powered from battery source (DCDC_BAT).
This option may be set on systems, where the 5V is NOT supposed to be
in any scenario powering the system - for example
This patch adjusts XEA's PMU setup as this board is supposed to be
mainly powered from DCDC_BATT source.
Moreover, in this HW design the VDD_4P2 is not used as well.
Signed-off-by: Lukasz Majewski
---
configs/imx28_xea_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git
This commit provides function, which when debugging
output is enabled dumps the IMX28 PMU registers.
Signed-off-by: Lukasz Majewski
---
arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 24 +
1 file changed, 24 insertions(+)
diff --git
The IMX28 PMU (Power Management Unit) has a dedicated Linear Regulator
to produce (by default) 4.2V output - available outside the chip as
VDD_4P2.
When system is supposed to not use VDD5V as a main power source - instead
the DCDC_BATT is used; it is safe to disable this regulator.
As the in-PMU
This new Kconfig option allows disabling the in-PMU battery charging
block. This may be required when DCDC_BAT source is powered not from
battery, but from already regulated, good quality source.
Signed-off-by: Lukasz Majewski
---
arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 7 +++
This option sets the current limit for 5V source to zero, so all
the PMU outputs are primarily powered from battery source (DCDC_BAT).
This option may be set on systems, where the 5V is NOT supposed to be
in any scenario powering the system - for example on systems where
DCDC_BAT is connected to
Hi Kever,
On 2023-05-09 14:19, Kever Yang wrote:
> Hi Jonas,
>
> On 2023/4/23 02:19, Jonas Karlman wrote:
>> PCI Autoconfig read the Root Complex BARs and try to claim the entire
>> 1 GiB memory region on RK3568, leaving no space for any attached device.
>>
>> Return an invalid value during
Hi Eddie
On Thu, 16 Mar 2023 at 10:32, Ilias Apalodimas
wrote:
>
> Hi Eddie,
>
> Apologies for the late reply, I am now getting back on this.
> There are some failures on the CI wrt to sandbox here [0]. Can you have a
> look ?
> Also I believe some of the existing tests are wrong because they
If we're building non FU540/FU740 SoC drivers, then the sifive-prci.o
is not needed. Only build this when CONFIG_CLK_SIFIVE_PRCI is selected.
Signed-off-by: Ben Dooks
---
drivers/clk/sifive/Makefile | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git
Hi Kever,
On 2023-05-09 14:08, Kever Yang wrote:
> Hi Jonas,
>
> On 2023/4/23 02:19, Jonas Karlman wrote:
>> Use a similar pattern and delay values as the linux mainline driver to
>> speed up failing when nothing is connected.
>>
>> Reduce fail speed from around 5+ seconds down to around one
Hi Jonas and Eugen,
On 2023/4/22 09:23, Jonas Karlman wrote:
This series sync some defconfig options across the different rk35xx
boards and enables boot from SPI NOR flash on rk3568-rock-3a and
rk3588-rock-5b.
Patch 1 fixes use of sfc-no-dma prop in rockchip sfc driver.
Patch 2-7 updates
On Tue, May 09, 2023 at 04:26:57AM +0200, Marek Vasut wrote:
On 5/8/23 20:23, Ralph Siemsen wrote:
I moved it to board-specific directory as an interim step. Hopefully
we can do some consolidation of the multiple CDNS DDR controller
implementations, and then figure out the right way to split
Hi Eugen,
I'm not able to apply this patch, maybe for some conflict, could you
help to send it again with rebase?
Thanks,
- Kever
On 2023/4/13 19:36, Eugen Hristev wrote:
The current DT bindings for the rk3588 clock use a different ID than the
one that is supposed to be written to the
On Tue, May 09, 2023 at 04:25:06AM +0200, Marek Vasut wrote:
The usual fail path handling like:
"
if (there is an error)
goto exit;
...
exit:
free(data);
return ret;
"
does not work here ?
Yes, this would handle de-allocation in the failing case.
However in the normal case (no error),
Hi Kever,
On 2023-05-09 13:58, Kever Yang wrote:
> Hi Jonas,
>
> On 2023/4/23 02:19, Jonas Karlman wrote:
>> The vpcie3v3 regulator is typically a fixed regulator controlled using
>> gpio. Change to use enable and disable calls on the regulator instead
>> of trying to set a voltage value.
>>
>>
On 2023/5/7 01:41, Jonas Karlman wrote:
Enable CONFIG_ROCKCHIP_SPI_IMAGE to build u-boot-rockchip-spi.bin.
Define CONFIG_SYS_SPI_U_BOOT_OFFS to write u-boot.itb at the expected
offset. Enable CONFIG_LTO to reduce size of SPL so that the mkimage
output fit before the 0x6 offset in
On 2023/5/7 01:41, Jonas Karlman wrote:
Enable the use of SDMA mode to boost eMMC performance on ROCK Pi 4.
Also add missing flags to indicate the supported MMC modes.
Using mmc read command to read 32 MiB data shows following improvement:
=> time mmc read 1000 2000 1
Before:
On 2023/5/7 01:41, Jonas Karlman wrote:
Enable the use of SDMA mode to boost eMMC performance on RockPro64.
Also add missing flags to indicate the supported MMC modes.
Using mmc read command to read 32 MiB data shows following improvement:
=> time mmc read 1000 2000 1
Before:
On 2023/5/7 01:41, Jonas Karlman wrote:
Loading part of TF-A into SRAM from eMMC using DMA fails on RK3399
similar to other Rockchip SoCs. Checksum validation fails with:
## Checking hash(es) for Image atf-2 ... sha256 error!
Bad hash value for 'hash' hash node in 'atf-2' image node
On 2023/5/7 01:41, Jonas Karlman wrote:
The workaround to limit number of blocks to read in a single command
should only be applied to RK3568 and RK3588. Change to be more strict
when to apply the workaround.
Fixes: 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks read in a single
On 2023/4/26 10:23, FUKAUMI Naoki wrote:
add Radxa ROCK (Pi) 4 variants.
Signed-off-by: FUKAUMI Naoki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
doc/board/rockchip/rockchip.rst | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/doc/board/rockchip/rockchip.rst
On 2023/4/26 10:23, FUKAUMI Naoki wrote:
add defconfig for Radxa ROCK 4C+.
Signed-off-by: FUKAUMI Naoki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
configs/rock-4c-plus-rk3399_defconfig | 97 +++
1 file changed, 97 insertions(+)
create mode 100644
On 2023/4/26 10:23, FUKAUMI Naoki wrote:
Linux commit 246450344dad arm64: dts: rockchip: rk3399: Radxa ROCK 4C+
Add support for Radxa ROCK 4C+ SBC.
Key differences of 4C+ compared to previous ROCK Pi 4.
- Rockchip RK3399-T SoC
- DP from 4C replaced with micro HDMI 2K@60fps
- 4-lane MIPI DSI
On 2023/4/26 10:23, FUKAUMI Naoki wrote:
rk3399-rock-pi-4a.dtb is enough for Radxa ROCK Pi 4A/B/A+/B+ and ROCK 4SE.
Signed-off-by: FUKAUMI Naoki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
configs/rock-pi-4-rk3399_defconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
On 2023/4/26 10:23, FUKAUMI Naoki wrote:
sync dts{,i} files for Radxa ROCK Pi 4 series with Linux 6.3.
because rk3399-rock-pi-4a.dts is enough for ROCK Pi 4A/B/A+/B+ and ROCK
4SE, delete dts{,i} for ROCK Pi 4B.
Signed-off-by: FUKAUMI Naoki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Hi Jonas,
On 2023/4/23 02:19, Jonas Karlman wrote:
PCI Autoconfig read the Root Complex BARs and try to claim the entire
1 GiB memory region on RK3568, leaving no space for any attached device.
Return an invalid value during config read of Root Complex BARs during
autoconfig to work around
Hi Jonas,
On 2023/4/23 02:19, Jonas Karlman wrote:
Add missing pinctrl and defconfig options to enable PCIe and NVMe
support on Radxa ROCK 3 Model A.
Signed-off-by: Jonas Karlman
---
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 14 ++
configs/rock-3a-rk3568_defconfig| 4
On 2023/4/23 02:19, Jonas Karlman wrote:
Update config, IO and memory regions used based on [1] with pcie3x2
config reg size corrected from 16 to 1 MiB.
[1] https://lore.kernel.org/lkml/20221112114125.1637543-2-ahol...@omnom.net/
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
On 2023/4/23 02:19, Jonas Karlman wrote:
Add dummy support for the CLK_PCIEPHY2_REF clock.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/clk/rockchip/clk_rk3568.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/rockchip/clk_rk3568.c
Hi Patrick
On 4/24/23 16:21, Patrick Delaunay wrote:
> Device tree alignment with Linux kernel v6.3:
> - f5a058023239 - ARM: dts: stm32: add i2c nodes into stm32mp131.dtsi
> - 8539ebb435a5 - ARM: dts: stm32: enable i2c1 and i2c5 on
> stm32mp135f-dk.dts
> - 8539ebb435a5 - ARM: dts: stm32: add
On 2023/4/23 02:19, Jonas Karlman wrote:
The commit 12df2c182ccb ("regulator: dt-bindings: fixed-regulator: allow
gpios property") in linux v6.3-rc1 added support for use of either a
gpios or gpio prop with a fixed-regulator.
This adds support for the new gpios prop to the fixed-regulator
Hi Jonas,
On 2023/4/23 02:19, Jonas Karlman wrote:
Use a similar pattern and delay values as the linux mainline driver to
speed up failing when nothing is connected.
Reduce fail speed from around 5+ seconds down to around one second on a
Radxa ROCK 3 Model A, where pcie2x1 is probed before
Hi Jonas,
On 2023/4/23 02:19, Jonas Karlman wrote:
The vpcie3v3 regulator is typically a fixed regulator controlled using
gpio. Change to use enable and disable calls on the regulator instead
of trying to set a voltage value.
Signed-off-by: Jonas Karlman
---
drivers/pci/pcie_dw_rockchip.c |
On 2023/4/23 02:19, Jonas Karlman wrote:
Get the config region to use from the reg prop. Also check the return
value from dev_read_addr_index correctly. And update the referenced
region index used in comment.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Read boodmode register using versal_net_get_bootmode() in board_late_init
and prepare corresponding distro boot command sequence based on it.
versal_net_get_bootmode() will be changed to use smc calls later, but
for now directly reads the register.
Signed-off-by: Ashok Reddy Soma
---
On 2023/4/22 09:23, Jonas Karlman wrote:
Remove regulator-boot-on prop from regulators now that the phy core has
support for phy-supply after commit "phy: add support for phy-supply"
and regulators support a basic reference counter after commit
"regulator: implement basic reference counter".
On 2023/4/22 09:23, Jonas Karlman wrote:
Add sfc and flash node to device tree and config options to enable
support for booting from SPI NOR flash on Radxa ROCK 5 Model B.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi |
On 2023/4/22 09:23, Jonas Karlman wrote:
Enable pinctrl for sdhci in SPL to support loading of FIT image from SD
and eMMC storage when booting from SPI NOR flash.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 28
On 2023/4/22 09:23, Jonas Karlman wrote:
Update defconfig for rk3588-rock-5b with new defaults.
Remove the SPL_ROCKCHIP_BACK_TO_BROM=y option, SPL is expected to load
next stage from a FIT image and then jump to next stage not back to
BootRom.
Extend SPL_MAX_SIZE to 0x4, SPL is loaded to
On 2023/4/22 09:23, Jonas Karlman wrote:
Update defconfig for rk3588-evb with new defaults.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM.
Extend SPL_MAX_SIZE to
On 2023/4/22 09:23, Jonas Karlman wrote:
Like other Rockchip SoCs, DM_RESET and DM_REGULATOR_FIXED is useful
across RK3588 platform. Select them from arch Kconfig.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/mach-rockchip/Kconfig| 2 ++
Make it clear that this is the SPL option to avoid potential confusion
when the description for CONFIG_SPL_VIDEO is the same as that for
CONFIG_VIDEO.
Signed-off-by: John Keeping
---
drivers/video/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/Kconfig
On 2023/4/22 09:23, Jonas Karlman wrote:
Add sfc and flash node to device tree and config options to enable
support for booting from SPI NOR flash on Radxa ROCK 3 Model A.
Unlike prior generation SoCs the BootRom in RK3568 can read all data and
look for idbloader at 0x8000, same as on SD and
On 2023/4/22 09:23, Jonas Karlman wrote:
Enable pinctrl for sdmmc and sdhci in SPL to support loading of FIT
image from SD and eMMC storage when booting from SPI NOR flash.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
On 2023/4/22 09:23, Jonas Karlman wrote:
Update defconfig for rk3568-rock-3a with new defaults.
Remove the SPL_ROCKCHIP_BACK_TO_BROM=y option, SPL is expected to load
next stage from a FIT image and then jump to next stage not back to
BootRom.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify
On 2023/4/22 09:23, Jonas Karlman wrote:
Update defconfig for rk3568-evb with new defaults.
Remove the SPL_ROCKCHIP_BACK_TO_BROM=y option, SPL is expected to load
next stage from a FIT image and then jump to next stage not back to
BootRom.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an
On 2023/4/11 15:20, Eugen Hristev wrote:
Fix line spacing aligment in bind function
Fixes: 760188c1aa5b ("rockchip: reset: support a (common) rockchip reset
drivers")
Signed-off-by: Eugen Hristev
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/reset/reset-rockchip.c | 4 ++--
1
Update splashimage address, to load splash image at a lower address than
stack.
Signed-off-by: Nikhil M Jain
---
V3:
- Keep splashsource as mmc.
V2:
- No change.
board/ti/am62x/am62x.env | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/ti/am62x/am62x.env
To enable splash at A53 SPL, need to do memory map changes which
involves locate stack above malloc and have enough space to load bmp
image above stack. To load a 1920X1200 image a minimum of 8.8MB space is
needed, to support it move malloc down to 0x80b8 from 0x8048 and
bss to 0x80c8
Add method to remove video driver before loading u-boot proper, when
there is no bloblist passed to next stage, to avoid displaying of
artifacts in the next stage, if video is not defined in that stage.
Signed-off-by: Nikhil M Jain
---
V3 (patch introduced):
- Remove video only if
Add VIDEO_REMOVE configs to allow user to control removing of video
driver, in between stages.
Signed-off-by: Nikhil M Jain
---
V3 (patch introduced):
- Add config to remove video.
drivers/video/Kconfig | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/video/Kconfig
When video is set up in SPL, U-Boot proper needs to use the correct
frame buffer address to reserve particular location in memory, to avoid
displaying artifacts on the screen.
Put the framebuffer address and size in a bloblist to make them
available at u-boot proper, if in u-boot proper
Add method to reserve video using blob.
Signed-off-by: Nikhil M Jain
---
V3 (patch introduced):
- Add method to reserve video using blob.
This patch depends on a patch sent by Simon Glass
https://lore.kernel.org/u-boot/20230504165823.v3.25.Ieb0824a81d8ad4109fa501c9497b01b8749f913a@changeid/
To enable splash screen at SPL, call methods to reserve memory for video
and enable cache, and splash_display to display bmp image.
Signed-off-by: Nikhil M Jain
---
V3:
- Remove function call for dram setup and set pagetable.
- Call splash display only if SPLASH_SCREEN is defined.
V2:
- No
Add support for enabling dcache already in SPL.
Signed-off-by: Nikhil M Jain
---
V3 (patch introduced):
- Enable dcache at SPL.
arch/arm/mach-k3/am625_init.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
index
In spl_dcache_enable after setting up page table, set gd->relocaddr
pointer with 64KB alignment, to get address to reserve video.
Signed-off-by: Nikhil M Jain
---
V3 (patch introduced):
- return a pointer after page table setup.
arch/arm/mach-k3/common.c | 2 ++
1 file changed, 2 insertions(+)
This patch series aims at eanbling SPL splash screen on AM62x.
Changes in V3:
- Update stackpointer after relocation.
- Return a pointer after page table setup.
- Enable dcache at SPL.
- Add method to reserve video using blob.
- Pass video buffer info from SPL to U-boot.
- Add config to remove
At SPL stage when stack is relocated, the stack pointer needs to be
updated, the stack pointer may point to stack in on chip memory even
though stack is relocated.
Signed-off-by: Nikhil M Jain
---
V3 (patch introduced):
- Update stackpointer after relocation.
common/spl/spl.c | 1 +
1 file
On 2023/4/11 15:17, Eugen Hristev wrote:
s/faile/failed in debug message
Signed-off-by: Eugen Hristev
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/clk/rockchip/clk_px30.c | 2 +-
drivers/clk/rockchip/clk_rk3036.c | 2 +-
drivers/clk/rockchip/clk_rk3188.c | 2 +-
On 2023/4/13 22:11, Eugen Hristev wrote:
Implement a resource release mechanism on failing probe.
Without this, a strange situation can happen e.g. when init port fails,
or attempting to get the PHY fails, because the gpios have been
requested first, and if the user tries to do 'pci enum'
On Mon, 8 May 2023 at 18:44, Heinrich Schuchardt wrote:
>
> On 5/8/23 10:15, Masahisa Kojima wrote:
> > Hi Heinrich,
> >
> > On Thu, 27 Apr 2023 at 15:09, Heinrich Schuchardt
> > wrote:
> >>
> >> On 4/10/23 11:07, Masahisa Kojima wrote:
> >>> Current FMP->GetImageInfo() always return 0 for the
Hi Marc,
Thanks for your quick reply.
>> I am not sure if I built/using u-boot as intended for this platform.
>
> I would advice to stick to the documentation [1].
Thanks for the reference.
>> 1) running via serial download:
>> Please note that we never integrated/validated USB device support
On 08.05.23 07:05, Neha Malcom Francis wrote:
> Hi Jan,
>
> On 07/05/23 17:41, Jan Kiszka wrote:
>> On 04.05.23 08:13, Neha Malcom Francis wrote:
>>> Hi Jan
>>>
>>> On 04/05/23 10:13, Neha Malcom Francis wrote:
Hi Jan,
On 03/05/23 22:04, Jan Kiszka wrote:
> On 03.05.23 14:56,
Hi,
The Firmware Handoff specification has just been released at version 0.9.
The release can be found here:
https://github.com/FirmwareHandoff/firmware_handoff/releases/tag/v0.9
Thanks to everyone that participated in the discussions about and on the spec
development.
Once enough confidence
Hi Simon,
On Fri, May 5, 2023 at 6:51 AM Simon Glass wrote:
>
> This adds some fixes for x86-based Chromebook builds which have picked up
> a few problems recently.
>
> With this, chromebook_link/64, chromebook_samus and chromebook_coral work
> correctly.
>
> Changes in v3:
> - Fix 'intend' typo
From: Mason Huo
Enable and add pinctrl configuration for PCIe host controller.
Also add JH7110 stg syscon configuration.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 11 +++
arch/riscv/dts/jh7110.dtsi| 74
From: Mason Huo
Add pcie driver for StarFive JH7110, Also add PLDA
PCIe controller common driver functions.
Several devices are tested:
a) M.2 NVMe SSD
b) Realtek 8169 Ethernet adapter.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
Acked-by: Pali Rohár
---
drivers/pci/Kconfig
These PCIe series patches are based on the JH7110 RISC-V SoC and VisionFive V2
board.
The PCIe driver depends on gpio, pinctrl, clk and reset driver to do init.
The PCIe dts configuation includes all these setting.
The PCIe drivers codes has been tested on the VisionFive V2 boards.
The test
From: Mason Huo
also add the nvme driver and rtl8169 support.
Signed-off-by: Mason Huo
Signed-off-by: Minda Chen
---
configs/starfive_visionfive2_defconfig | 10 ++
1 file changed, 10 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
On 19/04/2023 15:40, Eugen Hristev wrote:
phy-supply is now handled at uclass level. Remove it from the drivers that
implement it at the driver level.
Suggested-by: Jonas Karlman
Signed-off-by: Eugen Hristev
---
drivers/phy/meson-g12a-usb2.c | 48 ---
Hi,
On Fri, 05 May 2023 15:56:34 +0300, Igor Prusov wrote:
> This patch series adds basic support for Amlogic AD401 development board
> based on Amlogic A1 SoC family
>
> Changelog:
> v1 -> v2:
> - Add MAINTAINERS for new board instead of using one in the repo root
>
> [...]
Thanks, Applied
On 16.06.2022 21:59, Rafał Miłecki wrote:
From: Rafał Miłecki
A new DT binding for describing environment data block has been added in
Linux's commit 5db1c2dbc04c ("dt-bindings: nvmem: add U-Boot environment
variables binding"). Once we get a proper Linux NVMEM driver it'll be
possible to use
Hi Roger,
On 05/05/23 6:02 pm, Roger Quadros wrote:
> Hi Ravi,
>
> On 05/05/2023 15:13, Ravi Gunasekaran wrote:
>> From: Aswath Govindraju
>>
>> When the device port is in a low power state [U3/L2/Not Connected],
>> accesses to usb device registers may take a long time. This could lead to
>>
Currently the parent node(dwc3) ref_clk is updated to the
dwc3->ref_clk, but we need to update the child node(dwc3)
"ref" clock to the dwc3->ref_clk.
For versal SOC, the parent node(usb) ref_clk is updated to dwc3->ref_clk
which is USB3_DUAL_REF, whereas it should contain the child node(dwc3)
Harts need to use per-hart stack before any function call, even if that
function is a simple one. When the callee uses stack for register save/
restore, especially RA, if nested call, concurrent access by multiple
harts on the same stack will cause data-race.
This patch sets up SP before
Hi Manuel
Please note that Philippe is no longer with Toradex.
On Mon, 2023-05-08 at 13:49 +0200, Manuel Traut wrote:
> Hi,
>
> I am not able to run u-boot for the Toradex Verdin i.MX8MMini.
We call it the Verdin iMX8M Mini.
> I am not sure if I built/using u-boot as intended for this
Hi Michael, hi Dario,
On 18.04.23 15:46, Frieder Schrempf wrote:
> Hi Michael, Dario,
>
> On 28.03.23 09:57, Frieder Schrempf wrote:
>> Hi Michael,
>>
>> On 10.02.23 12:57, Michael Nazzareno Trimarchi wrote:
>>> Hi
>>>
>>> I will review
>>>
>>> On Thu, Feb 9, 2023 at 5:52 PM Tom Rini wrote:
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