Hello Sumit,
On Tue, Feb 20, 2024 at 06:40:56PM +0530, Sumit Garg wrote:
> Also, enable reset driver which is a prerequisite for PCIe support.
>
> Signed-off-by: Sumit Garg
> ---
> configs/verdin-imx8mp_defconfig | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git
Hej,
On Mon, Feb 12, 2024, at 17:07, Heinrich Schuchardt wrote:
> On 10.02.24 13:46, Janne Grunau via B4 Relay wrote:
>> From: Andre Przywara
>>
>> UEFI applications rely on Unicode output capability, and might use that
>> for drawing pseudo-graphical interfaces using Unicode defined box
>>
ring_idx was not correctly assigned in case of tflow_id is zero.
Which leads to wrong pairing of DMA for drivers like OSPI.
Fixes: 4312a1dfca26 ("dma: ti: k3-udma: Use ring_idx to pair k3 nav rings")
Signed-off-by: Udit Kumar
---
drivers/dma/ti/k3-udma.c | 4 ++--
1 file changed, 2
From: Janne Grunau
Apple USB keyboards carry the HID keyboard boot protocol on the second
interface. Using the second interface in the USB keyboard driver does
not work since the xhci has not allocated a transfer ring.
---
drivers/usb/host/xhci.c | 31 +++
From: Janne Grunau
Those keyboards do not return the current device state. Polling will
timeout unless there are key presses. This is not a problem during
operation but the inital device state query during probing will fail.
Skip this step in usb_kbd_probe_dev() to make these devices useable.
From: Janne Grunau
Discovered while trying to use the second interface in the USB keyboard
driver necessary on Apple USB keyboards.
Signed-off-by: Janne Grunau
---
drivers/usb/host/xhci-ring.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/usb/host/xhci-ring.c
From: Hector Martin
We currently only support one USB keyboard device, but some devices
emulate keyboards for other purposes. Most commonly, people run into
this with Yubikeys, so let's ignore those.
Even if we end up supporting multiple keyboards in the future, it's
safer to ignore known
From: Janne Grunau
In the next step endpoints for multiple interfaces are set up. Move most
of the per endpoint initialization to separate function to avoid another
identation level.
Signed-off-by: Janne Grunau
---
drivers/usb/host/xhci.c | 119 +---
From: Janne Grunau
Apple USB keyboards (Magic Keyboard from 2021 (product id 0x029c)) carry
the HID keyboard boot protocol on the second interface descriptor.
Probe via vendor and product IDs since the class/subclass/protocol match
uses the first interface descriptor.
Probe the two first
Apple USB Keyboards from 2021 need quirks to be useable. The boot HID
keyboard protocol is unfortunately not described in the first interface
descriptor but the second. This needs several changes. The USB keyboard
driver has to look at all (2) interface descriptors during probing.
Since I didn't
On Tue, 20 Feb 2024 at 21:34, Fabio Estevam wrote:
>
> On Tue, Feb 20, 2024 at 10:51 AM Sumit Garg wrote:
> >
> > Also, enable reset driver which is a prerequisite for PCIe support.
> >
> > Signed-off-by: Sumit Garg
> > ---
> > configs/verdin-imx8mp_defconfig | 9 +
> > 1 file changed,
On Tue, 20 Feb 2024 at 21:02, Marek Vasut wrote:
>
> On 2/20/24 14:10, Sumit Garg wrote:
> > Also, enable reset driver which is a prerequisite for PCIe support.
>
> Commit message needs to be fixed.
Let me reiterate the header here too.
Enable PCIe/NVMe support. Also, enable the reset
This code assumes that CONFIG_MMC and it causes a build error when
the config is disabled.
aarch64-linux-gnu-ld.bfd: test/boot/bootstd_common.o: in function
`bootstd_test_check_mmc_hunter':
test/boot/bootstd_common.c:83:(.text.bootstd_test_check_mmc_hunter+0x70):
undefined reference to
The bootflow testing assumes that BOOTMETH_CROS is enabled but it
might not be which leads to a build error.
aarch64-linux-gnu-ld.bfd: test/boot/bootflow.o: in function `prep_mmc_bootdev':
test/boot/bootflow.c:549:(.text.prep_mmc_bootdev+0x1c8):
undefined reference to
On Tue, 20 Feb 2024 at 21:02, Marek Vasut wrote:
>
> On 2/20/24 14:10, Sumit Garg wrote:
> > pcie_imx doesn't seem to share any useful code for iMX8 SoC and it is
> > tied to quite old port of pcie_designware driver from Linux which
> > suffices only iMX6 specific needs.
> >
> > But currently we
Hi,
> -Original Message-
> From: Lim, Jit Loon
> Sent: Tuesday, February 20, 2024 10:36 PM
> To: u-boot@lists.denx.de
> Cc: Jagan Teki ; Marek ;
> Simon ; Chee, Tien Fong
> ; Hea, Kok Kiang ;
> Maniyam, Dinesh ; Ng, Boon Khai
> ; Yuslaimi, Alif Zakuan
> ; Chong, Teik Heng
> ; Zamri,
On Tue, 20 Feb 2024 at 21:02, Marek Vasut wrote:
>
> On 2/20/24 14:10, Sumit Garg wrote:
> > Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
> > PHY initialization moved to this standalone PHY driver.
> >
> > Signed-off-by: Sumit Garg
>
> Is this based on Linux ? If so,
On Tue, 20 Feb 2024 at 21:02, Marek Vasut wrote:
>
> On 2/20/24 14:10, Sumit Garg wrote:
> > PCIe PHY can use it when there is no external refclock provided.
>
> Commit message needs to be fixed.
How about the following?
Expose high performance PLL clock, so the PCIe PHY can
use it when
On Tue, 20 Feb 2024 at 21:02, Marek Vasut wrote:
>
> On 2/20/24 14:10, Sumit Garg wrote:
> > Pre-requisite to enable PCIe support on iMX8MP SoC.
>
> This commit message is useless, write a proper one.
>
How about the following?
Add support for GPCv2 power domains and clock handling
for
On Tue, 20 Feb 2024 at 21:02, Marek Vasut wrote:
>
> On 2/20/24 14:10, Sumit Garg wrote:
> > Pre-requisite to enable PCIe support on iMX8MP SoC.
>
> Please write a proper commit message .
>
How about the following?
Add support for i.MX8MP reset controller. It is required
to enable PCIe
On Tue, 20 Feb 2024 at 21:02, Marek Vasut wrote:
>
> On 2/20/24 14:10, Sumit Garg wrote:
> > pcie_imx doesn't seem to share any useful code for iMX8MP SoC and it is
> > rather tied to quite old port of pcie_designware driver from Linux which
> > suffices only iMX6 specific needs.
> >
> > But
With the latest TIFS firmware, an additional virtual interrupt and
event is reserved for TIFS usage on am62x and am62ax devices.
Update the rm-cfg to reflect this new reservation.
Signed-off-by: Vishal Mahaveer
---
board/ti/am62ax/rm-cfg.yaml | 8
board/ti/am62x/rm-cfg.yaml | 8
On Tue, Feb 20, 2024 at 01:11:49PM +0530, Love Kumar wrote:
> Add test case for saveenv command in non-JTAG bootmode which saves the
> u-boot environment variables in persistent storage.
>
> Signed-off-by: Love Kumar
Reviewed-by: Tom Rini
--
Tom
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Description: PGP signature
On Tue, Feb 20, 2024 at 01:11:38PM +0530, Love Kumar wrote:
> Add a test for reset commands which performs resetting of CPU, It does
> COLD reset by default and WARM reset with -w option.
>
> Signed-off-by: Love Kumar
Reviewed-by: Tom Rini
--
Tom
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Description: PGP signature
On Tue, 2024-02-20 at 21:14 +0200, Svyatoslav Ryhel wrote:
> вт, 20 лют. 2024 р. о 20:29 Francesco Dolcini пише:
> >
> > From: Emanuele Ghidoli
> >
> > This commit introduces support for the Toradex sysinfo driver in U-Boot,
> > which uses information from Toradex config block to print correct
On Tue, 2024-02-20 at 19:29 +0100, Francesco Dolcini wrote:
> From: Francesco Dolcini
>
> This series fixes two regressions affecting multiple Toradex boards
> (i.MX, TI and TEGRA based) and targets the current master, e.g. v2024.04
> release.
>
> U-Boot `reset` command is broken on all Tordex
On 2/20/24 14:18, Michal Simek wrote:
>
>
> On 2/20/24 19:43, Sean Anderson wrote:
>> On 2/20/24 13:24, Michal Simek wrote:
>>>
>>>
>>> On 2/16/24 17:09, Sean Anderson wrote:
On 2/16/24 11:03, Sean Anderson wrote:
> On 2/16/24 10:06, Michal Simek wrote:
>>
>>
>> On 2/16/24
On 2/20/24 19:43, Sean Anderson wrote:
On 2/20/24 13:24, Michal Simek wrote:
On 2/16/24 17:09, Sean Anderson wrote:
On 2/16/24 11:03, Sean Anderson wrote:
On 2/16/24 10:06, Michal Simek wrote:
On 2/16/24 14:48, Michal Simek wrote:
On 2/15/24 20:31, Sean Anderson wrote:
On 2/15/24
вт, 20 лют. 2024 р. о 20:29 Francesco Dolcini пише:
>
> From: Emanuele Ghidoli
>
> This commit introduces support for the Toradex sysinfo driver in U-Boot,
> which uses information from Toradex config block to print correct
> board model.
> In case the Toradex config block is not present sysinfo
Hi Sam,
On Tue, Feb 20, 2024 at 7:29 PM Sam Protsenko
wrote:
>
> On Mon, Feb 19, 2024 at 4:16 AM Igor Opaniuk wrote:
> >
> > This takes the latest changes from AOSP from [1][2] (as this
> > header was split on two) with minimal changes (this could lead
> > to warnings reported by checkpatch).
>
On 2/20/24 13:24, Michal Simek wrote:
>
>
> On 2/16/24 17:09, Sean Anderson wrote:
>> On 2/16/24 11:03, Sean Anderson wrote:
>>> On 2/16/24 10:06, Michal Simek wrote:
On 2/16/24 14:48, Michal Simek wrote:
>
>
> On 2/15/24 20:31, Sean Anderson wrote:
>> On 2/15/24
Configure the debounce configuration that makes sense for BeaglePlay
usage model.
Signed-off-by: Nishanth Menon
---
Changes since V1:
* No change
V1: https://lore.kernel.org/r/20240212155332.541949-5...@ti.com
board/beagle/beagleplay/beagleplay.c | 24
1 file changed,
Add the Debounce configuration registers that need to be configured one
time for the platform for the entire SoC.
Signed-off-by: Nishanth Menon
---
Changes since V1:
* Fix 4080 to 0x4080
V1: https://lore.kernel.org/r/20240212155332.541949-4...@ti.com
We had enabled USB and network pxe boot with the hope to get it all
merged on time. However, it has not panned out. Drop usb and pxe boot
else bootflow scan -l throws in:
a) Unknown uclass 'usb' in label
b) Crashes when attempting pxe - cpsw/mdio driver apparently has missing
error handling of
Hi,
Rev 2 of the series.
This is a follow up from [1] - Without the 32k crystal configuration,
wlan doesn't work. Debounce is needed for HDMI Hot plug detect(hpd)
gpio interrupt not storming.
At least the 32k configuration has been done for toradex and phytec
boards, follow similar model of
Enable the external 32k crystal similar to that found on other
production AM62X board. The trim settings for the crystal is board
dependent, so the sequences tend to be board specific. Since this is
a configuration that needs to be done prior to DM managing the system
and all other muxes get set,
Enable CONFIG_SPL_BOARD_INIT to configure the 32k crystal.
Signed-off-by: Nishanth Menon
---
Changes since V1:
* No change
V1: https://lore.kernel.org/r/20240212155332.541949-3...@ti.com
configs/am62x_beagleplay_r5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Emanuele Ghidoli
Set CONFIG_NET_RANDOM_ETHADDR=y, which sets random eth address in
case there is no toradex config block programmed.
In case of missing toradex config block the generated mac address was
always the same, linked to serial number 0.
Use random generated mac address instead.
From: Parth Pancholi
commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()")
introduced a regression that 'reset' command unable to reset
imx6 and imx6ull based Toradex's modules in the u-boot.
This change enables a watchdog-based sysreset driver for
Toradex's colibri-imx6,
From: Emanuele Ghidoli
This commit introduces support for the Toradex sysinfo driver in U-Boot,
which uses information from Toradex config block to print correct
board model.
In case the Toradex config block is not present sysinfo prints the model
of the board provided by device tree removing
From: Emanuele Ghidoli
Use SETTINGS_R event to read toradex config block and checkboard()
to print board info.
Signed-off-by: Emanuele Ghidoli
Signed-off-by: Francesco Dolcini
---
board/toradex/common/tdx-common.c | 92 ++-
1 file changed, 54 insertions(+), 38
From: Emanuele Ghidoli
Sysinfo prints the model obtained from device tree, checkboard()
take info from hardware and tdx_checkboard() use the model retrieved by
toradex config block.
Remove the print from checkboard() function because the model obtained
from toradex config block is the most
From: Emanuele Ghidoli
Use the common syntax to define aliases.
Signed-off-by: Emanuele Ghidoli
Signed-off-by: Francesco Dolcini
---
.../dts/imx6dl-colibri-eval-v3-u-boot.dtsi| 18 -
arch/arm/dts/imx6q-apalis-eval-u-boot.dtsi| 26 ++-
From: Emanuele Ghidoli
Since checkboard() is used instead of show_board_info(), in case toradex
config block is missing or malformed, checkboard is recursively called.
It prints a long list of "MISSING TORADEX CONFIG BLOCK" till the stack
is full.
Fixes: edb0ecd18708 ("toradex: Use checkboard()
From: Francesco Dolcini
This series fixes two regressions affecting multiple Toradex boards
(i.MX, TI and TEGRA based) and targets the current master, e.g. v2024.04
release.
U-Boot `reset` command is broken on all Tordex i.MX6* based SoMs since
v2023.07, this series fixes it enabling the
On Mon, Feb 19, 2024 at 4:16 AM Igor Opaniuk wrote:
>
> This takes the latest changes from AOSP from [1][2] (as this
> header was split on two) with minimal changes (this could lead
> to warnings reported by checkpatch).
Do we want to maybe follow that and also carry two different headers
in
On 2/16/24 17:09, Sean Anderson wrote:
On 2/16/24 11:03, Sean Anderson wrote:
On 2/16/24 10:06, Michal Simek wrote:
On 2/16/24 14:48, Michal Simek wrote:
On 2/15/24 20:31, Sean Anderson wrote:
On 2/15/24 14:08, Michal Simek wrote:
On 2/15/24 18:19, Sean Anderson wrote:
Currently,
On Tue, Feb 20, 2024 at 09:35:43AM +0100, Marek Vasut wrote:
> The following changes since commit 3e6f2a94bfc25f1782ce2d45db27f47ec781feb1:
>
> Merge tag 'u-boot-imx-master-20240219' of
> https://gitlab.denx.de/u-boot/custodians/u-boot-imx (2024-02-19 08:55:17
> -0500)
>
> are available in
On Tue, Feb 20, 2024 at 01:25:44PM +0900, Minkyu Kang wrote:
> Dear Tom,
>
> The following changes since commit 15e7927b5a2d33666af19879577bf0c30ab088fe:
>
> Merge patch series "omap3: Make SPL_OMAP3_ID_NAND depend on
> NAND_OMAP_GPMC" (2024-01-22 14:18:55 -0500)
>
> are available in the git
I'm kind of new to u-boot and I'm not really able to review this code
as well as I should.
But also I can't apply the patch. It seems white space damaged? The
kernel has a good document on how to do this. I'm pretty sure u-boot
does as well but I'm new.
On Mon, Feb 19, 2024 at 06:35:03PM +, Caleb Connolly wrote:
> The current ordering always results in func pointing to the next
> function in the init_sequence. e.g. if fdtdec_setup() fails, ret will
> be set to the error code, then func will be updated to point to
> initf_malloc(), only then
On 20/02/2024 14:19, Peter Robinson wrote:
> On Thu, 15 Feb 2024 at 21:03, Caleb Connolly
> wrote:
>>
>> Add a config fragment for building U-Boot such that it can be
>> chainloaded by aboot/LK rather than being flashed directly to the aboot
>> partition.
>
> How does this work in practice?
On Mon, Feb 19, 2024 at 11:50 PM Jesse T wrote:
> Huh, this is very interesting and I haven't noticed before.
> When sending git send-email lowercases my email.
> It seems like all my commits are like this.
> Do you want this fixed?
Please fix both issues and submit a v5.
On 2/20/24 04:50, Benjamin Lemouzy wrote:
> Hello,
>
> I'm trying to make secure boot work on i.MX6 SABRE with SPL and
> u-boot-dtb.img files and I'm not sure how to do it.
>
> I'm using the U-Boot vanilla master branch (2024.04-rc2) with the following
> configuration:
>
> # Remove some
On Tue, Feb 20, 2024 at 10:51 AM Sumit Garg wrote:
>
> Also, enable reset driver which is a prerequisite for PCIe support.
>
> Signed-off-by: Sumit Garg
> ---
> configs/verdin-imx8mp_defconfig | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/configs/verdin-imx8mp_defconfig
On 2/20/24 14:10, Sumit Garg wrote:
Also, enable reset driver which is a prerequisite for PCIe support.
Commit message needs to be fixed.
On 2/20/24 14:10, Sumit Garg wrote:
pcie_imx doesn't seem to share any useful code for iMX8 SoC and it is
tied to quite old port of pcie_designware driver from Linux which
suffices only iMX6 specific needs.
But currently we have the common DWC specific bits which alligns pretty
well with DW
On 2/20/24 14:10, Sumit Garg wrote:
Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
PHY initialization moved to this standalone PHY driver.
Signed-off-by: Sumit Garg
Is this based on Linux ? If so, include Linux commit ID from which the
code was imported.
On 2/20/24 14:10, Sumit Garg wrote:
PCIe PHY can use it when there is no external refclock provided.
Commit message needs to be fixed.
+static int hsio_pll_enable(struct udevice *dev)
+{
+ struct imx8mp_hsiomix_priv *priv = dev_get_priv(dev);
+ unsigned long start;
+ u32
On 2/20/24 14:10, Sumit Garg wrote:
Pre-requisite to enable PCIe support on iMX8MP SoC.
This commit message is useless, write a proper one.
Signed-off-by: Sumit Garg
---
drivers/power/domain/imx8mp-hsiomix.c | 50 +--
1 file changed, 48 insertions(+), 2
On 2/20/24 14:10, Sumit Garg wrote:
Pre-requisite to enable PCIe support on iMX8MP SoC.
Please write a proper commit message .
Signed-off-by: Sumit Garg
---
drivers/reset/reset-imx7.c | 114 +
1 file changed, 114 insertions(+)
diff --git
On 2/20/24 14:10, Sumit Garg wrote:
pcie_imx doesn't seem to share any useful code for iMX8MP SoC and it is
rather tied to quite old port of pcie_designware driver from Linux which
suffices only iMX6 specific needs.
But currently we have the common DWC specific bits which alligns pretty
well
On 08:48-20240220, Jan Kiszka wrote:
> On 19.02.24 19:37, Jan Kiszka wrote:
> > On 17.02.24 12:36, Alexander Sverdlin wrote:
> >> Hi Jan!
> >>
> >> On Sat, 2024-02-17 at 09:42 +0100, Jan Kiszka wrote:
> >>>> U-Boot 2024.01 (Feb 15 2024 - 01:
On 19:37-20240219, Jan Kiszka wrote:
> My personal observation is that continuous integration testings with
> all-upstream components is not really a common thing. I saw that with
> multiple active SoCs from various vendors.
For what it is worth, https://software-dl.ti.com/cicd-report/upstream/
On 20/02/2024 11:54, Heinrich Schuchardt wrote:
> While fat_exists() reports directories and files as existing
> ext4fs_exists() only recognizes files. This lead to errors
> when using systemd-boot with an ext4 file-system.
>
> Change ext4fs_exists() to find any type of inode:
> files,
On 20/02/2024 11:27, Marek Vasut wrote:
> On 2/20/24 11:57, Paul Barker wrote:
>> On 20/02/2024 08:37, Marek Vasut wrote:
>>> This hs400_tuning is a flag, make it bool. No functional change.
>>> This will be useful in the following patch, which adds another
>>> more generic flag, where the
This patch is to enable Agilex5 platform for Intel
product. Changes, modification and new files are
created for board, dts, configs and makefile to
create the base for Agilex5.
Signed-off-by: Jit Loon Lim
---
arch/arm/Kconfig | 9 +-
arch/arm/dts/Makefile
On 20/02/2024 11:26, Marek Vasut wrote:
> On 2/20/24 11:50, Paul Barker wrote:
>> On 20/02/2024 08:36, Marek Vasut wrote:
>>> The cmd_error parameter is not used, remove it.
>>> [snip]
>>>
>>> diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-sd.c
>>> index 5a0c61daed5..296aaee7331 100644
>>>
On Thu, 15 Feb 2024 at 21:03, Caleb Connolly wrote:
>
> Add a config fragment for building U-Boot such that it can be
> chainloaded by aboot/LK rather than being flashed directly to the aboot
> partition.
How does this work in practice? I think a lot of devices, one example
I see is signed vs
On Fri, 16 Feb 2024 at 02:23, Caleb Connolly wrote:
>
> Drop the U-Boot specific DTS in favour of upstream. We'll only include
> the -4000 variant as that is what U-Boot already supported.
>
> Taken from kernel tag v6.7
>
> Reviewed-by: Neil Armstrong
> Signed-off-by: Caleb Connolly
> ---
>
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> Import the dt-bindings headers in preparation for switching to upstream
> DTS for MSM8916.
>
> Taken from kernel tag v6.7
>
> Reviewed-by: Neil Armstrong
> Signed-off-by: Caleb Connolly
> ---
> include/dt-bindings/arm/coresight-cti-dt.h
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> Import the supporting pm8916.dtsi and msm8916-pm8916.dtsi files from
> upstream in preparation for switching boards over.
>
> Taken from kernel tag v6.7
>
> Reviewed-by: Neil Armstrong
> Signed-off-by: Caleb Connolly
> ---
>
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> Import dt-binding headers for MSM8996/APQ8096 from Linux.
>
> Taken from kernel tag v6.7
>
> Reviewed-by: Neil Armstrong
> Signed-off-by: Caleb Connolly
> ---
> include/dt-bindings/clock/qcom,gcc-msm8996.h | 362
>
On Fri, 16 Feb 2024 at 02:23, Caleb Connolly wrote:
>
> Import PM8994 and PMI8994 DTSI files in preparation for switching
> MSM8996 boards to upstream DTS.
>
> Taken from kernel tag v6.7
>
> Reviewed-by: Neil Armstrong
> Signed-off-by: Caleb Connolly
> ---
> arch/arm/dts/pm8994.dtsi | 152
>
On Fri, 16 Feb 2024 at 02:23, Caleb Connolly wrote:
>
> Don't use hardcoded clock IDs, use the IDs from the dt-bindings to be
> compatible with upstream.
>
> Taken from kernel tag v6.7
>
> Reviewed-by: Neil Armstrong
> Signed-off-by: Caleb Connolly
> ---
> arch/arm/dts/dragonboard820c.dts | 5
On Fri, 16 Feb 2024 at 02:23, Caleb Connolly wrote:
>
> Import the headers needed for QCS404-evb.
>
> Taken from kernel tag v6.7
>
> Reviewed-by: Neil Armstrong
> Signed-off-by: Caleb Connolly
> ---
> include/dt-bindings/clock/qcom,turingcc-qcs404.h | 15 +++
> 1 file changed, 15
On Fri, 16 Feb 2024 at 02:23, Caleb Connolly wrote:
>
> Add drivers and DTS files, as well as regex matches for
> qcom/qualcomm/snapdragon.
>
> Reviewed-by: Neil Armstrong
> Signed-off-by: Caleb Connolly
> ---
> MAINTAINERS | 12
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> Import the PM8998 and PMI8998 PMIC DTSI files from Linux as well
> as the common audio codec in preperation for replacing board DTS files
s/preperation/preparation/
> with upstream.
>
> Taken from kernel tag v6.7
>
> Reviewed-by: Neil
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> Import the DT bindings headers that are used by SDM845 from Linux.
>
> Taken from kernel tag v6.7
>
> Reviewed-by: Neil Armstrong
> Signed-off-by: Caleb Connolly
> ---
> include/dt-bindings/clock/qcom,camcc-sdm845.h | 116 ++
>
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> The MSM8916/APQ8016 Technical Reference Manual is publicly available and
> contains a lot of useful register maps for many core parts of the SoC.
> Include an archive.org link to it in the dragonboard410c documentation.
>
> Signed-off-by:
On Tue, 20 Feb 2024 at 17:09, Caleb Connolly wrote:
>
>
>
> On 20/02/2024 06:08, Sumit Garg wrote:
> > On Fri, 16 Feb 2024 at 02:22, Caleb Connolly
> > wrote:
> >>
> >> Introduce support for early debugging. This relies on the previous stage
> >> bootloader to initialise the UART clocks, when
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> Replace the board specific docs with a generic board.rst file which
> documents the build/boot process for the sdm845 and qcs404 boards now
> that the only differences are the DTB in use.
>
> At the same time, create a debugging page to
From: Florian Schmaus
Once u-boot's build system invokes
python3 scripts/dtc/pylibfdt/setup.py --quiet build_ext --inplace
it may fail with
scripts/dtc/pylibfdt/setup.py:40: SyntaxWarning: invalid escape sequence '\w'
RE_KEY_VALUE = re.compile('(?P\w+) *(?P[+])?= *(?P.*)$')
depending on
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> This board is entirely supported by the generic arch code and DTS. The
> board code used to handle turning on the vbus regulator, however this is
> now handled via DT.
>
> With this, the board specific defconfig is also no longer needed, so
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> On Qualcomm platforms, the TZ may already have certain memory regions
> under protection by the time U-Boot starts. There is a rare case on some
> platforms where the prefetcher might speculatively access one of these
> regions resulting in
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> With just a few basic rules, we can generate the $fdtfile environment
> variable to match the format used in Linux. This uses the root
> compatible property inside u-boot, with specific handling for the
> Dragonboard845c which is a special
Also, enable reset driver which is a prerequisite for PCIe support.
Signed-off-by: Sumit Garg
---
configs/verdin-imx8mp_defconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig
index 22b8a334dfa..d8bd644322b 100644
Pre-requisite to enable PCIe support on iMX8MP SoC.
Signed-off-by: Sumit Garg
---
drivers/clk/imx/clk-imx8mp.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index a21a3ce34bb..7dfc829df2c 100644
---
Add initial support for i.MX8M{M/P} PCIe PHY. On i.MX8M{M/P} SoCs PCIe
PHY initialization moved to this standalone PHY driver.
Signed-off-by: Sumit Garg
---
drivers/phy/Kconfig | 9 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-imx8m-pcie.c | 246
Pre-requisite to enable PCIe support on iMX8MP SoC.
Signed-off-by: Sumit Garg
---
drivers/reset/reset-imx7.c | 114 +
1 file changed, 114 insertions(+)
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index eaef2cc2cdf..c1de84dea8b 100644
pcie_imx doesn't seem to share any useful code for iMX8MP SoC and it is
rather tied to quite old port of pcie_designware driver from Linux which
suffices only iMX6 specific needs.
But currently we have the common DWC specific bits which alligns pretty
well with DW PCIe controller on iMX8MP SoC.
pcie_imx doesn't seem to share any useful code for iMX8 SoC and it is
tied to quite old port of pcie_designware driver from Linux which
suffices only iMX6 specific needs.
But currently we have the common DWC specific bits which alligns pretty
well with DW PCIe controller on iMX8MP SoC. So lets
Pre-requisite to enable PCIe support on iMX8MP SoC.
Signed-off-by: Sumit Garg
---
drivers/power/domain/imx8mp-hsiomix.c | 50 +--
1 file changed, 48 insertions(+), 2 deletions(-)
diff --git a/drivers/power/domain/imx8mp-hsiomix.c
b/drivers/power/domain/imx8mp-hsiomix.c
PCIe PHY can use it when there is no external refclock provided.
Signed-off-by: Sumit Garg
---
drivers/power/domain/imx8mp-hsiomix.c | 79 +--
1 file changed, 73 insertions(+), 6 deletions(-)
diff --git a/drivers/power/domain/imx8mp-hsiomix.c
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> Heavily inspired by Apple board code. Use the LMB allocator to configure
> load addresses at runtime, and implement a lookup table for selecting a
> devicetree.
>
> As some Qualcomm RBx boards have different RAM capacities and base
>
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> Historically, Qualcomm boards have relied on heavy hardcoding in U-Boot,
> in many cases to the specific SoC but also to the board itself (e.g.
> memory map). This has been largely resolved by modernising the Qualcomm
> drivers in U-Boot,
On Fri, Feb 16, 2024 at 06:38:06PM +, Caleb Connolly wrote:
> @@ -41,17 +41,25 @@ static int simple_video_probe(struct udevice *dev)
>
> debug("%s: Query resolution...\n", __func__);
>
> - uc_priv->xsize = fdtdec_get_uint(blob, node, "width", 0);
> - uc_priv->ysize =
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> db820c predated support for prepending the kernel image header
> automatically, drop it's custom linker script and head.S in favour of
> this generic support.
>
> Reviewed-by: Neil Armstrong
> Signed-off-by: Caleb Connolly
> ---
>
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> Some of the db410c board support code was written to be generic and
> placed in mach-snapdragon. However, as the db410c is the only board
> using this, move the code out of mach-snapdragon. This makes is more
s/makes is more/makes it more/
On Fri, 16 Feb 2024 at 02:22, Caleb Connolly wrote:
>
> Use the root compatible strings from upstream Linux, add missing
> '#clock-cells' property to the gcc node.
>
> Adjust some of the msm8916/apq8016 drivers to use the correct upstream
> compatible properties and DT bindings.
>
> This prepares
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