On 15/04/2021 07:02, Dietmar Kling wrote:
> Hi Guys,
Hi Dietmar,
> I have created a branch on github regarding two bugfixes which allow my 5
> nanpoi a64 to connect to network again and also again use the second usb
> port, when booting, when using the latest (v2021.04) u-boot.
Thanks for
On 22/02/2021 22:11, Bob wrote:
Hi Bob,
> Lower DRAM clock speed to the official speed for the pinephone design: 528
Can you elaborate why this is necessary? Are there reports with the
existing data rate causing problems?
Please keep in mind that the whole DRAM timings we use do not confirm to
On 26/02/2021 14:13, Neil Armstrong wrote:
Hi,
> On Amlogic G12A platforms, the NVME probe timeouts at get/set_feature(),
> adding a cache flush solves the timeout.
I am puzzled how this is supposed to work ...
>
> Signed-off-by: Neil Armstrong
> ---
> drivers/nvme/nvme.c | 7 ---
> 1
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
Hi,
> From: Icenowy Zheng
>
> Previously we have known that R40 has a configuration register for its
> rank 1, which allows different configuration than rank 0. Reverse
> engineering of newest libdram of A64 from Allwinner shows that A64 has
>
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
> From: Arnaud Ferraris
>
> On a cellular phone, the vast majority of users can be expected to
> have no serial console connected and prefer a short boot.
It's a bit tricky to break in with a delay of 0, but indeed most users
won't care, so looks
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
Hi,
> From: Arnaud Ferraris
This looks OK on the first glance, but is missing a commit message and a
Signed-off-by:
Cheers,
Andre
>
> ---
> include/configs/sunxi-common.h | 15 +++
> 1 file changed, 15 insertions(+)
>
> diff --git
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
> From: Marius Gripsgard
Hi,
This is not really Pinephone specific, actually not even sunxi specific.
I see two better ways of solving this:
- We introduce some generic code to find "gpio-leds" subnodes in the DT,
which have a default-state = "on"
On 20/02/2021 12:14, Nicolas Boulenguez wrote:
> From: Arnaud Ferraris
>
> The wi-fi mac-address was previously changing at every reboot.
This is already part of the kernel .dtsi, which we will sync anyway
(with the new merge window). So we can drop this specific patch.
Cheers,
Andre
>
> ---
On 24/01/2021 16:19, Alexandre GRIVEAUX wrote:
Hi Alexandre,
(CCing: Kory, plus using Maxime's and Boris' newer emails)
> This patch split CHIP defconfig to add nand 4G and 8G support.
>
> Some CONFIG was put at the end of defconfig to ease comparison between:
> - CHIP Pro
> - CHIP with
On 10/02/2021 02:42, Tom Rini wrote:
Hi Tom,
> This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The
> deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI
> requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove
> this
On 17/02/2021 16:19, Nicolas Boulenguez wrote:
Hi Nicolas,
> Please consider the attached suggestions for the sunxi/pinephone
> platform.
> Among commits written for and by Mobian users, these ones may be of
> interest for all pinephone owners.
> Each header mentions the original motivation and
On 16/02/2021 08:31, Игорь Юрасов wrote:
Hi,
> Signed-off-by: Igor Iurasov
This will be superseded by the switch to DM_VIDEO:
https://patchwork.ozlabs.org/project/uboot/patch/20210205010748.2646-1-andre.przyw...@arm.com/
Cheers,
Andre
P.S. Please CC: maintainers directly,
On 18/01/2021 00:18, Peter Robinson wrote:
> There's checks in board/sunxi/board.c if either MACPWR or SATAPWR are
> defined and they are defined by default to a empty string which means
> on vast majority of AllWinner boards when they're not required the
> code is still run and with SATAPWR we
On 16/01/2021 18:32, Amit Singh Tomar wrote:
> From: Amit Singh Tomar
Hi,
> This commit adds support for MMC controllers found on Actions OWL
> SoC platform(S700/S900).
>
> Signed-off-by: Amit Singh Tomar
> ---
> Changes since v2:
> * Progammed read/write delays as suggested by
>
On 30/11/2020 17:23, Heinrich Schuchardt wrote:
Hi Joe,
> On 11/16/20 10:46 AM, Andre Przywara wrote:
>> So far all GBit users of the sun8i-emac driver were using the "rgmii"
>> PHY mode, even though this turns out to be mostly wrong. It just worked
>> because the PHY driver doesn't do the
On 03/01/2021 09:26, Jernej Skrabec wrote:
> This commit introduces DM H616 clock driver.
>
> Signed-off-by: Jernej Skrabec
Compared against the manual.
Reviewed-by: Andre Przywara
Cheers,
Andre
> ---
> drivers/clk/sunxi/Kconfig| 7 ++
> drivers/clk/sunxi/Makefile | 1 +
>
On 03/01/2021 09:26, Jernej Skrabec wrote:
> H616 pinctrl is no different configuration wise than others, so just add
> compatible for it.
>
> Signed-off-by: Jernej Skrabec
Reviewed-by: Andre Przywara
Cheers,
Andre
> ---
> drivers/gpio/sunxi_gpio.c | 1 +
> 1 file changed, 1 insertion(+)
>
On 03/01/2021 09:26, Jernej Skrabec wrote:
> It turns out that several SoCs share same mmc configuration as H6. In
> order to lower ifdef clutter replace H6 specific macro with common one.
>
> Signed-off-by: Jernej Skrabec
Shame we need to do this, but the SPL requires this ifdef orgy.
On 04/01/2021 18:28, Jernej Škrabec wrote:
> Dne ponedeljek, 04. januar 2021 ob 11:35:41 CET je André Przywara napisal(a):
>> On 03/01/2021 23:43, Samuel Holland wrote:
>>
>> Hi Jernej,
>>
>> thanks for that patch, that's a nice solution to avoid those long #ifdef
On 03/01/2021 09:26, Jernej Skrabec wrote:
> This PMIC can be found on H616 boards and it's very similar to AXP805
> and AXP806.
>> Signed-off-by: Jernej Skrabec
The existing sunxi PMIC code is the typical U-Boot mess, but I don't
want to block this series on a rework. I put some comments and
On 10/01/2021 23:16, Samuel Holland wrote:
> On 1/10/21 1:29 PM, Jernej Skrabec wrote:
>> From: Andre Heider
>>
>> dts file is taken from Linux 5.11-rc1 tag.
>>
>> The Bluetooth controller of this device ships with a default address,
>> use the new CONFIG_FIXUP_BDADDR option to fix it up.
>
>
On 10/01/2021 19:29, Jernej Skrabec wrote:
> This series introduces OrangePi 3 support.
>
> Previous cover letter:
> This is just refreshed v4 from here:
> https://patchwork.ozlabs.org/project/uboot/list/?series=156657=*
>
> Patches are only rebased, DT updated and defconfig regenerated, so
> I
On 10/01/2021 18:43, Jernej Škrabec wrote:
> Dne petek, 08. januar 2021 ob 03:01:42 CET je André Przywara napisal(a):
>> On 03/12/2020 17:46, Jernej Skrabec wrote:
>>> It turns out that in rare cases, current analytical approach to detect
>>> correct DRAM bus width
On 08/12/2020 15:45, Andy Shevchenko wrote:
Hi,
> For the sake of consistency (*) and order of initialization, i.e.
> after we have got the ethernet address, interrupt and timer initialized,
> try to initialize USB ethernet gadget.
>
> *) for example, zynqmp uses same order.
>
> Signed-off-by:
On 03/12/2020 17:46, Jernej Skrabec wrote:
> It turns out that in rare cases, current analytical approach to detect
> correct DRAM bus width and rank on H6 doesn't work. On some TV boxes
> with DDR3, incorrect DRAM configuration triggers write leveling error
> which immediately stops
On 03/01/2021 18:36, Jernej Skrabec wrote:
> From: Andre Heider
Hi,
> dts file is taken from Linux 5.11-rc1 tag.
>
> The Bluetooth controller of this device ships with a default address,
> use the new CONFIG_FIXUP_BDADDR option to fix it up.
>
> Signed-off-by: Andre Heider
> Acked-by: Maxime
On 03/01/2021 18:36, Jernej Skrabec wrote:
Hi,
> From: Andre Heider
>
> Some Bluetooth controllers, like the BCM4345C5 of the Orange Pi 3,
> ship with the controller default address.
>
> Add a config option to fix it up so it can function properly.
>
> Signed-off-by: Andre Heider
>
On 03/01/2021 18:36, Jernej Skrabec wrote:
> From: Andre Heider
>
> Refactor setup_environment() so we can use the created sid for a
> Bluetooth address too.
>
> Signed-off-by: Andre Heider
> Acked-by: Maxime Ripard
> [rebased]
> Signed-off-by: Jernej Skrabec
Confirmed to be indeed just
On 06/01/2021 17:02, Jernej Skrabec wrote:
> This commit adds support for Tanix TX6 TV box, based on H6. It's low end
> H6 board, with 3 GiB of RAM, eMMC, fast ethernet, USB, IR and other
> peripherals.
>
> DT file is taken from Linux 5.11-rc1 release.
>
> Signed-off-by: Jernej Skrabec
On 06/01/2021 17:02, Jernej Skrabec wrote:
> Updated H6 DT files are based on Linux 5.11-rc1 release.
>
> Signed-off-by: Jernej Skrabec
Reviewed-by: Andre Przywara
Two things to note:
- This relies on the U-Boot patch to sun8i-emac to recognise rgmii-id
and friends, otherwise Ethernet won't
On 07/01/2021 12:36, Simon Glass wrote:
Hi Simon,
thanks for the review!
> On Wed, 6 Jan 2021 at 02:25, Andre Przywara wrote:
>>
>> Switch the SPL boot image generation from using mksunxiboot to the new
>> sunxi_egon format of mkimage.
>>
>> Verified to create identical results for all 152
On 06/01/2021 23:33, Jaehoon Chung wrote:
> On 1/6/21 7:11 PM, André Przywara wrote:
>> On 05/01/2021 22:36, Jaehoon Chung wrote:
>>
>> Hi,
>>
>> thanks for having a look!
>>
>>> Hi Jernej
>>>
>>> On 1/3/21 6:26 PM, Jernej Skrab
On 03/01/2021 10:00, Jernej Skrabec wrote:
> This commit adds support for Tanix TX6 TV box, based on H6. It's low end
> H6 board, with 3 GiB of RAM, eMMC, fast ethernet, USB, IR and other
> peripherals.
>
> DT file is taken from Linux 5.11-rc1 release.
>
> Signed-off-by: Jernej Skrabec
> ---
>
On 03/01/2021 10:00, Jernej Skrabec wrote:
> Updated H6 DT files are based on Linux 5.11-rc1 release.
>
> Signed-off-by: Jernej Skrabec
That looks alright, but it seems like the OrangePi One Plus .dts is not
updated?
Cheers,
Andre
> ---
> arch/arm/dts/sun50i-h6-beelink-gs1.dts| 70 +++-
On 05/01/2021 22:36, Jaehoon Chung wrote:
Hi,
thanks for having a look!
> Hi Jernej
>
> On 1/3/21 6:26 PM, Jernej Skrabec wrote:
>> This PMIC can be found on H616 boards and it's very similar to AXP805
>> and AXP806.
>
> Is there any plan to cleanup codes?
There is no support for either of
On 03/01/2021 23:43, Samuel Holland wrote:
Hi Jernej,
thanks for that patch, that's a nice solution to avoid those long #ifdef
chains!
> On 1/3/21 3:26 AM, Jernej Skrabec wrote:
>> It turns out that there are at least 2 other SoCs which have basically
>> the same memory map, similar clocks and
On 23/12/2020 12:29, Amit Tomar wrote:
> Hi,
>
> Thanks again for the detailed review
>
> +
>
> > 3 files changed, 407 insertions(+)
> > create mode 100644 drivers/mmc/owl_mmc.c
> >
> > diff --git a/drivers/mmc/Kconfig
On 23/12/2020 04:25, Jaehoon Chung wrote:
> On 12/23/20 11:22 AM, Amit Tomer wrote:
>> On Wed, Dec 23, 2020 at 5:57 AM André Przywara
>> wrote:
>>>
>>> On 19/12/2020 14:51, Amit Singh Tomar wrote:
>>>> From: Amit Singh Tomar
>>>>
On 19/12/2020 14:51, Amit Singh Tomar wrote:
> From: Amit Singh Tomar
>
> This commit adds support for MMC controllers found on Actions OWL
> S700 SoC platform.
>
> Signed-off-by: Amit Singh Tomar
> ---
> Changes since previous version
> * Corrected block count to 512.
> * Changed
On 22/12/2020 23:37, Jaehoon Chung wrote:
> On 12/19/20 11:51 PM, Amit Singh Tomar wrote:
>> From: Amit Singh Tomar
>>
>> This commit adds support for MMC controllers found on Actions OWL
>> S700 SoC platform.
>>
>> Signed-off-by: Amit Singh Tomar
>> ---
>> Changes since previous version
>>
On 22/12/2020 23:28, Jaehoon Chung wrote:
> On 12/19/20 11:51 PM, Amit Singh Tomar wrote:
>> From: Amit Singh Tomar
>>
>> This patch adds node for ethernet controller found on Action Semi OWL
>> S700 SoC.
>
> Is "ethernet controller" right?
>
>>
>> Since, upstream Linux binding has not been
On 19/12/2020 14:51, Amit Singh Tomar wrote:
Hi,
> From: Amit Singh Tomar
>
> This commit adds SD/MMC clocks, and provides .set/get_rate callbacks
> for SD/MMC device present on Actions OWL S700 SoCs.
>
> Signed-off-by: Amit Singh Tomar
> ---
> Changes since previous version:
> *
On 14/12/2020 15:02, Amit Tomar wrote:
> Hi,
>
> You could pass a pointer to owl_mmc_priv here, which can hold both those
>
> values. See below for more more on this.
>
> Did you mean for argument 3rd and 4th but then in that case how one
> could have differentiated
> between source and
On 14/12/2020 14:12, Amit Tomer wrote:
> Hi,
>
> Thanks for having the detailed look and providing comments:
>
>> According to the datasheet the clock source could also be NAND_PLL,
>> depending on bit 9.
>> Both PLLs use the same rate calculation, so it's just matter of the PLL
>> address
On 13/12/2020 10:08, Amit Singh Tomar wrote:
> From: Amit Singh Tomar
>
> This commit adds support for MMC controllers found on Actions OWL
> S700 SoC platform.
>
> Signed-off-by: Amit Singh Tomar
> ---
> drivers/mmc/Kconfig | 7 +
> drivers/mmc/Makefile | 1 +
> drivers/mmc/owl_mmc.c
On 13/12/2020 09:44, Amit Singh Tomar wrote:
> This patch adds node for ethernet controller found on Action Semi OWL
> S700 SoC.
>
> Since, upstream Linux binding has not been merged for S700 MMC/SD
> controller, Changes are put in u-boot specific dtsi file.
So what's the mainline state of this?
On 13/12/2020 09:44, Amit Singh Tomar wrote:
Hi,
> This commit adds SD/MMC clocks, and provides .set/get_rate callbacks
> for SD/MMC device present on Actions OWL S700 SoCs.
>
> Signed-off-by: Amit Singh Tomar
> ---
> drivers/clk/owl/clk_owl.c | 66
>
On 13/12/2020 09:43, Amit Singh Tomar wrote:
> This commit introduces get/set_rate callbacks, these are dummy at
> the moment, and can be used to get/set clock for various devices
> based on the clk id.
>
> Signed-off-by: Amit Singh Tomar
> ---
> drivers/clk/owl/clk_owl.c | 28
On 08/12/2020 15:45, Andy Shevchenko wrote:
> For the sake of consistency (*) and order of initialization, i.e.
> after we have got the ethernet address, interrupt and timer initialized,
> try to initialize USB ethernet gadget.
>
> *) for example, zynqmp uses same order.
Looks alright, but we
On 29/11/2020 23:07, Heinrich Schuchardt wrote:
Hi,
> since Linux patch
> bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx delay config")
> i.e. since v5.8.15 or v5.9 many if not all Sunxi A64, H6, H5 boards
> require phy-mode = "rgmii-id" to provide network in Linux
>
> The U-Boot
On 19/11/2020 19:59, Priit Laes wrote:
> On Thu, Nov 19, 2020 at 10:54:42AM +, Andre Przywara wrote:
>> So far we did not support the BootROM based FEL USB debug mode on the
>> 64-bit builds for Allwinner SoCs: The BootROM is using AArch32, but the
>> SPL runs in AArch64.
>> Returning back to
On 18/11/2020 10:27, Icenowy Zheng wrote:
> PineCube is an IP camera development kit released by Pine64.
>
> It comes with the following compoents:
>
> - A mainboard with Sochip S3 SoC, a 16MByte SPI Flash, AXP209 PMIC,
> a power-only microUSB connector, a USB Type-A connector, a 10/100Mbps
>
On 18/11/2020 06:29, Icenowy Zheng wrote:
> PineCube is an IP camera development kit released by Pine64.
>
> It comes with the following compoents:
>
> - A mainboard with Sochip S3 SoC, a 16MByte SPI Flash, AXP209 PMIC,
> a power-only microUSB connector, a USB Type-A connector, a 10/100Mbps
>
On 17/11/2020 01:56, Samuel Holland wrote:
> On 11/16/20 10:58 AM, Tom Rini wrote:
>> On Mon, Nov 16, 2020 at 04:51:32PM +0000, André Przywara wrote:
>>> On 16/11/2020 16:13, Tom Rini wrote:
>>>> On Mon, Nov 16, 2020 at 04:09:42PM +, André Przywara wrote:
>&
On 16/11/2020 16:13, Tom Rini wrote:
> On Mon, Nov 16, 2020 at 04:09:42PM +0000, André Przywara wrote:
>> On 16/11/2020 15:50, Tom Rini wrote:
>>
>> Hi Tom,
>>
>>> On Mon, Nov 16, 2020 at 12:42:53PM +0530, Jagan Teki wrote:
>>>
>>>>
On 16/11/2020 15:50, Tom Rini wrote:
Hi Tom,
> On Mon, Nov 16, 2020 at 12:42:53PM +0530, Jagan Teki wrote:
>
>> Hi Tom,
>>
>> Please pull this PR.
>>
>> Summary:
>> - PinePhone support (Samuel)
>> - V3/S3 support (Icenowy)
>>
>> thanks,
>> Jagan.
>>
>> The following changes since commit
On 10/11/2020 12:38, Tom Rini wrote:
Hi Tom,
> On Sun, Nov 08, 2020 at 03:48:23PM +0000, André Przywara wrote:
>> On 08/11/2020 14:59, Peter Robinson wrote:
>>
>> Hi,
>>
>>> On Sun, Nov 8, 2020 at 1:14 PM Andre Przywara
>>> wrote:
>>>
On 03/11/2020 03:32, Samuel Holland wrote:
> The PinePhone is a smartphone produced by Pine64, with an A64 SoC,
> 2 or 3 GiB LPDDR3 RAM, 16 or 32 GiB eMMC, 720x1440 MIPI-DSI panel,
> and Quectel EG25-G modem.
>
> There are two main board revisions: 1.1 for early adopters, and 1.2
> for mass
On 08/11/2020 14:59, Peter Robinson wrote:
Hi,
> On Sun, Nov 8, 2020 at 1:14 PM Andre Przywara wrote:
>>
>> The eMMC standard describes the concept of boot partitions, consisting
>> of two storage areas separate from the main user data partition.
>> The Allwinner BootROM supports loading
On 08/10/2020 14:02, Heinrich Schuchardt wrote:
Hi,
> On 25.08.20 18:57, Simon Glass wrote:
>> On Mon, 24 Aug 2020 at 22:15, Heinrich Schuchardt wrote:
>>>
>>> On 7/25/20 8:18 PM, Heinrich Schuchardt wrote:
The current default of 0x400 for SYS_MALLOC_F_LEN is too small if any
On 16/10/2020 10:33, Icenowy Zheng wrote:
Hi,
> Previously, because we have no source code about the DRAM initialization
> of V3s and missing some configurations (delays and MBUS QoS info), our
> V3s DRAM initialization sequence is hacked from the H3 one.
>
> As the SDK shipped with PineCube
On 14/10/2020 09:42, Michal Simek wrote:
Hi,
> There also a need to check return values to make sure that clocks were
> enabled and setup properly.
is that just clean-up or is there a particular problem that's fixed?
I am asking because I am not sure how useful debug output in a console
driver
On 08/10/2020 14:10, Heinrich Schuchardt wrote:
Hi,
> On 14.06.20 17:48, Heinrich Schuchardt wrote:
>> On 6/1/20 6:20 PM, Heinrich Schuchardt wrote:
>>> On 6/1/20 4:43 PM, André Przywara wrote:
>>>> On 01/06/2020 14:56, Heinrich Schuchardt wrote:
>>>>>
On 08/10/2020 11:15, Heinrich Schuchardt wrote:
Hi,
> On 08.10.20 11:49, Stefan Roese wrote:
>> On 08.10.20 10:39, Heinrich Schuchardt wrote:
>>> On 08.10.20 09:08, Stefan Roese wrote:
On 24.09.20 01:22, Andre Przywara wrote:
> The cfi-flash driver uses an open-coded version of the
On 29/09/2020 14:23, Tom Rini wrote:
Hi Tom,
> On Thu, Sep 24, 2020 at 01:17:14AM +0100, Andre Przywara wrote:
>
>> CONFIG_ARCH_SUPPORT_TFABOOT seems to be a guard option to enable various
>> platform specific hacks, when U-Boot is run under TF-A.
>> Now that the QEMU port does not need to
On 24/09/2020 21:22, Stephen Warren wrote:
Hi Stephen,
> On 9/24/20 8:45 AM, André Przywara wrote:
>> On 24/09/2020 01:17, Andre Przywara wrote:
>>> When the actual offset between link and runtime address is zero, there
>>> is no need for patching u
On 24/09/2020 01:17, Andre Przywara wrote:
> When the actual offset between link and runtime address is zero, there
> is no need for patching up U-Boot early when running with
> CONFIG_POSITION_INDEPENDENT.
That turns out to be not fully true.
Some toolchains (all Linaro cross compilers?) don't
On 24/09/2020 09:44, Heinrich Schuchardt wrote:
> On 24.09.20 09:57, Amit Tomar wrote:
>> Hi,
>>
>> Andre Przywara (5):
>>
>> arm64: PIE: Skip fixups if distance is zero
>> arm64: PIE: Allow fixed stack pointer
>> qemu-arm: Remove need to specify flash banks
>> qemu: Drop
On 24/09/2020 08:57, Amit Tomar wrote:
> Hi,
>
> Andre Przywara (5):
>
> arm64: PIE: Skip fixups if distance is zero
> arm64: PIE: Allow fixed stack pointer
> qemu-arm: Remove need to specify flash banks
> qemu: Drop ARCH_SUPPORT_TFABOOT
> qemu/arm64: Enable
On 23/09/2020 06:26, Stefan Roese wrote:
> Hi Simon,
>
> On 22.09.20 15:51, Simon Glass wrote:
>> Hi Stefan,
>>
>> On Mon, 21 Sep 2020 at 07:28, Stefan Roese wrote:
>>>
>>> Hi Andre,
>>>
>>> (added Simon)
>>>
>>> On 18.09.20 19:45, Andre Przywara wrote:
The cfi-flash driver uses an
On 22/09/2020 02:12, Samuel Holland wrote:
Hi,
> On 9/21/20 7:41 PM, André Przywara wrote:
>> On 03/09/2020 06:07, Samuel Holland wrote:
>>> This overwrites the name loaded from the SPL image. It will be different
>>> if there was previously no name provided,
On 03/09/2020 06:07, Samuel Holland wrote:
Hi,
> Previously, fdtfile was always the value in CONFIG_DEFAULT_DEVICE_TREE.
> This meant that, regardless of the DT chosen by SPL (either by changing
> the header in the image or by the selection code at runtime), Linux
> always used the default DT.
>
On 03/09/2020 06:07, Samuel Holland wrote:
Hi,
> There are two different publicly-released revisions of the PinePhone
> hardware, versions 1.1 and 1.2; and they need different device trees.
> Since some GPIO pins were rerouted, we can use that to distinguish
> between them.
Nice one. I once had
On 03/09/2020 06:07, Samuel Holland wrote:
> This overwrites the name loaded from the SPL image. It will be different
> if there was previously no name provided, or if a more accurate name was
> determined by the board variant selection logic. This means that the DT> name
> in the SPL header now
On 03/09/2020 06:07, Samuel Holland wrote:
> Instead of using an entirely separate matching algorithm, simply update
> the name of the DT we want to match. Enabling this logic does not depend
> on the FIT config name, only on the initial guess of the board name.
Yeah, clever solution. The
On 03/09/2020 06:07, Samuel Holland wrote:
> This moves the validity checking and typecasts all to one place away
> from the string comparison logic, and it detangles the compile-time
> and runtime control flow.
>
> The new helper will also be used by U-Boot proper in a future commit.
>
>
On 03/09/2020 06:07, Samuel Holland wrote:
> The variable "cmp_str" always leaves me wondering if it is the DT name
> of the current board (yes) or DT name in the FIT config entry (no).
>
> In preparation for expanding the functionality here, rename it to
> something that obviously means "this is
On 10/09/2020 13:38, Michal Simek wrote:
>
>
> On 09. 09. 20 19:07, Edgar E. Iglesias wrote:
>> From: "Edgar E. Iglesias"
>>
>> Trap non-PIE builds early if the start address doesn't match
>> between run-time and link-time. This will trap the startup
>> sequence rather than letting it run into
On 03/09/2020 06:07, Samuel Holland wrote:
Hi Samuel,
> This patch series implements a feature to automatically choose the
> right PinePhone device tree by probing the hardware. It then extends
> the functionality to pass the chosen DTB name to the boot command.
> Finally, I add device trees and
On 04/09/2020 19:42, Stephen Warren wrote:
> On 9/4/20 3:07 AM, Edgar E. Iglesias wrote:
>> From: "Edgar E. Iglesias"
>>
>> Mention the requirement of 4K aligned load addresses in the
>> help section for the POSITION_INDEPENDENT option.
>>
>> Suggested-by: Michal Simek
>> Signed-off-by: Edgar E.
On 03/09/2020 14:41, Michal Simek wrote:
>
>
> On 02. 09. 20 20:59, André Przywara wrote:
>> On 02/09/2020 16:25, Edgar E. Iglesias wrote:
>>> On Wed, Sep 02, 2020 at 04:18:48PM +0100, Andr� Przywara wrote:
>>>> On 02/09/2020 15:53, Edgar E. Iglesias wrote:
On 03/09/2020 14:35, Michal Simek wrote:
>
>
> On 02. 09. 20 18:34, Stephen Warren wrote:
>> On 9/2/20 5:15 AM, Michal Simek wrote:
>>> From: "Edgar E. Iglesias"
>>>
>>> When U-Boot binary exceeds 1MB with CONFIG_POSITION_INDEPENDENT=y
>>> compilation error is shown:
>>>
On 02/09/2020 16:25, Edgar E. Iglesias wrote:
> On Wed, Sep 02, 2020 at 04:18:48PM +0100, Andr� Przywara wrote:
>> On 02/09/2020 15:53, Edgar E. Iglesias wrote:
>>> On Wed, Sep 02, 2020 at 03:43:08PM +0100, Andr� Przywara wrote:
On 02/09/2020 12:15, Michal Simek wrote:
>>
>> Hi,
>>
On 02/09/2020 15:53, Edgar E. Iglesias wrote:
> On Wed, Sep 02, 2020 at 03:43:08PM +0100, Andr� Przywara wrote:
>> On 02/09/2020 12:15, Michal Simek wrote:
Hi,
>>
>>> From: "Edgar E. Iglesias"
>>>
>>> When U-Boot binary exceeds 1MB with CONFIG_POSITION_INDEPENDENT=y
>>> compilation error is
On 02/09/2020 12:15, Michal Simek wrote:
Hi,
> From: "Edgar E. Iglesias"
>
> When U-Boot binary exceeds 1MB with CONFIG_POSITION_INDEPENDENT=y
> compilation error is shown:
> /mnt/disk/u-boot/arch/arm/cpu/armv8/start.S:71:(.text+0x3c): relocation
> truncated to fit: R_AARCH64_ADR_PREL_LO21
On 07/08/2020 16:44, Simon Glass wrote:
> At present with sunxi 64-bit, the Makefile builds
> u-boot-sunxi-with-spl.bin and then binman overwrites it with its own
> version. But the binman definition lacks some parts, in particular
> BL31.
>
> For now, work around this with a hack.
Many thanks
On 05/08/2020 16:05, Simon Glass wrote:
> Hi André,
>
> On Wed, 5 Aug 2020 at 08:20, André Przywara wrote:
>>
>> On 19/07/2020 20:56, Simon Glass wrote:
>>
>> Hi,
>>
>>> On x86 various files that need to be created by binman. It does not m
On 19/07/2020 20:56, Simon Glass wrote:
Hi,
> On x86 various files that need to be created by binman. It does not make
> sense to enumerate these in the Makefile. They are described in the
> configuration (devicetree) for each board and we can simply run binman
> (always) to generate them.
>
>
On 27/07/2020 14:16, Heinrich Schuchardt wrote:
Hi Peter, Heinrich,
> On 26.07.20 12:17, Peter Robinson wrote:
>> On Thu, Jul 23, 2020 at 12:15 AM André Przywara
>> wrote:
>>>
>>> On 22/07/2020 15:18, Peter Robinson wrote:
>>>> Sync the Allwinn
On 27/07/2020 14:49, Peter Robinson wrote:
Hi,
thanks for piecing this together. As Maxime mentioned, many options are
not necessary (see below).
Some options are now set by ARCH_SUNXI, since 48313fe51008.
>> On Wed, Jul 22, 2020 at 03:18:40PM +0100, Peter Robinson wrote:
>>> The Pine64
On 22/07/2020 15:18, Peter Robinson wrote:
> Sync the Allwinner A64 sun50i-a64.dtsi from Linux.
Hi Peter,
thanks for your series!
While this looks mostly straight-forward, the problem is that this patch
here affects all Allwinner boards. And for them it breaks older kernels,
which cannot cope
On 11/07/2020 10:27, Jagan Teki wrote:
Hi,
> On Mon, Jul 6, 2020 at 6:12 AM Andre Przywara wrote:
>>
>> When sending a command via the MDIO bus, the Designware MAC expects some
>> bits in the CMD register to describe the clock divider value between
>> the main clock and the MDIO clock.
>> So
On 07/07/2020 11:07, Ard Biesheuvel wrote:
> Some instructions in the ARM ISA have multiple output registers, such
> as ldrd/ldp (load pair), where two registers are loaded from memory,
> but also ldr with indexing, where the memory base register is incremented
> as well when the value is loaded
On 07/07/2020 11:07, Ard Biesheuvel wrote:
> Add an override for enable_caches to enable the I and D caches, along
> with the cached 1:1 mapping of all of DRAM. This is needed for running
> U-Boot under virtualization with QEMU/kvm.
>
> Signed-off-by: Ard Biesheuvel
> ---
>
On 07/07/2020 11:07, Ard Biesheuvel wrote:
> The LPAE versions of DCACHE_WRITEBACK and DCACHE_WRITETHROUGH are currently
> defined as no-allocate for both reads and writes, which deviates from the
> non-LPAE definition, and mostly defeats the purpose of enabling the caches
> in the first place.
>
On 24/06/2020 02:05, Volodymyr Babchuk wrote:
Hi Volodymyr,
thanks for the find and for taking care! And thanks Julien for forwarding!
> ARM Architecture reference manual clearly states that PE pipeline
> should be flushed after any change to system registers.
Don't want to be pedantic here,
On 24/06/2020 01:34, Icenowy Zheng wrote:
Hi,
> 于 2020年6月24日 GMT+08:00 上午8:28:39, "André Przywara"
> 写到:
>> On 19/06/2020 13:16, Icenowy Zheng wrote:
>>
>> Hi Icenowy,
>>
>>> Previously we have known that R40 has a configuration regis
On 19/06/2020 13:16, Icenowy Zheng wrote:
Hi Icenowy,
> Previously we have known that R40 has a configuration register for its
> rank 1, which allows different configuration than rank 0. Reverse
> engineering of newest libdram of A64 from Allwinner shows that A64 has
> this register too. It's
On 09/06/2020 19:47, Michael Nazzareno Trimarchi wrote:
Hi,
that looks much better now, thanks! Some suggestion below.
> On Tue, Jun 9, 2020 at 6:13 AM Bin Meng wrote:
>>
>> Hi André,
>>
>> On Mon, Jun 8, 2020 at 9:52 PM André Przywara wrote:
>>>
>&
On 07/06/2020 12:22, Jagan Teki wrote:
Hi,
(CC: ing Mark)
Without looking to deep, I think invalidating the cache might be the
right thing to do, but the rationale or at least the wording of it seems
somehow flawed:
> Some architecture like ARM Cortex A53, A72 would need
Please don't mix the
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