On Sun, Apr 4, 2010 at 7:32 PM, Marek Vasut marek.va...@gmail.com wrote:
In case the delays were set to 1, the MMC card on PXA27X boards (and
PXA3xx
boards) didn't initialize on first try. Increasing the delays and leaving just
those for PXA25x and 26x (that is 20) fixes this problem.
On Fri, Mar 26, 2010 at 12:57 AM, Marek Vasut marek.va...@gmail.com wrote:
---
drivers/mmc/pxa_mmc.c | 13 -
1 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/pxa_mmc.c b/drivers/mmc/pxa_mmc.c
index 8225235..18d5df9 100644
--- a/drivers/mmc/pxa_mmc.c
On Fri, Apr 23, 2010 at 6:21 PM, Albin Tonnerre
albin.tonne...@free-electrons.com wrote:
On Fri, 23 Apr 2010 16:58 -0500, Andy Fleming wrote :
On Thu, Apr 22, 2010 at 7:51 PM, Rob Emanuele r...@emanuele.us wrote:
Hi Henry U-Boot Community,
I've been experiencing the same errors
On Fri, Apr 23, 2010 at 8:29 PM, Marek Vasut marek.va...@gmail.com wrote:
Dne So 24. dubna 2010 03:13:07 Andy Fleming napsal(a):
On Sun, Apr 4, 2010 at 7:32 PM, Marek Vasut marek.va...@gmail.com wrote:
In case the delays were set to 1, the MMC card on PXA27X boards (and
PXA3xx boards
On Wed, Apr 7, 2010 at 10:31 AM, Kumar Gala ga...@kernel.crashing.org wrote:
From: Jerry Huang chang-ming.hu...@freescale.com
Multiple block read support to improve performance (time it takes) to read
larger amounts of data.
Signed-off-by: Jerry Huang chang-ming.hu...@freescale.com
There are still a few pending patches that I'm waiting to hear back about,
and you or Kumar have applied most of the others, but this one has been
cleaned up and applied to my tree.
The following changes since commit a47a12becf66f02a56da91c161e2edb625e9f20c:
Stefan Roese (1):
Move
When gracefully stopping the controller, the driver was continuing if
*either* RX or TX had stopped. We need to wait for both, or the
controller could get into an invalid state.
Signed-off-by: Andy Fleming aflem...@freescale.com
---
drivers/net/tsec.c |3 ++-
1 files changed, 2 insertions
Wolfgang has already covered most of this, but I have a few other
comments (plus a couple of redundant ones)
On Wed, Jan 13, 2010 at 3:50 AM, Stefano Babic sba...@denx.de wrote:
The esdhc controller in the mx51 processor is quite
the same as the one in some powerpc processors
(MPC83xx,
On Mon, Jan 18, 2010 at 5:31 AM, Wolfgang Denk w...@denx.de wrote:
Dear Vaisakh P S,
In message 27208581.p...@talk.nabble.com you wrote:
I did some more debugging, i dumped the MBR for the sdcard, and it was
proper in OS in board and PC.
Here is the dump i got in OS:
fa b8 00
On Thu, Jan 7, 2010 at 2:01 AM, Heiko Schocher h...@denx.de wrote:
If using UCC as Ethernet Controller and type = FAST_ETH, it was
not possible to switch between 10 and 100 MBit interfaces. This
patch adds this for following interfaces:
10_MII
10_RMII
10_RGMII
100_MII
100_RMII
100_RGMII
Strings are backwards compatible because the hush parser strips the
quotes so all that that part of Ken's patch does is to extend it to
paste together multiple arguments rather than limiting it to
exactly one argument. The following also produces the original
string:
fdt set
On Mon, Aug 24, 2009 at 2:32 PM, Kim Phillips kim.phill...@freescale.comwrote:
if you don't have firmware installed for the PHY to come to life, this
wait can be painful - let's give the option to avoid it if we want.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
Acked-by: Andy
On Sat, Jul 18, 2009 at 8:04 PM, Mike Frysinger vap...@gentoo.org wrote:
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
Ben: some things to note:
- i adopted Jean's proposed naming scheme in the CONFIG section
- i deprecated calling the driver-specific entry point
Iwamatsu iwama...@nigauri.org
Acked-by: Andy Fleming aflem...@freescale.com
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On Wed, Jun 3, 2009 at 5:15 PM, Wolfgang Denk w...@denx.de wrote:
Dear Ilya Yanok,
In message 1242295389-3682-1-git-send-email-ya...@emcraft.com you wrote:
Return value of mmc_send_if_cond() can be safely ignored (as it is
done in Linux). This makes older cards work with MXC MCI
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
Dave Liu (3):
85xx: Fix the clock adjust of mpc8569mds board
85xx: Fix the wrong BCSR address of 8569MDS
85xx: Fix the wrong SYS_CLK_IN for 8569MDS
Fredrik Arnerup (1):
85xx: bugfix
So, I get patch. But, this patch's form is different with you said.
First of all, the all comments is on the ---.
But, you said all comments must belong below the --- like this messages.
:
http://lists.denx.de/pipermail/u-boot/2009-June/053535.html
It's different.
What did I lose
I freshly cloned the 'next' branch of u-boot-usb @
http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot/u-boot-usb.git;a=shortlog
;h=refs/heads/next and was able to apply all of the six patches
successfully. I am not sure what could be wrong at your end. Can you
post the errors which you see
On Wed, Apr 29, 2009 at 4:50 PM, Anton Vorontsov
avoront...@ru.mvista.comwrote:
This patch implements simple hwconfig infrastructure: an
interface for software knobs to control a hardware.
This is very simple implementation, i.e. it is implemented
via `hwconfig' environment variable. Later
On Fri, Mar 27, 2009 at 1:32 AM, Dave Liu dave...@freescale.com wrote:
Currently the clk_adj is 6 (3/4 cycle), The settings will cause
the DDR controller hang at the data init. Change the clk_adj
from 6 to 4 (1/2 cycle), make the memory system stable.
Signed-off-by: Dave Liu
On Fri, Apr 3, 2009 at 3:36 PM, Kumar Gala ga...@kernel.crashing.orgwrote:
From: Srikanth Srinivasan srikanth.sriniva...@freescale.com
The patch adds support for P2020DS reference platform.
DDR3 interface uses hard-coded initialization rather than SPD
for now and was tested at 667Mhz. Some
On Thu, May 14, 2009 at 9:27 PM, Dave Liu dave...@freescale.com wrote:
The BCSR17[7] = 1 will unlock the write protect of FLASH.
The WP# pin only controls the write protect of top/bottom sector,
That is why we can save env, but we can't write the first sector
before the patch.
On Thu, May 7, 2009 at 4:52 PM, Yauhen Kharuzhy jek...@gmail.com wrote:
On Thu, May 07, 2009 at 03:13:40PM -0500, Andy Fleming wrote:
On Thu, May 7, 2009 at 5:08 AM, Yauhen Kharuzhy jek...@gmail.com
wrote:
Cards which are not compatible with SD 2.0 standard, cat return
response
On Wed, May 6, 2009 at 4:43 PM, Yauhen Kharuzhy jek...@gmail.com wrote:
SCR switch data are read from card as big-endian words and should be
converted to CPU byte order.
Signed-off-by: Yauhen Kharuzhy jek...@gmail.com
Applied to HEAD, first removing the debug output you left in.
Andy
On Tue, Jun 2, 2009 at 10:47 AM, Herrmann Ulrich
ulrich.herrm...@austriamicrosystems.com wrote:
Rabin Vincent's fix for little endian systems fixes only the issues
regarding responses received on the command line.
However the SD card's SCR register is received on the DAT0 line
- therefore
...My first pass says this patch doesn't touch on my domain. Is there
something I'm missing?
On Fri, May 29, 2009 at 5:24 PM, Jean-Christophe PLAGNIOL-VILLARD
plagn...@jcrosoft.com wrote:
On 01:13 Sat 30 May , Prafulla Wadaskar wrote:
This patch adds a SPI driver for the Marvell
On Wed, May 6, 2009 at 1:30 PM, Ilya Yanok ya...@emcraft.com wrote:
Signed-off-by: Ilya Yanok ya...@emcraft.com
This is actually already in my tree. So I'll just take this
opportunity to shake my head at ARM ABI designers, who thought 64-bit
division was too hard to do in the compiler...
Andy
On Wed, May 6, 2009 at 1:30 PM, Ilya Yanok ya...@emcraft.com wrote:
cid field of stuct mmc stucture is char*, not u32*. so we need to
convert the pointer for mmcinfo code to work correctly.
Yup, this one, too. Already in my tree.
Andy
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On Thu, May 7, 2009 at 5:08 AM, Yauhen Kharuzhy jek...@gmail.com wrote:
Cards which are not compatible with SD 2.0 standard, cat return response
for CMD8 command, but it will be invalid in terms of SD 2.0. We should
accept this case as admissible.
Signed-off-by: Yauhen Kharuzhy
On May 6, 2009, at 4:43 PM, Yauhen Kharuzhy wrote:
SCR switch data are read from card as big-endian words and should be
converted to CPU byte order.
Signed-off-by: Yauhen Kharuzhy jek...@gmail.com
---
- if ((switch_status[4] 0x0f00) == 0x0100)
+ if
On Apr 29, 2009, at 4:20 PM, Anton Vorontsov wrote:
Hi Andy,
Sorry for the late response,
On Fri, Mar 06, 2009 at 07:25:55PM -0600, Andy Fleming wrote:
@@ -346,3 +348,23 @@ int fsl_esdhc_mmc_init(bd_t *bis)
 {
    return esdhc_initialize(bis);
 }
+
+#ifdef CONFIG_MPC85xx
On Tue, Apr 28, 2009 at 7:04 PM, Ben Warren biggerbadder...@gmail.com wrote:
This will make CONFIG_NET_MULTI the only net driver configuration and
we'll be able to remove this option.
Could we add a #warning somewhere to tell people who are not using
CONFIG_NET_MULTI that they need to move
On Sat, Mar 28, 2009 at 12:04 AM, Minkyu Kang mk7.k...@samsung.com wrote:
This patch improves device command for selecting mmc device
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
Rather than porting features from the generic mmc framework into the
legacy system, I'd really prefer if the
On Thu, Apr 16, 2009 at 11:52 AM, Rabin Vincent ra...@rab.in wrote:
Andy,
On Sun, Apr 05, 2009 at 01:30:52PM +0530, Rabin Vincent wrote:
Remove some repeated words and superfluous newlines in the mmc command
help entries.
Signed-off-by: Rabin Vincent ra...@rab.in
Any comments on this set
On Wed, Apr 8, 2009 at 1:30 PM, Prafulla Wadaskar prafu...@marvell.com wrote:
--- /dev/null
+++ b/drivers/net/mv88e61xx.c
@@ -0,0 +1,291 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor www.marvell.com
+ * Prafulla Wadaskar prafu...@marvell.com
+ *
+ * See file CREDITS for list of
On Thu, Mar 12, 2009 at 6:53 PM, Peter Tyser pty...@xes-inc.com wrote:
On Fri, 2009-03-13 at 00:19 +0100, Wolfgang Denk wrote:
Dear Mike Frysinger,
In message 200903121901.23433.vap...@gentoo.org you wrote:
On Thursday 12 March 2009 15:49:06 Peter Tyser wrote:
Update include search path
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git 85xx-next
Andy Fleming (1):
fsl: Remove unnecessary debug printfs
Ed Swarthout (1):
Fix mpc85xx ddr-gen3 ddr_sdram_cfg.
Paul Gortmaker (1):
tsec: report when there is no vendor specific PHY
8xxx:
12/11 Paul Gortmaker [U-Boot] [PATCH] tsec: report when there is
no vendor specific PHY support.
Applied
12/30 Poonam_Aggrwal-b1 [U-Boot] [PATCH][u-boot-85xx]The 32bit errata
fix for 8572 for DDR2 (fwd)
This was applied (e1be0d25ecf494ae81245ca438738ba839d6329b)
01/15 hamoshame
On Tue, Feb 17, 2009 at 8:45 PM, Kumar Gala ga...@kernel.crashing.org wrote:
Converted print statements that didn't have much meaning beyond
debug from printf() to debug().
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
I decided to solve this by removing the printfs. They aren't really
On Thu, Feb 19, 2009 at 9:45 AM, Anton Vorontsov
avoront...@ru.mvista.com wrote:
This patch implements fdt_fixup_esdhc() function that is used to fixup
the device tree.
The function adds status = disabled propery if esdhc pins muxed away,
otherwise it fixups clock-frequency for esdhc nodes.
On Tue, Feb 24, 2009 at 2:37 AM, Ed Swarthout
ed.swarth...@freescale.com wrote:
Commit e1be0d25, 32bit BUg fix for DDR2 on 8572 prevented other
sdram_cfg bits (such as ecc and self_refresh_in_sleep) from being set.
Signed-off-by: Ed Swarthout ed.swarth...@freescale.com
Applied, thanks!
Andy
2009/2/17 Amit Margalit amit.marga...@siverge.com:
-Original Message-
From: Michael Trimarchi [mailto:trimar...@gandalf.sssup.it]
Sent: ג 17 פברואר 2009 18:40
To: Amit Margalit
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] MAC address being reset to 00:00:00:00:00:00 ?
What's
value
of i still being there to enable things. Changed the second i to j
Signed-off-by: Andy Fleming aflem...@freescale.com
---
I applied this to the 85xx tree, but if you could review it and confirm it
doesn't break anything...
board/tqc/tqm85xx/nand.c |6 +++---
board/tqc/tqm85xx/sdram.c
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
Andy Fleming (4):
Add eth_get_dev_by_index
Make some minor whitespace changes to eliminate line-wrapping
Fixup SGMII PHY ids in the device tree
TQM85xx: Fix a couple warnings
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git mmc_framework
These are all of the MMC patches, gathered together in one place
Andy Fleming (7):
Eliminate support for using MMC as memory
Convert mmc_init to mmc_legacy_init
Eliminated arch
On Fri, Feb 13, 2009 at 6:36 AM, hendrik hendrik.vast...@gmail.com wrote:
Hi all
When i included the struct as is the my board with the MPC8548 ver1 cpu
worked correctly but the board with ver2 CPU does not work.
A would appeciate any help
In what way does it not work? the cpu version
This allows code to iterate through the ethernet devices
Also does some whitespace cleanup
Signed-off-by: Andy Fleming aflem...@freescale.com
---
Sorry this is so late. This has been sitting in my tree, and is required for a
patch for 85xx. It's included in my upcoming pull request, as long
On Tue, Feb 10, 2009 at 7:01 PM, Mike Frysinger vap...@gentoo.org wrote:
On Tuesday 10 February 2009 19:55:35 Andy Fleming wrote:
diff --git a/include/net.h b/include/net.h
index bbe0d4b..fc14615 100644
--- a/include/net.h
+++ b/include/net.h
@@ -116,18 +116,19 @@
looks like a lot
On Fri, Jan 23, 2009 at 2:22 PM, Kumar Gala ga...@kernel.crashing.org wrote:
Use the new BR_ADDR macro to properly setup the address field of the
localbus chipselects used by NAND.
This allows us to deal with 36-bit phys on these boards in the future.
Signed-off-by: Kumar Gala
On Fri, Jan 23, 2009 at 2:22 PM, Kumar Gala ga...@kernel.crashing.org wrote:
The eLBC only handles 32-bit physical address in systems with 36-bit
physical. The previos generation of LBC handled 34-bit physical
address in 36-bit systems. Added a new CONFIG option to convey
the difference
On Fri, Jan 23, 2009 at 2:29 PM, Kumar Gala ga...@kernel.crashing.org wrote:
On Jan 23, 2009, at 2:22 PM, Kumar Gala wrote:
We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary
to allow for larger memory sizes.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
Applied,
On Fri, Feb 6, 2009 at 7:32 AM, Jerry Van Baren gerald.vanba...@ge.com wrote:
Peter Tyser wrote:
The problem is that you don't always know which interface you have
hooked up. So u-boot tries the one set in ethact, and then the next,
etc. With the old method, the penalty for being wrong was
Signed-off-by: Andy Fleming aflem...@freescale.com
---
Addressed Kim's comments
board/freescale/mpc837xemds/mpc837xemds.c | 23 ++-
cpu/mpc83xx/cpu.c | 14 ++
include/asm-ppc/immap_83xx.h |2 ++
include/configs
Signed-off-by: Andy Fleming aflem...@freescale.com
---
board/freescale/mpc837xemds/mpc837xemds.c | 19 +++
cpu/mpc83xx/cpu.c | 14 ++
include/asm-ppc/immap_83xx.h |2 ++
include/configs/MPC837XEMDS.h | 15
MMC cards are not memory, so we stop treating them that way.
Signed-off-by: Andy Fleming aflem...@freescale.com
---
common/cmd_mem.c | 43 ---
cpu/arm720t/lpc2292/mmc.c | 26 --
cpu/pxa/mmc.c | 14
These names are being taken over by the new MMC framework. Hopefuly
the PXA can be easily ported, and these functions will go away entirely.
Signed-off-by: Andy Fleming aflem...@freescale.com
---
cpu/pxa/mmc.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/cpu
This is to get it out of the way of incoming MMC framework
Signed-off-by: Andy Fleming aflem...@freescale.com
---
common/cmd_mmc.c |2 +-
cpu/arm720t/lpc2292/mmc.c |4 ++--
cpu/pxa/mmc.c |2 +-
drivers/mmc/atmel_mci.c |2 +-
include/mmc.h |2
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
Dave Liu (5):
fsl-ddr: update the bit mask for DDR3 controller
fsl-ddr: clean up the ddr code for DDR3 controller
fsl-ddr: make the self refresh idle threshold configurable
fsl-ddr:
On Wed, Jan 14, 2009 at 2:45 PM, Jonathan Barrow jj.bar...@gmail.com wrote:
In many of the sources, such as board.c, I notice calls to
'debug()'. The syntax looks similar to printf(), e.g.: debug
(Stack Pointer at: %08lx\n, addr_sp);
Is this output sent to the BDM, such as bdi2000? or
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
Haiying Wang (2):
Change DDR tlb start entry to CONFIG param for 85xx
Some changes of TLB entry setting for MPC8572DS
Roy Zang (3):
Fix IO port selection issue on MPC8544DS and MPC8572DS
On Wed, Jan 7, 2009 at 3:54 AM, Ajeesh Kumar aje...@tataelxsi.co.in wrote:
Hi Andy,
Thanks for your info.
This points to a hardware problem. Do you have an oscilloscope? Take a
look at the MDIO pin, and see what's being sent, and what the reply is. The
protocol for MDIO is pretty simple.
On Mon, Jan 5, 2009 at 2:57 AM, Ajeesh Kumar aje...@tataelxsi.co.in wrote:
Hi Sir/Madam,
Net: eTSEC0: PHY id is not supported!
eTSEC0: No PHY found
eTSEC1: PHY id is not supported!
eTSEC1: No PHY found
eTSEC2: PHY id is not supported!
eTSEC2: No PHY found
On Tue, Dec 23, 2008 at 4:32 PM, Peter Tyser pty...@xes-inc.com wrote:
Signed-off-by: Peter Tyser pty...@xes-inc.com
---
This should be applied to the 85xx repository and depends
on the currently applied XPedite5200 board support patch.
Um...This doesn't appear to be true. It looks like you
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
Dave Liu (1):
85xx: Fix the boot window issue
Haiying Wang (1):
Set IVPR to kenrel entry point in second core boot page
Kumar Gala (3):
85xx: Add support to populate addr map based on
On Mon, Dec 22, 2008 at 6:08 PM, Peter Tyser pty...@xes-inc.com wrote:
Hi Andy,
On Mon, 2008-12-22 at 13:36 -0600, Andy Fleming wrote:
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
snip
Peter Tyser (5):
pci/fsl_pci_init: Enable inbound
in the PHY table.
Signed-off-by: Paul Gortmaker paul.gortma...@windriver.com
Acked-by: Andy Fleming aflem...@freescale.com
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+ }
+#else
+ gur-devdisr |= MPC85xx_DEVDISR_PCIE1; /* disable */
+#endif /* CONFIG_PCIE2 */
MPC85xx_DEVDISR_PCIE1 isn't defined anywhere. Did you miss some
changes you made to header files?
Andy
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are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
Anatolij Gustschin (1):
85xx: socrates: fix DDR SDRAM tlb entry configuration
Becky Bruce (1):
drivers/fsl_pci_init: Fix inbound window mapping bug
Dave Liu (3):
85xx: remove the unused
On Fri, Nov 21, 2008 at 2:31 AM, Dave Liu [EMAIL PROTECTED] wrote:
According to the latest 8572 UM, the DDR3 controller
is expanding the bit mask, and we use the extend ACTTOPRE
mode when tRAS more than 19 MCLK.
Signed-off-by: Dave Liu [EMAIL PROTECTED]
Applied to 85xx-next, thanks
Andy
On Thu, Nov 20, 2008 at 3:36 PM, Jon Loeliger [EMAIL PROTECTED] wrote:
Prevent further viral propogation of the unused
symbol CONFIG_L1_INIT_RAM by just removing it.
Signed-off-by: Jon Loeliger [EMAIL PROTECTED]
Applied, thanks
Andy
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On Wed, Oct 29, 2008 at 8:21 AM, Ed Swarthout
[EMAIL PROTECTED] wrote:
Removed while(1) hang if memctl_intlv_ctl is set wrong.
Remove embedded tabs from strings.
Signed-off-by: Ed Swarthout [EMAIL PROTECTED]
Applied, thanks
Andy
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On Tue, Nov 11, 2008 at 7:52 AM, Haiying Wang
[EMAIL PROTECTED] wrote:
Signed-off-by: Haiying Wang [EMAIL PROTECTED]
Applied to 85xx-next, thanks
Andy
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On Tue, Nov 11, 2008 at 10:17 AM, Peter Tyser [EMAIL PROTECTED] wrote:
All mpc8548-based boards should implement the suggested workaround
to CPU 2 errata. Without the workaround, its possible for the
8548's core to hang while executing a msync or mbar 0 instruction
and a snoopable transaction
On Mon, Dec 1, 2008 at 1:47 PM, Peter Tyser [EMAIL PROTECTED] wrote:
Add define used to determine if PCI1 interface is in PCI or PCIX mode.
Signed-off-by: Peter Tyser [EMAIL PROTECTED]
I thought this already had a constant defined, and I was right. It
was PORDEVSR_PCI. However, it wasn't
On Fri, Nov 21, 2008 at 2:31 AM, Dave Liu [EMAIL PROTECTED] wrote:
For light loaded system, we use the 1T timing to gain better
memory performance, but for some heavily loaded system,
you have to add the 2T timing options to board files.
Signed-off-by: Dave Liu [EMAIL PROTECTED]
Applied to
On Fri, Nov 21, 2008 at 2:31 AM, Dave Liu [EMAIL PROTECTED] wrote:
The wake up ARP feature need use the memory to process
wake up packet, we enable auto self refresh to support it.
Signed-off-by: Dave Liu [EMAIL PROTECTED]
Applied to 85xx-next, thanks
On Fri, Nov 21, 2008 at 2:31 AM, Dave Liu [EMAIL PROTECTED] wrote:
According to the latest 8572 UM, the DDR3 controller
is expanding the bit mask, and we use the extend ACTTOPRE
mode when tRAS more than 19 MCLK.
Signed-off-by: Dave Liu [EMAIL PROTECTED]
Applied to 85xx-next, thanks
On Fri, Nov 21, 2008 at 2:31 AM, Dave Liu [EMAIL PROTECTED] wrote:
Some 85xx processors have the advanced power management feature,
such as wake up ARP, that needs enable the automatic self refresh.
If the DDR controller pass the SR_IT (self refresh idle threshold)
idle cycles, it will
On Fri, Nov 21, 2008 at 7:24 PM, [EMAIL PROTECTED] wrote:
From: Becky Bruce [EMAIL PROTECTED]
The current code will cause the creation of a 4GB window
starting at 0 if we have more than 4GB of RAM installed,
which overlaps with PCI_MEM space and causes pci_bus_to_phys()
to return erroneous
On Tue, Nov 25, 2008 at 12:31 PM, Ben Warren [EMAIL PROTECTED] wrote:
Hi Michal,
Michal Simek wrote:
Hi Ben,
how does look like your propose work about PHY lib?
Thanks,
Michal
I'd like to have the PHY library included in the 02.2009 release. One
of the things I'm struggling with is
. This
of course should be fixed in Linux driver too.
Agreed, and...
Signed-off-by: Anatolij Gustschin [EMAIL PROTECTED]
Acked-by: Andy Fleming [EMAIL PROTECTED]
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On Tue, Nov 4, 2008 at 3:37 AM, Haavard Skinnemoen
[EMAIL PROTECTED] wrote:
Andy Fleming [EMAIL PROTECTED] wrote:
+ mmc_init(mmc);
+
+ n = mmc-block_dev.block_write(dev, blk, cnt, addr);
+
+ printf(%d blocks written: %s\n
On Fri, Oct 31, 2008 at 12:22 AM, Ben Warren [EMAIL PROTECTED] wrote:
CONFIG_MPC85xx_FEC - CONFIG_MPC85XX_FEC
Signed-off-by: Ben Warren [EMAIL PROTECTED]
Applied, thanks
Andy
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On Thu, Oct 30, 2008 at 12:53 AM, Ben Warren [EMAIL PROTECTED] wrote:
This is no longer used by any boards, the last one was removed in
commit 6de5bf24004c8d9c9b070bb8f7418d1c45e5eb27.
Signed-off-by: Ben Warren [EMAIL PROTECTED]
Um8540ADS uses it. And the 8572 has one, even though we
Here's a new framework (based roughly off the linux one) for managing
MMC controllers. It handles all of the standard SD/MMC transactions,
leaving the host drivers to implement only what is necessary to
deal with their specific hardware.
We make a number of slow steps toward it before dropping
There were several, now there is one (two if you count the lower-case
versions).
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
board/delta/nand.c |2 --
board/zylonite/nand.c |2 --
common/cmd_bedbug.c |4
common/cmd_elf.c
These names are being taken over by the new MMC framework. Hopefuly
the PXA can be easily ported, and these functions will go away entirely.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
cpu/pxa/mmc.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/cpu/pxa
and the #include of asm/arch/mmc.h
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
cpu/pxa/mmc.c |2 +
cpu/pxa/mmc.h | 189 +++
include/asm-arm/arch-lpc2292/mmc.h | 22
include/asm-arm/arch-pxa
This uses the new MMC framework
Some contributions by Dave Liu [EMAIL PROTECTED]
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
drivers/mmc/Makefile|1 +
drivers/mmc/fsl_esdhc.c | 344 +++
include/fsl_esdhc.h | 136
This is to get it out of the way of incoming MMC framework
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
common/cmd_mmc.c |2 +-
cpu/arm720t/lpc2292/mmc.c |4 ++--
cpu/pxa/mmc.c |2 +-
drivers/mmc/atmel_mci.c |2 +-
include/mmc.h |2
From: Dave Liu [EMAIL PROTECTED]
Current fat.c have three 64KB static array, it makes the BSS section larger.
Change the static to dynamic allocation.
Signed-off-by: Dave Liu [EMAIL PROTECTED]
---
fs/fat/fat.c | 38 +++---
1 files changed, 35 insertions(+), 3
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
board/freescale/mpc8536ds/mpc8536ds.c | 12
cpu/mpc85xx/cpu.c | 16 +++-
include/configs/MPC8536DS.h | 14 ++
3 files changed, 41 insertions(+), 1 deletions(-)
diff --git
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
board/freescale/mpc837xemds/mpc837xemds.c | 19 +++
cpu/mpc83xx/cpu.c | 14 ++
include/asm-ppc/immap_83xx.h |2 ++
include/configs/MPC837XEMDS.h | 15
MMC cards are not memory, so we stop treating them that way.
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
common/cmd_mem.c | 43 ---
cpu/arm720t/lpc2292/mmc.c | 26 --
cpu/pxa/mmc.c | 14
code
(similar to how the ethernet infrastructure now hooks in)
Some of this code was contributed by Dave Liu [EMAIL PROTECTED]
Signed-off-by: Andy Fleming [EMAIL PROTECTED]
---
common/cmd_mmc.c | 122 +++
drivers/mmc/Makefile |1 +
drivers/mmc/mmc.c| 926
On Tue, Oct 28, 2008 at 4:53 AM, Dave Liu [EMAIL PROTECTED] wrote:
The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.
Signed-off-by: Dave Liu [EMAIL
On Tue, Oct 28, 2008 at 4:53 AM, Dave Liu [EMAIL PROTECTED] wrote:
we need TLB entry for DDR at !SPD case.
Signed-off-by: Dave Liu [EMAIL PROTECTED]
Applied, thanks
Andy
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On Mon, Oct 27, 2008 at 2:22 PM, Peter Tyser [EMAIL PROTECTED] wrote:
Signed-off-by: Peter Tyser [EMAIL PROTECTED]
---
include/asm-ppc/immap_85xx.h |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index
On Mon, Oct 27, 2008 at 4:24 PM, Kumar Gala [EMAIL PROTECTED] wrote:
On Oct 27, 2008, at 4:09 PM, Becky Bruce wrote:
The existing code has a few errors that need to be fixed in
order to support large RAM sizes. Fix those, and add a
comment to make it clearer.
Signed-off-by: Becky Bruce
On Mon, Oct 27, 2008 at 1:59 PM, Peter Tyser [EMAIL PROTECTED] wrote:
Initial support for Extreme Engineering Solutions XPedite5370 -
a MPC8572-based 3U VPX single board computer with a PMC/XMC
site.
Signed-off-by: Peter Tyser [EMAIL PROTECTED]
Acked-by: Andy Fleming [EMAIL PROTECTED
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