Re: [U-Boot] [PATCH] arm: socfpga: Fix ethernet reset handling

reakage. >> >> Signed-off-by: Marek Vasut <ma...@denx.de> >> Cc: Dinh Nguyen <dingu...@opensource.altera.com> >> Cc: Chin Liang See <cl...@altera.com> >> Cc: Denis Bakhvalov <denis.bakhva...@nokia.com> > > Works for me as

Re: [U-Boot] [PATCHv2 1/3] arm: socfpga: add reset manager defines for Arria10

On 02/04/2016 05:46 AM, Marek Vasut wrote: > > A10 branch is now u-boot-socfpga/01-arria10 . > Thanks for carrying this. > What is the current status of Arria10 please ? > I haven't had time to work on Arria10 in the last 2 weeks. I hope to get back to it next week. I think I may have to

Re: [U-Boot] [PATCH 2/2] net: phy: micrel: fix divisor value for KSZ9031 phy skew

On 01/27/2016 07:26 PM, Måns Rullgård wrote: > <dingu...@opensource.altera.com> writes: > >> From: Dinh Nguyen <dingu...@opensource.altera.com> >> >> The picoseconds to register value divisor(ps_to_regval) should be 60 and not >> 200. Linux has KSZ9

Re: [U-Boot] FPGA detection failure on Cyclone V soc development kit

On 01/22/2016 10:35 AM, Dinh Nguyen wrote: > On 01/21/2016 10:31 AM, Marek Vasut wrote: >> On Thursday, January 21, 2016 at 05:20:33 PM, Måns Rullgård wrote: >>> Tom Rini <tr...@konsulko.com> writes: >>>> On Wed, Jan 20, 2016 at 08:31:30PM +, Måns Rullgå

Re: [U-Boot] FPGA detection failure on Cyclone V soc development kit

On 01/21/2016 10:31 AM, Marek Vasut wrote: > On Thursday, January 21, 2016 at 05:20:33 PM, Måns Rullgård wrote: >> Tom Rini writes: >>> On Wed, Jan 20, 2016 at 08:31:30PM +, Måns Rullgård wrote: I'm having a problem with u-boot 2016.01 failing to detect the FPGA on

[U-Boot] [PATCH] arm: socfpga: revert "set the fpga global bit to disable HPS to FPGA signals"

s. Signed-off-by: Dinh Nguyen <dingu...@opensource.altera.com> --- drivers/fpga/socfpga.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c index 431e159..4448250 100644 --- a/drivers/fpga/socfpga.c +++ b/drivers/fpga/soc

Re: [U-Boot] [PATCH] arm: socfpga: revert "set the fpga global bit to disable HPS to FPGA signals"

Hi Marek, On 01/19/2016 09:16 AM, Dinh Nguyen wrote: > Revert "arm: socfpga: set the fpga global bit to disable HPS to FPGA signals" > I apologize for the original patch "arm: socfpga: set the fpga global bit to disable HPS to FPGA signals". I did not test the patch w

Re: [U-Boot] [PATCHv2 1/3] arm: socfpga: add reset manager defines for Arria10

On 01/12/2016 08:04 PM, Marek Vasut wrote: > On Wednesday, January 13, 2016 at 02:58:42 AM, Chin Liang See wrote: >> On Tue, 2016-01-12 at 23:16 +0100, Marek Vasut wrote: >>> On Tuesday, January 12, 2016 at 11:11:42 PM, Dinh Nguyen wrote: >>>> On 01/12/20

Re: [U-Boot] [PATCHv2 1/3] arm: socfpga: add reset manager defines for Arria10

On 01/12/2016 04:02 PM, Marek Vasut wrote: > On Tuesday, January 12, 2016 at 09:56:42 PM, dingu...@opensource.altera.com > wrote: >> From: Dinh Nguyen <dingu...@opensource.altera.com> >> >> Add the Arria10 reset manager defines that is used in Linux. Change the >

Re: [U-Boot] [PATCH] arm: socfpga: set the fpga global bit to disable HPS to FPGA signals

On 01/06/2016 09:20 PM, Marek Vasut wrote: > On Thursday, January 07, 2016 at 03:50:00 AM, Dinh Nguyen wrote: >> On 01/06/2016 08:21 PM, Marek Vasut wrote: >>> On Wednesday, January 06, 2016 at 08:48:43 PM, >>> dingu...@opensource.altera.com >>> >&g

Re: [U-Boot] [PATCH] arm: socfpga: set the fpga global bit to disable HPS to FPGA signals

On 01/06/2016 08:21 PM, Marek Vasut wrote: > On Wednesday, January 06, 2016 at 08:48:43 PM, dingu...@opensource.altera.com > wrote: >> From: Dinh Nguyen <dinh.li...@gmail.com> >> >> We should be setting the FPGA Interface Group global bit that will >> corr

Re: [U-Boot] [PATCH 3/6] arm: socfpga: de0-nano-soc: Enabling U-Boot environment in QSPI

iang See <cl...@altera.com> >> Cc: Dinh Nguyen <dingu...@opensource.altera.com> >> Cc: Dinh Nguyen <dinh.li...@gmail.com> >> Cc: Pavel Machek <pa...@denx.de> >> Cc: Marek Vasut <ma...@denx.de> >> Cc: Stefan Roese <s...@denx.de> >

Re: [U-Boot] [PATCH 3/6] arm: socfpga: de0-nano-soc: Enabling mtd partitioning layout

On 12/11/2015 08:21 AM, Marek Vasut wrote: > On Friday, December 11, 2015 at 10:15:50 AM, Chin Liang See wrote: >> Enabling mtd partitioning layout which indicate partition >> for various boot partition >> >> Signed-off-by: Chin Liang See <cl...@altera.

Re: [U-Boot] [PATCH 7/7] arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded data

rd-coded one. Finally, the hard-coded address is > removed and USB DM support is enabled. > > Signed-off-by: Marek Vasut <ma...@denx.de> > Cc: Chin Liang See <cl...@altera.com> > Cc: Dinh Nguyen <dingu...@opensource.altera.com> > Cc: Lukasz Majewski <l

Re: [U-Boot] [PATCH 7/7] arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded data

On Mon, Dec 7, 2015 at 4:01 PM, Marek Vasut <ma...@denx.de> wrote: > On Monday, December 07, 2015 at 10:49:09 PM, Dinh Nguyen wrote: >> On 12/05/2015 02:43 PM, Marek Vasut wrote: >> > This patch adds the necessary OF alias for the UDC node, which let's >> >

Re: [U-Boot] [PATCH] arm: socfpga: remove note to add CONFIG_USB_DWC2_REG_ADDR

On 12/07/2015 05:09 PM, Marek Vasut wrote: > On Tuesday, December 08, 2015 at 12:06:14 AM, Marek Vasut wrote: >> On Monday, December 07, 2015 at 11:48:04 PM, dingu...@opensource.altera.com >> >> wrote: >>> From: Dinh Nguyen <dingu...@opensource.altera.com> &

Re: [U-Boot] [PATCHv4 2/9] arm: socfpga: arria10: add system manager defines

On 12/02/2015 08:42 PM, Marek Vasut wrote: > On Wednesday, December 02, 2015 at 08:31:26 PM, > dingu...@opensource.altera.com > wrote: >> From: Dinh Nguyen <dingu...@opensource.altera.com> >> >> Add system manager defines for Arria10. >&g

Re: [U-Boot] [PATCHv4 4/9] arm: socfpga: arria10: add misc functions for Arria10

On 12/02/2015 08:47 PM, Marek Vasut wrote: > On Wednesday, December 02, 2015 at 08:31:28 PM, > dingu...@opensource.altera.com > wrote: >> From: Dinh Nguyen <dinh.li...@gmail.com> >> >> Add arch_early_init_r function. The Arria10 has a firewall protect

Re: [U-Boot] [PATCHv3 1/9] arm: socfpga: introduce SOCFPGA_GEN5 config property

On Wed, Dec 2, 2015 at 8:12 AM, Marek Vasut <ma...@denx.de> wrote: > On Wednesday, December 02, 2015 at 07:12:48 AM, dingu...@opensource.altera.com > wrote: >> From: Dinh Nguyen <dingu...@opensource.altera.com> >> >> In order to re-use as much Cyclone5 an

Re: [U-Boot] [PATCH] arm: socfpga: fix up a questionable macro for SDMMC

On 12/01/2015 05:30 PM, Marek Vasut wrote: > On Wednesday, December 02, 2015 at 12:20:47 AM, > dingu...@opensource.altera.com > wrote: >> From: Dinh Nguyen <dingu...@opensource.altera.com> >> >> Not sure what made this macro questionable, but edit the macro

Re: [U-Boot] [PATCHv2 1/9] arm: socfpga: arria10: add system manager defines

On 12/01/2015 12:46 PM, Marek Vasut wrote: > On Tuesday, December 01, 2015 at 05:48:31 PM, dingu...@opensource.altera.com > wrote: >> From: Dinh Nguyen <dingu...@opensource.altera.com> >> >> Add system manager defines for Arria10. >> >> Signed-off-by: D

Re: [U-Boot] [RFC] arm: socfpga: introduce SOCFPGA_GEN5 or SOCFPGA_GEN10

On 12/01/2015 05:31 PM, Marek Vasut wrote: > On Tuesday, December 01, 2015 at 11:00:02 PM, dingu...@opensource.altera.com > wrote: >> From: Dinh Nguyen <dingu...@opensource.altera.com> >> >> Define SOCFPGA_GEN5 which applies to Arria5/Cyclone5 hardware, and >>

Re: [U-Boot] [PATCHv2 4/9] arm: socfpga: arria10: add misc functions for Arria10

On Tue, Dec 1, 2015 at 12:56 PM, Marek Vasut <ma...@denx.de> wrote: > On Tuesday, December 01, 2015 at 05:48:34 PM, dingu...@opensource.altera.com > wrote: >> From: Dinh Nguyen <dingu...@opensource.altera.com> >> >> Add miscellaneous functions(arch_early_init_r,

Re: [U-Boot] [PATCH 10/10] ARM: socfpga: arria10: add support for building Arria10

On 11/20/2015 06:49 AM, Marek Vasut wrote: > On Friday, November 20, 2015 at 12:28:47 AM, Dinh Nguyen wrote: >> On 11/19/2015 04:45 PM, Marek Vasut wrote: >>> On Thursday, November 19, 2015 at 10:35:47 PM, >>> dingu...@opensource.altera.com >>> >

Re: [U-Boot] [PATCH 10/10] ARM: socfpga: arria10: add support for building Arria10

On 11/23/2015 09:38 AM, Marek Vasut wrote: > On Monday, November 23, 2015 at 03:36:14 PM, Dinh Nguyen wrote: >> On 11/20/2015 06:49 AM, Marek Vasut wrote: >>> On Friday, November 20, 2015 at 12:28:47 AM, Dinh Nguyen wrote: >>>> On 11/19/2015 04:45 PM, Marek Vasut wrot

Re: [U-Boot] [PATCH 10/10] ARM: socfpga: arria10: add support for building Arria10

On 11/23/2015 05:03 PM, Marek Vasut wrote: > On Monday, November 23, 2015 at 11:50:15 PM, Dinh Nguyen wrote: >> On 11/23/2015 04:46 PM, Marek Vasut wrote: >>> On Monday, November 23, 2015 at 11:32:27 PM, Dinh Nguyen wrote: >>> [...] >>> >>>>>>

Re: [U-Boot] [PATCH 10/10] ARM: socfpga: arria10: add support for building Arria10

On 11/23/2015 04:46 PM, Marek Vasut wrote: > On Monday, November 23, 2015 at 11:32:27 PM, Dinh Nguyen wrote: > [...] >>>>>> The main point is that we need to program the FPGA >>>>>> during U-Boot booting up with a ~>10 MB rbf file while being lim

Re: [U-Boot] [PATCH 01/10] ARM: socfpga: arria10: add base address map for Arria10

On 11/19/2015 04:26 PM, Marek Vasut wrote: > On Thursday, November 19, 2015 at 10:35:38 PM, dingu...@opensource.altera.com > wrote: >> From: Dinh Nguyen <dingu...@opensource.altera.com> >> >> Add the base address map for Arria10. >> >> Signed-off-by: D

Re: [U-Boot] [PATCH 10/10] ARM: socfpga: arria10: add support for building Arria10

On 11/23/2015 05:20 PM, Marek Vasut wrote: > On Tuesday, November 24, 2015 at 12:04:10 AM, Dinh Nguyen wrote: >> On 11/23/2015 05:03 PM, Marek Vasut wrote: >>> On Monday, November 23, 2015 at 11:50:15 PM, Dinh Nguyen wrote: >>>> On 11/23/2015 04:46 PM, Marek Vasut wr

Re: [U-Boot] [PATCH 10/10] ARM: socfpga: arria10: add support for building Arria10

On 11/19/2015 04:45 PM, Marek Vasut wrote: > On Thursday, November 19, 2015 at 10:35:47 PM, dingu...@opensource.altera.com > wrote: >> From: Dinh Nguyen <dingu...@opensource.altera.com> >> >> Update Makefile to build Arria 10. >> >> Signed-off-by: D

Re: [U-Boot] [PATCH 1/4] mips: Use the generic bitops headers

On 11/04/2015 11:13 AM, Fabio Estevam wrote: > From: Fabio Estevam > > The generic bitops headers are required when calling logarithimic > functions, such as ilog2(). > s/logarithimic/logarithmic Same comment for 2/4 and 3/4 Dinh

Re: [U-Boot] [PATCH] arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines

On Tue, 3 Nov 2015, Marek Vasut wrote: > On Tuesday, November 03, 2015 at 12:11:21 AM, dingu...@opensource.altera.com > wrote: > > From: Dinh Nguyen <dingu...@opensource.altera.com> > > > > The DMA, QSPI, and SD/MMC reset bits are located in the permodrst regis

Re: [U-Boot] [PATCH v2] arm: socfpga: Add SoCFPGA SR1500 board

Marek Vasut <ma...@denx.de> > Cc: Pavel Machek <pa...@denx.de> > Cc: Dinh Nguyen <dingu...@opensource.altera.com> > --- > v2: > - Addressed various review comments from Marek: > - Added chapter about SPL integration for SoC FPGA in doc/README.socfpga > - Delay afte

Re: [U-Boot] [PATCH 1/2] pl310: arm: fix up define typo for the share override bit

On Wed, Oct 14, 2015 at 11:31 AM, Pavel Machek <pa...@denx.de> wrote: > On Mon 2015-10-12 09:59:56, dingu...@opensource.altera.com wrote: >> From: Dinh Nguyen <dingu...@opensource.altera.com> >> >> s/L310_SHARED_ATT_OVERRIDE_ENABLE/PL310_SHARED_ATT_OVERRIDE_ENABLE

Re: [U-Boot] [PATCH 2/2] arm: socfpga: enable data/inst prefetch and shared override in the L2

On 10/15/2015 09:32 AM, Marek Vasut wrote: > On Wednesday, October 14, 2015 at 06:32:42 PM, Pavel Machek wrote: >> On Mon 2015-10-12 09:59:57, dingu...@opensource.altera.com wrote: >>> From: Dinh Nguyen <dingu...@opensource.altera.com> >>> >>> Updat

Re: [U-Boot] [PATCH 2/2] arm: socfpga: enable data/inst prefetch and shared override in the L2

On Thu, Oct 15, 2015 at 1:08 PM, Marek Vasut <ma...@denx.de> wrote: > On Thursday, October 15, 2015 at 05:04:38 PM, Dinh Nguyen wrote: > > Hi! > >> >>> diff --git a/arch/arm/include/asm/pl310.h >> >>> b/arch/arm/include/asm/pl310.h index 18b90b7..

Re: [U-Boot] [PATCH 3/3] arm: socfpga: Enable saveenv for SD/MMC

On Tue, Sep 22, 2015 at 8:57 PM, Marek Vasut <ma...@denx.de> wrote: > On Wednesday, September 23, 2015 at 12:01:34 AM, > dingu...@opensource.altera.com > wrote: >> From: Dinh Nguyen <dingu...@opensource.altera.com> >> >> Enable the able to save the en

Re: [U-Boot] [PATCH] ARM: socfpga: Enable saveenv for SD/MMC

On 09/15/2015 03:22 PM, Marek Vasut wrote: > On Tuesday, September 15, 2015 at 09:47:23 PM, dingu...@opensource.altera.com > wrote: >> From: Dinh Nguyen <dingu...@opensource.altera.com> >> >> Enable the able to save the environment variables when SD/MMC is used. &g

Re: [U-Boot] [PATCHv2] arm: socfpga: Add support for the Terasic DE-0 Atlas board

On 9/2/15 3:18 AM, Marek Vasut wrote: > On Wednesday, September 02, 2015 at 12:41:52 AM, > dingu...@opensource.altera.com > wrote: >> From: Dinh Nguyen <dingu...@opensource.altera.com> >> >> Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a Cyclo

Re: [U-Boot] [PATCH] arm: socfpga: Add support for the Terasic DE-0 Atlas board

On Tue, Sep 1, 2015 at 10:36 AM, Marek Vasut <ma...@denx.de> wrote: > On Tuesday, September 01, 2015 at 05:12:40 PM, Dinh Nguyen wrote: >> On 09/01/2015 03:33 AM, Marek Vasut wrote: >> > On Tuesday, September 01, 2015 at 09:38:23 AM, Pavel Machek wrote: >> >&g

Re: [U-Boot] [PATCH 1/2] arm: socfpga: mmc: Enable calibration for drvsel and smpsel

>>>>>> >>>>>>>> On 08/25/2015 12:08 PM, Chin Liang See wrote: >>>>>>>>> On Tue, 2015-08-25 at 11:36 +0900, Jaehoon Chung wrote: >>>>>>>>>> Hi, >>>>>>>>>> >>>>

Re: [U-Boot] [PATCH] arm: socfpga: Add support for the Terasic DE-0 Atlas board

On 08/31/2015 05:23 PM, Marek Vasut wrote: > On Monday, August 31, 2015 at 09:57:05 PM, dingu...@opensource.altera.com > wrote: >> From: Dinh Nguyen <dingu...@opensource.altera.com> >> >> Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV >

Re: [U-Boot] [PATCH] arm: socfpga: Add support for the Terasic DE-0 Atlas board

On 09/01/2015 03:33 AM, Marek Vasut wrote: > On Tuesday, September 01, 2015 at 09:38:23 AM, Pavel Machek wrote: >> On Tue 2015-09-01 00:23:49, Marek Vasut wrote: >>> On Monday, August 31, 2015 at 09:57:05 PM, dingu...@opensource.altera.com > wrote: >>

Re: [U-Boot] [PATCH 1/2] arm: socfpga: mmc: Enable calibration for drvsel and smpsel

On 8/20/15 4:59 PM, Marek Vasut wrote: On Thursday, August 20, 2015 at 11:55:02 PM, Dinh Nguyen wrote: +CC: Simon Glass Hi Dinh, On Thu, Aug 20, 2015 at 12:32 AM, Marek Vasut ma...@denx.de wrote: On Thursday, August 20, 2015 at 07:28:02 AM, Chin Liang See wrote: Hi, On Wed, 2015-08

Re: [U-Boot] [PATCH 1/2] arm: socfpga: mmc: Enable calibration for drvsel and smpsel

and bus width. This is to ensure reliable transmission between the controller and the card. Signed-off-by: Chin Liang See cl...@altera.com Cc: Dinh Nguyen dingu...@opensource.altera.com I think there's something wrong with your git scripts, I did not get this email. Cc

Re: [U-Boot] [PATCH] arm: socfpga: Do not enable gmac1 in Cyclone V dtsi

insertion(+), 6 deletions(-) Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 2/2] ddr: altera: Repair uninited variable

--- drivers/ddr/altera/sequencer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 0/8] arm: socfpga: Board cleanup

On 8/12/15 3:08 PM, Marek Vasut wrote: On Tuesday, August 11, 2015 at 01:10:38 AM, Marek Vasut wrote: This series cleans up the QTS-generated header files and cleans up the SoCDK support such that they fit into the framework just like any other SoCFPGA boards. Marek Vasut (8): arm:

Re: [U-Boot] [PATCH] arm: socfpga: Fix delay in clock manager

/clock_manager.c @@ -90,7 +90,7 @@ static void cm_write_with_phase(uint32_t value, Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] arm: socfpga: Make the DT mmc node consistent

/socfpga.dtsi | 3 +-- arch/arm/dts/socfpga_cyclone5_socrates.dts | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http

Re: [U-Boot] [PATCH 0/8] arm: socfpga: Board cleanup

: socfpga: Make the pinmux table const u8 Only comment was in patch 8/8. For the series: Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 8/8] arm: socfpga: Make the pinmux table const u8

On 8/10/15 6:10 PM, Marek Vasut wrote: Now that we're actually converting the QTS-generated header files, we can even adjust their data types. A good candidate for this is the pinmux table, where each entry can have value in the range of 0..3, but each element is declared as unsigned long.

Re: [U-Boot] [PATCH] arm: socfpga: Fix delay in freeze controller

a/arch/arm/mach-socfpga/freeze_controller.c b/arch/arm/mach-socfpga/freeze_controller.c index 0be643c..2b16795 100644 --- a/arch/arm/mach-socfpga/freeze_controller.c +++ b/arch/arm/mach-socfpga/freeze_controller.c @@ -7,8 +7,8 @@ Acked-by: Dinh Nguyen dingu...@opensource.altera.com

Re: [U-Boot] [PATCH 1/2] ddr: altera: Replace float multiplication with integer one

-by: Marek Vasut ma...@denx.de --- drivers/ddr/altera/sequencer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index 2bd0109..f3621cf 100644 Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh

Re: [U-Boot] [PATCH 2/6] arm: socfpga: scan: Introduce generic JTAG accessor

--- arch/arm/mach-socfpga/scan_manager.c | 104 +-- 1 file changed, 63 insertions(+), 41 deletions(-) Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de

Re: [U-Boot] [PATCH 3/6] arm: socfpga: scan: Clean up horrible macros

insertions(+), 72 deletions(-) Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 4/6] arm: socfpga: scan: Factor out IO chain programming

file changed, 42 insertions(+), 71 deletions(-) Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 1/6] arm: socfpga: scan: Clean up scan_chain_engine_is_idle()

max_iter) Should you go ahead and change this to u32? Only comment, otherwise: Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] ddr: altera: sequencer: add RW_MGR_MEM_NUMBER_OF_RANKS

On 8/5/15 3:57 AM, Marek Vasut wrote: btw. did you have time to skim through [PATCH 00/28] socfpga: sdram.c cleanups please ? I'd like to apply that to master, put on the sequencer cleanups and this patch and then submit a PR :) Oh, I didn't see this series come in. You've been so quiet,

Re: [U-Boot] [PATCH 16/28] ddr: altera: sdram: Clean up sdram_mmr_init_full() part 4

On 8/1/15 4:34 PM, Marek Vasut wrote: Merge sdr_set_*() functions which are just setting registers among the sea of register setting in sdram_mmr_init_full(). There is no need to keep them separate this way, there is nothing special about them. Signed-off-by: Marek Vasut ma...@denx.de

Re: [U-Boot] [PATCH 00/28] socfpga: sdram.c cleanups

up further with a separate patch. Otherwise, for the whole series: Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 000/172] socfpga: SPL and DDR init

to start picking it up so it can land in 2015.10 . Reviews and comments are welcome. Thank you so much for putting this series together! For the whole series: Acked-by: Dinh Nguyen dingu...@opensource.altera.com Dinh ___ U-Boot mailing list U-Boot

Re: [U-Boot] [PATCH 05/15] ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_init

/polution/pollution Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 01/15] ddr: altera: sequencer: Move qts-generated files to board dir

/altera = board/altera/socfpga/qts}/sequencer_defines.h (100%) Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 02/15] ddr: altera: sequencer: Clean up mach/sdram.h

(-) Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 03/15] ddr: altera: sequencer: Zap unused params and macros

/sequencer.h | 31 -- 2 files changed, 5 insertions(+), 75 deletions(-) Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 06/15] ddr: altera: sequencer: Wrap RW_MGR_* macros

the nasty QTS generated macros in board files and reducing the polution of the namespace. s/polution/pollution Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman

Re: [U-Boot] [PATCH 04/15] ddr: altera: sequencer: Zap bogus redefinition of RW_MGR_MEM_NUMBER_OF_RANKS

On 08/02/2015 06:21 PM, Marek Vasut wrote: This is defined in the QTS-generated headers, so it must not be re-defined in sequencer.h . Signed-off-by: Marek Vasut ma...@denx.de --- drivers/ddr/altera/sequencer.h | 1 - 1 file changed, 1 deletion(-) Acked-by: Dinh Nguyen dingu

Re: [U-Boot] [PATCH 08/15] ddr: altera: sequencer: Wrap IO_* macros

in board files and reducing the polution of the namespace. s/polution/pollution Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 09/15] ddr: altera: sequencer: Pluck out IO_* macros from code

On 08/02/2015 06:21 PM, Marek Vasut wrote: Actually convert the sequencer code to use socfpga_sdram_io_config instead of the IO_* macros. This is just an sed excercise here, no manual coding needed. s/excersise/exercise Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh

Re: [U-Boot] [PATCH 07/15] ddr: altera: sequencer: Pluck out RW_MGR_* macros from code

On 08/02/2015 06:21 PM, Marek Vasut wrote: Actually convert the sequencer code to use socfpga_sdram_rw_mgr_config instead of the RW_MGR_* macros. This is just an sed excercise here, no manual coding needed. s/excersise/exercise Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks

Re: [U-Boot] [PATCH 10/15] ddr: altera: sequencer: Wrap misc remaining macros

the nasty QTS generated macros in board files and reducing the polution of the namespace. s/remainging/remaining s/polution/pollution Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http

Re: [U-Boot] [PATCH 11/15] ddr: altera: sequencer: Zap VFIFO_SIZE

deletions(-) Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 12/15] ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VAL

drivers/ddr/altera/sequencer.h | 45 -- 2 files changed, 4 insertions(+), 49 deletions(-) Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http

Re: [U-Boot] [PATCH 13/15] ddr: altera: sequencer: Pluck out misc macros from code

, so sequencer.c namespace is now no longer poluted by QTS-generated macros. s/excercise/exercise s/poluted/polluted Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de

Re: [U-Boot] [PATCH 14/15] ddr: altera: sequencer: Clean data types

On 08/02/2015 06:22 PM, Marek Vasut wrote: Replace uintNN_t with uNN. No functional change. Signed-off-by: Marek Vasut ma...@denx.de --- drivers/ddr/altera/sequencer.c | 96 +- 1 file changed, 48 insertions(+), 48 deletions(-) Acked-by: Dinh

Re: [U-Boot] [PATCH 15/15] ddr: altera: sequencer: Clean checkpatch issues

/sequencer.c | 159 +++-- 1 file changed, 88 insertions(+), 71 deletions(-) Acked-by: Dinh Nguyen dingu...@opensource.altera.com Thanks, Dinh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman

Re: [U-Boot] [PATCH 012/172] arm: socfpga: reset: Repair bridge reset handling

On 7/27/15 3:49 PM, Marek Vasut wrote: The current bridge reset code, which de-asserted the bridge reset, was activelly polling whether the FPGA is programmed and ready and s/activelly/actively Again...only comment for this patch, no need to resend. Dinh

Re: [U-Boot] [PATCH 011/172] arm: socfpga: reset: Replace ad-hoc reset functions

On 7/27/15 3:49 PM, Marek Vasut wrote: Replace all those ad-hoc reset functions, which were all copies of the same invocation of clrbits_le32() anyway, with one single unified function, socfpga_per_reset(), with necessary parameters. Signed-off-by: Marek Vasut ma...@denx.de ---

Re: [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA

On Tue, Jul 21, 2015 at 10:24 PM, Marek Vasut ma...@denx.de wrote: On Wednesday, July 22, 2015 at 12:46:15 AM, Dinh Nguyen wrote: On 07/20/2015 02:40 PM, Marek Vasut wrote: On Monday, July 20, 2015 at 09:31:39 PM, Dinh Nguyen wrote: [...] Hi, yeah, I have some insane amount

Re: [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA

On 7/20/15 2:40 PM, Marek Vasut wrote: On Monday, July 20, 2015 at 09:31:39 PM, Dinh Nguyen wrote: [...] Hi, yeah, I have some insane amount of cleanup patches and fixes already. I will post them once I'm done. What I am sorely missing is the UniPHY register interface documentation

Re: [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA

On 7/22/15 4:00 AM, Marek Vasut wrote: On Wednesday, July 22, 2015 at 10:27:10 AM, Dinh Nguyen wrote: On 7/20/15 2:40 PM, Marek Vasut wrote: On Monday, July 20, 2015 at 09:31:39 PM, Dinh Nguyen wrote: [...] Hi, yeah, I have some insane amount of cleanup patches and fixes already. I

Re: [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA

On 7/22/15 8:01 AM, Marek Vasut wrote: On Wednesday, July 22, 2015 at 02:57:49 PM, Dinh Nguyen wrote: On 7/22/15 4:00 AM, Marek Vasut wrote: On Wednesday, July 22, 2015 at 10:27:10 AM, Dinh Nguyen wrote: On 7/20/15 2:40 PM, Marek Vasut wrote: On Monday, July 20, 2015 at 09:31:39 PM, Dinh

Re: [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA

On 07/20/2015 02:40 PM, Marek Vasut wrote: On Monday, July 20, 2015 at 09:31:39 PM, Dinh Nguyen wrote: [...] Hi, yeah, I have some insane amount of cleanup patches and fixes already. I will post them once I'm done. What I am sorely missing is the UniPHY register interface documentation

Re: [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA

On 7/17/15 3:22 PM, Marek Vasut wrote: On Friday, July 17, 2015 at 09:58:20 PM, Dinh Nguyen wrote: On 07/12/2015 02:50 PM, Marek Vasut wrote: On Friday, June 26, 2015 at 10:01:47 PM, Marek Vasut wrote: On Friday, June 26, 2015 at 06:43:13 PM, Marek Vasut wrote: On Wednesday, June 03, 2015

Re: [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA

On 7/20/15 1:36 PM, Marek Vasut wrote: On Monday, July 20, 2015 at 03:40:00 PM, Dinh Nguyen wrote: On 7/17/15 3:22 PM, Marek Vasut wrote: On Friday, July 17, 2015 at 09:58:20 PM, Dinh Nguyen wrote: On 07/12/2015 02:50 PM, Marek Vasut wrote: On Friday, June 26, 2015 at 10:01:47 PM, Marek

Re: [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA

On 07/12/2015 02:50 PM, Marek Vasut wrote: On Friday, June 26, 2015 at 10:01:47 PM, Marek Vasut wrote: On Friday, June 26, 2015 at 06:43:13 PM, Marek Vasut wrote: On Wednesday, June 03, 2015 at 05:52:47 AM, dingu...@opensource.altera.com wrote: From: Dinh Nguyen dingu

Re: [U-Boot] [PATCHv4 1/3] driver/ddr/altera: Add DDR driver for Altera's SDRAM controller

On 6/9/15 6:55 AM, Pavel Machek wrote: Hi! +struct sdram_prot_rule { +uint64_tsdram_start; /* SDRAM start address */ +uint64_tsdram_end; /* SDRAM end address */ +uint32_trule; /* SDRAM protection rule number: 0-19 */ +int valid; /* Rule

Re: [U-Boot] [PATCHv3 2/3] driver/ddr/altera/: Add the sdram calibration portion

On 05/28/2015 01:18 PM, Marek Vasut wrote: On Thursday, May 28, 2015 at 05:41:26 PM, Dinh Nguyen wrote: On 05/25/2015 08:23 AM, Wolfgang Denk wrote: Dear Pavel, In message 20150525123750.GD9943@amd you wrote: + ** All global variables that are explicitly initialized (including

Re: [U-Boot] [PATCHv3 2/3] driver/ddr/altera/: Add the sdram calibration portion

On 05/25/2015 08:23 AM, Wolfgang Denk wrote: Dear Pavel, In message 20150525123750.GD9943@amd you wrote: + ** All global variables that are explicitly initialized (including ** + ** explicitly initialized to zero), are only initialized once, during ** + ** configuration

Re: [U-Boot] [PATCHv3 2/3] driver/ddr/altera/: Add the sdram calibration portion

On 05/25/2015 08:23 AM, Wolfgang Denk wrote: Dear Pavel, In message 20150525123750.GD9943@amd you wrote: + ** All global variables that are explicitly initialized (including ** + ** explicitly initialized to zero), are only initialized once, during ** + ** configuration

Re: [U-Boot] [PATCHv3 2/3] driver/ddr/altera/: Add the sdram calibration portion

On 5/21/15 6:35 PM, Marek Vasut wrote: On Monday, May 18, 2015 at 09:36:48 PM, dingu...@opensource.altera.com wrote: From: Dinh Nguyen dingu...@opensource.altera.com This patch adds the DDR calibration portion of the Altera SDRAM driver. Signed-off-by: Dinh Nguyen dingu

Re: [U-Boot] [PATCH v2 0/6] ARM: socfpga: refactoring, move files to arch/arm/mach-socfpga

On 5/7/15 6:06 AM, Marek Vasut wrote: On Thursday, May 07, 2015 at 01:03:28 PM, Pavel Machek wrote: On Thu 2015-05-07 12:19:38, Marek Vasut wrote: On Thursday, May 07, 2015 at 06:15:51 AM, Masahiro Yamada wrote: Hi Marek, Hi! 2015-05-07 12:25 GMT+09:00 Marek Vasut ma...@denx.de: On

Re: [U-Boot] [U-boot][PATCH 0/2] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA

On 4/16/15 1:32 AM, Marek Vasut wrote: On Wednesday, April 15, 2015 at 11:14:50 PM, dingu...@opensource.altera.com wrote: From: Dinh Nguyen dingu...@opensource.altera.com Hello, The following 2 patches adds the DDR controller driver that is in the Altera SoCFPGA platform. This driver

Re: [U-Boot] [PATCH RESEND 1/3] driver/ddr/altera: Add DDR driver for Altera's SDRAM controller

Hi Pavel, On 04/17/2015 07:31 AM, Pavel Machek wrote: Hi! +#ifndef _SDRAM_H_ +#define _SDRAM_H_ + +#ifndef __ASSEMBLY__ + +/* function declaration */ You can delete this comment. Ok... +#define \ +SDR_CTRLGRP_MPTHRESHOLDRST_0_THRESHOLDRSTCYCLES_31_0_LSB 0 +#define \

Re: [U-Boot] [PATCHv3 15/17] arm: socfpga: spl: update pll_config for dev kit

On 04/02/2015 08:54 PM, Marek Vasut wrote: On Tuesday, March 31, 2015 at 12:01:16 AM, dingu...@opensource.altera.com wrote: From: Dinh Nguyen dingu...@opensource.altera.com This sets the CPU clocks to 925MHz and DDR to 400MHz, and the correct CONFIG_HPS_MAINPLLGRP_VCO_NUMER should be 79

Re: [U-Boot] [PATCHv3 10/17] arm: socfpga: spl: Add s_init stub

On 04/11/2015 11:57 AM, Marek Vasut wrote: On Tuesday, April 07, 2015 at 04:31:43 PM, Dinh Nguyen wrote: On Fri, 3 Apr 2015, Marek Vasut wrote: On Tuesday, March 31, 2015 at 12:01:11 AM, dingu...@opensource.altera.com wrote: From: Dinh Nguyen dingu...@opensource.altera.com Add a stub

Re: [U-Boot] [PATCHv3 10/17] arm: socfpga: spl: Add s_init stub

On Fri, 3 Apr 2015, Marek Vasut wrote: On Tuesday, March 31, 2015 at 12:01:11 AM, dingu...@opensource.altera.com wrote: From: Dinh Nguyen dingu...@opensource.altera.com Add a stub s_init function in the board file. Why do you add this stub function ? The commit message should

Re: [U-Boot] [PATCHv3 13/17] arm: socfpga: spl: add board_init_f to SPL

On Fri, 3 Apr 2015, Marek Vasut wrote: On Tuesday, March 31, 2015 at 11:07:57 PM, Pavel Machek wrote: Hi! On Mon 2015-03-30 17:01:14, dingu...@opensource.altera.com wrote: From: Dinh Nguyen dingu...@opensource.altera.com Remap SDRAM to 0x0, and clear OCRAM's ECC in board_init_f

Re: [U-Boot] [PATCHv3 01/17] arm: socfpga: spl: Add main sdram code

Hi Marek, On Thu, Apr 2, 2015 at 9:00 PM, Marek Vasut ma...@denx.de wrote: On Tuesday, March 31, 2015 at 08:41:46 AM, Wolfgang Denk wrote: Dear dingu...@opensource.altera.com, In message 1427752878-18426-2-git-send-email-dingu...@opensource.altera.com you wrote: ... +/* Register:

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