3xx) or realized using a WDT (e.g. ag101).
>
> Remove this left-over implementation in preparation for the removal of
> the `addr` parameter in the entire tree.
>
> Cc: Rick Chen
> Signed-off-by: Harald Seiler
> ---
> arch/nds32/cpu/n1213/start.S | 22 ---
Hi Pragnesh
> Hi Rick,
>
> [...]
> >>
> >>Following are the configurations, steps and debug logs:
> >>
> >>+++ b/configs/ae350_rv64_defconfig
> >>q+CONFIG_TRACE=y
> >>+CONFIG_TRACE_BUFFER_SIZE=0x0100
> >>+CONFIG_TRACE_CALL_DEPTH_LIMIT=15
> >>+CONFIG_CMD_TRACE=y
> >>+CONFIG_TIMER_EARLY=y
> >>
Hi Padmarao
> From: Padmarao Begari [mailto:padmarao.beg...@microchip.com]
> Sent: Thursday, December 03, 2020 4:32 AM
> To: u-boot@lists.denx.de; bmeng...@gmail.com; Rick Jian-Zhi Chen(陳建志);
> anup.pa...@wdc.com; lukas.a...@aisec.fraunhofer.de; joe.hershber...@ni.com;
> lu...@denx.de;
Hi, Pragnesh
> Hi Rick,
>
> >-Original Message-----
> >From: Rick Chen
> >Sent: 26 November 2020 14:44
> >To: Pragnesh Patel
> >Cc: Simon Glass ; U-Boot Mailing List >b...@lists.denx.de>; Atish Patra ; Bin Meng
> >; Paul Walmsley ( Sifive) ;
Hi Pragnesh
> Hi Rick,
>
> >-Original Message-----
> >From: Rick Chen
> >Sent: 24 November 2020 13:08
> >To: Pragnesh Patel
> >Cc: U-Boot Mailing List ; Atish Patra
> >; Bin Meng ; Paul Walmsley (
> >Sifive) ; Anup Patel ; Sagar
> >Kad
Hi Pragnesh,
> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
> Sent: Tuesday, November 17, 2020 7:05 PM
> To: u-boot@lists.denx.de
> Cc: atish.pa...@wdc.com; palmerdabb...@google.com; bmeng...@gmail.com;
> paul.walms...@sifive.com; anup.pa...@wdc.com; sagar.ka...@sifive.com; Rick
>
ster
>
> Not s2 register, t1 register is correct
> Fortunately, it works because t1 register has a garbage value
>
> Signed-off-by: Brad Kim
> ---
> arch/riscv/cpu/start.S | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Rick Chen
> diff --
Hi Pragnesh
> Hi Rick,
>
> >-Original Message-----
> >From: Rick Chen
> >Sent: 13 November 2020 13:37
> >To: Pragnesh Patel
> >Cc: U-Boot Mailing List ; Atish Patra
> >; palmerdabb...@google.com; Bin Meng
> >; Paul Walmsley ( Sifive) ;
>
Hi Pragnesh
> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
> Sent: Wednesday, November 11, 2020 6:15 PM
> To: u-boot@lists.denx.de
> Cc: atish.pa...@wdc.com; palmerdabb...@google.com; bmeng...@gmail.com;
> paul.walms...@sifive.com; anup.pa...@wdc.com; sagar.ka...@sifive.com; Rick
>
00644
> > --- a/drivers/pinctrl/pinctrl-kendryte.c
> > +++ b/drivers/pinctrl/pinctrl-kendryte.c
> > @@ -55,8 +55,9 @@
> >
>
> Reviewed-by: Rick Chen
Please check about the CI failure items:
https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/742884254
+drivers
> Signed-off-by: Pragnesh Patel
> > ---
> >
> > Changes in v2:
> > - Remove TYPE_SIFIVE_REV0 flag
> > - Update the Opencores I2C Controller Link
> >
> > drivers/i2c/Kconfig | 7 +
> > drivers/i2c/Makefile | 1 +
> > drivers/i2c/ocore
ller.
>
> Signed-off-by: Pragnesh Patel
> ---
>
> (no changes since v1)
>
> arch/riscv/cpu/fu540/Kconfig | 2 ++
> board/sifive/fu540/Kconfig | 1 +
> 2 files changed, 3 insertions(+)
>
Reviewed-by: Rick Chen
> - Update the Opencores I2C Controller Link
>
> drivers/i2c/Kconfig | 7 +
> drivers/i2c/Makefile | 1 +
> drivers/i2c/ocores_i2c.c | 636 +++
> 3 files changed, 644 insertions(+)
> create mode 100644 drivers/i2c/ocores_i2c.c
>
Reviewed-by: Rick Chen
Hi Pragnesh
> Hi Rick,
>
> >-Original Message-----
> >From: Rick Chen
> >Sent: 09 November 2020 13:44
> >To: Pragnesh Patel
> >Cc: U-Boot Mailing List ; Atish Patra
> >; Bin Meng ; Paul Walmsley (
> >Sifive) ; Anup Patel ; Sagar
> &
> From: Pragnesh Patel [mailto:pragnesh.pa...@sifive.com]
> Sent: Thursday, November 05, 2020 7:31 PM
> To: u-boot@lists.denx.de
> Cc: atish.pa...@wdc.com; palmerdabb...@google.com; bmeng...@gmail.com;
> paul.walms...@sifive.com; anup.pa...@wdc.com; sagar.ka...@sifive.com; Rick
> Jian-Zhi
llow attaching a virtual SATA disk to qemu-riscv64_defconfig.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> configs/qemu-riscv64_defconfig | 6 ++
> 1 file changed, 6 insertions(+)
>
Reviewed-by: Rick Chen
rror
> >> riscv: Add watchdog bindings for the k210
> >> riscv: Enable watchdog for the k210
> >>
> >> arch/riscv/dts/k210.dtsi | 1 -
> >> board/sipeed/maix/Kconfig | 2 ++
> >> drivers/watchdog/designware_wdt.c | 39 -------
; >> ---
> >> arch/riscv/lib/crt0_riscv_efi.S | 7 ++-
> >> 1 file changed, 6 insertions(+), 1 deletion(-)
> >>
Reviewed-by: Rick Chen
> >> diff --git a/arch/riscv/lib/crt0_riscv_efi.S
> >b/arch/riscv/lib/crt0_riscv_efi.S
> >> index 8
; 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Rick Chen
tions(+), 2 deletions(-)
>
Reviewed-by: Rick Chen
)
>
> board/sipeed/maix/Kconfig | 2 ++
> board/sipeed/maix/maix.c | 26 --
> configs/sipeed_maix_bitm_defconfig | 1 +
> include/configs/sipeed-maix.h | 4
> 4 files changed, 3 insertions(+), 30 deletions(-)
>
Reviewed-by: Rick Chen
;
> arch/riscv/cpu/generic/dram.c | 26 ++
> 1 file changed, 26 insertions(+)
>
Reviewed-by: Rick Chen
> Other RISC-V targets should not have RAM_SIFIVE enabled by default.
>
> Signed-off-by: Sean Anderson
> Reviewed-by: Pragnesh Patel
> ---
>
> (no changes since v1)
>
> drivers/ram/sifive/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Rick Chen
changed, 65 insertions(+)
> create mode 100644 drivers/ram/kendryte.c
>
Reviewed-by: Rick Chen
derson
> Reviewed-by: Simon Glass
> ---
>
> (no changes since v1)
>
> include/fdtdec.h | 19 ++-
> lib/fdtdec.c | 34 +-
> 2 files changed, 47 insertions(+), 6 deletions(-)
>
Reviewed-by: Rick Chen
0 +-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
Reviewed-by: Rick Chen
> These devices are necessary for the clock driver, which is required by the
> sram driver, to run pre-relocation.
>
> Signed-off-by: Sean Anderson
> ---
>
> (no changes since v1)
>
> arch/riscv/dts/k210.dtsi | 4
> 1 file changed, 4 insertions(+)
>
Reviewed-by: Rick Chen
2:
> - New
>
> drivers/clk/kendryte/pll.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
Reviewed-by: Rick Chen
k/kendryte/pll.c | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Rick Chen
10 +-
> 2 files changed, 6 insertions(+), 6 deletions(-)
>
Reviewed-by: Rick Chen
nctrl-kendryte.c
> @@ -55,8 +55,9 @@
>
Reviewed-by: Rick Chen
Hi Sean
> On 10/13/20 8:43 PM, Rick Chen wrote:
> >> Half of this driver is a DM-based timer driver, and half is RISC-V-specific
> >> IPI code. Move the timer portions in with the other timer drivers. The
> >> KConfig is not moved, since it also enables IPIs. It cou
Moal
> Signed-off-by: Sean Anderson
> ---
>
> arch/riscv/dts/k210.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: Rick Chen
an-Zhi Chen(陳建志);
> Pragnesh Patel; Bin Meng; Jagan Teki; Sean Anderson
> Subject: [PATCH] riscv: fu540: dts: Correct reg size of clint node
>
> Signed-off-by: Pragnesh Patel
> ---
> arch/riscv/dts/fu540-c000-u-boot.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Rick Chen
Hi Pragnesh
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Friday, September 11, 2020 2:48 PM
> To: Pragnesh Patel
> Cc: U-Boot Mailing List; Atish Patra; Anup Patel; Sagar Kadam; Rick Jian-Zhi
> Chen(陳建志); Paul Walmsley; Bin Meng; Lukas Auer; Sean Anderson
> Subject: Re: [PATCH 1/3]
+ return -EINVAL;
> +
> + return timer_timebase_fallback(dev);
> +}
> +
> +static const struct udevice_id sifive_clint_ids[] = {
> + { .compatible = "riscv,clint0" },
> + { }
> +};
> +
> +U_BOOT_DRIVER(sifive_clint) = {
> + .name = "sifive_clint",
> + .id = UCLASS_TIMER,
> + .of_match = sifive_clint_ids,
> + .probe = sifive_clint_probe,
> + .ops= _clint_ops,
> + .flags = DM_FLAG_PRE_RELOC,
> +};
> --
> 2.28.0
LGTM.
Other than that,
Reviewed-by: Rick Chen
> This matches the naming scheme of other timer drivers.
>
> Signed-off-by: Sean Anderson
> ---
>
> arch/riscv/cpu/ax25/Kconfig | 2 +-
> drivers/timer/Kconfig | 2 +-
> drivers/timer/Makefile | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Rick Chen
iles changed, 9 insertions(+), 8 deletions(-)
> rename arch/riscv/lib/andes_plmt.c => drivers/timer/andes_plmt_timer.c (100%)
Reviewed-by: Rick Chen
e the button status to decide which program to boot.
>
> Changes in v6:
> - New
>
> arch/riscv/dts/k210-maix-bit.dts | 11 +++
> 1 file changed, 11 insertions(+)
>
Reviewed-by: Rick Chen
efaults more closely
>
> arch/riscv/dts/k210-maix-bit.dts | 104 +++
> arch/riscv/dts/k210.dtsi | 12
> 2 files changed, 116 insertions(+)
>
Acked-by: Rick Chen
Hi Heinrich
> On 29.09.20 10:22, Rick Chen wrote:
> >> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> >> Sent: Sunday, September 27, 2020 7:21 AM
> >> To: Rick Jian-Zhi Chen(陳建志)
> >> Cc: Simon Glass; Sean Anderson; Bin Meng; u-boot@lists.denx.de;
Hi Tom
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Tuesday, September 29, 2020 7:57 PM
> To: Open Source Project uboot
> Cc: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志)
> Subject: Re: Pull request: u-boot-riscv/master 20200929
>
> On Tue, Sep 29, 2020 at 03:50:15PM +0800,
gt;t6);
> #endif
> }
> @@ -79,12 +79,12 @@ static void _exit_trap(ulong code, ulong epc, ulong tval,
> struct pt_regs *regs)
> printf("EPC: " REG_FMT " RA: " REG_FMT " TVAL: " REG_FMT "\n",
>epc, regs->ra, tval);
> if (gd-
Hi Heinrich
> On 28.09.20 09:45, Rick Chen wrote:
> >> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> >> Sent: Sunday, September 27, 2020 4:24 PM
> >> To: Rick Jian-Zhi Chen(陳建志)
> >> Cc: Simon Glass; Sean Anderson; Bin Meng; u-boot@lists.den
Heinrich Schuchardt
> ---
> v2:
> Saving and restoring the caller's x3 is already handled in mtrap.S.
> efi_loader.h provides an empty fallback efi_restore_gd() function
> if CONFIG_EFI_LOADER=n.
> ---
> arch/riscv/lib/interrupts.c | 3 +++
> 1 file changed, 3 insertions(+)
Reviewed-by: Rick Chen
Hi Sean
> This function is designed to be used when a timer used to be initialized by
> the cpu (e.g. RISC-V timers), but now is initialized by dm_timer_init. In
> such a case, the timer may prefer to use the clocks and clock-frequency
> properties, but should be able to fall back on using the
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Friday, September 25, 2020 2:31 PM
> To: Rick Jian-Zhi Chen(陳建志); Pragnesh Patel; U-Boot Mailing List
> Cc: Bin Meng
> Subject: Re: [PATCH 1/2] ram: sifive: Check return value on clk_enable()
>
> On Tue, Sep 15, 2020 at 4:05 PM Bin Meng wrote:
h | 15 +++
> 2 files changed, 40 insertions(+)
>
Reviewed-by: Rick Chen
---
> drivers/timer/Kconfig | 4 ++--
> drivers/timer/riscv_timer.c| 39 +-----
> 8 files changed, 25 insertions(+), 71 deletions(-)
> delete mode 100644 arch/riscv/lib/rdtime.c
>
Reviewed-by: Rick Chen
tion")
> Signed-off-by: Sean Anderson
> Reviewed-by: Bin Meng
>
> ---
>
> Changes in v3:
> - Clarify XIP comment
>
> Changes in v2:
> - Set gp early with XIP
>
> arch/riscv/cpu/start.S | 28 +---
> arch/riscv/lib/interrupts.c | 3 ++-
> 2 files changed, 27 insertions(+), 4 deletions(-)
>
Reviewed-by: Rick Chen
ipi_clear
> - Only compile dummy_pending_ipi_clear when SMP is enabled
>
> Changes in v2:
> - Make riscv_ipi_init_secondary_hart static
>
> arch/riscv/cpu/cpu.c | 20 ++++
> 1 file changed, 20 insertions(+)
>
Reviewed-by: Rick Chen
itialization" should implement
> the original intent of the reverted commit in a more robust manner.
>
> This reverts commit 9472630337e7c4ac442066b5a752aaa8c3b4d4a6.
>
> Signed-off-by: Sean Anderson
> Reviewed-by: Bin Meng
> ---
Reviewed-by: Rick Chen
ed, 17 insertions(+), 2 deletions(-)
>
Reviewed-by: Rick Chen
Hi Sean
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Sean Anderson
> Sent: Monday, September 14, 2020 10:23 PM
> To: u-boot@lists.denx.de
> Cc: Alan Quey-Liang Kao(高魁良); Leo Yu-Chi Liang(梁育齊); Heinrich Schuchardt; Bin
> Meng; Rick Chen; Sean Anderson
> Subj
u/start.S | 9 +++--
> 1 file changed, 3 insertions(+), 6 deletions(-)
>
Reviewed-by: Rick Chen
> On 9/15/20 5:15 AM, Rick Chen wrote:
> >> Even though we no longer call smp_function if an IPI was not sent by
> >> U-Boot, we still need to clear any IPIs which were pending from the
> >> execution environment. Otherwise, secondary harts will busy-wait in
>
> Even though we no longer call smp_function if an IPI was not sent by
> U-Boot, we still need to clear any IPIs which were pending from the
> execution environment. Otherwise, secondary harts will busy-wait in
> secondary_hart_loop, instead of relaxing.
>
> Signed-off-by: Sean Anderson
>
PIs
>
> arch/riscv/include/asm/smp.h | 7 +++
> arch/riscv/lib/smp.c | 16 ++--
> 2 files changed, 21 insertions(+), 2 deletions(-)
Reviewed-by: Rick Chen
scv: add option to wait for ack from secondary harts in
> smp functions")
> Signed-off-by: Sean Anderson
> Reviewed-by: Bin Meng
> ---
>
> (no changes since v1)
>
> arch/riscv/lib/smp.c | 2 ++
> 1 file changed, 2 insertions(+)
>
Reviewed-by: Rick Chen
> dif
Hi Sean
> On 9/9/20 5:01 AM, Rick Chen wrote:
> > Hi Sean
> >
> >> Hi Sean
> >>
> >>> Some IPIs may already be pending when U-Boot is started. This could be a
> >>> problem if a secondary hart tries to handle an IPI before
HI Sean
> On 9/11/20 10:45 AM, Bin Meng wrote:
> > On Fri, Sep 11, 2020 at 6:22 PM Sean Anderson wrote:
> >>
> >> On 9/11/20 3:38 AM, Bin Meng wrote:
> >>> Hi Sean,
> >>>
> >>> On Tue, Sep 8, 2020 at 2:17 AM Sean Anderson wrote:
>
> Clearing MIP doesn't do anything. Whoops. The
Hi Sean
> On 9/9/20 5:01 AM, Rick Chen wrote:
> > Hi Sean
> >
> >> Hi Sean
> >>
> >>> Some IPIs may already be pending when U-Boot is started. This could be a
> >>> problem if a secondary hart tries to handle an IPI before
Hi Sean
> On 9/8/20 10:02 PM, Rick Chen wrote:
> > Hi Sean
> >
> >> On the K210, the prior stage bootloader does not clear IPIs. This presents
> >> a problem, because U-Boot up until this point assumes (with one exception)
> >> that IPIs are cleared w
Hi Sean
> On 9/9/20 3:50 AM, Rick Chen wrote:
> > Hi Sean
> >
> >> Clearing MIP doesn't do anything. Whoops. The following commits should
> >> tackle this problem in a more robust manner.
> >
> > I still not catch your points about that this commit 9
Hi Sean
> Without these fences, it is perfectly valid for an out-of-order core to
> re-order memory accesses to outside of the available_harts_lock critical
> section.
>
> Signed-off-by: Sean Anderson
> ---
>
> arch/riscv/cpu/start.S | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Hi Sean
> Hi Sean
>
> > Some IPIs may already be pending when U-Boot is started. This could be a
> > problem if a secondary hart tries to handle an IPI before the boot hart has
> > initialized the IPI device.
> >
> > This commit uses NULL as a sentinel for secondary harts so they know when
> >
Hi Sean
> Some IPIs may already be pending when U-Boot is started. This could be a
> problem if a secondary hart tries to handle an IPI before the boot hart has
> initialized the IPI device.
>
> This commit uses NULL as a sentinel for secondary harts so they know when
> the IPI is initialized,
Hi Sean
> Clearing MIP doesn't do anything. Whoops. The following commits should
> tackle this problem in a more robust manner.
I still not catch your points about that this commit 947263033 really
help to fix pending IPIs not clean problem on k210 platform at that
time, but you just said it
Hi Sean
> On the K210, the prior stage bootloader does not clear IPIs. This presents
> a problem, because U-Boot up until this point assumes (with one exception)
> that IPIs are cleared when it starts. This series attempts to fix this in a
> robust manner, and fix several concurrency bugs I
[CONFIG_NR_CPUS];
> #endif
> diff --git a/arch/riscv/lib/andes_plmt.c b/arch/riscv/lib/andes_plmt.c
> index a7e90ca992..b0245d0b52 100644
> --- a/arch/riscv/lib/andes_plmt.c
> +++ b/arch/riscv/lib/andes_plmt.c
> @@ -1,6 +1,7 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
> * Co
ib/rdtime.c | 38
> drivers/timer/Kconfig | 6 +++---
> drivers/timer/riscv_timer.c | 39 +++--
> 5 files changed, 23 insertions(+), 69 deletions(-)
> delete mode 100644 arch/riscv/lib/rdtime.c
>
Reviewed-by: Rick Chen
iscv/lib/sifive_clint.c | 2 +-
> arch/riscv/lib/timer.c| 50 +++
> drivers/timer/riscv_timer.c | 2 +-
> 5 files changed, 54 insertions(+), 3 deletions(-)
> create mode 100644 arch/riscv/lib/timer.c
>
> --
Tested-by: Rick Chen
I
Hi Sean
> On 8/20/20 4:47 AM, Rick Chen wrote:
> > Hi Sean
> >
> >> Hi Sean
> >>
> >>> On 8/18/20 11:48 PM, Rick Chen wrote:
> >>>> Hi Tom
> >>>>
> >>>>> This patch adds the necessary configs and docs for
new parameter
>
> ---
>
> (no changes since v1)
>
> arch/riscv/lib/fdt_fixup.c | 2 +-
> include/fdtdec.h | 5 +++--
> lib/fdtdec.c | 10 --
> lib/optee/optee.c | 2 +-
> test/dm/fdtdec.c | 6 +++---
> 5 files changed, 16 insertions(+), 9 deletions(-)
Acked-by: Rick Chen
Pragnesh Patel
> ---
> cmd/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Rick Chen
lude/asm/sbi.h | 2 +
> arch/riscv/lib/sbi.c | 36
> cmd/Kconfig | 6 +++
> cmd/riscv/Makefile | 1 +
> cmd/riscv/sbi.c | 82
> 5 files changed, 127 insertions(+)
> create mode 100644 cmd/riscv/sbi.c
Reviewed-by: Rick Chen
Tested-by: Rick Chen
Hi Sean
> Hi Sean
>
> > On 8/18/20 11:48 PM, Rick Chen wrote:
> > > Hi Tom
> > >
> > >> This patch adds the necessary configs and docs for FPIOA and GPIO support
> > >> on the K210.
> > >>
> > >> The board does not boo
Hi Sean
> On 8/18/20 11:48 PM, Rick Chen wrote:
> > Hi Tom
> >
> >> This patch adds the necessary configs and docs for FPIOA and GPIO support
> >> on the K210.
> >>
> >> The board does not boot unless CONSOLE_LOGLEVEL is set to a non-defaul
t;info.size is of type 'size_t' but the length modifier is l.
> Fix this by casting priv->info.size. Note 'z' cannot be used as
> the modifier as SPL does not support that.
>
> Signed-off-by: Bin Meng
> ---
>
> drivers/ram/sifive/fu540_ddr.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Rick Chen
540/cache.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Rick Chen
Hi Tom
> This patch adds the necessary configs and docs for FPIOA and GPIO support
> on the K210.
>
> The board does not boot unless CONSOLE_LOGLEVEL is set to a non-default
> value . It also boots when the tree is dirty (and CONSOLE_LOGLEVEL is not
> changed). It also boots when changes are made
Hi Sean
> On 6/24/20 6:29 AM, Sean Anderson wrote:
> > This patch series adds support for pinmuxing, gpios, and leds on the Kendyte
> > K210.
> >
> > This patch series was previously part of
> > https://patchwork.ozlabs.org/project/uboot/list/?series=161576
> >
> > This patch series depends on
>
Hi Heinrich
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Heinrich
> Schuchardt
> Sent: Thursday, July 30, 2020 1:24 AM
> To: Sean Anderson
> Cc: u-boot@lists.denx.de; Heinrich Schuchardt
> Subject: [PATCH 1/1] doc: riscv: debug UART for MAIX
>
> Provide the required settings
ic fix_fdt() will change the size of
> FDT blob so it's safe to call reserve_fdt() after fix_fdt() otherwise global
> data (gd) will overwrite with FDT blob values.
>
> Fixes: a8492e25ac71 ("riscv: Expand the DT size before copy reserved memory
> node")
>
> Signed-off-by: P
Hi Heinrich
> On 8/6/20 9:07 AM, Rick Chen wrote:
> >> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Heinrich
> >> Schuchardt
> >> Sent: Wednesday, July 29, 2020 11:43 PM
> >> To: Sean Anderson
> >> Cc: Michal Simek; Tom Rini; Sim
v/dts/k210.dtsi | 1 -
> 1 file changed, 1 deletion(-)
>
Acked-by: Rick Chen
> 2 files changed, 47 insertions(+), 1 deletion(-)
Acked-by: Rick Chen
I am OK that this patch can be pulled via SPI tree.
Thanks,
Rick
>
> diff --git a/arch/riscv/dts/k210-maix-bit.dts
> b/arch/riscv/dts/k210-maix-bit.dts
> index e840e04ada..73892c6450 100644
> --- a/arch/ri
Hi Atish
> On Mon, Aug 10, 2020 at 10:30 PM Heinrich Schuchardt
> wrote:
> >
> > On 8/11/20 3:55 AM, Rick Chen wrote:
> > > Hi Heinrich
> > >
> > >> Am 9. August 2020 22:08:23 MESZ schrieb Atish Patra
> > >> :
> > >
Hi Heinrich
> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> Sent: Tuesday, August 11, 2020 11:57 AM
> To: Rick Jian-Zhi Chen(陳建志)
> Cc: Sean Anderson; Lukas Auer; Simon Glass; Anup Patel; Daniel Schwierzeck;
> u-boot@lists.denx.de; Heinrich Schuchardt
> Subject: [PATCH 1/1] riscv:
Hi Heinrich
> Am 9. August 2020 22:08:23 MESZ schrieb Atish Patra :
> >On Sat, Aug 8, 2020 at 9:17 AM Heinrich Schuchardt
> >wrote:
> >>
> >> On 8/8/20 5:32 PM, Sean Anderson wrote:
> >> > On 8/8/20 10:59 AM, Heinrich Schuchardt wrote:
> >> >> Hello Anup,
> >> >>
> >> >> I have looking at you
> On 07.08.20 10:33, Rick Chen wrote:
> >> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> >> Sent: Thursday, August 06, 2020 6:35 PM
> >> To: Rick Jian-Zhi Chen(陳建志)
> >> Cc: u-boot@lists.denx.de; Leo Yu-Chi Liang(梁育齊); Heinrich Schuchardt
WARNING: Possible new command - make sure you add a test
#142: FILE: cmd/riscv/exception.c:11:
Other than that,
Reviewed-by: Rick Chen
> diff --git a/cmd/riscv/exception.c b/cmd/riscv/exception.c index
> 3c8dbbec0e..9687cec812 100644
> --- a/cmd/riscv/exception.c
> +++ b/cmd/riscv/e
Hi Heinrich
> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> Sent: Thursday, August 06, 2020 6:45 PM
> To: Bin Meng; Rick Jian-Zhi Chen(陳建志)
> Cc: U-Boot Mailing List
> Subject: RISC-V: crash in riscv_get_time()
>
> Hello Rick, hello Bin,
>
> when I run qemu-riscv64_defconfig using
>
>
ct: [PATCH 3/6] riscv: load addresses for Sipeed MAIX
>
> Define default load addresses and the device tree name for the Sipeed MAIX.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> include/configs/sipeed-maix.h | 9 +
> 1 file changed, 9 insertions(+)
Acked-by: Rick Chen
ying MMC1\n",
> + boot_device);
> + return BOOT_DEVICE_MMC1;
> + }
> +}
> +
> +#ifdef CONFIG_SPL_LOAD_FIT
> +int board_fit_config_name_match(const char *name) {
> + /* boot using first FIT config */
> + return 0;
> +}
> +#endif
> --
WARNING: Use 'if (IS_ENABLED(CONFIG...))' instead of '#if or #ifdef'
where possible
#216: FILE: board/sifive/fu540/spl.c:82:
+#ifdef CONFIG_SPL_LOAD_FIT
LGTM.
Other than that,
Reviewed-by: Rick Chen
s option was enabled during the earlier U-Boot porting time. Now we
> already have the OTP driver in place and the unique MAC address is read from
> the OTP, there is no need to turn on this option.
>
> Signed-off-by: Bin Meng
> ---
>
> board/sifive/fu540/Kconfig | 1 -
> 1 file changed, 1 deletion(-)
Reviewed-by: Rick Chen
>
> From: Bin Meng
>
> All FU540 driver related options should be in the SoC level Kconfig.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/riscv/cpu/fu540/Kconfig | 22 ++
> board/sifive/fu540/Kconfig | 22 --
> 2 files changed, 2
+-
> 3 files changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Rick Chen
you can add the fix tag if it is caused by this.
Fixes: a8492e25ac71 ("riscv: Expand the DT size before copy reserved
memory node")
Reviewed-by: Rick Chen
> diff --git a/common/board_f.c b/common/board_f.c index 88ff0424a7..7ae01e9fff
> 100644
> --- a/common/board_f.c
> +++ b/co
Hi Heinrich
> >> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de]
> >> Sent: Tuesday, August 04, 2020 7:10 PM
> >> To: Rick Jian-Zhi Chen(陳建志)
> >> Cc: u-boot@lists.denx.de; Heinrich Schuchardt
> >> Subject: [PATCH 1/1] cmd: exception: unaligned data access on RISC-V
> >>
> >> The command
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