ivers seem to return.
Signed-off-by: Robert Marko
---
cmd/Kconfig | 6
cmd/Makefile | 1 +
cmd/temperature.c | 86 +++
3 files changed, 93 insertions(+)
create mode 100644 cmd/temperature.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index
On Tue, Aug 9, 2022 at 3:25 PM Sumit Garg wrote:
>
> Hi Robert,
>
> Thanks for your review.
>
> On Sat, 6 Aug 2022 at 13:11, Robert Marko wrote:
> >
> > On Thu, Aug 4, 2022 at 4:28 PM Sumit Garg wrote:
> > >
> > > Signed-off-by: Sumit Garg
tic const struct reset_ops qcom_reset_ops = {
>
> static const struct udevice_id qcom_reset_ids[] = {
> { .compatible = "qcom,gcc-reset-ipq4019" },
> + { .compatible = "qcom,gcc-reset-qcs404" },
> { }
> };
>
> --
> 2.25.1
>
--
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
1 Zagreb, Croatia
Email: robert.ma...@sartura.hr
Web: www.sartura.hr
uDPU like eDPU does not expose SCSI based peripherals like SATA nor PCI
and for sure it does not have the Intel E1000 PCI card.
So, like for eDPU remove those from the defconfig.
Signed-off-by: Robert Marko
---
configs/uDPU_defconfig | 7 +--
1 file changed, 1 insertion(+), 6 deletions
in defconfig for eDPU.
Signed-off-by: Robert Marko
---
configs/eDPU_defconfig | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig
index e2e593ad21..9c124bf147 100644
--- a/configs/eDPU_defconfig
+++ b/configs/eDPU_defconfig
@@ -32,7 +32,6
On Fri, Jun 3, 2022 at 11:42 AM Stefan Roese wrote:
>
> On 02.06.22 23:58, Pali Rohár wrote:
> > On Monday 23 May 2022 11:20:27 Pali Rohár wrote:
> >> On Monday 23 May 2022 11:18:23 Robert Marko wrote:
> >>> On Mon, May 23, 2022 at 10:20 AM Pali Rohár wrote:
&g
On Mon, May 23, 2022 at 10:20 AM Pali Rohár wrote:
>
> On Friday 20 May 2022 13:46:32 Robert Marko wrote:
> > Changes in v4:
> > * Remove CMD_PCI as PCI is disabled anyway
> >
> > Changes in v3:
> > * Use DTS-es pending merge upstream
> > * Re-enable S
I am currently maintaing the Methode uDPU and eDPU boards so add myself
as the maintainer for them.
Remove the old entry from board/Marvell/mvebu_armada-37xx/MAINTAINERS.
Signed-off-by: Robert Marko
---
Changes in v5:
* Remove entry from the board/Marvell/mvebu_armada-37xx/MAINTAINERS
into a common one.
Signed-off-by: Robert Marko
---
Changes in v4:
* Remove CMD_PCI as PCI is disabled anyway
Changes in v3:
* Use DTS-es pending merge upstream
* Re-enable SCSI as the Armada 37xx BOOT_TARGET_DEVICES defines SCSI device
as one of the bootable ones.
We dont have space constraints, so just
...@sartura.hr/
[3]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-6-robert.ma...@sartura.hr/
[4]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-7-robert.ma...@sartura.hr/
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-3720-uDPU.dts
On Fri, May 20, 2022 at 1:17 PM Stefan Roese wrote:
>
> On 20.05.22 13:12, Robert Marko wrote:
> > I am currently maintaing the Methode uDPU and eDPU boards so add myself
> > as the maintainer for them.
> >
> > Signed-off-by: Robert Marko
> > ---
> &g
into a common one.
Signed-off-by: Robert Marko
---
Changes in v4:
* Remove CMD_PCI as PCI is disabled anyway
Changes in v3:
* Use DTS-es pending merge upstream
* Re-enable SCSI as the Armada 37xx BOOT_TARGET_DEVICES defines SCSI device
as one of the bootable ones.
We dont have space constraints, so just
I am currently maintaing the Methode uDPU and eDPU boards so add myself
as the maintainer for them.
Signed-off-by: Robert Marko
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 56be0bfad0..3d72b0c11f 100644
--- a/MAINTAINERS
+++ b
...@sartura.hr/
[3]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-6-robert.ma...@sartura.hr/
[4]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-7-robert.ma...@sartura.hr/
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-3720-uDPU.dts
On Fri, May 20, 2022 at 1:01 PM Pali Rohár wrote:
>
> On Friday 20 May 2022 12:54:23 Robert Marko wrote:
> > Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
> >
> > They feature the same CPU, RAM, and storage as well as the form factor.
> >
>
On Mon, May 16, 2022 at 10:54 AM Stefan Roese wrote:
>
> On 16.05.22 10:52, Robert Marko wrote:
> > On Mon, May 16, 2022 at 8:40 AM Stefan Roese wrote:
> >>
> >> On 06.05.22 20:01, Robert Marko wrote:
> >>> Methode eDPU is an Armada
into a common one.
Signed-off-by: Robert Marko
---
Changes in v3:
* Use DTS-es pending merge upstream
* Re-enable SCSI as the Armada 37xx BOOT_TARGET_DEVICES defines SCSI device
as one of the bootable ones.
We dont have space constraints, so just re-enable SCSI rather than making
one more config header
I am currently maintaing the Methode uDPU and eDPU boards so add myself
as the maintainer for them.
Signed-off-by: Robert Marko
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 56be0bfad0..3d72b0c11f 100644
--- a/MAINTAINERS
+++ b
...@sartura.hr/
[3]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-6-robert.ma...@sartura.hr/
[4]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-7-robert.ma...@sartura.hr/
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-3720-uDPU.dts
On Mon, May 16, 2022 at 8:40 AM Stefan Roese wrote:
>
> On 06.05.22 20:01, Robert Marko wrote:
> > Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
> >
> > They feature the same CPU, RAM, and storage as well as the form factor.
> >
> > Howe
On Sat, May 7, 2022 at 4:03 PM Pali Rohár wrote:
>
> On Friday 06 May 2022 20:01:40 Robert Marko wrote:
> > Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
> >
> > They feature the same CPU, RAM, and storage as well as the form factor.
> >
>
into a common one.
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 ++
arch/arm/dts/armada-3720-eDPU.dts | 14 ++
arch/arm/dts/armada-3720-uDPU.dts | 153 +---
arch/arm/dts/armada-3720-uDPU.dtsi| 163
as it just uses SB pins as GPIO-s
and without them being registered networking won't work as it only has
one SFP slot and the TX disable GPIO is on the SB controller.
So, probe the pinctrl drivers using DM_FLAG_PROBE_AFTER_BIND like LED
uclass does.
Signed-off-by: Robert Marko
---
drivers/pinctrl
config like it did for other boards.
Fixes: 77fcf3cf1251 ("net: mvneta: Convert to use PHY_FIXED for fixed-link")
Signed-off-by: Robert Marko
---
configs/uDPU_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig
index f2852ad29b..f
config like it did for other boards.
Fixes: 77fcf3cf1251 ("net: mvneta: Convert to use PHY_FIXED for fixed-link")
Signed-off-by: Robert Marko
---
configs/uDPU_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig
index f2852ad29b..f
On Thu, Mar 24, 2022 at 11:12 AM Marek Behún wrote:
>
> On Thu, 24 Mar 2022 10:57:37 +0100
> Robert Marko wrote:
>
> > Add support for handling SFP TX disable for MVNETA in the same fashion as
> > to what MVPP2 is doing in order to enable using SFP-s.
> >
> &g
because Xenon driver does not
support HS400 currently
* Replace CONFIG_SPI_FLASH_BAR with CONFIG_SPI_FLASH_SFDP_SUPPORT
Utilize SFDP parsing instead of relying on the extended address registers
Signed-off-by: Robert Marko
---
configs/uDPU_defconfig | 10 --
1 file changed, 4 insertions
order for
it to get probed and thus register the SB GPIO bank, otherwise SB GPIO-s
are not registered at all.
Signed-off-by: Robert Marko
---
Changes in v2:
* Drop the custom SFP TX GPIO properties as they are parsed from the SFP
nodes now
arch/arm/dts/armada-3720-uDPU-u-boot.dts
Add support for handling SFP TX disable for MVNETA in the same fashion as
to what MVPP2 is doing in order to enable using SFP-s.
This allows using ethernet on SFP only boards.
Signed-off-by: Robert Marko
---
Changes in v3:
* Check whether the SFP node is enabled
Changes in v2:
* Parse
/
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-3720-uDPU.dts | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/armada-3720-uDPU.dts
b/arch/arm/dts/armada-3720-uDPU.dts
index 95d46e8d08..1f534c0c65 100644
--- a/arch/arm/dts/armada-3720
On Wed, Mar 23, 2022 at 11:25 PM Marek Behún wrote:
>
> On Wed, 23 Mar 2022 18:19:08 +0100
> Robert Marko wrote:
>
> > Add support for handling SFP TX disable for MVNETA in the same fashion as
> > to what MVPP2 is doing in order to enable using SFP-s.
> >
> &g
because Xenon driver does not
support HS400 currently
* Replace CONFIG_SPI_FLASH_BAR with CONFIG_SPI_FLASH_SFDP_SUPPORT
Utilize SFDP parsing instead of relying on the extended address registers
Signed-off-by: Robert Marko
---
configs/uDPU_defconfig | 10 --
1 file changed, 4 insertions
order for
it to get probed and thus register the SB GPIO bank, otherwise SB GPIO-s
are not registered at all.
Signed-off-by: Robert Marko
---
Changes in v2:
* Drop the custom SFP TX GPIO properties as they are parsed from the SFP
nodes now
arch/arm/dts/armada-3720-uDPU-u-boot.dts
Add support for handling SFP TX disable for MVNETA in the same fashion as
to what MVPP2 is doing in order to enable using SFP-s.
This allows using ethernet on SFP only boards.
Signed-off-by: Robert Marko
---
Changes in v2:
* Parse the standard SFP node for TX disable GPIO instead of using
/
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-3720-uDPU.dts | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/armada-3720-uDPU.dts
b/arch/arm/dts/armada-3720-uDPU.dts
index 95d46e8d08..1f534c0c65 100644
--- a/arch/arm/dts/armada-3720
On Wed, Mar 23, 2022 at 4:20 PM Marek Behún wrote:
>
> On Wed, 23 Mar 2022 14:39:01 +0100
> Robert Marko wrote:
>
> > Add support for handling SFP TX disable for MVNETA in the same fashion as
> > to what MVPP2 is doing in order to enable using SFP-s.
> >
> &g
because Xenon driver does not
support HS400 currently
* Replace CONFIG_SPI_FLASH_BAR with CONFIG_SPI_FLASH_SFDP_SUPPORT
Utilize SFDP parsing instead of relying on the extended address registers
Signed-off-by: Robert Marko
---
configs/uDPU_defconfig | 10 --
1 file changed, 4 insertions
Add support for handling SFP TX disable for MVNETA in the same fashion as
to what MVPP2 is doing in order to enable using SFP-s.
This allows using ethernet on SFP only boards.
Signed-off-by: Robert Marko
---
drivers/net/mvneta.c | 7 +++
1 file changed, 7 insertions(+)
diff --git
order for
it to get probed and thus register the SB GPIO bank, otherwise SB GPIO-s
are not registered at all.
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-3720-uDPU-u-boot.dtsi | 27 +++
1 file changed, 27 insertions(+)
diff --git a/arch/arm/dts/armada-3720-uDPU-u-boot.dtsi
/
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-3720-uDPU.dts | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/armada-3720-uDPU.dts
b/arch/arm/dts/armada-3720-uDPU.dts
index 95d46e8d08..1f534c0c65 100644
--- a/arch/arm/dts/armada-3720
On Mon, Mar 14, 2022 at 2:10 PM Tom Rini wrote:
>
> On Mon, Mar 14, 2022 at 06:37:02PM +0900, Jaehoon Chung wrote:
> > On 3/12/22 03:14, Robert Marko wrote:
> > > Generic SDHCI driver received support for checking the busy status by
> > > polling the DAT[0] level in
and CN9130 have non working eMMC currently.
So, until a better solution is found drop the wait_dat0 OP for Xenon.
I was able to only test it on A3720, but it should work for others as well.
Fixes: 40e6f52454fc ("drivers: mmc: Add wait_dat0 support for sdhci driver")
Signed-off-by: Ro
Hi Pali,
Sorry for the late reply.
As Marcel pointed out, we were relying on this script as kwboot just
wasn't working.
But if it can replace mrvl_uart.sh then I don't have an issue with
dropping it after it gets fixed.
Regards,
Robert
On Mon, 7 Feb 2022 at 10:02, Pali Rohár wrote:
>
> On
Currently the pxa3xx driver does not set the udevice in the mtd_info
struct and this prevents the mtd from parsing the partitions via DTS
like for SPI-NOR.
So simply set the mtd->dev to the driver udevice.
Signed-off-by: Robert Marko
---
drivers/mtd/nand/raw/pxa3xx_nand.c | 1 +
1 file chan
On Wed, Oct 27, 2021 at 10:34 PM Tom Rini wrote:
>
> On Wed, Oct 27, 2021 at 10:11:36PM +0200, Robert Marko wrote:
> > On Wed, Oct 27, 2021 at 10:07 PM Tom Rini wrote:
> > >
> > > On Wed, Oct 27, 2021 at 09:53:24PM +0200, Robert Marko wrote:
> > > > O
On Wed, Oct 27, 2021 at 10:07 PM Tom Rini wrote:
>
> On Wed, Oct 27, 2021 at 09:53:24PM +0200, Robert Marko wrote:
> > On Wed, Oct 27, 2021 at 9:48 PM Marek Behún wrote:
> > >
> > > On Wed, 27 Oct 2021 21:40:11 +0200
> > > Robert Marko wrote:
> >
On Wed, Oct 27, 2021 at 9:48 PM Marek Behún wrote:
>
> On Wed, 27 Oct 2021 21:40:11 +0200
> Robert Marko wrote:
>
> > To me, it also doesn't make sense to do it like that as what's the
> > purpose of having stuff that is completely unsupported in U-boot in
> > D
On Wed, Oct 27, 2021 at 8:32 PM Pali Rohár wrote:
>
> On Wednesday 27 October 2021 20:01:33 Robert Marko wrote:
> > Globalscale MOCHAbin is a Armada 7040 based development board.
> >
> > Specifications:
> > * Armada 7040 Quad core ARMv8 Cortex A-72 @ 1.4GHz
&
FP support for parsing module interface and reconfiguring the PHY.
Additionally, automatic import of the Marvell hw_info parameters is
enabled via the recently added mac command for Armada platforms.
The parameters stored in Marvell hw_info are usually the board serial
number and MAC addresses.
Signed-off-
-Boot parameters in mainline U-Boot
and reading the parameters written by this command in the stock U-Boot.
Support for this command is added for Marvell Armada A37XX and 7K/8K
devices.
Usage example:
=> mac read
=> saveenv
Signed-off-by: Luka Kovacic
Cc: Luka Perkov
Cc: Robert Marko
On Wed, Oct 27, 2021 at 4:04 PM Pali Rohár wrote:
>
> On Wednesday 27 October 2021 12:08:13 Robert Marko wrote:
> > Globalscale MOCHAbin is a Armada 7040 based development board.
> >
> > Specifications:
> > * Armada 7040 Quad core ARMv8 Cortex A-72 @ 1.4GHz
&
FP support for parsing module interface and reconfiguring the PHY.
Additionally, automatic import of the Marvell hw_info parameters is
enabled via the recently added mac command for Armada platforms.
The parameters stored in Marvell hw_info are usually the board serial
number and MAC addresses.
Signed-off-
-Boot parameters in mainline U-Boot
and reading the parameters written by this command in the stock U-Boot.
Support for this command is added for Marvell Armada A37XX and 7K/8K
devices.
Usage example:
=> mac read
=> saveenv
Signed-off-by: Luka Kovacic
Cc: Luka Perkov
Cc: Robert
FP support for parsing module interface and reconfiguring the PHY.
Additionally, automatic import of the Marvell hw_info parameters is
enabled via the recently added mac command for Armada platforms.
The parameters stored in Marvell hw_info are usually the board serial
number and MAC addresses.
Signed-off-
-Boot parameters in mainline U-Boot
and reading the parameters written by this command in the stock U-Boot.
Support for this command is added for Marvell Armada A37XX and 7K/8K
devices.
Usage example:
=> mac read
=> saveenv
Signed-off-by: Luka Kovacic
Cc: Luka Perkov
Cc: Robert
ere is no length argument stored.
They are really similar to the traditional U-boot env so you cant use
generic NVMEM cells and parse by position and length.
But I am sure that we can add a compatible for the hw_info parser and
then it can parse the reg property directly instead of using KConfig
for that
-Boot parameters in mainline U-Boot
and reading the parameters written by this command in the stock U-Boot.
Support for this command is added for Marvell Armada A37XX and 7K/8K
devices.
Usage example:
=> mac read
=> saveenv
Signed-off-by: Luka Kovacic
Cc: Luka Perkov
Cc: Robert
connected to the same PHY.
Additionally, automatic import of the Marvell hw_info parameters is
enabled via the recently added mac command for Armada platforms.
The parameters stored in Marvell hw_info are usually the board serial
number and MAC addresses.
Signed-off-by: Robert Marko
---
ar
t;)
Signed-off-by: Robert Marko
---
board/Marvell/mvebu_armada-8k/board.c | 20 +---
1 file changed, 1 insertion(+), 19 deletions(-)
diff --git a/board/Marvell/mvebu_armada-8k/board.c
b/board/Marvell/mvebu_armada-8k/board.c
index 7da5d9f96b..77c7dd7ab0 100644
--- a/board/Marvell/mv
itial iEi Puzzle-M801 support")
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-8040-puzzle-m801.dts | 36 ++--
1 file changed, 15 insertions(+), 21 deletions(-)
diff --git a/arch/arm/dts/armada-8040-puzzle-m801.dts
b/arch/arm/dts/armada-8040-puzzle-m801.dts
index
ts: Use a single dtsi for cp110 die
description")
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-8040.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/armada-8040.dtsi b/arch/arm/dts/armada-8040.dtsi
index 5123742b8d..eec5fa2774 100644
--- a/arch/arm
On Mon, Dec 14, 2020 at 6:22 PM Heinrich Schuchardt
wrote:
> On 23.10.20 02:29, Tom Rini wrote:
> > On Thu, Oct 08, 2020 at 10:05:13PM +0200, Robert Marko wrote:
> >> Add support for the hardware pseudo random number generator found in
> Qualcomm SoC-s.
> >
> >&
On Fri, Oct 23, 2020 at 10:54 AM Jagan Teki wrote:
>
> On Mon, Sep 14, 2020 at 7:04 PM Robert Marko wrote:
> >
> > According to the mx25l12805d datasheet it supports using 4K or 64K sectors.
> > So lets add the SECT_4K to enable 4K sector usage.
> >
> > Dat
On Wed, Oct 28, 2020 at 1:56 PM Robert Marko wrote:
>
> Lets convert the driver to use dev_read_addr() instead of the
> devfdt_get_addr().
>
> While we are here, lets also alphabetise the includes.
>
> Signed-off-by: Robert Marko
> Cc: Luka Perkov
> ---
> arch/ar
of the USB clocks to the driver.
Fixes: 430e1dcf ("IPQ40xx: Add USB nodes")
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/mach-ipq40xx/clock-ipq4019.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-ipq40xx/clock-ipq4019.c
b/arch/arm/mach-ipq40xx/c
return -EINVAL instead.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/mach-ipq40xx/clock-ipq4019.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-ipq40xx/clock-ipq4019.c
b/arch/arm/mach-ipq40xx/clock-ipq4019.c
index ac2b830353..7308563ad1 100644
There is no point in having break statements in the switch case as there is
already a return before break.
So lets drop them from the driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/mach-ipq40xx/clock-ipq4019.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm
Lets convert the driver to use dev_read_addr() instead of the devfdt_get_addr().
While we are here, lets also alphabetise the includes.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/mach-ipq40xx/clock-ipq4019.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Add support for the hardware pseudo random number generator found in Qualcomm
SoC-s.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 1 +
drivers/rng/Kconfig | 7 +++
drivers/rng/Makefile | 1 +
drivers/rng/msm_rng.c | 143
Since we now have the driver for Qualcomm PRNG HW, lets use it and add the
necessary clocks and nodes.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/dts/qcom-ipq4019.dtsi| 7 +++
arch/arm/mach-ipq40xx/clock-ipq4019.c | 4
2 files changed, 11 insertions(+)
diff
Since we have SPI driver for IPQ40xx QUP SPI controller, lets add the necessary
nodes, pinctrl and clocks.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/dts/qcom-ipq4019.dtsi | 12
arch/arm/mach-ipq40xx/clock-ipq4019.c | 17 +++--
arch/arm/mach
This patch adds support for the Qualcomm QUP SPI controller that is commonly
found in most of Qualcomm SoC-s.
Driver currently supports v1.1.1, v2.1.1 and v2.2.1 HW.
FIFO and Block modes are supported, no support for DMA mode is planned.
Signed-off-by: Robert Marko
Signed-off-by: Luka Kovacic
Lets add the necessary DTS node and pinctrl properties for newly added MDIO
driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/dts/qcom-ipq4019.dtsi | 28 +
arch/arm/mach-ipq40xx/pinctrl-ipq4019.c | 4
2 files changed, 32 insertions
This adds the driver for the IPQ40xx built-in MDIO.
This will be needed to support future PHY driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS| 1 +
drivers/net/Kconfig| 7 ++
drivers/net/Makefile | 1 +
drivers/net/mdio-ipq4019.c | 146
possible.
Signed-off-by: Robert Marko
Cc: Luka Perkov
Robert Marko (6):
spi: Add Qualcomm QUP SPI controller driver
IPQ40xx: Add SPI support
net: Add IPQ40xx MDIO driver
IPQ40xx: Add support for MDIO
rng: Add Qualcomm MSM PRNG driver
IPQ40xx: Add PRNG support
MAINTAINERS
According to the mx25l12805d datasheet it supports using 4K or 64K sectors.
So lets add the SECT_4K to enable 4K sector usage.
Datasheet:
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7321/MX25L12805D,%203V,%20128Mb,%20v1.2.pdf
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
drivers
There are drivers to support built in USB controller and PHY-s now, so lets add
the USB nodes to DTSI.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/dts/qcom-ipq4019.dtsi | 76 ++
1 file changed, 76 insertions(+)
diff --git a/arch/arm/dts/qcom
Lot of Qualcomm SoC-s use DWC3 controller for both USB2.0 and USB3.0
ports.
Qualcomm has some custom config registers on top of the generic ones,
but for host mode these are not needed.
So lets add the neccessary compatible string.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
drivers/usb
Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs.
The driver sets up HS and SS phys.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS| 1 +
drivers/phy/Kconfig| 6 ++
drivers/phy/Makefile | 1 +
drivers
On Qualcomm IPQ40xx SoC series, GCC clock IP also handles the resets.
So since this will be needed by further drivers, lets add a driver for the
reset controller.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 2 +
drivers/reset/Kconfig
Its common to use dt-bindings instead of hard-coding clocks or resets.
So lets use the imported Linux GCC bindings on IPQ40xx target.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/dts/qcom-ipq4019.dtsi| 3 ++-
arch/arm/mach-ipq40xx/clock-ipq4019.c | 4 +++-
2 files changed
Import Qualcomm IPQ4019 GCC bindings from Linux.
This will enable using bindings instead of raw clock numbers both in the driver
and DTS like Linux does.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 1 +
include/dt-bindings/clock/qcom,ipq4019
There is already existing driver for SMEM so lets enable it for IPQ40xx as well.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/Kconfig | 2 ++
arch/arm/dts/qcom-ipq4019.dtsi | 5 +
drivers/smem/Kconfig | 2 +-
3 files changed, 8 insertions(+), 1 deletion
Since we have a driver for the reset controller, lets add the necessary node.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/Kconfig | 1 +
arch/arm/dts/qcom-ipq4019.dtsi | 9 +
2 files changed, 10 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
This patch series builds on the previously merged basic
Qualcomm IPQ40xx series support.
v3 series drops custom USB driver and instead uses existing
DWC3 generic driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
Robert Marko (8):
dt-bindings: clock: import Qualcomm IPQ4019 bindings
On Thu, Sep 10, 2020 at 3:30 PM Tom Rini wrote:
>
> On Tue, Sep 01, 2020 at 07:23:00PM +0200, Robert Marko wrote:
>
> > PHY handling functions should depend also on CONFIG_USB_DWC3 aka DM DWC3
> > version.
> > Otherwise when using the non DM version
On Thu, Sep 10, 2020 at 3:37 PM Marek Vasut wrote:
>
> On 9/10/20 3:30 PM, Tom Rini wrote:
> > On Tue, Sep 01, 2020 at 07:23:01PM +0200, Robert Marko wrote:
> >
> >> Add driver for Qualcomm DWC3 based dual role xHCI USB controller.
> >> Currently tested
On Thu, Sep 10, 2020 at 3:30 PM Tom Rini wrote:
>
> On Thu, Sep 10, 2020 at 01:09:00PM +0200, Robert Marko wrote:
>
> > This patch series builds on the previously merged basic
> > Qualcomm IPQ40xx series support.
> >
> > v2 series drops custom USB driver and inste
Lot of Qualcomm SoC-s use DWC3 controller for both USB2.0 and USB3.0
ports.
Qualcomm has some custom config registers on top of the generic ones,
but for host mode these are not needed.
So lets add the neccessary compatible string.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
drivers/usb
Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs.
The driver sets up HS and SS phys.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS| 1 +
drivers/phy/Kconfig| 6 ++
drivers/phy/Makefile | 1 +
drivers
There are drivers to support built in USB controller and PHY-s now, so lets add
the USB nodes to DTSI.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/dts/qcom-ipq4019.dtsi | 76 ++
1 file changed, 76 insertions(+)
diff --git a/arch/arm/dts/qcom
This patch series builds on the previously merged basic
Qualcomm IPQ40xx series support.
v2 series drops custom USB driver and instead uses existing
DWC3 generic driver.
Signed-off-by: Robert Marko
Cc: Luka Perkov
Robert Marko (8):
dt-bindings: clock: import Qualcomm IPQ4019 bindings
There is already existing driver for SMEM so lets enable it for IPQ40xx as well.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/Kconfig | 2 ++
arch/arm/dts/qcom-ipq4019.dtsi | 5 +
drivers/smem/Kconfig | 2 +-
3 files changed, 8 insertions(+), 1 deletion
Since we have a driver for the reset controller, lets add the necessary node.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/Kconfig | 1 +
arch/arm/dts/qcom-ipq4019.dtsi | 9 +
2 files changed, 10 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
On Qualcomm IPQ40xx SoC series, GCC clock IP also handles the resets.
So since this will be needed by further drivers, lets add a driver for the
reset controller.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 2 +
drivers/reset/Kconfig
Its common to use dt-bindings instead of hard-coding clocks or resets.
So lets use the imported Linux GCC bindings on IPQ40xx target.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/dts/qcom-ipq4019.dtsi| 3 ++-
arch/arm/mach-ipq40xx/clock-ipq4019.c | 4 +++-
2 files changed
Import Qualcomm IPQ4019 GCC bindings from Linux.
This will enable using bindings instead of raw clock numbers both in the driver
and DTS like Linux does.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS | 1 +
include/dt-bindings/clock/qcom,ipq4019
There are drivers to support built in USB controller and PHY-s now, so lets add
the USB nodes to DTSI.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/dts/qcom-ipq4019.dtsi | 50 ++
1 file changed, 50 insertions(+)
diff --git a/arch/arm/dts/qcom
PHY handling functions should depend also on CONFIG_USB_DWC3 aka DM DWC3
version.
Otherwise when using the non DM version with PHY subsystem enabled there will
be a linking error due to missing dwc3_setup_phy and dwc3_shutdown_phy.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
include/dwc3
Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs.
The driver sets up HS and SS phys.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
MAINTAINERS| 1 +
drivers/phy/Kconfig| 6 ++
drivers/phy/Makefile | 1 +
drivers
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