and their Mask like:
cpu_dsp_mask, cpu_num_dspcores etc same as that of PowerPC
(5) Code to fetch and print SC cores and other heterogenous
device's frequencies
(6) README added for the same
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/cpu/mpc85xx/cpu.c
and their Mask like:
cpu_dsp_mask, cpu_num_dspcores etc same as that of PowerPC
(5) Code to fetch and print SC cores and other heterogenous
device's frequencies
(6) README added for the same
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
chnages in v2:
Incorporated review
(3) APIs to get DSP num cores and their Mask like:
cpu_dsp_mask, cpu_num_dspcores etc same as that of PowerPC
(5) Code to fetch and print SC cores and other heterogenous
device's frequencies
(6) README added for the same
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch
B4860, B4440, B4420 and B4220 have MAPLE, so enable law creation
for them only
Remove static LAW creation for MAPLE
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Sandeep Singh sand...@freescale.com
Change-Id: I1d1d6e414617bb45ade5e5ab9134f0464763c034
Reviewed-on: http
Add the support of newly added LC VCO SerDes protocols
for configuration of IDT and VSC crossbar
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
Change-Id: I16ad23e2cbea3b0a232a153984d5126bc79ddd26
Reviewed-on: http
Addded Alternate options with LC VCO for following protocols:
0x02 -- 0x01
0x08 -- 0x07
0x18 -- 0x17
0x1E -- 0x1D
0x49 -- 0x48
0x6F -- 0x6E
0x9A -- 0x99
0x9E -- 0x9D
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.comi
Change-Id
Defines in B4860QDS.h file
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
Signed-off-by: Suresh Gupta suresh.gu...@freescale.com
Change-Id: I4d9a8c602bdaac8404577ab9642f8c5f37ac7cdc
Reviewed-on: http://git.am.freescale.net:8181/23353
Addded Alternate options with LC VCO for following protocols:
0x02 -- 0x01
0x08 -- 0x07
0x18 -- 0x17
0x1E -- 0x1D
0x49 -- 0x48
0x6F -- 0x6E
0x9A -- 0x99
0x9E -- 0x9D
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
Change-Id
Addded Alternate options with LC VCO for following protocols:
0x02 -- 0x01
0x08 -- 0x07
0x18 -- 0x17
0x1E -- 0x1D
0x49 -- 0x48
0x6F -- 0x6E
0x9A -- 0x99
0x9E -- 0x9D
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.comi
Change-Id
Add the support of newly added LC VCO SerDes protocols
for configuration of IDT and VSC crossbar
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
Change-Id: I16ad23e2cbea3b0a232a153984d5126bc79ddd26
Reviewed-on: http
Defines in B4860QDS.h file
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
Signed-off-by: Suresh Gupta suresh.gu...@freescale.com
Change-Id: I4d9a8c602bdaac8404577ab9642f8c5f37ac7cdc
Reviewed-on: http://git.am.freescale.net:8181/23353
sufficient ticks to work well
with slower devices
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
---
drivers/i2c/fsl_i2c.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c
and their Mask like:
cpu_dsp_mask, cpu_num_dspcores etc same as that of PowerPC
(5) Code to fetch and print SC cores and other heterogenous
device's frequencies
(6) README added for the same
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/cpu/mpc85xx/cpu.c| 25
CPC1 is not being enabled by default as powerpc is supposed to
use only CPC2.
Though by editing hwconfig en_cpc option,
CPC1 can also be enabled
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Sandeep Singh sand...@freescale.com
---
Tested on B4860QDS
Changes in V2
One of the I2C EEPROM is used to store/save and edit mac
addresses of ports.
this patch add required CONFIG to support the same
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
include/configs/B4860QDS.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include
CPC1 is not being enabled by default as powerpc is supposed to
use only CPC2.
Though by editing hwconfig en_cpc option,
CPC1 can also be enabled
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Sandeep Singh sand...@freescale.com
---
include/configs/B4860QDS.h | 11
CPC1 is not being enabled by default as powerpc is supposed to
use only CPC2.
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Sandeep Singh sand...@freescale.com
---
include/configs/B4860QDS.h |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git
-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Sandeep Singh sand...@freescale.com
---
arch/powerpc/cpu/mpc85xx/cpu_init.c | 27 +++
1 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/cpu/mpc85xx/cpu_init.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c
b/arch/powerpc/cpu/mpc85xx
to work fine for all temperature ranges.
This workaround is valid for B4, T4 and T2 platforms, so
added in their config.
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c |3 +
arch
B4460 differs from B4860 only in number of CPU cores,
hence used existing support for B4860.
B4460 has 2 PPC cores whereas B4860 has 4 PPC cores.
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Sandeep Singh sand...@freescale.com
Signed-off-by: Poonam Aggrwal poonam.aggr
) transactions are currently supportd in the
i2c driver using i2c_read and i2c_write APIs. I2C EEPROMs,
RTC, etc fall in this category.
To handle type (2) along with type (1) transactions,
i2c_read() function has been modified.
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Poonam
) transactions are currently supportd in the
i2c driver using i2c_read and i2c_write APIs. I2C EEPROMs,
RTC, etc fall in this category.
To handle type (2) along with type (1) transactions,
i2c_read() function has been modified.
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Poonam
Adds Support for PowerOne ZM7300 voltage regulator.
This device is available on some Freescale Boards like B4860QDS
and has to be programmed to adjust the voltage on the board.
The device is accessible via I2C interface.
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Poonam
Adds Support for PowerOne ZM7300 voltage regulator.
This device is available on some Freescale Boards like B4860QDS
and has to be programmed to adjust the voltage on the board.
The device is accessible via I2C interface.
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Poonam
To handle the case:
Negative equivalent of length has been passed and
interpreted accordinglt and txdata is being passed in
rxdata buffer
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
---
drivers/i2c/fsl_i2c.c | 40
regulator.
B4860QDS has a PowerOne ZM7300 programmable digital Power Manager which
is programmed as per the value read from the fuses.
Reference for this code is taken from t4qds VID implementation.
Signed-off-by: Shaveta Leekha shav...@freescale.com
Signed-off-by: Poonam Aggrwal poonam.aggr
associated data,
similarly Rxdata could be command status plus some data received
as a response to the command sent.
i2c_write_read() function provides support for such transactions
(multiple bytes write followed by read)
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
Signed-off-by: Shaveta
Aurora, CPRI and SGMIIs to work together properly
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/cpu/mpc85xx/b4860_serdes.c | 32 +
board/freescale/b4860qds/b4860qds.c | 75 -
board/freescale/b4860qds/b4860qds_crossbar_con.h
- B4860 has two PLL per SerDes whereas B4420 has one PLL
per SerDes, add their defines in
arch/powerpc/include/asm/config_mpc85xx.h
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/include/asm/config_mpc85xx.h |2 ++
1 files changed, 2 insertions(+), 0
- Change setting of SerDes2 refclk2 to have the default value
as it is coming on board that is 156.25MHz, for XFI to work
- Also change PLL_NUM variable to the one defined in
config_mpc85xx.h for B4860 and B4420
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
board
.
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/cpu/mpc85xx/cmd_errata.c |8 ++
arch/powerpc/include/asm/config_mpc85xx.h |2 +
arch/powerpc/include/asm/immap_85xx.h | 19 +++-
board/freescale/b4860qds/b4860qds.c | 193 +
4
SerDes refclks configuration
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/include/asm/immap_85xx.h |3 +
board/freescale/b4860qds/b4860qds.c | 119 ++---
2 files changed, 113 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include
Also change the define name SRDS_RSTCTL_SDPD to
SRDS_RSTCTL_SDEN, which stands for SerDes enable
as mentioned in SerDes module guide
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/include/asm/immap_85xx.h |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff
It allows files not in the same path to use this function
as required by B4 board file
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.h |1 -
arch/powerpc/include/asm/fsl_serdes.h |1 +
2 files changed, 1 insertions(+), 1
make on board SGMIIs to work
3) Add I2C addresses for IDT8T49N222A devices in board/include file
4) Add define for PCA-I2C bus multiplexer, on which IDT devices exist
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
board/freescale/b4860qds/b4860qds.c | 112
of output
frequencies.
- In B4860QDS, it has been used to generate different refclks to SerDes
modules
- Programming of these devices are performed by I2C interface.
Signed-off-by: Shaveta Leekha shav...@freescale.com
---
board/freescale/common/Makefile |1 +
board
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