From: Jeong-Hyeon Kim jh...@insignal.co.kr
spl tool of exynos5 designed only for smdk5250.
It compiled when defined CONFIG_SMDK5250 and BOARD name is smdk5250.
It means that it's not considered shrink boards with different board name.
So, it changed compile condition to exynos5 family option
not
From: Jeong-Hyeon Kim jh...@insignal.co.kr
Exynos SoC series are various and cover the different range of MCLK.
Several clock setting is based on MPLL, but it's to easy change depend on board
configuration.
So, common setting of clock need for cover the various type of memory.
System clock
From: Jeong-Hyeon Kim jh...@insignal.co.kr
- Fixed MPLL register address
It's different between Exynos4210 and Exynos4412.
- Added pinmux functions for Exynos4
- Added extended gpios for Exynos4412
Exynos4412 has more gpios than Exynos4210.
Signed-off-by: Jeong-Hyeon Kim
From: Jeong-Hyeon Kim jh...@insignal.co.kr
Origen QUAD board is based on Samsung Exynos4412 SoC.
Signed-off-by: Jeong-Hyeon Kim jh...@insignal.co.kr
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board/insignal/origen_quad/Makefile| 63 ++
board/insignal/origen_quad/boot.c | 63 ++
From: Jeong-Hyeon Kim jh...@insignal.co.kr
- Fixed MPLL register address
It's different between Exynos4210 and Exynos4412.
- Added pinmux functions for Exynos4
- Added extended gpios for Exynos4412
Exynos4412 has more gpios than Exynos4210.
Signed-off-by: Jeong-Hyeon Kim
From: Jeong-Hyeon Kim jh...@insignal.co.kr
Origen QUAD board is based on Samsung Exynos4412 SoC.
Signed-off-by: Jeong-Hyeon Kim jh...@insignal.co.kr
---
board/insignal/origen_quad/Makefile| 63 ++
board/insignal/origen_quad/boot.c | 63 ++
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