Re: [U-Boot] [RFC PATCH] fpga: zynq: Add encrypted bitstream support with auto detect

Hi Siva, > -Ursprüngliche Nachricht- > Von: Siva Durga Prasad Paladugu [mailto:siva...@xilinx.com] > Gesendet: Montag, 11. Juni 2018 13:40 > An: ste...@herbrechtsmeier.net > Cc: Herbrechtsmeier Dr.-Ing. , Stefan > ; u-boot@lists.denx.de; > Michal Simek ; mon...@monstr.eu > Betreff: RE:

Re: [U-Boot] [PATCH v2 00/10] zynq: clk: Move zynq platform to clock framework

> -Ursprüngliche Nachricht- > Von: Michal Simek [mailto:michal.si...@xilinx.com] > > On 17.2.2017 10:21, Michal Simek wrote: > > On 17.2.2017 08:33, stefan.herbrechtsme...@weidmueller.com wrote: > >> Hi Michal, > >> > >>> -Ursprüngliche Nachricht- > >>> Von: Michal Simek

Re: [U-Boot] [PATCH v2 00/10] zynq: clk: Move zynq platform to clock framework

Hi Michal, > -Ursprüngliche Nachricht- > Von: Michal Simek [mailto:michal.si...@xilinx.com] > > > Hi Stefan, > > On 6.2.2017 11:14, stefan.herbrechtsme...@weidmueller.com wrote: > > Hi Michal, > > > >> -Ursprüngliche Nachricht- > >> Von: stefan.herbrechtsme...@weidmueller.com >

Re: [U-Boot] [PATCH v2 00/10] zynq: clk: Move zynq platform to clock framework

Hi Michal, > -Ursprüngliche Nachricht- > Von: stefan.herbrechtsme...@weidmueller.com > > The old platform clock driver use a dynamic array which is filled at > every boot with static clock tree information and unused clock rates. > This needs much memory and complicates the strip down

[U-Boot] [PATCH v2 00/10] zynq: clk: Move zynq platform to clock framework

From: Stefan Herbrechtsmeier The old platform clock driver use a dynamic array which is filled at every boot with static clock tree information and unused clock rates. This needs much memory and complicates the strip down for the SPL. The new clock

[U-Boot] [PATCH v2 10/10] mmc: zynq: Add fdt max-frequency support

From: Stefan Herbrechtsmeier The maximum supported peripheral clock frequency of the zynq depends on the IO routing. The MIO and EMIO support a maximum frequency of 50 MHz respectively 25 MHz. Use the max-frequency value of the device tree to determine the

[U-Boot] [PATCH v2 09/10] mmc: zynq: Determine base clock frequency via clock framework

From: Stefan Herbrechtsmeier The zynq_sdhci controller driver use CONFIG_ZYNQ_SDHCI_MAX_FREQ as base clock frequency but this clock is not fixed and depends on the hardware configuration. Additionally the value of CONFIG_ZYNQ_SDHCI_MAX_FREQ doesn't match

[U-Boot] [PATCH v2 07/10] zynq: Move zynq to clock framework

From: Stefan Herbrechtsmeier Move the zynq to clock framework and remove unused functions as well as the CONFIG_ZYNQ_PS_CLK_FREQ configuration. Signed-off-by: Stefan Herbrechtsmeier --- Changes in v2: - Add

[U-Boot] [PATCH v2 08/10] clk: zynq: Add optional ethernet emio clock source support

From: Stefan Herbrechtsmeier Add support for the optional ethernet emio clock source to the zynq clock framework driver. Signed-off-by: Stefan Herbrechtsmeier --- Changes in v2: - Return a error and print a debug

[U-Boot] [PATCH v2 06/10] clk: zynq: Add zynq clock framework driver

From: Stefan Herbrechtsmeier Add a clock framework driver for the zynq platform. The driver is based on the platform zynq clock driver but reworked to use static functions instead of run-time generated objects even for unused clocks. Additionally the

[U-Boot] [PATCH v2 04/10] zynq: Move static clock names into separate array

From: Stefan Herbrechtsmeier The clock names are static and correspond to the clock id. Separate them from the dynamic filled clock array. Signed-off-by: Stefan Herbrechtsmeier Reviewed-by: Michal Simek

[U-Boot] [PATCH v2 05/10] zynq: Remove zynq_clk_get_name function

From: Stefan Herbrechtsmeier The zynq_clk_get_name function is only used once inside the clock driver. Replace the function call with the one-line code. Signed-off-by: Stefan Herbrechtsmeier Reviewed-by: Michal

[U-Boot] [PATCH v2 03/10] zynq: Add clk framework support to zynq timer

From: Stefan Herbrechtsmeier If available use the clock framework to calculate the clock rate of the zynq timer. Signed-off-by: Stefan Herbrechtsmeier --- Changes in v2: None arch/arm/mach-zynq/timer.c | 25

[U-Boot] [PATCH v2 01/10] net: zynq: Don't overwrite gem_rclk_ctrl with default value

From: Stefan Herbrechtsmeier The gem[0-1]_rclk_ctrl registers control the source of the rx clock, control and data signals and configure via ps7_init function. Don't overwrite the register with the default value. Signed-off-by: Stefan Herbrechtsmeier

[U-Boot] [PATCH v2 02/10] net: zynq: Add clk framework support to zynq ethernet driver

From: Stefan Herbrechtsmeier If available use the clock framework to set the tx clock rate of the zynq ethernet controller. Signed-off-by: Stefan Herbrechtsmeier --- Changes in v2: - Rebase

[U-Boot] [PATCH v4 0/1] mmc: sdhci: Add support for frequency constrained peripheral interfaces

From: Stefan Herbrechtsmeier The sdhci controller assumes that the base clock frequency is fully supported by the peripheral and doesn't support hardware limitations. Distinguish between base clock of the host controller and maximal supported peripheral

[U-Boot] [PATCH v4] mmc: sdhci: Distinguish between base clock and maximum peripheral frequency

From: Stefan Herbrechtsmeier The sdhci controller assumes that the base clock frequency is fully supported by the peripheral and doesn't support hardware limitations. The Linux kernel distinguishes between base clock (max_clk) of the host controller and

Re: [U-Boot] [PATCH 2/8] net: zynq: Add clk framework support to zynq ethernet driver

> -Ursprüngliche Nachricht- > Von: Michal Simek [mailto:michal.si...@xilinx.com] > Gesendet: Mittwoch, 11. Januar 2017 09:22 > > On 11.1.2017 08:30, stefan.herbrechtsme...@weidmueller.com wrote: > >> -Ursprüngliche Nachricht- > >> Von: Michal Simek [mailto:mon...@monstr.eu] > >>

Re: [U-Boot] [PATCH v3 3/4] mmc: zynq: Determine base clock frequency via clock framework

> -Ursprüngliche Nachricht- > Von: Michal Simek [mailto:michal.si...@xilinx.com] > Gesendet: Dienstag, 10. Januar 2017 16:39 > > On 10.1.2017 15:05, stefan.herbrechtsme...@weidmueller.com wrote: > > Hi Michal, > > > >> -Ursprüngliche Nachricht- > >> Von: Michal Simek

Re: [U-Boot] [PATCH 2/8] net: zynq: Add clk framework support to zynq ethernet driver

> -Ursprüngliche Nachricht- > Von: Michal Simek [mailto:mon...@monstr.eu] > Gesendet: Dienstag, 10. Januar 2017 16:23 > > On 10.1.2017 15:46, stefan.herbrechtsme...@weidmueller.com wrote: > >> -Ursprüngliche Nachricht- > >> Von: Michal Simek [mailto:mon...@monstr.eu] > >>

Re: [U-Boot] [PATCH 6/8] clk: zynq: Add zynq clock framework driver

> -Ursprüngliche Nachricht- > Von: Michal Simek [mailto:mon...@monstr.eu] > Gesendet: Dienstag, 10. Januar 2017 15:57 > > +Soren > > On 4.1.2017 13:27, stefan.herbrechtsme...@weidmueller.com wrote: > > From: Stefan Herbrechtsmeier > > > > Add a

Re: [U-Boot] [PATCH 3/8] zynq: Add clk framework support to zynq timer

> -Ursprüngliche Nachricht- > Von: Michal Simek [mailto:mon...@monstr.eu] > Gesendet: Dienstag, 10. Januar 2017 15:10 > An: Herbrechtsmeier, Stefan; u-boot@lists.denx.de > Cc: Albert Aribaud; Herbrechtsmeier, Stefan > Betreff: Re: [PATCH 3/8] zynq: Add clk framework support to zynq timer >

Re: [U-Boot] [PATCH 2/8] net: zynq: Add clk framework support to zynq ethernet driver

> -Ursprüngliche Nachricht- > Von: Michal Simek [mailto:mon...@monstr.eu] > Gesendet: Dienstag, 10. Januar 2017 14:59 > An: Herbrechtsmeier, Stefan; u-boot@lists.denx.de > Cc: Herbrechtsmeier, Stefan; Albert Aribaud; Michal Simek; Joe > Hershberger > Betreff: Re: [PATCH 2/8] net: zynq: Add

Re: [U-Boot] [PATCH 1/8] net: zynq: Don't overwrite gem_rclk_ctrl with default value

Hi Michal, > -Ursprüngliche Nachricht- > Von: Michal Simek [mailto:mon...@monstr.eu] > Gesendet: Dienstag, 10. Januar 2017 14:53 > An: Herbrechtsmeier, Stefan; u-boot@lists.denx.de > Cc: Herbrechtsmeier, Stefan; Michal Simek; Jagan Teki; Albert Aribaud; > Joe Hershberger; Mike Looijmans >

Re: [U-Boot] [PATCH v3 3/4] mmc: zynq: Determine base clock frequency via clock framework

Hi Michal, > -Ursprüngliche Nachricht- > Von: Michal Simek [mailto:michal.si...@xilinx.com] > Gesendet: Dienstag, 10. Januar 2017 14:30 > An: Herbrechtsmeier, Stefan; michal.si...@xilinx.com; > jh80.ch...@samsung.com; u-boot@lists.denx.de > Cc: s...@chromium.org; mon...@monstr.eu;

Re: [U-Boot] [PATCH v3 3/4] mmc: zynq: Determine base clock frequency via clock framework

Hi Michael > -Ursprüngliche Nachricht- > Von: Michal Simek [mailto:michal.si...@xilinx.com] > Gesendet: Dienstag, 6. Dezember 2016 13:59 > An: Jaehoon Chung; Herbrechtsmeier, Stefan; u-boot@lists.denx.de > Cc: Michal Simek; Simon Glass; Albert Aribaud; Michal Simek; Stephen > Warren >

[U-Boot] [PATCH 8/8] clk: zynq: Add optional ethernet emio clock source support

From: Stefan Herbrechtsmeier Add support for the optional ethernet emio clock source to the zynq clock framework driver. Signed-off-by: Stefan Herbrechtsmeier --- drivers/clk/clk_zynq.c | 33

[U-Boot] [PATCH 6/8] clk: zynq: Add zynq clock framework driver

From: Stefan Herbrechtsmeier Add a clock framework driver for the zynq platform. The driver is based on the platform zynq clock driver but reworked to use static functions instead of run-time generated objects even for unused clocks. Additionally the

[U-Boot] [PATCH 7/8] zynq: Move zynq to clock framework

From: Stefan Herbrechtsmeier Move the zynq to clock framework and remove unused functions as well as the CONFIG_ZYNQ_PS_CLK_FREQ configuration. Signed-off-by: Stefan Herbrechtsmeier --- arch/arm/Kconfig

[U-Boot] [PATCH 5/8] zynq: Remove zynq_clk_get_name function

From: Stefan Herbrechtsmeier The zynq_clk_get_name function is only used once inside the clock driver. Replace the function call with the one-line code. Signed-off-by: Stefan Herbrechtsmeier ---

[U-Boot] [PATCH 4/8] zynq: Move static clock names into separate array

From: Stefan Herbrechtsmeier The clock names are static and correspond to the clock id. Separate them from the dynamic filled clock array. Signed-off-by: Stefan Herbrechtsmeier --- arch/arm/mach-zynq/clk.c | 121

[U-Boot] [PATCH 3/8] zynq: Add clk framework support to zynq timer

From: Stefan Herbrechtsmeier If available use the clock framework to calculate the clock rate of the zynq timer. Signed-off-by: Stefan Herbrechtsmeier --- arch/arm/mach-zynq/timer.c | 25 +

[U-Boot] [PATCH 2/8] net: zynq: Add clk framework support to zynq ethernet driver

From: Stefan Herbrechtsmeier If available use the clock framework to set the tx clock rate of the zynq ethernet controller. Signed-off-by: Stefan Herbrechtsmeier --- arch/arm/include/asm/arch-zynqmp/sys_proto.h |

[U-Boot] [PATCH 1/8] net: zynq: Don't overwrite gem_rclk_ctrl with default value

From: Stefan Herbrechtsmeier The gem[0-1]_rclk_ctrl registers control the source of the rx clock, control and data signals and configure via ps7_init function. Don't overwrite the register with the default value. Signed-off-by: Stefan Herbrechtsmeier

[U-Boot] [PATCH 0/8] zynq: clk: Move zynq platform to clock framework

From: Stefan Herbrechtsmeier The old platform clock driver use a dynamic array which is filled at every boot with static clock tree information and unused clock rates. This needs much memory and complicates the strip down for the SPL. The new clock

Re: [U-Boot] [PATCH v3 0/4] mmc: sdhci: Add support for frequency constrained peripheral interfaces

Hi, > -Ursprüngliche Nachricht- > Von: Jaehoon Chung [mailto:jh80.ch...@samsung.com] > > On 12/02/2016 10:24 PM, stefan.herbrechtsme...@weidmueller.de wrote: > > From: Stefan Herbrechtsmeier > > > > > > The sdhci controller assumes that the base

[U-Boot] [PATCH v3 4/4] mmc: zynq: Add fdt max-frequency support

From: Stefan Herbrechtsmeier The maximum supported peripheral clock frequency of the zynq depends on the IO routing. The MIO and EMIO support a maximum frequency of 50 MHz respectively 25 MHz. Use the max-frequency value of the device tree to determine the

[U-Boot] [PATCH v3 3/4] mmc: zynq: Determine base clock frequency via clock framework

From: Stefan Herbrechtsmeier The zynq_sdhci controller driver use CONFIG_ZYNQ_SDHCI_MAX_FREQ as base clock frequency but this clock is not fixed and depends on the hardware configuration. Additionally the value of CONFIG_ZYNQ_SDHCI_MAX_FREQ doesn't match

[U-Boot] [PATCH v3 2/4] serial: zynq: Remove unused index from get uart clock function

From: Stefan Herbrechtsmeier The index of the zynq serial driver is always zero and could be removed. Signed-off-by: Stefan Herbrechtsmeier Acked-by: Michal Simek --- Changes in v3: None

[U-Boot] [PATCH v3 1/4] mmc: sdhci: Distinguish between base clock and maximum peripheral frequency

From: Stefan Herbrechtsmeier The sdhci controller assumes that the base clock frequency is fully supported by the peripheral and doesn't support hardware limitations. The Linux kernel distinguishes between base clock (max_clk) of the host controller and

[U-Boot] [PATCH v3 0/4] mmc: sdhci: Add support for frequency constrained peripheral interfaces

From: Stefan Herbrechtsmeier The sdhci controller assumes that the base clock frequency is fully supported by the peripheral and doesn't support hardware limitations. Distinguish between base clock of the host controller and maximal supported peripheral

Re: [U-Boot] [PATCH v2 1/4] mmc: sdhci: Distinguish between base clock and maximum peripheral frequency

> -Ursprüngliche Nachricht- > Von: Jaehoon Chung [mailto:jh80.ch...@samsung.com] > Gesendet: Donnerstag, 1. Dezember 2016 07:43 > An: Herbrechtsmeier, Stefan; u-boot@lists.denx.de > Cc: Simon Glass; Masahiro Yamada; Stephen Warren; Minkyu Kang; Wenyou > Yang > Betreff: Re: [PATCH v2 1/4]

Re: [U-Boot] [PATCH 2/3] mmc: zynq: Determine base clock frequency via clock framework

> Von: Jaehoon Chung [mailto:jh80.ch...@samsung.com] > > On 11/22/2016 12:26 AM, Stefan Herbrechtsmeier wrote: > > The zynq_sdhci controller driver use CONFIG_ZYNQ_SDHCI_MAX_FREQ as > > base clock frequency but this clock is not fixed and depends on the > > hardware configuration. Additionally

Re: [U-Boot] [PATCH 1/3] mmc: sdhci: Distinguish between base clock and maximum peripheral frequency

Hi, > -Ursprüngliche Nachricht- > Von: Jaehoon Chung [mailto:jh80.ch...@samsung.com] > Gesendet: Freitag, 25. November 2016 06:35 > An: Herbrechtsmeier, Stefan; u-boot@lists.denx.de > Cc: Simon Glass; Masahiro Yamada; Stephen Warren; Heiko Schocher; > Minkyu Kang; Wenyou Yang > Betreff: