On 13/04/2012 10:00, Dirk Behme wrote:
Init the core regulator voltage to 1.2V. This is required for the correct
functioning of the GPU and when the ARM LDO is set to 1.225V. This is a
workaround to fix some memory clock jitter.
Note: This should be but can't be done in the DCD. The
Hi Stefano,
On 23.04.2012 11:55, Stefano Babic wrote:
On 13/04/2012 10:00, Dirk Behme wrote:
Init the core regulator voltage to 1.2V. This is required for the correct
functioning of the GPU and when the ARM LDO is set to 1.225V. This is a
workaround to fix some memory clock jitter.
Note: This
On 23/04/2012 11:55, Stefano Babic wrote:
+static void init_anatop_reg(void)
+{
+struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
+int reg = readl(anatop-reg_core);
+
+/*
+ * Increase the VDDSOC to 1.2V
+ * Mask out the REG_CORE[22:18] bits
On 13.04.2012 10:00, Dirk Behme wrote:
Init the core regulator voltage to 1.2V. This is required for the correct
functioning of the GPU and when the ARM LDO is set to 1.225V. This is a
workaround to fix some memory clock jitter.
Note: This should be but can't be done in the DCD. The bootloader
2012/4/13 Dirk Behme dirk.be...@de.bosch.com:
Init the core regulator voltage to 1.2V. This is required for the correct
functioning of the GPU and when the ARM LDO is set to 1.225V. This is a
workaround to fix some memory clock jitter.
Note: This should be but can't be done in the DCD. The
Init the core regulator voltage to 1.2V. This is required for the correct
functioning of the GPU and when the ARM LDO is set to 1.225V. This is a
workaround to fix some memory clock jitter.
Note: This should be but can't be done in the DCD. The bootloader
prevents access to the ANATOP
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