Dear Kumar Gala,
In message [EMAIL PROTECTED] you wrote:
PCI bus is inherently 64-bit. We should treat all PCI related bus
addresses as 64-bit quanities. This allows us to have the ability
to support devices or memory on the PCI bus above the 32-bit boundary.
I don't think this is a good
Wolfgang Denk wrote:
Dear Kumar Gala,
In message [EMAIL PROTECTED] you wrote:
PCI bus is inherently 64-bit. We should treat all PCI related bus
addresses as 64-bit quanities. This allows us to have the ability
to support devices or memory on the PCI bus above the 32-bit boundary.
I
On Oct 21, 2008, at 9:55 AM, Jerry Van Baren wrote:
Wolfgang Denk wrote:
Dear Kumar Gala,
In message [EMAIL PROTECTED]
you wrote:
PCI bus is inherently 64-bit. We should treat all PCI related bus
addresses as 64-bit quanities. This allows us to have the ability
to support devices or
Dear Jerry Van Baren,
In message [EMAIL PROTECTED] you wrote:
Should we not enable this only for such systems that actually need it?
...
Why would we not use phys_addr_t and phys_size_t for the PCI addresses?
Good point.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH,
Dear Kumar Gala,
In message [EMAIL PROTECTED] you wrote:
If this is desired to be configurable should I introduce a pci_addr_t/
pci_size_t? Coupling to phys_addr_t/phys_size_t doesn't make sense to
me because its perfectly reasonable to have a 64-bit PCI device work
in a 32-bit
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