Hi all,
Il 26/02/2018 13:31, Anatolij Gustschin ha scritto:
Hi all,
On Fri, 16 Feb 2018 14:10:25 +0100
Maxime Ripard maxime.rip...@bootlin.com wrote:
Hi,
On Thu, Feb 15, 2018 at 06:40:53PM +0100, Giulio Benetti wrote:
Differently from other Lcd signals, HSYNC and VSYNC signals
result
Hi all,
On Fri, 16 Feb 2018 14:10:25 +0100
Maxime Ripard maxime.rip...@bootlin.com wrote:
> Hi,
>
> On Thu, Feb 15, 2018 at 06:40:53PM +0100, Giulio Benetti wrote:
> > Differently from other Lcd signals, HSYNC and VSYNC signals
> > result inverted if their bits are cleared to 0.
> >
> > Invert
Hi,
On Thu, Feb 15, 2018 at 06:40:53PM +0100, Giulio Benetti wrote:
> Differently from other Lcd signals, HSYNC and VSYNC signals
> result inverted if their bits are cleared to 0.
>
> Invert their settings of IO_POL register.
>
> Signed-off-by: Giulio Benetti
>
Differently from other Lcd signals, HSYNC and VSYNC signals
result inverted if their bits are cleared to 0.
Invert their settings of IO_POL register.
Signed-off-by: Giulio Benetti
---
drivers/video/sunxi/lcdc.c | 4 ++--
1 file changed, 2 insertions(+), 2
4 matches
Mail list logo