Re: [U-Boot] [PATCH 02/10] sunxi: Add CCI-400 and CPUCFG registers base address for sun9i/A80

Hi, On 09-11-16 11:21, Chen-Yu Tsai wrote: The A80, having 2 clusters of 4 cores each, has an ARM CCI-400 hardware block for cache coherency. Add the base address for CCI-400, and also add the base address for CPUCFG. Signed-off-by: Chen-Yu Tsai LGTM: Reviewed-by: Hans de

[U-Boot] [PATCH 02/10] sunxi: Add CCI-400 and CPUCFG registers base address for sun9i/A80

The A80, having 2 clusters of 4 cores each, has an ARM CCI-400 hardware block for cache coherency. Add the base address for CCI-400, and also add the base address for CPUCFG. Signed-off-by: Chen-Yu Tsai --- arch/arm/include/asm/arch-sunxi/cpu_sun9i.h | 3 +++ 1 file changed, 3