Re: [U-Boot] [PATCH 1/4] ARM: dra7xx: Change DPLL_PER_HS13 divider value

2016-07-29 Thread Jagan Teki
On 29 July 2016 at 14:12, Mugunthan V N wrote: > On Monday 25 July 2016 03:45 PM, Vignesh R wrote: >> From: Lokesh Vutla >> >> According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, hence >> update QSPI input clock divider value (DPLL_PER_HS13) to provide 76.8MHz >> clock, so that driver

Re: [U-Boot] [PATCH 1/4] ARM: dra7xx: Change DPLL_PER_HS13 divider value

2016-07-29 Thread Mugunthan V N
On Monday 25 July 2016 03:45 PM, Vignesh R wrote: > From: Lokesh Vutla > > According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, hence > update QSPI input clock divider value (DPLL_PER_HS13) to provide 76.8MHz > clock, so that driver can use the same. > > Signed-off-by: Vignesh R > --

Re: [U-Boot] [PATCH 1/4] ARM: dra7xx: Change DPLL_PER_HS13 divider value

2016-07-25 Thread Tom Rini
On Mon, Jul 25, 2016 at 03:45:44PM +0530, Vignesh R wrote: > From: Lokesh Vutla > > According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, hence > update QSPI input clock divider value (DPLL_PER_HS13) to provide 76.8MHz > clock, so that driver can use the same. > > Signed-off-by: Vigne

[U-Boot] [PATCH 1/4] ARM: dra7xx: Change DPLL_PER_HS13 divider value

2016-07-25 Thread Vignesh R
From: Lokesh Vutla According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, hence update QSPI input clock divider value (DPLL_PER_HS13) to provide 76.8MHz clock, so that driver can use the same. Signed-off-by: Vignesh R --- arch/arm/cpu/armv7/omap5/hw_data.c | 2 +- 1 file changed, 1 in